Beruflich Dokumente
Kultur Dokumente
HGTP10N50C1D, HGTP10N50E1D
10A, 400V and 500V N-Channel IGBTs
April 1995 with Anti-Parallel Ultrafast Diodes
Features Package
• 10A, 400V and 500V JEDEC TO-220AB
• VCE(ON): 2.5V Max. EMITTER
COLLECTOR
• TFALL: 1µs, 0.5µs GATE
• Low On-State Voltage
COLLECTOR
• Fast Switching Speeds (FLANGE)
• High Input Impedance
• Anti-Parallel Diode
Applications
• Power Supplies Terminal Diagram
• Motor Drives
N-CHANNEL ENHANCEMENT MODE
• Protective Circuits
C
Description
The HGTP10N40C1D, HGTP10N40E1D, HGTP10N50C1D,
and HGTP10N50E1D are n-channel enhancement-mode
G
insulated gate bipolar transistors (IGBTs) designed for high
voltage, low on-dissipation applications such as switching reg-
ulators and motor drivers. They feature a discrete anti-parallel
E
diode that shunts current around the IGBT in the reverse
direction without introducing carriers into the depletion region.
These types can be operated directly from low power inte-
grated circuits.
PACKAGING AVAILABILITY
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. File Number 2405.5
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
3-20
Specifications HGTP10N40C1D, HGTP10N40E1D, HGTP10N50C1D, HGTP10N50E1D
LIMITS
HGTP10N40C1D, HGTP10N50C1D,
HGTP10N40E1D HGTP10N50E1D
Gate Threshold Voltage VGE(TH) VGE = VCE, IC = 1mA 2.0 4.5 2.0 4.5 V
Zero Gate Voltage Collector Current ICES VCE = 400V, TC = +25oC - 250 - - µA
Turn-Off Energy Loss per Cycle (Off WOFF IC = 10A, VCE(CLP) = 300V,
Switching Dissipation = L = 50µH, TJ = +100oC,
WOFF x Frequency) VGE = 10V, RG = 50Ω
Diode Reverse Recovery Time tRR IEC = 10A, di/dt = 100A/µs - 100 - 100 ns
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS:
4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,567,641
4,587,713 4,598,461 4,605,948 4,618,872 4,620,211 4,631,564 4,639,754 4,639,762
4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690
4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606
4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951
4,969,027
3-21
HGTP10N40C1D, HGTP10N40E1D, HGTP10N50C1D, HGTP10N50E1D
15.0
80
12.5
10.0 60
7.5
40
5.0
20
2.5
0
-75 -50 -25 0 +25 +50 +75 +100 +125 +150 +175 0 +25 +50 +75 +100 +125 +150
TJ , JUNCTION TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)
FIGURE 1. MAX. SWITCHING CURRENT LEVEL. RG = 50Ω, FIGURE 2. POWER DISSIPATION vs TEMPERATURE DERAT-
VGE = 0V ARE THE MIN. ALLOWABLE VALUES ING CURVE
35
NORMALIZED GATE THRESHOLD VOLTAGE
1.2
25
1.1
20
1.0
15
0.9
0.8 10
+25oC -40oC
0.7 5
+125oC
0
-50 0 +50 +100 +150 0 2.5 5.0 7.5 10.0
TJ , JUNCTION TEMPERATURE (oC) VGE, GATE-TO-EMITTER VOLTAGE (V)
FIGURE 3. TYPICAL NORMALIZED GATE THRESHOLD FIGURE 4. TYPICAL TRANSFER CHARACTERISTICS
VOLTAGE vs JUNCTION TEMPERATURE
TC = +25oC
35 35
VGE = 20V VGE = 7V PULSE TEST, VGE = 10V
PULSE DURATION = 80µs
30 VGE = 10V 30
ICE, COLLECTOR CURRENT (A)
20 20
+25oC
15 15
VGE = 5V
10 10
5
5 VGE = 4V
0 0
0 1 2 3 4 5 0 1 2 3 4
VCE, COLLECTOR-TO-EMITTER VOLTAGE (V) VCE(ON), COLLECTOR-TO-EMITTER VOLTAGE (V)
3-22
HGTP10N40C1D, HGTP10N40E1D, HGTP10N50C1D, HGTP10N50E1D
800 2.50
400 2.00
400
IC = 20A, VGE = 10V, VCL = 300V WOFF = ∫ IC * VCEdt
L =25µH, RG = 25Ω
TD(OFF)I, TURN OFF DELAY TIME (ns)
VGE IC
300
VCE
200
100
0
+25 +50 +75 +100 +125 +150
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. TYPICAL TURN-OFF DELAY TIME FIGURE 10. TYPICAL INDUCTIVE SWITCHING WAVEFORMS
800 800
IC = 5A, VGE = 10V, VCL = 300V IC = 10A, VGE = 10V, VCL = 300V
700 L = 50µH, RG = 50Ω 700 L = 50µH, RG = 50Ω
600 600
40E1/50E1
tFI , FALL TIME (ns)
400 400
40C1/50C1 40C1/50C1
300 300
200 200
100 100
0 0
+25 +50 +75 +100 +125 +150 +25 +50 +75 +100 +125 +150
TJ, JUNCTION TEMPERATURE (oC) TJ, JUNCTION TEMPERATURE (oC)
FIGURE 11. TYPICAL FALL TIME (IC = 5A) FIGURE 12. TYPICAL FALL TIME (IC = 10A)
3-23
HGTP10N40C1D, HGTP10N40E1D, HGTP10N50C1D, HGTP10N50E1D
20A, 40E1/50E1
FIGURE 13. TYPICAL CLAMPED INDUCTIVE TURN-OFF FIGURE 14. NORMALIZED SWITCHING WAVEFORMS AT CON-
SWITCHING LOSS/CYCLE STANT GATE CURRENT. (REFER TO APPLICA-
TION NOTES AN7254 AND AN7260)
100
TYPICAL REVERSE RECOVERY TIME
IEC , EMITTER-COLLECTOR CURRENT (A)
60
10
TJ = +150oC 50
40
TJ = +100oC
dIEC/dT ≥ 100A/µs
30
1 TJ = +25oC VR = 30V, TJ = +25oC
20
TJ = -50oC
10
0.1
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0 2 4 6 8 10 12 14 16 18 20
VEC, EMITTER-COLLECTOR (V) IEC , EMITTER-COLLECTOR CURRENT (A)
FIGURE 15. TYPICAL DIODE EMITTER-TO-COLLECTOR FIGURE 16. TYPICAL DIODE REVERSE-RECOVERY TIME FOR
VOLTAGE vs CURRENT FOR ALL TYPES ALL TYPES
Test Circuit
RL = 13Ω
L = 50µH
VCC
1/RG = 1/RGEN + 1/RGE
VCE(CLP)=
RGEN = 100Ω 300V
20V
RGE = 100Ω
0V
3-24
HGTP10N40C1D, HGTP10N40E1D, HGTP10N50C1D, HGTP10N50E1D
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
3-25
This datasheet has been downloaded from:
www.DatasheetCatalog.com