Subject

Department Faculty Name name

 Question

What are four generations of Integration Circuits?

What is advantage of an IC?

What are the basic process of IC fabrication?

What are the various Silicon wafer Preparation?
Why NMOS technology is preferred more than PMOS technology?

When the channel is said to be pinched –off?

Define Threshold voltage in CMOS

What is Body effect?

What is Channel-length modulation?

What the different types of CMOS process?
What is the fundamental goal in Device modeling?
Define Short Channel devices
What is pull down device?
What is pull up device?
What Are The Different Layers In Mos Transistors?

How reliability of a VLSI circuit is related to its power dissipation dissipation?

How environment is affected by the power dissipation of VLSI circuits circuits?

Why leakage power dissipation has become an important issue in deep submicron
technology in deep submicron technology?

What are the commonly used conducting layers used in IC fabrication?

Distinguish between the bulk CMOS technology with the SoI technology
fabrications
What are The Steps Involved In Twin-tub Process?
What Is Bicmos Technology?
What are the advantages Of CMOS Process?

What Is Verilog?
What Is FPGA?
 Answer(with two or three lines explanation)

SSI (Small Scale Integration), MSI (Medium Scale Integration), LSI (Large Scale Integration), VLSI (Very Large Scale Integration)
Less size, High speed, less power consumption
Silicon wafer Preparation, Epitaxial Growth, Oxidation, Photolithography, Diffusion, Ion Implantation, Isolation technique,
Metallization, Assembly processing & Packaging
Crystal growth & doping, Ingot trimming & grinding, Ingot slicing, Wafer polishing & etching, Wafer cleaning
N- channel transistors has greater switching speed when compared tp PMOS transistors.

If a large Vds is applied this voltage with deplete the Inversion layer . This Voltage effectively pinches off the channel near the d
The Threshold voltage, VT for a MOS transistor can be defined as the voltage applied between the gate and the source of the M
transistor below which the drain to source current, IDS effectively drops to zero
The threshold volatge VT is not a constant w. r. to the voltage difference between the substrate and the source of MOS transist
effect is called substrate-bias effect or body effect.

The current between drain and source terminals is constant and independent of the applied voltage over the terminals. This is
entirely correct. The effective length of the conductive channel is actually modulated by the applied VDS, increasing VDS cause
depletion region at the drain junction to grow, reducing the length of the effective channel.

p-well process, n-well process, Silicon-On-Insulator Process, Twin- tub Process

To obtain the functional relationship among the terminal electrical variables of the device that is to be modeled.
Transistors with Channel length less than 100 nm are termed as Short channel devices. With short channel devices the ratio be
A device connected so as to pull the output voltage to the lower supply voltage usually 0V is called pull down device.
A device connected so as to pull the output voltage to the upper supply voltage usually VDD is called pull up device
Drain, Source & Gate

It has been observed that : It has been observed that every 10ºC rise in temperature ºC rise in temperature roughly doubles th
failure roughly doubles the failure rate because various fa rate because various failure mechanism lure mechanism such as silic
interconnect fatigue, such as silicon interconnect fatigue, electromigrat electromigration diffusion, ion diffusion, junction diffus
and thermal runaway starts occurring as temperature increases.

According to an estimate of the U.S. Environmental Protection Agency (EPA), 80% of the power consumption by office equipme
due to computing equipment and a large part from unused part from unused equipment. Moreover, the power equipment.
Moreover, the power is dissipated is dissipated mostly in the form of heat. The cooling techniques, such as AC transfers the hea
the environment.

In deep submicron technology deep submicron technology the leakage component the leakage component becomes a signific
percentage of the total power and the leakage current increases at a faster rate than dynamic power amic power in new techn
technology generations. That is why the leakage pow generations. That is why the leakage power has become an important iss
Fabrication involves fabrication of patterned laye atterned layers of the rs of the three conducting materials: metal, poly-silicon
silicon and diffusion by using a series of photolithographic techniques and chemical processes involving oxidation of silicon, diff
of impurities into the silicon and deposition and etching of aluminum or polysilicon polysilicon on the silicon to provide
interconnectio on the silicon to provide interconnection.

In bulk CMOS technology, a lightly doped p-type or n-type substrate is used to fabricate MOS transis type substrate is used to
fabricate MOS transistors. On the other hand, an insulator can be used as a substrate to fabricate MOS transistors
Tub Formation , Thin-oxide Construction , Source & Drain Implantation , Contact cut definition, Metallization.
It is the combination of bipolar technology & CMOS technology.
Low power Dissipation, High Packing density , Bi directional capability
Verilog is a general purpose hardware descriptor language. It is similar in syntax to the C programming language. It can be used
model a digital system at many levels of abstraction ranging from the algorithmic level to the switch level.
o between the lateral & vertical dimensions are reduced.