Sie sind auf Seite 1von 4

TABLE 1 Comparison with Published CMOS Distributed VCOs and Oscillators

Oscillator Frequency Tuning Phase Noise Die Area Power Consumption


Reference Technology (GHz) Range (%) (dBc/Hz@ 1MHz) (mm2) (mW)
[2] 0.18-␮m CMOS 16.6 N/A ⫺110 ⬎2 52
[3] 0.35-␮m SiGe BiCMOS 10.2 18 ⫺114 1.4 35
[8] 0.18-␮m CMOS 10 14 ⫺113.7 0.91 156
This Work 0.18-␮m CMOS 14.9 12 ⫺100.2 0.08 34

5. CONCLUSIONS its good figure of merit based on its total power consumption of 19 mW,
A new 0.18-␮m CMOS distributed voltage-controlled oscillator measured power gain of 17 dB, input third-order intercept point of ⫺7
dBm, and noise figure of 3.4 dB at 5.7 GHz. © 2009 Wiley Periodicals,
has been successfully designed with novel multilayer inductors,
Inc. Microwave Opt Technol Lett 51: 1955–1958, 2009; Published on-
resulting in the smallest structure with over 90% size reduction
line in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/
over earlier reported distributed oscillators and VCOs. The distrib- mop.24493
uted VCO also exhibits good performance with wide tuning range,
good output spectral power, very low power consumption, and Key words: low-noise amplifier; active inductor; inductor; CMOS;
moderate phase noise and is therefore highly attractive for multi- noise figure
Gigahertz CMOS VCO applications.
1. INTRODUCTION
ACKNOWLEDGMENTS
Most of the RF low-noise amplifiers (LNAs) employ on-chip spiral
This work was supported in part by the National Science Founda- inductors to realize the impedance matching networks and the
tion. loads to the next stage [1, 2]. On-chip spiral inductors can provide
good RF performance in terms of linearity. However, they require
REFERENCES large silicon area and their quality factor (Q) is often limited in the
1. Z. Skvor, S.R. Saunders, and C.S. Aitchison, Novel electronically range from 5 to 15 because of the low-resistivity silicon substrate.
tunable microwave oscillator based on the distributed amplifier, Elec- On the contrary, active inductors can benefit the design of RF
tron Lett 28 (1992), 1647–1648. circuits in a way they can provide high quality factor and reduce
2. B. Kleveland, C.H. Diaz, D. Dieter, L. Madden, T.H. Lee, and S.S. the consumption of silicon area. In the designs of CMOS LNAs
Wong, Monolithic CMOS distributed amplifier and oscillator, IEEE
[3–7], active inductors are usually connected to the drain terminals
ISSCC Dig Tech Papers, San Francisco, CA (1999), 70 –71.
3. H. Wu and A. Hajimiri, A 10 GHz CMOS distributed voltage controlled
as the loads. One of the drawbacks of this circuit topology is the
oscillator, In: Proceedings of IEEE Custom Integrated Circuits Confer- poor linearity caused by using active inductors as the loads. In this
ence, 2000, pp. 581–584. article, a novel circuit topology employing the active inductor is
4. JAZZ Foundry, CA18HR 0.18-␮m CMOS process, JAZZ foundry, presented to design a 5.7-GHz LNA. The active inductor in the
Newport Beach, CA, USA. LNA acts as a source-degenerated inductor for the purpose of input
5. C.P. Yue and S.S. Wong, Physical modeling of spiral inductors on matching without sacrificing the linearity of the LNA. The mea-
silicon, IEEE Trans Electron Dev 47 (2000), 560 –568. surement results of the LNA demonstrate that a good figure of
6. Zeland Software, IE3D, version 10.0, Zeland Software Inc., Fremont, merit (FOM) can be achieved.
CA, USA.
7. Agilent Technologies, ADS, version 2005A, Agilent Technologies,
2. CIRCUIT DESIGN
Palo Alto, CA, USA.
8. M. Si Moussa, et. al., Design of a distributed oscillator in 130 nm SOI The LNA employs the cascode topology which is shown in Figure
MOS technology, In: Proceedings of the 36th European Microwave 1. The transistor M2 is the common-gate stage which shields the
Conference, Manchester, England 2006, pp. 1526 –1529. output from the input stage M1. By eliminating the miller effect
and the signal feedback from the output to the input, M2 improves
© 2009 Wiley Periodicals, Inc.

A 5.7-GHz LOW-NOISE AMPLIFIER


WITH SOURCE-DEGENERATED ACTIVE
INDUCTOR
Chun-Hsueh Chu, I-Lun Huang, Yih-Hsia Lin, and Jeng Gong
Institute of Electronics Engineering, National Tsing Hua University,
Hsinchu 300, Taiwan, Republic of China; Corresponding author:
d949018@oz.nthu.edu.tw

Received 5 November 2008

ABSTRACT: This article presents a novel application of the active


inductor in the design of the low-noise amplifier (LNA). To reduce the
silicon area consumed by the LNA without sacrificing its linearity, the
passive source-degenerated inductor in the conventional design is re-
placed with the active inductor. The LNA is fabricated with a standard Figure 1 The proposed 5.7-GHz low-noise amplifier with source-degen-
0.18-␮m CMOS process. Compared with previous arts, this LNA exhib- erated active inductor

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 51, No. 8, August 2009 1955
Figure 2 The equivalent circuit of the active inductor
Figure 4 Measured gain and input/output return losses of the 5.7-GHz
LNA
the gain performance and enhances the stability of the LNA. The
transistor M1 is a source-degenerated amplifier where the active
inductor connects to its source. The transistor Ma5 provides the
biasing to the LNA by controlling the current through both of the
transistors M1 and Ma2. The passive inductor L1 at the gate of M1
and the active inductor at the source form the input matching
network of the LNA. The supply voltage VDD2 of the active
inductor is 3 V and the supply voltage VDD1 of the LNA is 1.8 V
which is equal to the control voltage VB at the gate of the transistor
Ma5. The bias voltages at the gates of M1 and M2 are 1.3 and 1.8
V, respectively.
Two NMOS transistors in the active inductor, Ma1 and Ma2,
provide the basic function of inductance. The common-gate tran-
sistor Ma3 inserted between Ma1 and Ma2 can increase the induc-
tance and bandwidth of this active inductor. The inductance of the
active inductor comes from a feedback mechanism as the follow-
ing. The common-source transistor Ma1 converts the input voltage
at the gate terminal to the output current which becomes the input

Figure 5 Measured and simulated noise figures of the 5.7-GHz LNA

Figure 3 Die photograph of the 5.7-GHz LNA with a chip size of 820 ⫻
750 ␮m2. [Color figure can be viewed in the online issue, which is
available at www.interscience.wiley.com] Figure 6 Measured power performances of the 5.7-GHz LNA

1956 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 51, No. 8, August 2009 DOI 10.1002/mop
TABLE 1 Summary of CMOS LNAs Using Active Inductors

Frequency Gain NF P1dB IIP3 S11 Pdc


Ref. Process (GHz) (dB) (dB) (dBm) (dBm) (dB) (mW) FOM
This work 0.18-␮m CMOS 5.7 17 3.4 ⫺16 ⫺7 ⫺15.4 19 2.53
[4] 0.3-␮m CMOS 2.4 19.2 2 — — — 40.8 —
[5] 0.35-␮m CMOS 2.4 17.7 4.7 — — ⫺22.2 22.35 —
[6] 0.18-␮m CMOS 2.4 27 2.2 ⫺26 — ⫺23.5 20 —
[7] 0.18-␮m CMOS 3-5 19.5 4.1 — ⫺22 ⬍⫺7.8 16.56 0.11

current of the common-gate transistor Ma3. Then, Ma3 converts the 1 gmZin
input current to a voltage which applies to the gate terminal of Ma2 where Zin1 ⫽ Zin ⫹ ⫹ and Cm1 is the miller capac-
sCgs sCgs
and generates a current at the node connecting the source of Ma2 itance from M1.
and the gate of Ma1. When the active circuit properly adjusts the
phase difference between the voltage and the current at the gate
3. EXPERIMENTAL RESULTS
terminal of the transistor Ma1, it can provide an emulated induc-
tance for the design of the LNA circuit. A transistor Ma4 as a The 5.7-GHz LNA was fabricated with a standard 0.18-␮m 1P6M
regulating gain stage located between Ma1 and Ma3 can addition- CMOS technology. The die photograph is illustrated in Figure 3,
ally expand the bandwidth of the active inductor because it effec- where the die size including the pads is around 0.6 mm2. This
tively increases the output resistance seen from the drain terminal circuit, consuming 19 mW dc power, was measured via on-wafer
of the transistor Ma3 [3]. The equivalent circuit of this regulated probing. Figure 4 shows that measured power gain is 17 dB and
cascode active inductor is depicted in Figure 2, where the imped- measured input/output return losses are better than 15 dB at 5.7
ance of the active inductor, Zin, is modeled by an inductance Leq in GHz. As shown in Figure 5, the NF reaches 3.4 dB at 5.7 GHz.
series with a resistance Req, as given by Eq. (1), a shunt capaci- Figure 6 shows the linearity performances of the LNA. The input
tance Cp and a shunt resistance Rp which accounts for the loss as P1dB and IIP3 at 5.7 GHz are ⫺16 and ⫺7 dBm, respectively. A
shown in Figure 2. widely used FOM including IIP3 and operating frequency fC of the
LNA is given as follows:
Z in⬘ ⫽ sLeq ⫹ Req (1)
All of the components Leq, Req, Cp, and Rp, given by Eqs. (2)–(4), Gain[abs]䡠IIP3[mW] 䡠 fC[GHz]
FOM⫽ . (6)
can be derived from the small-signal equivalent circuit of each (NF⫺1)[abs]䡠Pdc[mW]
NMOS transistor depicted by the second-order model comprising
Cgs, Cgd, gm, and gds(⫽ 1/rO).
In Eq. (6), [abs] denotes the absolute values of the parameters.
As summarized in Table 1, the proposed LNA with source-
共Cgs2 ⫹ Cgd2 ⫹ Cgd3兲 Cgs2 ⫹ Cgd2 ⫹ Cgd3
L eq ⬇ ⬇ degenerated active inductor achieves satisfying performances as
共 gm2 ⫹ sCgs2兲 䡠 关 gm1 ⫺ s共Cgs2 ⫹ Cgd1兲兴 gm1gm2 compared with the other LNAs using active inductors as their
(2) loads [3–7].

gds1gds3gds4 gds1gds3gds4
R eq ⫽ ⬇ 4. CONCLUSION
gm1gm2共 gm3gm4 ⫹ gds3gds4 ⫹ gm3gds4兲 gm1gm2gm3gm4
A 5.7-GHz LNA using source-degenerated active inductor has been
(3) designed, fabricated, and measured. This proposed circuit topology
demonstrates that the active inductor is an effective alternative to the
1 passive inductor and the LNA with source-degenerated active induc-
C p ⫽ Cgs1 ⫹ Cgs2 ⫹ Cgd1 and Rp ⫽ (4)
gm2 ⫹ gds2 tor exhibits good RF performances at 5.7 GHz.

Referring to Eqs. (2) and (3), it is evident that the biasing condition
ACKNOWLEDGMENTS
of the regulating transistor Ma4 affects Req and the biasing condi-
tion of Ma1 and Ma2 affects Leq. In other words, the inductance and The authors would like to acknowledge the assistance and support
the quality factor of the active inductor can be adjusted indepen- of National Chip Implementation Center (CIC), National Applied
dently by using proper biasing currents of Ma4, Ma1, and Ma2. Research Laboratories for manufacturing the chip of 5.7-GHz
Increasing the gm3 and gm4 can decrease the series equivalent CMOS LNA circuit. This work is also supported by National
resistance Req and, therefore, improve the quality factor of the Science Council, Taiwan, R.O.C., under the contract of NSC
active inductor. However, additional power consumption should 95-2221-E-007-259-MY2.
be taken into account.
The simulation results show that the inductance of the active
inductor is 0.68 nH and the associated quality factor is 28.3 at 5.7 REFERENCES
GHz. To match the input impedance Zin2 of the LNA with the 1. H.W. Chiu, S.S. Lu, and Y.S. Lin, A 2.17-dB NF 5-GHz-band mono-
source resistance of 50 ⍀ at the operating frequency 5.7 GHz, Zin2 lithic CMOS LNA with 10-mW dc power consumption, IEEE Trans
is determined by Eq. (5) of which the imaginary part should be Microwave Theory Tech 50 (2005), 813– 824.
equal to zero and the real part is 50 ⍀, 2. D. Linten, S. Thijs, M.I. Natarajan, P. Wambacq, W. Jeamsaksiri, J.
Ramos, A. Mercha, S. Jenei, S. Donnay, and S. Decoutere, A 5-GHz
fully integrated ESD-protected low-noise amplifier in 90-nm RF
1 CMOS, IEEE J Solid State Circ 40 (2005), 1434 –1442.
Z in2 ⫽ sL1⫹(Zin1 ⫹ ), (5)
sCm1 3. W. Zhuo, J.P. de Gyvez, and E. Sanchez-Sinencio, Programmable low

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 51, No. 8, August 2009 1957
noise amplifier with active-inductor load, IEEE Int Symp Circ Syst 4 than those in the doped-channel MESFET, especially at low
(1998), 365–368. temperature. As a matter of fact, the electron crossing the
4. A. Pascht, J. Fischer, and M. Berroth, A CMOS low noise amplifier at undoped quantum well channel is spatially separated from the
2.4 GHz with active inductor load, Topical Meeting on Silicon Mono- donors by a spacer layer. Although nowadays GaN-based
lithic Integrated Circuits in RF Systems, 12–14 September 2001, pp.
HEMTs are attracting huge attention, thanks especially to their
1–5.
superior power performance, GaAs HEMTs allow to obtain
5. R.-M. Weng and P.-S. Lin, A 2V CMOS low noise amplifier with
tunable image filtering, IEEE Asia Pacific Conf Circ Syst 1 (2004), noise performance which are still difficult to improve signifi-
293–296. cantly. The objective of this article is to investigate the small
6. L.C. Lee, A.K. A’ain, and K.A. Victor, A 2.4-GHz CMOS tunable signal modeling of scaled AlGaAs/GaAs HEMTs, because the
image-rejection low-noise amplifier with active inductor, IEEE Asia modeling of the microwave small signal behavior of the active
Pacific Conf Circ Syst (2006), 1679 –1682. solid-state devices is still a key issue [3–9]. This is because an
7. M.U. Nair, Y. Zheng, and Y. Lian, An active inductor based low-power accurate multibias small signal model is essential for evaluating
UWB LNA, IEEE Int Conf Ultra-Wideband (2007), 813– 816. the transistor microwave performance, for designing both
power and low noise amplifiers, and for building a reliable large
© 2009 Wiley Periodicals, Inc. signal model.
The analytical modeling procedure for extracting the multibias
small signal equivalent circuit from scattering (S-) parameter mea-
surements is described in Section 2. In particular, the extrinsic
ON WAFER-SCALED GaAs HEMTs: circuit section, whose elements are assumed bias-independent, is
DIRECT AND ROBUST SMALL SIGNAL extracted from S-parameters at “cold” pinch-off condition (i.e., Vds
MODELING UP TO 50 GHz ⫽ 0 V and Vgs ⬍ Vpo), and, afterwards, the intrinsic circuit section,
Alina Caddemi, Giovanni Crupi, and Alessio Macchiarella whose elements are bias dependent, is determined at each bias
Dipartimento di Fisica della Materia e Ingegneria Elettronica, University point. The modeling results are reported and discussed in Section
of Messina, Salita Sperone 31, Messina 98166, Italy; Corresponding 3. In particular, attention is devoted to the model scaling, because
author: giocrupi@ingegneria.unime.it the analysis of the scalability of the transistor performance is of
great importance [10 –13]. Finally, the conclusions are presented in
Received 5 November 2008 the last section.

ABSTRACT: This article is aimed at extracting an accurate multibias 2. MODELING PROCEDURE


small signal equivalent circuit for on-wafer microwave HEMTs, which The studied microwave transistors are on wafer AlGaAs/GaAs
are based on AlGaAs/GaAs heterostructure. The main advantage of the
HEMTs with different gate width 100, 200, and 300 ␮m. The
on-wafer characterization consists of having the possibility to determine
small signal behavior of these devices have been already mod-
the real microwave performance of the transistors, since the inclusion of
additional parasitic effects, such as in the case of the packaging and eled by using S-parameters measured with an Agilent 8753E
wire bonding, are avoided. The presented small signal modeling tech- VNA (vector network analyzer) working up to 6 GHz [3]. In the
nique is direct. As a matter of fact, the equivalent circuit elements are present case, the S-parameters of these devices are measured
extracted from scattering parameter measurements by using only analyt- over a much wider frequency range extending from 0.5 up to 50
ical formulas, without any optimization procedures. The validity of the GHz with an Agilent E8364A PNA (precision network ana-
obtained circuit models is successfully verified by comparing simulated lyzer). The advantage of using broad-band measurements con-
and measured data of scaled GaAs HEMTs up to 50 GHz. © 2009 sists of having a greater flexibility in choosing the frequency
Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 1958 –1963, range for extracting each circuit element in such a way that the
2009; Published online in Wiley InterScience (www.interscience.wiley.
extraction resolution increases. On the other hand, higher fre-
com). DOI 10.1002/mop.24492
quency range implies also a more challenging modeling. As a
matter of fact, the nonquasi static effects play only a minor role
Key words: HEMT; multibias; small signal modeling; scaling; scatter-
in the low frequency range, while a successful model validation
ing parameters
in the high frequency range implies an accurate determination
of the nonquasi static effects. Figure 1 shows the equivalent
1. INTRODUCTION circuit topology used for reproducing the measured small signal
The first realization of a transistor based on an active channel behavior of the tested HEMTs. It should be observed that the
consisting of a two-dimensional electron gas (2DEG) in a extrinsic capacitances have been divided into two parts in order
potential quantum well has been developed, almost 30 years
ago, at the Fujitsu Laboratories [1, 2]. The Japanese researchers
have suggested HEMT, which stands for high electron mobility
transistor, as suitable name for this active solid-state device.
Already from its infancy, this kind of advanced microwave
transistor has attracted worldwide attention and researchers
from other laboratories have proposed different acronyms de-
scribing its basic operating principles: modulation-doped FET
(MODFET), two-dimensional electron gas FET (TEGFET), se-
lectively doped heterojunction transistor (SDHT), and hetero-
structure FET (HFET). The conventional metal semiconductor
field effect transistor (MESFET) has been rapidly replaced by
the HEMT, which exhibits larger gain, lower noise figure, and
higher operating frequency. This is mainly due to the fact that
the carriers in a 2DEG, generally, have a much higher mobility Figure 1 Small signal equivalent circuit for HEMT

1958 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 51, No. 8, August 2009 DOI 10.1002/mop