La D641P

A B C D E
Model Name : B5/B7W1A

File Name : LA-D641P
1 1
Compal Confidential
2 2
B5/B7W1A M/B Schematics Document

Intel Apollo lake
UMA
2016-07-22
3 3
REV:1.A
For 1A PCB
PCB15A@
ZZZ2
Part Number Description
DA6001K401A PCB 1NU LA-D641P REV1A MB 1
PCB17A@
ZZZ3
DA6001K411A PCB 1NU LA-D641P REV1A MB 2
4 PCB15@ 4
ZZZ
DA6001K4000 PCB 1NU LA-D641P REV0 MB 1
PCB17@
ZZZ Security Classification Compal Secret Data Compal Electronics, Inc.
Part Number Description Issued Date 2014/03/19 Deciphered Date 2015/03/18 Title
DA6001K4100 PCB 1NU LA-D641P REV0 MB 2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1A_LA-D641PR1A
Date: Monday, July 25, 2016 Sheet 1 of 45
A B C D E
A B C D E
DDR3L-ON BOARD 1Rx16

CHA:DDR3L-Memory Down
eDP Conn. P.16,17
P.25
P.21
1 1
HDMI Conn. CHB:204pin DDR3L-SO-DIMM X1

P.20 P.18
Memory BUS
port 0 Dual Channel
1.35V DDR3L 1600
DDI x2
EDPx1
USB2.0 x8 port 1 port 2 port 3 port 4 port 5 port 6 port 7
PCIE 2.0 x1
port 2 Touch Panel

P.20 HD Camera
RJ45 Conn. LAN(GbE) Apollo Lake Conn. P.20
RTL8111H/GUS P.22 USB 2.0 USB 2.0
2 USB 3.0 Card Reader
2
Conn P.26 Conn On Sub/B

RTS5170
SOC port 1
P.26 P.26
On Sub/B
P.26
EMMC BGA 1296 balls USB3.0 x1
eMMC
P.19
SATA 3.0 x2 31 x 24 mm PCIE 2.0 x1 port 3
NGFF
port 1 port 0 WLAN/BT P.23
P.25
P.25
page 05~15 HD Audio HDA Codec

ALC233
P.29
I2C BUS LPC BUS SPI
3 3
SATA ODD Conn. SPI ROM
EC ENE Speaker Int. MIC UAJ
1.8V on Sub/B
KB9022 (8MB) P.09
P.29 P.29
RTC CKT. SATA HDD Conn.

P.27
P.14
P.28 P.28
DC/DC Interface CKT. PS2 BUS
(reserve I2C)
P.31
Power Circuit DC/DC Touch Pad Int.KBD

P.32~P.41 PS2/I2C
4 LED/Power On/Off 4
P.28
Sub Board
Fan Control LS-D671P USB/Audio/CR Security Classification Compal Secret Data Compal Electronics, Inc.
P.26 2014/03/19 2015/03/18 Title
P.30
Issued Date Deciphered Date Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom 1.A
A B C D E
A B C D E
Voltage Rails Board ID / SKU ID Table for AD channel BOARD ID Table_LA-D641P

Power Plane Description S0 S3 S4/S5
Board ID PCB Revision
+19V_VIN 19V Adapter power supply ON ON ON
01 EVT_LA-D641PR01
BATT+ 12V Battery power supply ON ON ON
02 DVT_LA-D641PR02
+19VB AC or battery power rail for power circuit. (19V/12V) ON ON ON
03 PVT(DVT2)_LA-D641PR03
+RTCVCC RTC Battery Power ON ON ON
04 Pre MP_LA-D641PR10
1
+1.24VALW +1.24v Always power rail ON ON OFF 1
05 Pre MP_LA-D641PR1A
+1.8VALW +1.8v Always power rail ON ON OFF
+3V_SOC +3v Always power rail for SOC ON ON OFF
+3VALW +3.3v Always power rail ON ON ON
+5VALW +5.0v Always power rail ON ON ON
+1.35V +1.35V power rail for DDR3L ON ON ON
+3V_PTP +3.3V power rail for PTP ON ON OFF
+VNN other (non core) logic voltage for SOC ON OFF OFF
+VCC_VCGI Core & GFX voltage for SOC ON OFF OFF
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
+1.05VS +1.05v System power rail ON OFF OFF
+1.8VS +1.8v system power rail ON OFF OFF
+3VS +3.3v system power rail ON OFF OFF
+5VS +5.0v system power rail ON OFF OFF
43 level BOM table

2 2
43 Level Description BOM Structure

431A2BBOL07 SMT MB AD641 B5W1A QKT4 HDMI 233@/8111H@/NBYOC@/CMC@/PCB15@/QKT4@
431A2BBOL08 SMT MB AD641 B5W1A QKTY 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB15@/QKTY@/MD@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 431A2BBOL09 SMT MB AD641 B5W1A QKTW 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB15@/QKTW@/MD@
Note : ON** dGPU optimus on 431A2BBOL60 SMT MB AD641 B7W1A QKT4 HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKT4@
431A2BBOL61 SMT MB AD641 B7W1A QKT4 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKT4@/MD@
431A2BBOL62 SMT MB AD641 B7W1A QKTY 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKTY@/MD@
431A2BBOL63 SMT MB AD641 B7W1A QKTW 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKTW@/MD@
EC SMBUS Routing Table
EC Power BAT CHGR NGFF
EC_SMB_CK1
+3VALW V V X
EC_SMB_DA1
EC_SMB_CK2
+3VS X X V
EC_SMB_DA2
3 3
SOC SMBUS Routing Table BOM Option Table BOM Option Table
Power DIMM1 DIMM2
Item BOM Structure Item BOM Structure
SOC
Unpop @ with BYOC BYOC@
SMB Address Connector CONN@ without BYOC NBYOC@
EMC requirement EMC@ EMMC EMMC@
SOC_SMBCLK
+3VS V V EMC requirement depop @EMC@ EMMC V5.0 EMMCV5@
SOC_SMBDATA
Touch Screen I2C TSI@ A0 Step need to stuff A0S@
TPM TPM@ Kingston 32G EMMC KINGSTON32G@
I2C Map NTPM NTPM@ PRE QS CPU QLB5 QLB5@
Power Button DBG@ PRE QS CPU QLB6 QLB6@
Power Touch PAD Touch Panel CODEC(ALC233) 233@ PRE QS CPU QLB8 QLB8@
CODEC(ALC255) 255@ 15" PCB 1.0 PCB15@
I2C Address 0xXX 0xXX RTL 8111H 8111H@ 17" PCB 1.0 PCB17@
I2C Port3 +1.8VALW to +TS_PWR X V RTL8111GUS 8111GUS@ Memory down MD@
+1.8VALW to +3V_PTP V X Hynix DRAM on board HYN@ 15" PCB 1.A PCB15A@
I2C Port4
4 Samsung DRAM on board SAM@ 17" PCB 1.A PCB17A@ 4
intel CMC CMC@ Micron DRAM on board MCN@
Security Classification Compal Secret Data Compal Electronics, Inc.

2014/03/19 2015/03/18 Title
Issued Date Deciphered Date Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
A B C D E
A B C D E
VR_ON RT3601EAGQW 4800mA

+VNN
(PU901)
21000mA
SVID control RT3601EAGQW +VCC_VCGI
(PU801)
1 1
SYSON RT8207MZQW 6400mA SUSP#

(PU501) +1.35VP +0.675VSP
ADAPTER PJ501
+1.35V
3V_EN SY8286BRAC
(PU401) +3VALWP
EN_1.05VS SY8003ADFC 3000mA PJ601 0 ohm

+1.05VP +1.05VS +1.05VS_SOC_SRAM
+19VB (PU601)
CHARGER
0 ohm
+1.05VS_SOC_DDI
0 ohm
+1.05VS_SOC_FHV0
0 ohm
+1.05VS_SOC_FUSE
BATTERY
2 0 ohm 2
+1.05VS_SOC_FHV1
3V_EN SY6288C20AAC 150mA
+3V_SOC
(UQ12)
VNN_PWRGD SY8032ABC 1192mA DMG2301U 785mA

+1.8VALWP +1.8VS
(PU701) (QQ25)
+1.8V_PG SY8032ABC 1300mA PJ704 0 ohm
+1.24VALWP +1.24VALW +1.24V_1.35VALW_GLML
(PU802)
0 ohm
+1.24V_1.35VALW_PLL
0 ohm
+1.24V_1.35VALW_USB2
0 ohm
SUSP# 5354mA
+1.24V_1.35VALW_MPHY
EM5209VF 0 ohm
+3VS +3VS_WLAN
3 (U11) 3
ENVDD SY6288C20AAC
+LCDVDD
LAN_PWR_EN 70mA
(UX8)
SY6288C20AAC
+3V_LAN
(UL1)
EC_ON
SY8286CRAC 6000mA SUSP# EM5209VF 4716mA JPA1
+5VALWP +5VS +VDDA
(PU402) (U11)
J8
+5VS_HDD
0 ohm
+5VS_ODD
USB_PWR_EN SY6288C20AAC
+USB3_VCCA
(US21)
4 4

2014/03/19 2015/03/18 Title
Issued Date Deciphered Date Power Rail
A B C D E
A B C D E
@ UC1E APL_SOC
AG7 AK3
<20> EDP_TXP0 EDP_TXP_0 DDI0_TXP_0 HDMI_TX2+ <21>
AG9 AK2
<20> EDP_TXN0 EDP_TXN_0 DDI0_TXN_0 HDMI_TX2- <21>
AG12 AM3
<20> EDP_TXP1 EDP_TXP_1 DDI0_TXP_1 HDMI_TX1+ <21>
AG10 AM2
<20> EDP_TXN1 EDP_TXN_1 HDMI_TX1- <21>
<eDP> AC6 1.05V
EDP_TXP_2
1.05VDDI0_TXN_1
DDI0_TXP_2
AH3
HDMI_TX0+ <21> <HDMI>
AC5 AH2
EDP_TXN_2 DDI0_TXN_2 HDMI_TX0- <21>
AC7 AL2
1 EDP_TXP_3 DDI0_TXP_3 HDMI_CLK+ <21> 1
AC9 AL1
EDP_TXN_3 DDI0_TXN_3 HDMI_CLK- <21>
<20> EDP_AUXP AH10 AF2

AH9 EDP_AUXP DDI1_TXP_0 AF3
<20> EDP_AUXN EDP_AUXN
1.05V DDI1_TXN_0 AD3
EDP_RCOMP_P AG6 DDI1_TXP_1 AD2
EDP_RCOMP_P
1 2EDP_RCOMP_N AG5
EDP_RCOMP_N
1.05VDDI1_TXN_1
DDI1_TXP_2
AC1
RC242 402_0402_1% AC2
DDI1_TXN_2 AB3
DDI1_TXP_3 AB2
DDI1_TXN_3
CAD note:
Trace width=20 mils,Spacing=25mil,Max length=100mils
AM16
DDI0_AUXP AM15
C49 1.05V DDI0_AUXN AK16
HDMI DDC (Port C) <21>
SOC_DP0_CTRL_DATA DDI0_DDC_SDA DDI1_AUXP
B49 AK15
<21> SOC_DP0_CTRL_CLK DDI0_DDC_SCL DDI1_AUXN
C54 1.8V
A54 DDI1_DDC_SDA AG1 DDI0_RCOMP_P
DDI1_DDC_SCL DDI0_RCOMP_P AG2 DDI0_RCOMP_N 2 1
DDI0_RCOMP_N 402_0402_1% RC243
DDI_DDC NC to disable (PDG0p9 Page228) 5 OF 23
PreMP modify B0 step APL_BGA1296
@ UC1H APL_SOC
2 2
UC1 T52 V58
SDIO_D0 EMMC_D0 EMMC_D0 <19>
SR2YB@ P57 T58
T54 T59
T55 V51
S IC FH8066802980002 SR2YB B0 1.1G FCBGA V52
EMMC_D4 <19>
SA0000A3X40 T57
SDIO_CMD
1.8V 1.8VEMMC_D4
EMMC_D5
Y49
EMMC_D5 <19>
P58 V55
SDIO_CLK EMMC_D6 EMMC_D6 <19>
P51 V57
SDIO_PWR_DWN# EMMC_D7 EMMC_D7 <19>
UC1
SR2YA@ Y58
EMMC_CLK EMMC_CLK <19>
AC49 V54
SDCARD_D0 EMMC_RCLK EMMC_RCLK <19>
AC48 Y51
SDCARD_D1 EMMC_CMD EMMC_CMD <19>
S IC FH8066802979803 SR2YA B0 1.1G FCBGA AC51
SA0000A3V40 AB51 SDCARD_D2
SDCARD_D3
1.8V/3.3V
AC52
UC1 AB58 SDCARD_CMD
SR2Y9@ AB54 SDCARD_CLK
T5008 @ AB55 SDCARD_CD#
T5132 @
1.8V
SDCARD_LVL_WP +1.8VALW
S IC FH8066802979703 SR2Y9 B0 1.1G FCBGA 8 OF 23
SA0000A3U40
5
APL_BGA1296 UC64
1
P
@ UC1F APL_SOC NC 4 INVT_PWM_SOC
PreMP modify B1 step Y INVT_PWM_SOC <20>
3 DDI1_PWM 2 3
A
G
AP12 AK7
AP10 MDSI_A_DP_0 MDSI_C_DP_0 AK6 NL17SZ07DFT2G_SC70-5
3
UC1 AR2 MDSI_A_DN_0 MDSI_C_DN_0 AM5 SA00004BV00
SR2Z7@ AR1 MDSI_A_DP_1 MDSI_C_DP_1 AM6
AP15 MDSI_A_DN_1 MDSI_C_DN_1 AM12
AP13 MDSI_A_DP_2 MDSI_C_DP_2 AM10 +3VS
1.24V
MDSI_A_DN_2 MDSI_C_DN_2
S IC FH8066802980002 SR2Z7 B1 1.1G FCBGA AP6 AK13
SA0000A3X60 AP5 MDSI_A_DP_3 MDSI_C_DP_3 AM13
MDSI_A_DN_3
1.24V MDSI_C_DN_3 INVT_PWM_SOC 1 2
AP2 4.7K_0402_5% RC1161
UC1 AP3 MDSI_A_CLKP AM9
SR2Z6@ MDSI_A_CLKN MDSI_C_CLKP AM7
MDSI_C_CLKN
1.24V
B51 C47 ENVDD RPC41
MIPI_I2C_SDA PNL0_VDDEN ENVDD <20>
S IC FH8066802979803 SR2Z6 B1 1.1G FCBGA C51 DDI1_ENBKL 8 1
SA0000A3V60 MIPI_I2C_SCL B47 DDI1_ENBKL ENVDD 7 2
PNL0_BKLTEN DDI1_ENBKL <27>
1.8V DDI1_PWM 6 3
A50 C46 DDI1_PWM 5 4
UC1 C50 GPIO_199 PNL0_BKLTCTL
<21> HDMI_HPD# GPIO_200
1.8V
SR2Z5@ From HDMI 100K_0804_8P4R_5%
C52
M45 PNL1_VDDEN
S IC FH8066802979703 SR2Z5 B1 1.1G FCBGA M43 MDSI_A_TE B53
1.8V
MDSI_C_TE
1.8V PNL1_BKLTEN
SA0000A3U60 ORB & CRB un stuff
C53
4 6 OF 23 PNL1_BKLTCTL
need to check CKL later 4
APL_BGA1296
Security Classification
2014/05/19
Compal Secret Data
2015/12/31 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
APL(1/11)DDI,MSIC,XDP,EDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
B5W1A_LA-D641PR1A
Monday, July 25, 2016 Sheet 5 of 45
A B C D E
5 4 3 2 1
Non-Interleaved
Memory
<16> DDR_M0_D[0..15] APL_SOC DDR_M0_D[32..47] <17>
@ UC1A
<18> DDR_M1_D[0..15] APL_SOC DDR_M1_D[32..47] <18>
@ UC1C
DDR_M0_D0 AY62 AR39 DDR_M0_D32
D DDR_M0_D1 AY61 MEM_CH0_DQ0 MEM_CH0_DQ32 AV37 DDR_M0_D33 DDR_M1_D0 BJ26 BF6 DDR_M1_D32 D
DDR_M0_D2 BE62 MEM_CH0_DQ1 MEM_CH0_DQ33 AW37 DDR_M0_D34 DDR_M1_D1 BG30 MEM_CH1_DQ0 MEM_CH1_DQ32 BD10 DDR_M1_D33
DDR_M0_D3 BG62 MEM_CH0_DQ2 MEM_CH0_DQ34 AR37 DDR_M0_D35 DDR_M1_D2 BH31 MEM_CH1_DQ1 MEM_CH1_DQ33 BE14 DDR_M1_D34
DDR_M0_D4 BD63 MEM_CH0_DQ3 MEM_CH0_DQ35 AT37 DDR_M0_D36 DDR_M1_D3 BG31 MEM_CH1_DQ2 MEM_CH1_DQ34 BB10 DDR_M1_D35
DDR_M0_D5 AW62 MEM_CH0_DQ4 MEM_CH0_DQ36 AT41 DDR_M0_D37 DDR_M1_D4 BH27 MEM_CH1_DQ3 MEM_CH1_DQ35 BA14 DDR_M1_D36
DDR_M0_D6 AW63 MEM_CH0_DQ5 MEM_CH0_DQ37 AR41 DDR_M0_D38 DDR_M1_D5 BG27 MEM_CH1_DQ4 MEM_CH1_DQ36 BB14 DDR_M1_D37
DDR_M0_D7 BD62 MEM_CH0_DQ6 MEM_CH0_DQ38 AW35 DDR_M0_D39 DDR_M1_D6 BG26 MEM_CH1_DQ5 MEM_CH1_DQ37 BD14 DDR_M1_D38
DDR_M0_D8 AV59 MEM_CH0_DQ7 MEM_CH0_DQ39 BJ44 DDR_M0_D40 DDR_M1_D7 BJ30 MEM_CH1_DQ6 MEM_CH1_DQ38 BE8 DDR_M1_D39
DDR_M0_D9 AU63 MEM_CH0_DQ8 MEM_CH0_DQ40 BG39 DDR_M0_D41 DDR_M1_D8 BA30 MEM_CH1_DQ7 MEM_CH1_DQ39 AV12 DDR_M1_D40
DDR_M0_D10 AU62 MEM_CH0_DQ9 MEM_CH0_DQ41 BG40 DDR_M0_D42 DDR_M1_D9 BB30 MEM_CH1_DQ8 MEM_CH1_DQ40 BD6 DDR_M1_D41
DDR_M0_D11 AV58 MEM_CH0_DQ10 MEM_CH0_DQ42 BJ40 DDR_M0_D43 DDR_M1_D10 BE30 MEM_CH1_DQ9 MEM_CH1_DQ41 BD5 DDR_M1_D42
DDR_M0_D12 AV57 MEM_CH0_DQ11 MEM_CH0_DQ43 BG43 DDR_M0_D44 DDR_M1_D11 BD30 MEM_CH1_DQ10 MEM_CH1_DQ42 BB7 DDR_M1_D43
DDR_M0_D13 AT55 MEM_CH0_DQ12 MEM_CH0_DQ44 BG44 DDR_M0_D45 DDR_M1_D12 BE25 MEM_CH1_DQ11 MEM_CH1_DQ43 AV10 DDR_M1_D44
DDR_M0_D14 AT54 MEM_CH0_DQ13 MEM_CH0_DQ45 BH45 DDR_M0_D46 DDR_M1_D13 BB27 MEM_CH1_DQ12 MEM_CH1_DQ44 AY9 DDR_M1_D45
DDR_M0_D15 AY59 MEM_CH0_DQ14 MEM_CH0_DQ46 BH41 DDR_M0_D47 DDR_M1_D14 BD25 MEM_CH1_DQ13 MEM_CH1_DQ45 AY7 DDR_M1_D46
<16> DDR_M0_D[16..31] AY57 MEM_CH0_DQ15 MEM_CH0_DQ47 BA34 DDR_M0_D[48..63] <17> <18> DDR_M1_D[16..31] BD27 MEM_CH1_DQ14 MEM_CH1_DQ46 BF5
DDR_M0_D16 DDR_M0_D48 DDR_M1_D15 DDR_M1_D47 DDR_M1_D[48..63] <18>
DDR_M0_D17 BB57 MEM_CH0_DQ16 MEM_CH0_DQ48 BE34 DDR_M0_D49 DDR_M1_D16 BG24 MEM_CH1_DQ15 MEM_CH1_DQ47 AU2 DDR_M1_D48
DDR_M0_D18 BD59 MEM_CH0_DQ17 MEM_CH0_DQ49 BD34 DDR_M0_D50 DDR_M1_D17 BJ20 MEM_CH1_DQ16 MEM_CH1_DQ48 AT10 DDR_M1_D49
DDR_M0_D19 BF59 MEM_CH0_DQ18 MEM_CH0_DQ50 BD37 DDR_M0_D51 DDR_M1_D18 BH23 MEM_CH1_DQ17 MEM_CH1_DQ49 AT9 DDR_M1_D50
DDR_M0_D20 AV54 MEM_CH0_DQ19 MEM_CH0_DQ51 BB37 DDR_M0_D52 DDR_M1_D19 BJ24 MEM_CH1_DQ18 MEM_CH1_DQ50 AU1 DDR_M1_D51
DDR_M0_D21 AY55 MEM_CH0_DQ20 MEM_CH0_DQ52 BE39 DDR_M0_D53 DDR_M1_D20 BG20 MEM_CH1_DQ19 MEM_CH1_DQ51 AY5 DDR_M1_D52
DDR_M0_D22 AV52 MEM_CH0_DQ21 MEM_CH0_DQ53 BD39 DDR_M0_D54 DDR_M1_D21 BG21 MEM_CH1_DQ20 MEM_CH1_DQ52 AV5 DDR_M1_D53
DDR_M0_D23 BD58 MEM_CH0_DQ22 MEM_CH0_DQ54 BB34 DDR_M0_D55 DDR_M1_D22 BH19 MEM_CH1_DQ21 MEM_CH1_DQ53 AV6 DDR_M1_D54
DDR_M0_D24 BE56 MEM_CH0_DQ23 MEM_CH0_DQ55 BJ38 DDR_M0_D56 DDR_M1_D23 BG25 MEM_CH1_DQ22 MEM_CH1_DQ54 AV7 DDR_M1_D55
DDR_M0_D25 BD54 MEM_CH0_DQ24 MEM_CH0_DQ56 BG34 DDR_M0_D57 DDR_M1_D24 AT27 MEM_CH1_DQ23 MEM_CH1_DQ55 AY2 DDR_M1_D56
DDR_M0_D26 BF58 MEM_CH0_DQ25 MEM_CH0_DQ57 BG33 DDR_M0_D58 DDR_M1_D25 AW29 MEM_CH1_DQ24 MEM_CH1_DQ56 BD2 DDR_M1_D57
DDR_M0_D27 BE50 MEM_CH0_DQ26 MEM_CH0_DQ58 BH33 DDR_M0_D59 DDR_M1_D26 AR27 MEM_CH1_DQ25 MEM_CH1_DQ57 BD1 DDR_M1_D58
DDR_M0_D28 BD50 MEM_CH0_DQ27 MEM_CH0_DQ59 BG38 DDR_M0_D60 DDR_M1_D27 AT23 MEM_CH1_DQ26 MEM_CH1_DQ58 BE2 DDR_M1_D59
DDR_M0_D29 BB50 MEM_CH0_DQ28 MEM_CH0_DQ60 BH37 DDR_M0_D61 DDR_M1_D28 AV27 MEM_CH1_DQ27 MEM_CH1_DQ59 AW1 DDR_M1_D60
DDR_M0_D30 BA50 MEM_CH0_DQ29 MEM_CH0_DQ61 BG37 DDR_M0_D62 DDR_M1_D29 AR25 MEM_CH1_DQ28 MEM_CH1_DQ60 AW2 DDR_M1_D61
DDR_M0_D31 BB54 MEM_CH0_DQ30 MEM_CH0_DQ62 BJ34 DDR_M0_D63 DDR_M1_D30 AR23 MEM_CH1_DQ29 MEM_CH1_DQ61 AY3 DDR_M1_D62
MEM_CH0_DQ31 MEM_CH0_DQ63 DDR_M1_D31 AW27 MEM_CH1_DQ30 MEM_CH1_DQ62 BG2 DDR_M1_D63
C 1 OF 23 MEM_CH1_DQ31 3 OF 23MEM_CH1_DQ63 C
APL_BGA1296 APL_BGA1296
@ UC1B APL_SOC @ UC1D APL_SOC
DDR_M0_DQS0 BB63 AW48 DDR_M1_DQS0 BG28 AR21

<16> DDR_M0_DQS0 MEM_CH0_DQSP0 MEM_CH0_CB0 <18> DDR_M1_DQS0 MEM_CH1_DQSP0 MEM_CH1_CB0
DDR_M0_DQS#0 BC62 AW47 DDR_M1_DQS#0 BH29 AT21
<16> DDR_M0_DQS#0 MEM_CH0_DQSN0 MEM_CH0_CB1 <18> DDR_M1_DQS#0 MEM_CH1_DQSN0 MEM_CH1_CB1
DDR_M0_DQS1 AT59 BB43 DDR_M1_DQS1 BD29 AW23
DDR_M0_DQS#1 AT58 AW45 DDR_M1_DQS#1 BB29 AW21
DDR_M0_DQS2 BB59 AV48 DDR_M1_DQS2 BJ22 BA19
DDR_M0_DQS#2 BB58 AV47 DDR_M1_DQS#2 BG22 AW19
DDR_M0_DQS3 BD52 BD43 DDR_M1_DQS3 AV25 BA23
DDR_M0_DQS#3 BB52 BA45 DDR_M1_DQS#3 AW25 BB23
DDR_M0_DQS4 AV39 DDR_M1_DQS4 BB12
<17> DDR_M0_DQS4 MEM_CH0_DQSP4 <18> DDR_M1_DQS4 MEM_CH1_DQSP4
DDR_M0_DQS#4 AW39 BJ48 DDR_M0_BS0 DDR_M1_DQS#4 BD12 BH6 DDR_M1_BS0
<17> DDR_M0_DQS#4 MEM_CH0_DQSN4 MEM_CH0_BA0 DDR_M0_BS0 <16,17> <18> DDR_M1_DQS#4 MEM_CH1_DQSN4 MEM_CH1_BA0 DDR_M1_BS0 <18>
DDR_M0_DQS5 BJ42 BG49 DDR_M0_BS1 DDR_M1_DQS5 BB5 BG8 DDR_M1_BS1
<17> DDR_M0_DQS5 MEM_CH0_DQSP5 MEM_CH0_BA1 DDR_M0_BS1 <16,17> <18> DDR_M1_DQS5 MEM_CH1_DQSP5 MEM_CH1_BA1 DDR_M1_BS1 <18>
DDR_M0_DQS#5 BG42 BH57 DDR_M0_BS2 DDR_M1_DQS#5 BB6 BH15 DDR_M1_BS2
<17> DDR_M0_DQS#5 MEM_CH0_DQSN5 MEM_CH0_BA2 DDR_M0_BS2 <16,17> <18> DDR_M1_DQS#5 MEM_CH1_DQSN5 MEM_CH1_BA2 DDR_M1_BS2 <18>
DDR_M0_DQS6 BB35 DDR_M1_DQS6 AT5
<17> DDR_M0_DQS6 MEM_CH0_DQSP6 <18> DDR_M1_DQS6 MEM_CH1_DQSP6
DDR_M0_DQS#6 BD35 AW43 DDR_M0_ODT0 DDR_M1_DQS#6 AT6 AW16 DDR_M1_ODT0
<17> DDR_M0_DQS#6 MEM_CH0_DQSN6 MEM_CH0_ODT0 @ T240 <18> DDR_M1_DQS#6 MEM_CH1_DQSN6 MEM_CH1_ODT0 DDR_M1_ODT0 <18>
DDR_M0_DQS7 BG36 AW41 DDR_M0_ODT1 DDR_M1_DQS7 BC2 AV16 DDR_M1_ODT1
<17> DDR_M0_DQS7 MEM_CH0_DQSP7 MEM_CH0_ODT1 @ T241 <18> DDR_M1_DQS7 MEM_CH1_DQSP7 MEM_CH1_ODT1 DDR_M1_ODT1 <18>
DDR_M0_DQS#7 BH35 DDR_M1_DQS#7 BB1
<17> DDR_M0_DQS#7 MEM_CH0_DQSN7 <18> DDR_M1_DQS#7 MEM_CH1_DQSN7
BD47 BD23
BB47 MEM_CH0_DQSP8 AT43 BE23 MEM_CH1_DQSP8 AV17
MEM_CH0_DQSN8 NCTF1 BB41 MEM_CH1_DQSN8 NCTF1 BB17
B DDR_M0_MA0 BG50 NCTF2 BH58 DDR_M1_MA0 BG9 NCTF2 BH17 B
<16,17> DDR_M0_MA0 MEM_CH0_MA0 NCTF3 <18> DDR_M1_MA0 MEM_CH1_MA0 NCTF3
DDR_M0_MA1 BG51 BJ58 DDR_M1_MA1 BG10 BJ16
<16,17> DDR_M0_MA1 MEM_CH0_MA1 NCTF4 <18> DDR_M1_MA1 MEM_CH1_MA1 NCTF4
DDR_M0_MA2 BH51 DDR_M1_MA2 BH9
<16,17> DDR_M0_MA2 MEM_CH0_MA2 <18> DDR_M1_MA2 MEM_CH1_MA2
DDR_M0_MA3 BD41 DDR_M1_MA3 BD16
DDR_M0_MA4 BE41 BD45 DDR_M0_CLK0 DDR_M1_MA4 BB16 BD19 DDR_M1_CLK0
<16,17> DDR_M0_MA4 MEM_CH0_MA4 MEM_CH0_CLKP0 DDR_M0_CLK0 <16,17> <18> DDR_M1_MA4 MEM_CH1_MA4 MEM_CH1_CLKP0 DDR_M1_CLK0 <18>
DDR_M0_MA5 BJ52 BE45 DDR_M0_CLK#0 DDR_M1_MA5 BG11 BE19 DDR_M1_CLK#0
<16,17> DDR_M0_MA5 MEM_CH0_MA5 MEM_CH0_CLKN0 DDR_M0_CLK#0 <16,17> <18> DDR_M1_MA5 MEM_CH1_MA5 MEM_CH1_CLKN0 DDR_M1_CLK#0 <18>
DDR_M0_MA6 BG53 BB48 DDR_M1_MA6 BJ12 BB21 DDR_M1_CLK1
<16,17> DDR_M0_MA6 MEM_CH0_MA6 MEM_CH0_CLKP1 <18> DDR_M1_MA6 MEM_CH1_MA6 MEM_CH1_CLKP1 DDR_M1_CLK1 <18>
DDR_M0_MA7 BG55 BD48 DDR_M1_MA7 BG14 BD21 DDR_M1_CLK#1
<16,17> DDR_M0_MA7 MEM_CH0_MA7 MEM_CH0_CLKN1 <18> DDR_M1_MA7 MEM_CH1_MA7 MEM_CH1_CLKN1 DDR_M1_CLK#1 <18>
DDR_M0_MA8 BH53 DDR_M1_MA8 BG12
DDR_M0_MA9 BG52 BH61 DDR_M0_CKE0 DDR_M1_MA9 BH11 BG18 DDR_M1_CKE0
<16,17> DDR_M0_MA9 MEM_CH0_MA9 MEM_CH0_CKE0 DDR_M0_CKE0 <16,17> <18> DDR_M1_MA9 MEM_CH1_MA9 MEM_CH1_CKE0 DDR_M1_CKE0 <18>
DDR_M0_MA10 BH49 BH60 DDR_M0_CKE1 DDR_M1_MA10 BG7 BG17 DDR_M1_CKE1
<16,17> DDR_M0_MA10 MEM_CH0_MA10 MEM_CH0_CKE1 DDR_M0_CKE1 <16,17> <18> DDR_M1_MA10 MEM_CH1_MA10 MEM_CH1_CKE1 DDR_M1_CKE1 <18>
DDR_M0_MA11 BH55 DDR_M1_MA11 BH13
DDR_M0_MA12 BG54 AR43 DDR_M0_CS#0 DDR_M1_MA12 BG13 BD17 DDR_M1_CS#0
<16,17> DDR_M0_MA12 MEM_CH0_MA12 MEM_CH0_CS0# DDR_M0_CS#0 <16,17> <18> DDR_M1_MA12 MEM_CH1_MA12 MEM_CH1_CS0# DDR_M1_CS#0 <18>
DDR_M0_MA13 BG46 BA41 DDR_M0_CS#1 DDR_M1_MA13 BH3 AW17 DDR_M1_CS#1
<16,17> DDR_M0_MA13 MEM_CH0_MA13 MEM_CH0_CS1# DDR_M0_CS#1 <16,17> <18> DDR_M1_MA13 MEM_CH1_MA13 MEM_CH1_CS1# DDR_M1_CS#1 <18>
DDR_M0_MA14 BG56 DDR_M1_MA14 BG15
DDR_M0_MA15 BG57 AR34 DDR_M0_DRAMRST# DDR_M1_MA15 BG16 AR30 DDR_M1_DRAMRST#
<16,17> DDR_M0_MA15 MEM_CH0_MA15 MEM_CH0_RESET# DDR_M0_DRAMRST# <16,17> <18> DDR_M1_MA15 MEM_CH1_MA15 MEM_CH1_RESET# DDR_M1_DRAMRST# <18>
BH47 DDR_M0_CAS# BH4 DDR_M1_CAS#
MEM_CH0_CAS# DDR_M0_CAS# <16,17> MEM_CH1_CAS# DDR_M1_CAS# <18>
AR35 AR29
T242 @ MEM_CH0_VREFCA T244 @ MEM_CH1_VREFCA
AT34 BG47 DDR_M0_RAS# AT30 BJ6 DDR_M1_RAS#
T243 @ MEM_CH0_VREFDQ MEM_CH0_RAS# DDR_M0_RAS# <16,17> T245 @ MEM_CH1_VREFDQ MEM_CH1_RAS# DDR_M1_RAS# <18>
BG48 DDR_M0_WE# BH7 DDR_M1_WE#
MEM_CH0_WE# DDR_M0_WE# <16,17> MEM_CH1_WE# DDR_M1_WE# <18>
2 OF 23 4 OF 23
Follow PDG 1P0 Page 82 Follow PDG 1P0 Page 82
APL_BGA1296 APL_BGA1296
(conrirm with intel OK) (conrirm with intel OK)
CC219
.1U_0402_16V7K
DDR_M0_DRAMRST# 2 1
@EMC@
A A
CC220
.1U_0402_16V7K
DDR_M1_DRAMRST# 2 1
EMC@
2014/05/19
Compal Secret Data
2015/12/31 Title
For ESD request 05/04 APL(2/11)DDRIII
5 4 3 2 1
5 4 3 2 1
+1.8VALW
@ UC1L APL_SOC USB_OC0# RC522 1 210K_0402_5%

USB_OC1# RC524 1 210K_0402_5%
<26> USB_OC1#
@ T4951 V12 AC16 USB2_VBUSSENSE RC525 1 @ 210K_0402_5%
V10 USB2_DP0 USB2_VBUS_SNS B55 USB_OC0#
@ T4952 USB2_DN0
<26> USB20_P1
V16
USB2_DP1
1.8VUSB2_OC0#
USB2_OC1#
C55 USB_OC1# USB2_VBUSSENSE 1 2
D USB2/3 MB V15 AC15 USB_ID RC526 0_0402_5% D
<26> USB20_N1 USB2_DN1 USB2_OTG_ID
Y13 USB_ID 1 @ 2
<26> USB20_P2 USB2_DP2
USB2 MB V13 RC516 0_0402_5%
<26> USB20_N2 USB2_DN2
V9 T61 SOC_SMBDATA SMB (Link to DDR)
USB2 SUB/B <26> USB20_N3
V7
USB2_DN3
3.3V SMB_DATA
SMB_CLK
T62 SOC_SMBCLK
Y9 R63 SOC_SMBALERT# DVT2 modify
<23> USB20_P4 USB2_DP4 SMB_ALERT#
BT Y10 3.3V
AB6 When USB OTG feature is not required,
Touch screen AB7 C18 SOC_SVID_DAT
<20> USB20_P6
AC12
USB2_DP6
1.05VSVID0_DATA
SVID0_CLK
C17
SOC_SVID_CLK <39,40>
Camera AC10 B17 SOC_SVID_ALERT#
<20>
<26>
USB20_N6
USB20_P7
V5 USB2_DN6
USB2_DP7
SVID0_ALERT_B SVID ALERT
V6 +1.05VS
CardReader <26> USB20_N7 USB2_DN7 Place the PU
12 OF 23
resistors close to CPU
1
APL_BGA1296
RC179
68_0402_5%
2
SOC_SVID_ALERT# 1 2
SOC_SVID_ALERT#_R <39,40>(To VR)
RC180 220_0402_5%
@ UC1K APL_SOC
M54 Y61 LPC_IO0 RC532 1 2 20_0402_1%

AVS_DMIC_DATA_1 LPC_AD0 LPC_IO0_R <27,28>
P54 Y62 LPC_IO1 RC531 1 2 20_0402_1%
AVS_DMIC_CLK_A1 LPC_AD1 LPC_IO1_R <27,28> +1.05VS
M52 W62 LPC_IO2 RC534 1 2 20_0402_1% To EC Place the PU
P52 AVS_DMIC_DATA_2
AVS_DMIC_CLK_B1
1.8V LPC_AD2
LPC_AD3
W63 LPC_IO3 RC533 1 2 20_0402_1%
LPC_IO2_R
LPC_IO3_R
<27,28>
<27,28>
SVID DATA resistors close to CPU
1
C 3.3V C
M55 AB61 LPC_CLK_0 RC247 1 2 20_0402_1% RC181
<11> DMIC_CLK_AB2_GPIO_82 AVS_DMIC_CLK_AB2 LPC_CLKOUT0 LPC_CLK0_R <27> To EC
AA62 LPC_CLK_1 RC490 1 2 20_0402_1%
LPC_CLKOUT1 LPC_CLK1_R <28> To TPM 169_0402_1%
J62 AB62 LPC_SERIRQ RC536 1 2 20_0402_1% LPC_SERIRQ_R <27,28> To TPM
2
K61 AVS_I2S1_WS_SYNC LPC_SERIRQ V61 LPC_FRAME# RC539 1 2 20_0402_1% SOC_SVID_DAT
AVS_I2S1_SDI LPC_FRAME# LPC_FRAME#_R <27,28> SOC_SVID_DAT <39,40> (To VR)
<11> I2S1_SDO_GPIO_78 K62 V62 LPC_CLKRUN# RC538 1 2 20_0402_1% For TPM
AVS_I2S1_SDO LPC_CLKRUN# LPC_CLKRUN#_R <28>
H63 1.8V
G62 AVS_I2S1_BCLK
AVS_I2S1_MCLK AG62
M57
AVS_I2S2_WS_SYNC
OSC_CLK_OUT_0
OSC_CLK_OUT_1
AF61 SMB level shift 1.8V/3.3V selection is done by
K59 AG63 +3V_SOC
AVS_I2S2_SDI OSC_CLK_OUT_2 harware strap GPIO_78
M58 1.8V AE60
<11> I2S2_SDO_GPIO_88
H59 AVS_I2S2_SDO
1.8V OSC_CLK_OUT_3 AF62
Pu 1K --> PDG 0p7 P.240
K58 AVS_I2S2_BCLK OSC_CLK_OUT_4 1 2 SOC_SMBALERT#
<10> HDA_RST# AVS_I2S2_MCLK R27 SOC_XTAL19_IN 1K_0402_5% RC501
M61 OSCIN P29 SOC_XTAL19_OUT 1 2 SOC_SMBCLK
L62 AVS_I2S3_WS_SYNC OSCOUT 1K_0402_5% RC499
L63 AVS_I2S3_SDI 1 2 SOC_SMBDATA
<11> I2S3_SDO_GPIO_92 AVS_I2S3_SDO
1.8V
M62 1K_0402_5% RC500
AVS_I2S3_BCLK 11 OF 23 +3VS
APL_BGA1296
5
+3VS
2.2K_0402_5% 2 @ 1 RC2570 DDR_SMB_CK SOC_SMBCLK 3 4 @

B DDR_SMB_CK <18>
B
2.2K_0402_5% 2 @ 1 RC2569 DDR_SMB_DA QC2507B
2
L2N7002DW 1T1G_SC88-6
@ UC1G APL_SOC
DVT2 modify SOC_SMBDATA 6 1 @
DDR_SMB_DA <18>
P17 M23 QC2507A
M17 MCSI_DP_0 MCSI_RX_DATA0_P P23 L2N7002DW 1T1G_SC88-6
P21 MCSI_DN_0 MCSI_RX_DATA0_N J21
R21 MCSI_DP_1 MCSI_RX_DATA1_P H21 RC517 1 @ 20_0402_5%
L17 MCSI_DN_1 MCSI_RX_DATA1_N M25
MCSI_DP_2
1.24VMCSI_RX_DATA2_P PreMP modify
J17 1.24V L25 RC519 1 @ 20_0402_5%
F17 MCSI_DN_2 MCSI_RX_DATA2_N H25
E17 MCSI_DP_3 MCSI_RX_DATA3_P J25
MCSI_DN_3 MCSI_RX_DATA3_N RC248
M19 L23 SOC_XTAL19_IN 1 2SOC_XTAL19_OUT
L19 MCSI_CLKP_0 MCSI_RX_CLK0_P J23
MCSI_CLKN_0
1.24V
MCSI_RX_CLK0_N
H19 1.24V F25
F19 MCSI_CLKP_2 MCSI_RX_CLK1_P E25 200K_0402_5%
MCSI_CLKN_2 MCSI_RX_CLK1_N Y7
L37 R35
P34 GP_CAMERASB0 GP_CAMERASB6 L34 1 3
GP_CAMERASB1
J34
GP_CAMERASB2
1.8VGP_CAMERASB7
GP_CAMERASB8
M34 1 3
1
H30 1.8V M35 CC137 CC7
M37 GP_CAMERASB3 GP_CAMERASB9 R34 15P_0402_50V8J 15P_0402_50V8J
F30 GP_CAMERASB4 GP_CAMERASB10 E30
2
GP_CAMERASB5 GP_CAMERASB11 2 4
7 OF 23 GND GND
A A
APL_BGA1296 Change P/N to SJ10000N700
19.2MHz_12pF
19.2MHZ_10PF_7M19200019
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(3/11)SPI,ESPI,SMB,LPC
5 4 3 2 1
5 4 3 2 1
@ UC1I APL_SOC
D D
L2 V3
L1 PCIE_P5_USB3_P2_TXP PCIE_P0_TXP V2
K7 PCIE_P5_USB3_P2_TXN PCIE_P0_TXN P7
M7 PCIE_P5_USB3_P2_RXP PCIE_P0_RXP P6
PCIE_P5_USB3_P2_RXN PCIE_P0_RXN
N2 R1
M2 PCIE_P4_USB3_P3_TXP PCIE_P1_TXP R2
H5 PCIE_P4_USB3_P3_TXN PCIE_P1_TXN T10
PCIE_P4_USB3_P3_RXP
1.24V 1.24V
PCIE_P1_RXP
H6 T12
PCIE_P4_USB3_P3_RXN PCIE_P1_RXN
CC28 1 2 .1U_0402_16V7K PCIE_PTX_DRX_P3 P3 T2 PCIE_PTX_DRX_P2 .1U_0402_16V7K 2 1 CC26
<23> PCIE_PTX_C_DRX_P3 PCIE_P3_USB3_P4_TXP PCIE_P2_TXP PCIE_PTX_C_DRX_P2 <22>
CC27 1 2 .1U_0402_16V7K PCIE_PTX_DRX_N3 P2 T3 PCIE_PTX_DRX_N2 .1U_0402_16V7K 2 1 CC25
<23> PCIE_PTX_C_DRX_N3 PCIE_P3_USB3_P4_TXN PCIE_P2_TXN PCIE_PTX_C_DRX_N2 <22>
NGFF WLAN+BT <23> PCIE_PRX_DTX_P3 PCIE_PRX_DTX_P3 P12 M5 PCIE_PRX_DTX_P2 GLAN
PCIE_PRX_DTX_N3 P10 PCIE_P3_USB3_P4_RXP PCIE_P2_RXP M6 PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 <22>
<23> PCIE_PRX_DTX_N3 PCIE_P3_USB3_P4_RXN PCIE_P2_RXN PCIE_PRX_DTX_N2 <22>
1 2 PCIE_RCOMPP F6 R62
RC246 402_0402_1% PCIE_RCOMPN F5 PCIE2_USB3_SATA3_RCOMP_P PCIE_WAKE0# P62
PCIE2_USB3_SATA3_RCOMP_N
1.8V PCIE_WAKE1#
PCIE_WAKE2#
P61
N62
9 OF 23 PCIE_WAKE3#
APL_BGA1296
C C
@ UC1J APL_SOC
J1 C11
J2 USB3_P0_TXP PCIE_CLKOUT0P B11
K9 USB3_P0_TXN PCIE_CLKOUT0N C10
K10 USB3_P0_RXP PCIE_CLKOUT1P A10
USB3_P0_RXN
<26> PCH_USB3_TX1_P
K3
USB3_P1_TXP
1.24V 1.05VPCIE_CLKOUT1N
PCIE_CLKOUT2P
A7
CLK_PCIE_LAN <22> GLAN
USB2/3 MB K2 B8
<26> PCH_USB3_TX1_N USB3_P1_TXN PCIE_CLKOUT2N CLK_PCIE_LAN# <22>
<26> PCH_USB3_RX1_P F2 B7 NGFF WL+BT(KEY E)
USB3_P1_RXP PCIE_CLKOUT3P CLK_PCIE_WLAN <23>
<26> PCH_USB3_RX1_N G2 B5
USB3_P1_RXN PCIE_CLKOUT3N CLK_PCIE_WLAN# <23>
AK62 CLKREQ_PCIE#0
Y3 PCIE_CLKREQ0# AH62 CLKREQ_PCIE#1
SATA_P0_TXP
<25> SATA_PTX_DRX_P0 Y2
SATA_P0_TXN
1.8V PCIE_CLKREQ1#
PCIE_CLKREQ2#
AH61 LAN_CLKREQ#
LAN_CLKREQ# <22> GLAN
<25> SATA_PTX_DRX_N0 T9 1.24V AJ62 WLAN_CLKREQ#
HDD <25> SATA_PRX_DTX_P0 SATA_P0_RXP PCIE_CLKREQ3# WLAN_CLKREQ# <23> NGFF WL+BT(KEY E)
B T7 B
<25> SATA_PRX_DTX_N0 SATA_P0_RXN
W1 AH13
<25> SATA_PTX_DRX_P1 W2 SATA_P1_USB3_P5_TXP USB_SSIC_0_TX_P AH12
1.24V
SATA_P1_USB3_P5_TXN USB_SSIC_0_TX_N
<25> SATA_PTX_DRX_N1 T5 1.05V AG16
ODD <25> SATA_PRX_DTX_P1 SATA_P1_USB3_P5_RXP USB_SSIC_0_RX_P
T6 AG15
<25> SATA_PRX_DTX_N1 SATA_P1_USB3_P5_RXN USB_SSIC_0_RX_N
10 OF 23
APL_BGA1296 +1.8VALW
RPC26
CLKREQ_PCIE#1 1 8
WLAN_CLKREQ# 2 7
LAN_CLKREQ# 3 6
CLKREQ_PCIE#0 4 5
10K_0804_8P4R_5%
A A
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(4/11)HDA,EMMC,CSI2
5 4 3 2 1
5 4 3 2 1
+3V_SOC
+1.8VALW
DVT2 modify APL_SOC
@ UC1N
RC342 1 2 1K_0402_5% WAKE#
AD61 B45
PM_SLP_S0# PMU_SLP_S0# LPSS_UART0_TXD UART_0_CTXD_GPIO_39
RC344 1 2 10K_0402_5% PM_RST_BTN# AC62 C45 UART_0_CRXD @ T5135
PM_SLP_S3# PMU_SLP_S3# LPSS_UART0_RXD
AK54 C44
+1.8VALW PM_SLP_S4# PMU_SLP_S4# LPSS_UART0_CTS#
RC343 1 @ 2 1K_0402_5% H_THERMTRIP# WAKE# AG55 A46
PMU_WAKE# LPSS_UART0_RTS# UART_0_CRTS#_GPIO_40
T5134 @ SUSCLK AE62
PM_RST_BTN# AD62 PMU_SUSCLK B43
PreMP modify PMU_RSTBTN# LPSS_UART1_TXD UART_1_CTXD_GPIO_43
1
PBTN_OUT# PBTN_OUT# AK55 C43 UART_1_CRXD @ T5136
1 @ 2 SOC_PWROK_R RC339 SOC_PLTRST# AG57 PMU_PWRBTN# LPSS_UART1_RXD C42
SOC_PWROK PMU_PLTRST#
3.3V 1.8V
LPSS_UART1_CTS#
0_0402_5% RC249 1K_0402_5% PM_BATLOW# AH51 A42
PMU_BATLOW# LPSS_UART1_RTS# UART_1_CRTS#_GPIO_44
2 @ 1 PM_RST_BTN# AC_PRESENT AC_PRESENT AK49
EC_KBRST# PMU_AC_PRESENT
D 0_0402_5% RC252 SOC_PWROK_R AG49 H41 D
UART_TXD_NGFF
2
H_PROCHOT# E47 SOC_PWROK LPSS_UART2_TXD J41
+3V_SOC H_PROCHOT# PROCHOT# LPSS_UART2_RXD UART_RXD_NGFF
EC_RSMRST# EC_RSMRST# AC57 M41
PMC_SUSPWRDNACK AC63 RSM_RST# LPSS_UART2_CTS# L41
1 PMC_SUSPWRDNACK SUSPWRDNACK LPSS_UART2_RTS# UART_2_CRTS_DCTS
2 1 PM_BATLOW# @EMC@
100K_0402_5% RC335 CC144 H48
1 2@ PBTN_OUT# .1U_0402_16V7K H_THERMTRIP# J47 PMIC_PWRGOOD
2 H_THERMTRIP# PMIC_THERMTRIP#
10K_0402_5% RC520 J45 H50
1 @ 2 PMC_SUSPWRDNACK F48 PMIC_STDBY PMC_SPI_TXD J50
10K_0402_5% RC521 PMIC_RESET# PMC_SPI_RXD
1.8V
1 @ 2 checklist Page.31 F47 L48
PMIC_I2C_SDA
20K_0402_5% RC253 H45 1.8VPMC_SPI_FS0 P48 EDP_HPD#
2 1 SOC_PWROK PMIC_I2C_SCL PMC_SPI_FS1 M48 From eDP
ESD request 10/22 PMC_SPI_FS2
100K_0402_5% RC518 close CPU side M47
@EMC@ L47 GPIO_213 E52
2 1 P47 GPIO_214 PMC_SPI_CLK
ESD request 10/22 PROCHOT# power rail:1.8V GPIO_215
1.8V
.1U_0402_16V7K CC145
AG58 R30
SUS_STAT# 14 OF 23 NCTF1
1 @ 2 AC_PRESENT
10K_0402_5% RC537 APL_BGA1296
@EMC@
1 2 SOC_PLTRST#
100P_0402_50V8J CC138
2 1 PBTN_OUT#
.1U_0402_16V7K CC140 @ UC1M APL_SOC
EMC@
2 1 PM_RST_BTN# AR62 J52
LPSS_I2C0_SDA SIO_SPI_0_TXD SPI_0_TX_GPIO_110
.1U_0402_16V7K CC139 AR63 H54
EMC@ AN62 LPSS_I2C0_SCL SIO_SPI_0_RXD F52
LPSS_I2C1_SDA SPI_0_FS0_GPIO_105
2 1 EC_RSMRST# AM61 1.8V SIO_SPI_0_FS0 H52
SPI_0_FS1_GPIO_106
100K_0402_5% RC483 AP59 LPSS_I2C1_SCL SIO_SPI_0_FS1 F54
LPSS_I2C2_SDA SIO_SPI_0_CLK SPI_0_CLK_GPIO_104
2 1 AP58
.1U_0402_16V7K CC143 I2C_3_SDA AM62 LPSS_I2C2_SCL H58
C LPSS_I2C3_SDA SIO_SPI_1_TXD SPI_1_TX_GPIO_117 C
@EMC@ <Touch Screen> I2C_3_SCL AL62 1.8V H57
I2C_4_SDA AP52 LPSS_I2C3_SCL SIO_SPI_1_RXD K55
LPSS_I2C4_SDA SPI_1_FS0_GPIO_112
<Touch PAD> I2C_4_SCL AP54
LPSS_I2C4_SCL
1.8V SIO_SPI_1_FS0
SIO_SPI_1_FS1
F61
SPI_1_FS1_GPIO_113
ESD request 10/22 AP49 F58
LPSS_I2C5_SDA SIO_SPI_1_CLK SPI_1_CLK_GPIO_111
AP51
AL63 LPSS_I2C5_SCL E62
LPSS_I2C6_SDA SIO_SPI_2_TXD SPI_2_TX_GPIO_123
PDG0p7 P.34 PLTRST# V1P8/V3P3(The I/O voltage AK61 C62
AP62 LPSS_I2C6_SCL SIO_SPI_2_RXD D61
selection is done by using Hardware Strap GPIO_88) AP61 LPSS_I2C7_SDA
1.8V SIO_SPI_2_FS0 E56
LPSS_I2C7_SCL SIO_SPI_2_FS1 SPI_2_FS1_GPIO_120
DVT2 modify D59
+3V_SOC SIO_SPI_2_FS2 SPI_2_FS2_GPIO_121
0_0402_5% 1 @ 2RC99 F62
SIO_SPI_2_CLK SPI_2_CLK_GPIO_118
SOC_SPI_CLK C56
@EMC@ +3VS SOC_SPI_SI A58 FST_SPI_CLK
FST_SPI_MOSI_IO0
2
@ .1U_0402_16V7K CC14 SOC_SPI_SO B58

RC1162 2 1 SOC_SPI_IO2 B60 FST_SPI_MISO_IO1
SOC_SPI_IO3 B61 FST_SPI_IO2
4.7K_0402_5% FST_SPI_IO3
1.8V
5
UC56 SOC_SPI_CS#0 B57

1 SPI_CS1# C57 FST_SPI_CS0#
P
T5130 @
1
PLT_RST_BUF# 4 NC FST_SPI_CS1# 13 OF 23
PLT_RST_BUF# Y 2 SOC_PLTRST#
A SOC_PLTRST#
2
@ APL_BGA1296
RC492 NL17SZ07DFT2G_SC70-5
3
SA00004BV00
47K_0402_5%
For Touch +TS_PWR
Screen I2C3_SCL_PNL 1 TSI@ 2
1
+1.8VALW RC1147 2.2K_0402_5%

I2C3_SDA_PNL 1 TSI@ 2
1K_0402_5% 2 @ 1 RC1143 I2C_3_SDA RC1150 2.2K_0402_5%
1K_0402_5% 2 @ 1 RC1144 I2C_3_SCL
+1.8VALW +TS_PWR
B B
5
+3VALW
G
G
I2C_3_SDA 4 3 3 4I2C3_SDA_PNL
I2C_3_SDA_L
I2C3_SDA_PNL
S
S
D
TSI@ QC2512A TSI@ QC2511A
2
2.2K_0402_5% 2 TSI@ 1RC2566 I2C_3_SCL_L PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
+1.8VALW +VCC_SPI +VCC_SPI 2.2K_0402_5% 2 TSI@ 1RC2565 I2C_3_SDA_L SB000016K00 SB000013K00
G
G
I2C_3_SCL 1 6I2C_3_SCL_L 6 1 I2C3_SCL_PNL
I2C3_SCL_PNL
S
1 2 3.3K_0402_5%
D
RC999 @ SOC_SPI_CS#0_R1 TSI@ QC2512B TSI@ QC2511B
1 @ 2 PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
0_0402_5% RC514 RC1000 1 2 3.3K_0402_5% SOC_SPI_IO2_0_R1 SB000016K00 SB000013K00
1 2 RC1001 1 2 3.3K_0402_5% SOC_SPI_IO3_0_R1

CC8 .1U_0402_16V7K For Touch +3V_PTP
Pad
+1.8VALW
DVT2 modify
Need to check I2C4_SCL_TP 1 2
1K_0402_5% 2 @ 1 RC1153 I2C_4_SDA RC1156 2.2K_0402_5%
Follow CRB 0.9 P.65 1K_0402_5% 2 @ 1 RC1152 I2C_4_SCL I2C_4_SDA_L RC528 1 @ 2 0_0402_5% I2C4_SDA_TP I2C4_SDA_TP 1 2
I2C_4_SCL_L RC529 1 @ 2 0_0402_5% I2C4_SCL_TP RC1157 2.2K_0402_5%
8M SPI ROM(Support ISH) +1.8VALW +3V_PTP
+VCC_SPI
RPC5
SOC_SPI_SO 1 8SOC_SPI_SO_0_R1 UC2
5
SOC_SPI_SI 2 7SOC_SPI_SI_0_R1 SOC_SPI_CS#0_R1 1 8
SOC_SPI_IO2 3 6SOC_SPI_IO2_0_R1 SOC_SPI_SO_0_R1 2 CS# VCC 7 SOC_SPI_IO3_0_R1 +3VALW
G
G
SOC_SPI_IO3 4 5SOC_SPI_IO3_0_R1 SOC_SPI_IO2_0_R1 3 DO(IO1) HOLD#(IO3) 6 SOC_SPI_CLK_0_R1 1 2 1 2 I2C_4_SCL 4 3 I2C_4_SCL_L 3 4 I2C4_SCL_TP
WP#(IO2) CLK I2C4_SCL_TP
S
4 5
D
SOC_SPI_SI_0_R1 RC341 CC9 QC2509A QC2508A
GND DI(IO0)
2
0_0804_8P4R_5% 1K_0402_5% 10P_0402_50V8J 2.2K_0402_5% 2 @ 1 RC2564 I2C_4_SCL_L PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
W25Q64DWSSIG_SO8 @EMC@ 2.2K_0402_5% 2 @ 1 RC2563 I2C_4_SDA_L SB000016K00 SB000013K00 @
G
G
@EMC@
SOC_SPI_CS#0 1 @ 2 SOC_SPI_CS#0_R1 SA00006ZV10 I2C_4_SDA 1 6 I2C_4_SDA_L 6 1 I2C4_SDA_TP
I2C4_SDA_TP
S
S
D
0_0402_5% RC491 QC2509B QC2508B
SOC_SPI_CLK 1 2 SOC_SPI_CLK_0_R1 EMI request 11/03 PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
33_0402_5% RC52 SB000016K00 SB000013K00 @
A A
1.8V SPI ROM
DVT2 modify
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(5/11)CLK,GPIO
5 4 3 2 1
5 4 3 2 1
Intel HDA issue, Fix on QS sample 09/01
D D
DVT2 modify
<29> HDA_SDIN0_AUDIO 1 @ 2 HDA_SYNC
RC4983 249_0402_1% @ UC1O APL_SOC
T5137 @ A38 C27

1 @ 2 B33 GPIO_0 GPIO_25 C31
<12> DBG_PTI_DATA_0 GPIO_1 GPIO_26
EC_SCI# SOC internal PU
RC79 680_0402_1% C39 C29
B39 B37 EC_SCI# <27>
For Intel 560733 Sighting Alert,2016 WW04 B35 H35
<12> DBG_PTI_DATA_3 GPIO_4 GPIO_29 EC_LID_OUT# <27>
Audio SDI Pin Issue. A34 1.8V C37 GPIO30
Customers can remove (un-stuffed) B31 H34 GPIO31
the workaround when this issue is fixed in QS sample. H39 F35
B29 F34
A30
<12> DBG_PTI_CLK_3 GPIO_9
L39 1.8V
C34 GPIO_10
E39 GPIO_11
C30 GPIO_12 AM48 HDA_BIT_CLK
HDA for AUDIO C38 GPIO_13 ISH_GPIO_0 AK58 HDA_SYNC
RPC9 F39 GPIO_14 ISH_GPIO_1 AK51 HDA_SDIN0
1 8 HDA_BIT_CLK C36 GPIO_15 ISH_GPIO_2 AM54 HDA_SDOUT
C <29> HDA_BITCLK_AUDIO GPIO_16 ISH_GPIO_3 C
<29> HDA_SYNC_AUDIO 2 7 HDA_SYNC C35 AM51
GPIO_17
<29> HDA_SDOUT_AUDIO 3 6 HDA_SDOUT J39
GPIO_18
1.8VISH_GPIO_4
ISH_GPIO_5
AM49
MEMORY_STRAP_0 <11>
<29> HDA_RST_AUDIO# 4 5 HDA_RST# <7> <24> TP_INT# C33 AM57
GPIO_19 ISH_GPIO_6 MEMORY_STRAP_1 <11>
B27 AM55
<24> TS_INT_R# GPIO_20 ISH_GPIO_7 MEMORY_STRAP_2 <11>
33_0804_8P4R_5% C26 AM52
GPIO_21 ISH_GPIO_8 MEMORY_STRAP_3 <11>
<29> HDA_SDIN0 HDA_SDIN0 T5131 @ SATA_GP0 A26 AK57
GPIO_22 ISH_GPIO_9 SOC_SPKR <29>
T5133 @ SATA_GP1 B25
C25 GPIO_23
GPIO_24 15 OF 23
+1.8VALW
APL_BGA1296
10K_0402_5%
10K_0402_5%
+1.8VALW
2
2
RC78 PreMP modify
1K_0402_1% @ UC1Q APL_SOC
@
RC1052 AP57 B41 PWM0_GPIO_34 <11>
0_0402_5% C63 NCTF1 PWM0 C41 PWM1_GPIO_35 <11>
1
NCTF2
B
<9> SPI_2_CLK_GPIO_118 1 2 E16 1.8V PWM1 F41 VCC1P24_1P35_SEL <11>
B
1
1
NCTF3 PWM2
RC551
RC553
E63 E41
NCTF4 PWM3
1
D F12
2 GPIO30 F14 NCTF5
ME_EN <27> NCTF6
G GPIO31 F16 1.8V GPIO_216 P30
QC63 @ H12 NCTF7 M29
S
3
NCTF8 GPIO_217
RC552
RC550
L2N7002LT1G_SOT23-3 H14 M30
H16 NCTF9 GPIO_218 L30
J16 NCTF10 GPIO_219
NCTF11
2
L16 1.8V
M10 NCTF12
Circuit follow A4WAL NCTF13
@ @ M12
EC need modify code M16 NCTF14
NCTF15 17 OF 23
10K_0402_5%
10K_0402_5%
1
APL_BGA1296
A SW request 1104 A
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(6/11)GPIO
Custom 1.A
5 4 3 2 1
5 4 3 2 1
+1.8VALW
PreMP modify
10K_0402_5%
10K_0402_5%
MCN@ 10K_0402_5%
SAM@ 10K_0402_5%
On Board Memory Strap Pin
2
D
On Board RAM Configuration RAM_ID3 RAM_ID2 RAM_ID1 RAM_ID0 D
@
DDR3L Hynix 256MX16/1600 H5TC4G63CFR-PBA (SA00005AVD0) 0 0 0 0
1
RC548
RC546
RC544
RC543
MEMORY_STRAP_0 <10>
DDR3L Samsung 256MX16/1600 K4B4G1646E-BYK0 (SA000099X20) 0 0 0 1
MEMORY_STRAP_1
MEMORY_STRAP_2
<10>
<10>
DDR3L Micron 256MX16/1600 MT41K256M16TW(SA00009KQ30) 0 0 1 0
MEMORY_STRAP_3 <10> SODIMM only 1 1 1 1
RC549
RC547
RC545
RC542
2
2
@
1 MD@
1 MD@
1HYN@
* stand for default value
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
1
Pin Name PU/PD External Strap pin
Function Termination Description
DVT2 modify
GPIO34 10KPD Pulled LOW when RSM_RST_N de-asserts
C GPIO36 0: 1.24V* VCC_1P24V_1P35V_A voltage selection C
1: 1.35V 10KPD
+1.8VALW
GPIO39 0: Disable* Enable CSE ROM Bypass
1: Enable 10KPD
RC407
RC406
RC408
RC409
RC411
RC412
RC415
RC414
RC418
RC420
RC421
RC426
RC428
1
1
GPIO43 0: Disable* 4.7KPU Allow eMMC as a boot source
@ @ @ @ @ @ @ @ @ @ 1: Enable
GPIO44 0: Disable 4.7KPU Allow SPI as a boot source
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
2
2
1: Enable*
GPIO47 0: No Force* 10KPD Force DNX FW Load
1: Force
<9,12> SPI_0_FS1_GPIO_106 SPI_2_TX_GPIO_123 <9,12> GPIO48 10KPD Pulled LOW when RSM_RST_N de-asserts
<9> SPI_0_FS0_GPIO_105 SPI_2_FS2_GPIO_121 <9>
<9> SPI_0_CLK_GPIO_104 SPI_2_FS1_GPIO_120 <9> SMBus 1.8V/3.3V mode select
<7> I2S3_SDO_GPIO_92 GPIO78 0: 3.3V* 10KPD
<7> I2S2_SDO_GPIO_88 SPI_1_TX_GPIO_117 <9> 1: 1.8V
<7> DMIC_CLK_AB2_GPIO_82 SPI_1_FS1_GPIO_113 <9>
<7> I2S1_SDO_GPIO_78 SPI_1_FS0_GPIO_112 <9> GPIO82 10KPD Pulled LOW when RSM_RST_N de-asserts
<9> UART_2_CRTS_DCTS SPI_1_CLK_GPIO_111 <9>
<9,23> UART_TXD_NGFF SPI_0_TX_GPIO_110 <9> GPIO88 0: 3.3V* 10KPD PMU 1.8V/3.3V mode select
<9> UART_1_CRTS#_GPIO_44 1: 1.8V
<9> UART_1_CTXD_GPIO_43
B <9> UART_0_CRTS#_GPIO_40
GPIO92 0: Disable* 10KPD SMBus No Re-Boot B
<9> UART_0_CTXD_GPIO_39 1: Enable
<10> VCC1P24_1P35_SEL
<10> PW M1_GPIO_35 GPIO104 10KPD Pulled LOW when RSM_RST_N de-asserts
<10> PW M0_GPIO_34
RC443
RC444
RC445
RC446
RC447
RC449
RC450

RC434
RC435
RC436
RC437
RC438
RC439
RC440
RC441
RC442
@ RC523
RC280
RC429
RC430
RC431
RC432
RC433
GPIO106 4.7KPU Pulled HIGH when RSM_RST_N de-asserts

1
1
2
GPIO110 0: 3.3V* 10KPD LPC 1.8V/3.3V mode select

@ 1: 1.8V
0: From SPI*
0_0402_5%
GPIO111 10KPD Boot BIOS from SPI select

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2
1: Don't
1

For Intel 560735 Sighting Alert,WW35 GPIO118 0: Don't* 10KPD Flash Descriptor Override
Boundary Scan Chain issue. 1: Override
Customers can remove (un-stuffed)
the workaround when this issue is fixed in QS sample. GPIO120 0: Enable* 10KPD Top swap override
1: Disable
Stuff : JTAG mode(also need un-stuff PR106 and PR143)
Un-Stuff: normal operation. GPIO121 10KPD Pulled LOW when RSM_RST_N de-asserts
A GPIO123 4.7KPU Pulled HIGH when RSM_RST_N de-asserts A
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(7/11)GPIO
5 4 3 2 1
5 4 3 2 1
+RTCVCC
@ UC1P APL_SOC
A18 AA44 RC113 unstuff on QS sample
+RTCVCC A4 RSVD1 VCCRTC_3P3V +1.8VALW
AG52 RSVD2 AG51 1 2
AG54 RSVD3 VCC_RTC_EXTPAD CC135 .1U_0402_16V7K
B4 RSVD4 AC59 SOC_RTCX1
RSVD5 RTC_X1
2
RC245 1 2 57.6K_0402_5% SOC_SRTCRST# C1 AC58 SOC_RTCX2 +1.8VALW A0S@
RSVD6
C19
RSVD7
3.3V RTC_X2 RC113
CC136 1 2 1U_0402_6.3V6K F1 AC55 SOC_SRTCRST# 51_0402_5%
H43 RSVD8 RTC_RST# AH49 SOC_RTCTEST#
1 @ 2 0_0603_5% J43 RSVD9 RTC_TEST#
1
JCMOS2 RSVD10 T5045 XDP_TRST#
B21
A14 JTAGX C22 XDP_TDI @ RC459 1 2 51_0402_5%
NCTF1 JTAG_TDI
2
A60 A22 XDP_TDO
RC93 1 2 57.6K_0402_5% SOC_RTCTEST# A61 NCTF2 JTAG_TDO C23 XDP_TMS RC112 1 2 51_0402_5% RC462
D NCTF3 JTAG_TMS D
B15 C24 XDP_TRST# 51_0402_5%
NCTF4
CC11 1 2 1U_0402_6.3V6K BG1
NCTF5
1.8V JTAG_TRST#
JTAG_TCK
B23 XDP_TCK0 @
BJ2 C20 XDP_PREQ# RC458 2 1 100_0402_1%
1
1 @ 2 0_0603_5% C14 NCTF6 JTAG_PREQ# C21 XDP_PRDY#
JCMOS1 C15 NCTF7 JTAG_PRDY# B19 +RTCVCC
C9 NCTF8 JTAG_PMODE @ T5044
D8 NCTF9 Unstuff for MoW WW31 request.
E10 NCTF10 AC54 2 1
NCTF11 INTRUDER
stuff RC113 for Intel request 10/30
E8 330K_0402_5% RC244
F8 NCTF12
PreMP modify NCTF13
H10
NCTF14 16 OF 23
SOC_RTCTEST# 1 @ 2 APL_BGA1296
CLR_CMOS# <27>
RC250 0_0402_5%
SOC_SRTCRST# 1 2 XDP_TCK0 RC463 1 2 51_0402_5%

RC251 0_0402_5%
@ UC1R APL_SOC
A3 PreMP modify
SOC_RTCX2 AB13 NCTF1 AV34 MEM_CH0_RCOMP 1 2
AB49 NCTF2 MEM_CH0_RCOMP AV30 MEM_CH1_RCOMP RC263 1 2105_0402_1%
AC13 NCTF3 MEM_CH1_RCOMP RC264 105_0402_1%
AM58 NCTF4 AP7 MDSI_RCOMP 1 @ 2
SOC_RTCX1 AM59 NCTF5 MDSI_RCOMP RC273 150_0402_1%
B13 NCTF6 V59 EMMC_RCOMP 2 1
1 2 C13 NCTF7 EMMC_RCOMP RC274 200_0402_1%
RC98 10M_0402_5% C2 NCTF8 F27 MCSI_DPHY12_RCOMP 1 @ 2
D2 NCTF9 MCSI_DPHY1.2_RCOMP RC266 150_0402_1%
J29 NCTF10 E34 GPIO_RCOMP 2 1
M39 NCTF11 GPIO_RCOMP RC275 200_0402_1%
C
32.768KHZ_12.5PF_Q13FC135000040 P25 NCTF12 H27 MCSI_DPHY11_RCOMP 1 @ 2 C
Y8 1 2 P27 NCTF13 MCSI_DPHY1.1_RCOMP RC268 150_0402_1%
P39 NCTF14 Y15 USB2_RCOMP 1 2
R25 NCTF15 USB2_RCOMP RC269 113_0402_1%
R37 NCTF16 AB15 USB_SSIC_RCOMP 1 @ 2
NCTF17 USB_SSIC_RCOMP
15P_0402_50V8J
15P_0402_50V8J
R39 RC498 137_0402_1%

NCTF18 Update DG v1.2 remove USB_SSIC_RCOMP
1
AG59 PMU_RCOMP 2 1
PMU_RCOMP
CC17
CC16
RC276 200_0402_1%
E21 PCIE_REF_CLK_RCOMP 1 2
2
PCIE_REF_CLK_RCOMP RC272 60.4_0402_1%
18 OF 23
APL_BGA1296
XDP
+1.8VALW +1.8VALW_CMC
CMC Conn.
1 @ 2
RC404 0_0603_5% CONN@
JCMC1 CMC_DEBUG_36P
+1.8VALW_CMC
B OBS DATA JTAG/RC/HOOKS B
CMC@
1 20 1 2
<10> DBG_PTI_DATA_0 DATA_0 DATA_CLK_2N
3 22 CC141 .1U_0402_16V7K
+1.8VALW <10> DBG_PTI_DATA_1 DATA_1 VCCOBS_AB
<10> DBG_PTI_DATA_2
5
@CMC@ 7 DATA_2
<10> DBG_PTI_DATA_3 DATA_3
RC267 1@CMC@ 2 1K_0402_5% XDP_HLT_BOOT 1 2 <10> DBG_PTI_DATA_4
9 28 XDP_TRST#
CC142 .1U_0402_16V7K 11 DATA_4 XDP_TRST* 29 XDP_TDI +1.8VALW_CMC
<10> DBG_PTI_DATA_5 DATA_5 XDP_TDI
13 30 XDP_TMS
<10> DBG_PTI_DATA_6 DATA_6 XDP_TMS
<10> DBG_PTI_DATA_7
15 32 XDP_TCK0
Place close to JXDP1.47 DATA_7 XDP_TCK0 31
1 @ 2 17 XDP_TCK1 35 XDP_TDO T5047 @ RC461 2 CMC@ 1 100_0402_1%
<10> DBG_PTI_CLK_3 DATA_CLK_1P XDP_TDO
RC213 0_0402_5% 21
@ T5048 DATA_CLK_1N 33 XDP_PREQ#
2 XDP_PREQ* 34 XDP_PRDY# RC460 2 CMC@ 1 100_0402_1%
4 DATA_8 XDP_PRDY* PreMP modify
6 DATA_9 27 XDP_RSMRST# RC402 1 @CMC@ 2 1K_0402_5%
DATA_10 HOOK_0 EC_RSMRST# <9,27>
8 25
DATA_11 HOOK_3 SPI_0_FS1_GPIO_106 <9,11>
10 26 XDP_PMU_PLTRST#
12 DATA_12 HOOK_6
PreMP modify DATA_13
14 23
DATA_14 XDP_PRSNT_CPU* SPI_2_TX_GPIO_123 <9,11>
16
DATA_15 24 XDP_PRESENT#_PCH 1 @ 2
PLT_RST_BUF# 1K_0402_5% 2 @CMC@ 1RC340 XDP_PMU_PLTRST# 18 XDP_PRSNT_PCH* 19 RC211 0_0402_5%
<9,22,23,27,28> PLT_RST_BUF# DATA_CLK_2P GND 36
<MT> GND
INTEL_CMC_PRIMARY
A A
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(8/11)PCIE,USB,SATA
Custom 1.A
5 4 3 2 1
5 4 3 2 1
+VNN +VCCIOA
RC476 1 20_0603_5%
PreMP modify
+1.8VALW +1.8VALW _SOC +1.24VALW
+1.24V_1.35VALW _SOC +1.24V_1.35VALW _GLML
RC480 2 @ 1 0_0603_5%
1 2 RC464 1 @ 20_0402_5%
RC495 0_0603_5%
D
+1.24V_1.35VALW _PLL D
+1.35V_VDDQ
+1.24VALW +1.24VALW _DSI_CSI RC478 2 @ 1 0_0603_5%
RC477 1 @ 20_0402_5% 1 @ 2 +1.24V_1.35VALW _USB2

RC496 0_0603_5%
RC466 1 @ 2 0_0402_5%
A-Step only support +1.24V. +1.24V_1.35VALW _MPHY +VNN +VCC_VCGI
RC467 1 @ 2 0_0402_5% @ UC1V APL_SOC

AJ37 AA28
AJ39 VNN1 VCC_VCGI1 AA30
AJ41 VNN2 VCC_VCGI2 AA32
+1.05VS +1.05VS_SOC +1.05VS_SOC_SRAM AJ42 VNN3 VCC_VCGI3 AC28
AJ46 VNN4 VCC_VCGI4 AC30
1 2 RC482 2 @ 1 0_0603_5% AK37 VNN5 VCC_VCGI5 AC32
RC481 0_0603_5% AK39 VNN6 VCC_VCGI6 AE28
+1.05VS_SOC_DDI AK41 VNN7 VCC_VCGI7 AE30
AK42 VNN8 VCC_VCGI8 AE32
RC472 1 @ 2 0_0402_5% AK44 VNN9 VCC_VCGI9 AG28
AK46 VNN10 VCC_VCGI10 AG30
+1.05VS_SOC_FHV0 +VCCIOA AM44 VNN11 VCC_VCGI11 AG32
VNN16 VCC_VCGI12 AJ28
RC473 1 @ 2 0_0402_5% AM23 VCC_VCGI13 AJ30
+1.24VALW_DSI_CSI is only for AM25 VNN12 VCC_VCGI14 AJ32
VNN13 VCC_VCGI15
MIPI-CSI or MIPI-DSI function. +1.05VS_SOC_FUSE AM41
VNN14 VCC_VCGI16
AK28
AM42 AK30
RC474 1 @ 2 0_0402_5% +1.05VS_SOC_DDI VNN15 VCC_VCGI17 AK32
C +1.24VALW _DSI_CSI VCC_VCGI18 AM30 C
+1.05VS_SOC_FHV1 VCC_VCGI19 E29
AA22 VCC_VCGI20 E37
RC475 1 @ 2 0_0402_5% AA23 VCC_1P05V1 VCC_VCGI21 E50
AC23 VCC_1P05V2 VCC_VCGI22 U28
VCC_1P05V3 VCC_VCGI23
1U_0402_6.3V6K
CC158
1U_0402_6.3V6K
CC159
22U_0603_6.3V6M
CC160
2 2 2 V18 U30
Y18 VCC_1P05V7 VCC_VCGI24 U32
+1.05VS_SOC_FUSE Y20 VCC_1P05V8 VCC_VCGI25 V28
@ +1.05VS_SOC_FHV0 VCC_1P05V9 VCC_VCGI26 V30
1 @ 1 @ 1 +1.05VS_SOC_FHV1 VCC_VCGI27
P16 V32
T13 VCC_1P05V4 VCC_VCGI28 Y28
T15 VCC_1P05V5 VCC_VCGI29 Y30
+1.24VALW _DSI_CSI VCC_1P05V6 VCC_VCGI30 Y32 +3V_SOC +3V_SOC
AA18 VCC_VCGI31
AA20 VCC_1P24V_A1
BSC Side PSC Side +1.24V_1.35VALW _MPHY VCC_1P24V_A2 AA42
VCC_3P3V_A1 AC41 Close Soc pin AK25,AJ25
+VCCIOA +1.05VS_SOC_DDI VCC_3P3V_A2
1U_0402_6.3V6K
CC178
1U_0402_6.3V6K
CC179
1U_0402_6.3V6K
CC180
1U_0402_6.3V6K
CC181
22U_0603_6.3V6M
CC182
AE18 AJ25 2 2 2 2 2
AE20 VCC_1P24V_1P35V_A1 VCC_3P3V_A3 AK25
+1.24V_1.35VALW _USB2 AE22 VCC_1P24V_1P35V_A2 VCC_3P3V_A4 V44
AG22 VCC_1P24V_1P35V_A3 VCC_3P3V_A5 V46
+1.24V_1.35VALW _PLL VCC_1P24V_1P35V_A5 VCC_3P3V_A6 Y44 1 1 1 1 1
VCC_3P3V_A7
1U_0402_6.3V6K
CC211
1U_0402_6.3V6K
CC210
22U_0603_6.3V6M
CC212
22U_0603_6.3V6M
CC213
1U_0402_6.3V6K
CC153
1U_0402_6.3V6K
CC154
1U_0402_6.3V6K
CC155
1U_0402_6.3V6K
CC156
22U_0603_6.3V6M
CC157
2 2 2 2 2 2 2 2 2 AG20
VCC_1P24V_1P35V_A4
+1.24V_1.35VALW _GLML AJ20 AC20
AJ22 VCC_1P24V_1P35V_A6 RSVD1 AC22
1 1 1 1 1 1 1 1 1 AK22 VCC_1P24V_1P35V_A7 RSVD2 AJ44
VCC_1P24V_1P35V_A9 RSVD3 BJ61 BSC Side PSC Side
AK20 RSVD4 BJ62
B AM20 VCC_1P24V_1P35V_A8 RSVD5 V49 B
AM28 VCC_1P24V_1P35V_A10 RSVD6
AM37 VCC_1P24V_1P35V_A11
PSC Side BSC Side PSC Side VCC_1P24V_1P35V_A12
+1.24V_1.35VALW _MPHY +1.24V_1.35VALW _USB2 D4
E3 NCTF1
L14 NCTF2
R19 NCTF3
T51 NCTF4 22 OF 23
NCTF5
1U_0402_6.3V6K
CC172
1U_0402_6.3V6K
CC169
1U_0402_6.3V6K
CC170
22U_0603_6.3V6M
CC171
1U_0402_6.3V6K
CC176
2 2 2 2 2
APL_BGA1296
1 1 1 1 1
BSC Side PSC Side BSC Side
+1.24V_1.35VALW _GLML +1.24V_1.35VALW _PLL

1U_0402_6.3V6K
CC165
1U_0402_6.3V6K
CC162
1U_0402_6.3V6K
CC163
22U_0603_6.3V6M
CC164
1U_0402_6.3V6K
CC161
1U_0402_6.3V6K
CC166
1U_0402_6.3V6K
CC167
22U_0603_6.3V6M
CC168
2 2 2 2 1 2 2 2
A A
1 1 1 1 2 1 1 1
Close Soc pin AM28
BSC Side PSC Side BSC Side PSC Side

2014/05/19
Compal Secret Data
2015/12/31 Title
APL(9/11)Power
5 4 3 2 1
5 4 3 2 1
+1.8VALW_SOC
+1.05VS_SOC_SRAM @ UC1W APL_SOC
+1.05VS_SOC_SRAM AA46
AA25 VCC_1P8V_A1 AC42
AC25 VCC_1P05V1 VCC_1P8V_A2 AC44
AE25 VCC_1P05V2 VCC_1P8V_A3 AC46
U20 VCC_1P05V3 VCC_1P8V_A4 AE42
1U_0402_6.3V6K VCC_1P05V4 VCC_1P8V_A5
CC183
1U_0402_6.3V6K
CC185
1U_0402_6.3V6K
CC184
1U_0402_6.3V6K
CC186
22U_0603_6.3V6M
CC187
22U_0603_6.3V6M
CC188
2 2 2 2 2 2 U22 AE44
D U23 VCC_1P05V5 VCC_1P8V_A6 AE46 D
U25 VCC_1P05V6 VCC_1P8V_A7 AG25
V22 VCC_1P05V7 VCC_1P8V_A8 +VCC_VCGI
1 1 1 1 1 1 V23 VCC_1P05V8
V25 VCC_1P05V9 AA36
PreMP modify VCC_1P05V10 VCC_VCGI1
Y23 AA37
Y25 VCC_1P05V11 VCC_VCGI2 AA39
+1.35V_VDDQ +1.35V_VDDQ_SOC VCC_1P05V12 VCC_VCGI3 AC36
VCC_VCGI4 AC37
BSC Side PSC Side RC1451 @ 2 0_1206_5% AN18 VCC_VCGI5 AE36
AN20 VDDQ1 VCC_VCGI6 AE37
RC1461 @ 2 0_1206_5% AN22 VDDQ2 VCC_VCGI7 AG36
+1.35V_VDDQ_SOC AN23 VDDQ3 VCC_VCGI8 AK34
RC1471 @ 2 0_1206_5% AN41 VDDQ4 VCC_VCGI9 E35
AN42 VDDQ5 VCC_VCGI10 E43
AR17 VDDQ8 VCC_VCGI13 F29
VDDQ9 VCC_VCGI14
22U_0603_6.3V6M
CC189
22U_0603_6.3V6M
CC190
22U_0603_6.3V6M
CC191
22U_0603_6.3V6M
CC192
22U_0603_6.3V6M
CC193
22U_0603_6.3V6M
CC194
22U_0603_6.3V6M
CC195
22U_0603_6.3V6M
CC196
2 2 2 2 2 2 2 2 AR47 R45
AT13 VDDQ10 VCC_VCGI15 R47
AT17 VDDQ11 VCC_VCGI16 U36
AT47 VDDQ12 VCC_VCGI17 U37
1 1 1 1 1 1 1 1 AT51 VDDQ13 VCC_VCGI18 U39
AV14 VDDQ14 VCC_VCGI19 U41
AV50 VDDQ15 VCC_VCGI20 U42
VDDQ16 VCC_VCGI21 U44
VCC_VCGI22 U46
C C
E23 VCC_VCGI23 U47
PSC Side E6 NCTF1 VCC_VCGI24 U48
F23 NCTF2 VCC_VCGI25 V36
R17 NCTF3 VCC_VCGI26 V37
+1.8VALW_SOC NCTF4 VCC_VCGI27 V39
VCC_VCGI28 V41
AM32 VCC_VCGI29 Y36
AN32 RSVD1 VCC_VCGI30 Y37
BG63 RSVD2 VCC_VCGI31 Y39
RSVD3 VCC_VCGI32
1U_0402_6.3V6K
CC199
1U_0402_6.3V6K
CC198
1U_0402_6.3V6K
CC200
1U_0402_6.3V6K
CC203
22U_0603_6.3V6M
CC202
2 2 2 2 2 BJ3 Y41
D1 RSVD4 VCC_VCGI33
V48 RSVD5 R41
RSVD6 VCC_VCGI_SENSE_P VCC_VCGI_SENSE_P <39>
R43
1 1 1 1 1 VCC_VCGI_SENSE_N VCC_VCGI_SENSE_N <39>
AG48 VNN_SENSE <40>

VNN_SENSE
23 OF 23
BSC Side PSC Side APL_BGA1296
B RTC Battery CC79.CC84 Close UC1.AK19.

B
MAX. 8000mil
D22 W=20mils
W=20mils 2 +CHGRTC
+RTCBATT 1 2 1
RC192 1K_0402_5% W=20mils
3
+RTCVCC
BAS40-04_SOT23-3
1U_0402_6.3V6K
CC84
.1U_0402_16V7K
2 2
CC79
1 1
A A
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(10/11)Power
Custom 1.A
5 4 3 2 1
5 4 3 2 1
D D
@ UC1S APL_SOC @ UC1T APL_SOC @ UC1U APL_SOC

AG42 A12 AK36 BB25 AN54 M32
AG44 VSS70 VSS1 A16 AR19 VSS1 VSS70 BB3 AN56 VSS1 VSS70 M50
AG46 VSS71 VSS2 A20 AR32 VSS2 VSS71 BB39 AN57 VSS2 VSS71 M59
AH15 VSS72 VSS3 A24 AR45 VSS3 VSS72 BB45 AN59 VSS3 VSS72 M9
AH16 VSS73 VSS4 A28 AT12 VSS4 VSS73 BB61 AN63 VSS4 VSS73 N1
AH48 VSS74 VSS5 A32 AT16 VSS5 VSS74 BC32 AN7 VSS5 VSS74 N32
AH5 VSS75 VSS6 A36 AT19 VSS6 VSS75 BD3 AN8 VSS6 VSS75 N63
AH52 VSS76 VSS7 A40 AT2 VSS7 VSS76 BD32 AP55 VSS7 VSS76 P13
AH54 VSS77 VSS8 A44 AT25 VSS8 VSS77 BD56 AP9 VSS8 VSS77 P19
AH55 VSS78 VSS9 A48 AT29 VSS9 VSS78 BD61 C28 VSS9 VSS78 P35
AH57 VSS79 VSS10 A5 AT3 VSS10 VSS79 BD8 C32 VSS10 VSS79 P37
AH58 VSS80 VSS11 A52 AT35 VSS11 VSS80 BE1 C40 VSS11 VSS80 P41
AH59 VSS81 VSS12 A56 AT39 VSS12 VSS81 BE10 C48 VSS12 VSS81 P43
AH6 VSS82 VSS13 A62 AT45 VSS13 VSS82 BE12 D32 VSS13 VSS82 P45
AH7 VSS83 VSS14 A9 AT48 VSS14 VSS83 BE16 D58 VSS14 VSS83 P5
AJ1 VSS84 VSS15 AA1 AT52 VSS15 VSS84 BE17 D6 VSS15 VSS84 P55
AJ18 VSS85 VSS16 AA2 AT57 VSS16 VSS85 BE21 E12 VSS16 VSS85 P59
AJ2 VSS86 VSS17 AA27 AT61 VSS17 VSS86 BE27 E14 VSS17 VSS86 P9
AJ23 VSS87 VSS18 AA34 AT62 VSS18 VSS87 BE29 E19 VSS18 VSS87 R23
AJ27 VSS88 VSS19 AA41 AT7 VSS19 VSS88 BE35 E27 VSS19 VSS88 R29
AJ34 VSS89 VSS20 AA63 AU32 VSS20 VSS89 BE37 E4 VSS20 VSS89 R32
AJ36 VSS90 VSS21 AB10 AV19 VSS21 VSS90 BE43 E54 VSS21 VSS90 T49
AJ63 VSS91 VSS22 AB12 AV2 VSS22 VSS91 BE47 F10 VSS22 VSS91 U1
AK10 VSS92 VSS23 AB16 AV21 VSS23 VSS92 BE48 F21 VSS23 VSS92 U10
C AK12 VSS93 VSS24 AB48 AV23 VSS24 VSS93 BE52 F3 VSS24 VSS93 U11 C
AK27 VSS96 VSS27 AB57 AV32 VSS27 VSS96 BF3 F43 VSS27 VSS96 U16
AK52 VSS99 VSS30 AC18 AV43 VSS30 VSS99 BG19 F56 VSS30 VSS99 U2
AM18 VSS102 VSS33 AC39 AV61 VSS33 VSS102 BG32 G1 VSS33 VSS102 U5
AM22 VSS103 VSS34 AE1 AV62 VSS34 VSS103 BG35 G32 VSS34 VSS103 U50
AM27 VSS104 VSS35 AE10 AV9 VSS35 VSS104 BG41 H17 VSS35 VSS104 U51
AM34 VSS105 VSS36 AE11 AW14 VSS36 VSS105 BG45 H23 VSS36 VSS105 U53
AM36 VSS106 VSS37 AE13 AW30 VSS37 VSS106 BH1 H29 VSS37 VSS106 U54
AN1 VSS109 VSS40 AE17 AY10 VSS40 VSS109 BH25 H47 VSS40 VSS109 U59
AN13 VSS112 VSS43 AE27 AY58 VSS43 VSS112 BH62 J12 VSS43 VSS112 U7
AN14 VSS113 VSS44 AE34 AY6 VSS44 VSS113 BH63 J14 VSS44 VSS113 U8
AN16 VSS114 VSS45 AE39 B2 VSS45 VSS114 BJ10 J19 VSS45 VSS114 V20
AN27 VSS118 VSS49 AE48 BA1 VSS49 VSS118 BJ32 J35 VSS49 VSS118 Y12
VSS120 VSS51
PAG 0p91 Page22 VSS51 VSS120 VSS51 VSS120
AN30 AE50 VNN_VSS_SENSE point should locate at BA16 BJ4 J48 Y22
B VSS122 VSS53 remote APL SOC GND pin AE47 or AE48. VSS53 VSS122 VSS53 VSS122 B
AN36 AE53 BA2 BJ50 K32 Y34
AN37 VSS123 VSS54 AE54 BA21 VSS54 VSS123 BJ54 K5 VSS54 VSS123 Y42
AN5 VSS127 VSS58 AE63 BA32 VSS58 VSS127 C12 L21 VSS58 VSS127 Y52
AN50 VSS128 VSS59 AE7 BA35 VSS59 VSS128 C16 L27 VSS59 VSS128 Y54
AN51 VSS129 VSS60 AE8 BA37 VSS60 VSS129 L29 VSS60 VSS129 Y55
AN53 VSS130 VSS61 AG13 BA39 VSS61 L35 VSS61 VSS130 Y57
B63 VSS131 VSS62 AG18 BA43 VSS62 L43 VSS62 VSS131 Y59
VSS132 VSS63 AG23 BA47 VSS63 L45 VSS63 VSS132 Y6
VSS64 AG27 BA48 VSS64 L50 VSS64 VSS133 Y7
VSS65 AG34 BA52 VSS65 M14 VSS65 VSS134
VSS66 AG37 BA62 VSS66 M21 VSS66
VSS67 AG39 BA63 VSS67 M27 VSS67
VSS68 AG41 BB19 VSS68 M3 VSS68
VSS69
19 OF23 VSS69 20 OF 23 VSS69 21 OF 23
APL_BGA1296 APL_BGA1296 APL_BGA1296
A A
2014/05/19
Compal Secret Data
2015/12/31 Title
APL(11/11)GND
5 4 3 2 1
A B C D E
CH0 DDR3L Memory Down Lower Bits

+0.675V_DDRM0_VREFDQ +0.675V_DDRM0_VREFCA +0.675V_DDRM0_VREFDQ +0.675V_DDRM0_VREFCA
UD1 UD2
M8 E3 DDR_M0_D4 M8 E3 DDR_M0_D19
H1 VREFCA DQL0 F7 DDR_M0_D2 H1 VREFCA DQL0 F7 DDR_M0_D20
1 DDR_M0_CKE0 VREFDQ DQL1 F2 DDR_M0_D7 VREFDQ DQL1 F2 DDR_M0_D18 1
<6,17> DDR_M0_D[0..63] <6,17> DDR_M0_CKE0 DDR_M0_CKE1 DDR_M0_MA0 N3 DQL2 F8 DDR_M0_D3 DDR_M0_MA0 N3 DQL2 F8 DDR_M0_D21
<6,17> DDR_M0_CKE1 DDR_M0_ODT0_DRAM DDR_M0_MA1 P7 A0 DQL3 H3 DDR_M0_D1 DDR_M0_MA1 P7 A0 DQL3 H3 DDR_M0_D22
<6,17> DDR_M0_DQS[0..7] <17> DDR_M0_ODT0_DRAM P3 A1 DQL4 H8 P3 A1 DQL4 H8
DDR_M0_ODT1_DRAM DDR_M0_MA2 DDR_M0_D6 DDR_M0_MA2 DDR_M0_D23
<17> DDR_M0_ODT1_DRAM DDR_M0_MA3 N2 A2 DQL5 G2 DDR_M0_D0 DDR_M0_MA3 N2 A2 DQL5 G2 DDR_M0_D16
<6,17> DDR_M0_DQS#[0..7] P8 A3 DQL6 H7 P8 A3 DQL6 H7
DDR_M0_MA4 DDR_M0_D5 DDR_M0_MA4 DDR_M0_D17
DDR_M0_CS#0 DDR_M0_MA5 P2 A4 DQL7 DDR_M0_MA5 P2 A4 DQL7
<6,17> DDR_M0_MA[0..15] <6,17> DDR_M0_CS#0 DDR_M0_CS#1 DDR_M0_MA6 R8 A5 DDR_M0_MA6 R8 A5
DDR_M0_BS0 <6,17> DDR_M0_CS#1 DDR_M0_MA7 R2 A6 D7 DDR_M0_D11 DDR_M0_MA7 R2 A6 D7 DDR_M0_D27
<6,17> DDR_M0_BS0 T8 A7 DQU0 C3 T8 A7 DQU0 C3
DDR_M0_BS1 DDR_M0_MA8 DDR_M0_D9 DDR_M0_MA8 DDR_M0_D25
<6,17> DDR_M0_BS1 DDR_M0_BS2 DDR_M0_RAS# DDR_M0_MA9 R3 A8 DQU1 C8 DDR_M0_D8 DDR_M0_MA9 R3 A8 DQU1 C8 DDR_M0_D28
<6,17> DDR_M0_BS2 DDR_M0_CLK0 <6,17> DDR_M0_RAS# DDR_M0_CAS# DDR_M0_MA10 L7 A9 DQU2 C2 DDR_M0_D10 DDR_M0_MA10 L7 A9 DQU2 C2 DDR_M0_D26
<6,17> DDR_M0_CLK0 DDR_M0_CLK#0 <6,17> DDR_M0_CAS# DDR_M0_WE# DDR_M0_MA11 R7 A10/AP DQU3 A7 DDR_M0_D15 DDR_M0_MA11 R7 A10/AP DQU3 A7 DDR_M0_D30
<6,17> DDR_M0_CLK#0 <6,17> DDR_M0_WE# N7 A11 DQU4 A2 N7 A11 DQU4 A2
DDR_M0_DRAMRST# DDR_M0_MA12 DDR_M0_D14 DDR_M0_MA12 DDR_M0_D24
<6,17> DDR_M0_DRAMRST# DDR_M0_MA13 T3 A12 DQU5 B8 DDR_M0_D12 DDR_M0_MA13 T3 A12 DQU5 B8 DDR_M0_D29
DDR_M0_MA14 T7 A13 DQU6 A3 DDR_M0_D13 DDR_M0_MA14 T7 A13 DQU6 A3 DDR_M0_D31
DDR_M0_MA15 M7 A14 DQU7 +1.35V_VDDQ DDR_M0_MA15 M7 A14 DQU7 +1.35V_VDDQ
A15/BA3 A15/BA3
DDR_M0_BS0 M2 B2 DDR_M0_BS0 M2 B2
DDR_M0_BS1 N8 BA0 VDD D9 DDR_M0_BS1 N8 BA0 VDD D9
DDR_M0_BS2 M3 BA1 VDD G7 DDR_M0_BS2 M3 BA1 VDD G7
BA2 VDD K2 BA2 VDD K2
VDD K8 VDD K8
+1.35V_VDDQ +0.675V_DDRM0_VREFCA VDD N1 VDD N1
DDR_M0_CLK0 J7 VDD N9 DDR_M0_CLK0 J7 VDD N9
DDR_M0_CLK#0 K7 CK VDD R1 DDR_M0_CLK#0 K7 CK VDD R1
RD33 2 MD@ 1 3.65K_0402_1% DDR_M0_CKE0 K9 CK VDD R9 DDR_M0_CKE0 K9 CK VDD R9
CKE/CKE0 VDD CKE/CKE0 VDD
RD32 2 MD@ 1 3.65K_0402_1% 2 2 DDR_M0_ODT0_DRAM K1 A1 DDR_M0_ODT0_DRAM K1 A1

MD@ MD@ DDR_M0_CS#0 L2 ODT/ODT0 VDDQ A8 DDR_M0_CS#0 L2 ODT/ODT0 VDDQ A8
2 CD101 CD102 DDR_M0_RAS# J3 CS/CS0 VDDQ C1 DDR_M0_RAS# J3 CS/CS0 VDDQ C1 2
DDR_M0_CAS# K3 RAS VDDQ C9 DDR_M0_CAS# K3 RAS VDDQ C9
.1U_0402_16V7K .1U_0402_16V7K CAS VDDQ CAS VDDQ
1 1 DDR_M0_WE# L3 D2 DDR_M0_WE# L3 D2
WE VDDQ E9 WE VDDQ E9
VDDQ F1 VDDQ F1
close UD1 close UD2 VDDQ VDDQ
DDR_M0_DQS0 F3 H2 DDR_M0_DQS2 F3 H2
DDR_M0_DQS1 C7 DQSL VDDQ H9 DDR_M0_DQS3 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ
+1.35V_VDDQ
+1.35V_VDDQ +0.675V_DDRM0_VREFDQ E7 A9 E7 A9
D3 DML VSS B3 D3 DML VSS B3
DMU VSS E1 DMU VSS E1
VSS VSS
1
RD28 2 MD@ 1 3.65K_0402_1% MD@ G8 G8
RD24 DDR_M0_DQS#0 G3 VSS J2 DDR_M0_DQS#2 G3 VSS J2
DDR_M0_DQS#1 B7 DQSL VSS J8 DDR_M0_DQS#3 B7 DQSL VSS J8
1K_0402_5% DQSU VSS DQSU VSS
RD31 2 MD@ 1 3.65K_0402_1% 2 2 M1 M1
MD@ MD@ VSS M9 VSS M9
2
CD103 CD104 VSS P1 VSS P1
DDR_M0_DRAMRST# T2 VSS P9 DDR_M0_DRAMRST# T2 VSS P9
.1U_0402_16V7K .1U_0402_16V7K RESET VSS RESET VSS
1 1 T1 T1
RD1 2 MD@ 1 240_0402_1% L8 VSS T9 RD42 2 MD@ 1 240_0402_1% L8 VSS T9
2 ZQ/ZQ0 VSS ZQ/ZQ0 VSS
close UD1 close UD2
CD95
Place near to DDR side. .1U_0402_16V7K DDR_M0_ODT1_DRAM J1 B1 DDR_M0_ODT1_DRAM J1 B1
1 DDR_M0_CS#1 L1 NC/ODT1 VSSQ B9 DDR_M0_CS#1 L1 NC/ODT1 VSSQ B9
@EMC@ NC/CS1 VSSQ NC/CS1 VSSQ
DDR_M0_CKE1 J9 D1 DDR_M0_CKE1 J9 D1
RD2 2 1 240_0402_1% L9 NC/CE1 VSSQ D8 RD43 2 MD@ 1 240_0402_1% L9 NC/CE1 VSSQ D8
MD@ NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9
ESD request 10/22 VSSQ VSSQ
G1 G1
VSSQ G9 VSSQ G9
3 VSSQ VSSQ 3
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
X76@ X76@
+1.35V_VDDQ +1.35V_VDDQ
+0.675VS_VTT Edge of Vtt island
CD76
CD77
CD78
CD64
CD65
CD66
CD67
CD70
CD71
CD72
CD73
CD49
CD97
CD93
CD98
CD94
CD99
CD96
CD100
CD92
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
1
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
@ @ @ @
2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
4 4
Place around UD1 & UD2 Place close to UD1 Place close to UD2 Please Distributed uniformly
Non-Interleaved Memory
2014/05/19
Compal Secret Data
2015/12/31 Title
DDR3L_Memory down-1
Custom 1.A
A B C D E
A B C D E
CH0 DDR3L Memory Down Upper Bits Non-Interleaved Memory
+0.675VS_VTT
RPD1 MD@
1 DDR_M0_MA9 1 8 1
<6,16> DDR_M0_D[0..63] DDR_M0_MA8 2 7
+0.675V_DDRM0_VREFDQ +0.675V_DDRM0_VREFCA +0.675V_DDRM0_VREFDQ +0.675V_DDRM0_VREFCA DDR_M0_MA5 3 6
<6,16> DDR_M0_DQS[0..7] 4 5
DDR_M0_MA14
<6,16> DDR_M0_DQS#[0..7]
36_0804_8P4R_5%
UD3 UD4 RPD2 MD@
<6,16> DDR_M0_MA[0..15] DDR_M0_MA0 1 8
DDR_M0_BS0 M8 E3 DDR_M0_D43 M8 E3 DDR_M0_D61 DDR_M0_BS0 2 7
<6,16> DDR_M0_BS0 H1 VREFCA DQL0 F7 H1 VREFCA DQL0 F7 3 6
DDR_M0_BS1 DDR_M0_D40 DDR_M0_D60 DDR_M0_MA6
<6,16> DDR_M0_BS1 DDR_M0_BS2 VREFDQ DQL1 F2 DDR_M0_D41 VREFDQ DQL1 F2 DDR_M0_D62 DDR_M0_MA2 4 5
<6,16> DDR_M0_BS2 DDR_M0_CLK0 DDR_M0_MA0 N3 DQL2 F8 DDR_M0_D47 DDR_M0_MA0 N3 DQL2 F8 DDR_M0_D56
<6,16> DDR_M0_CLK0 DDR_M0_CLK#0 DDR_M0_MA1 P7 A0 DQL3 H3 DDR_M0_D45 DDR_M0_MA1 P7 A0 DQL3 H3 DDR_M0_D59 36_0804_8P4R_5%
<6,16> DDR_M0_CLK#0 P3 A1 DQL4 H8 P3 A1 DQL4 H8
DDR_M0_MA2 DDR_M0_D42 DDR_M0_MA2 DDR_M0_D58 RPD3 MD@
DDR_M0_MA3 N2 A2 DQL5 G2 DDR_M0_D46 DDR_M0_MA3 N2 A2 DQL5 G2 DDR_M0_D63 DDR_M0_MA12 1 8
DDR_M0_CKE0 DDR_M0_MA4 P8 A3 DQL6 H7 DDR_M0_D44 DDR_M0_MA4 P8 A3 DQL6 H7 DDR_M0_D57 DDR_M0_MA1 2 7
<6,16> DDR_M0_CKE0 DDR_M0_CKE1 DDR_M0_MA5 P2 A4 DQL7 DDR_M0_MA5 P2 A4 DQL7 DDR_M0_MA13 3 6
<6,16> DDR_M0_CKE1 DDR_M0_ODT0_DRAM DDR_M0_MA6 R8 A5 DDR_M0_MA6 R8 A5 DDR_M0_BS1 4 5
<16> DDR_M0_ODT0_DRAM R2 A6 D7 R2 A6 D7
DDR_M0_ODT1_DRAM DDR_M0_MA7 DDR_M0_D39 DDR_M0_MA7 DDR_M0_D48
<16> DDR_M0_ODT1_DRAM DDR_M0_MA8 T8 A7 DQU0 C3 DDR_M0_D37 DDR_M0_MA8 T8 A7 DQU0 C3 DDR_M0_D52 36_0804_8P4R_5%
DDR_M0_MA9 R3 A8 DQU1 C8 DDR_M0_D34 DDR_M0_MA9 R3 A8 DQU1 C8 DDR_M0_D49 RPD4 MD@
DDR_M0_CS#0 DDR_M0_MA10 L7 A9 DQU2 C2 DDR_M0_D32 DDR_M0_MA10 L7 A9 DQU2 C2 DDR_M0_D53 DDR_M0_CAS# 1 8
<6,16> DDR_M0_CS#0 DDR_M0_CS#1 DDR_M0_MA11 R7 A10/AP DQU3 A7 DDR_M0_D33 DDR_M0_MA11 R7 A10/AP DQU3 A7 DDR_M0_D55 DDR_M0_MA10 2 7
<6,16> DDR_M0_CS#1 DDR_M0_MA12 N7 A11 DQU4 A2 DDR_M0_D36 DDR_M0_MA12 N7 A11 DQU4 A2 DDR_M0_D54 DDR_M0_WE# 3 6
DDR_M0_MA13 T3 A12 DQU5 B8 DDR_M0_D35 DDR_M0_MA13 T3 A12 DQU5 B8 DDR_M0_D50 DDR_M0_MA11 4 5
DDR_M0_RAS# DDR_M0_MA14 T7 A13 DQU6 A3 DDR_M0_D38 DDR_M0_MA14 T7 A13 DQU6 A3 DDR_M0_D51
<6,16> DDR_M0_RAS# DDR_M0_CAS# DDR_M0_MA15 M7 A14 DQU7 +1.35V_VDDQ DDR_M0_MA15 M7 A14 DQU7 +1.35V_VDDQ 36_0804_8P4R_5%
<6,16> DDR_M0_CAS# DDR_M0_WE# A15/BA3 A15/BA3 RPD5 MD@
<6,16> DDR_M0_WE# 1 8
DDR_M0_BS2
DDR_M0_BS0 M2 B2 DDR_M0_BS0 M2 B2 DDR_M0_MA3 2 7
DDR_M0_BS1 N8 BA0 VDD D9 DDR_M0_BS1 N8 BA0 VDD D9 DDR_M0_CS#0 3 6
DDR_M0_BS2 M3 BA1 VDD G7 DDR_M0_BS2 M3 BA1 VDD G7 DDR_M0_CS#1 4 5
2 BA2 VDD K2 BA2 VDD K2 2
VDD K8 VDD K8 36_0804_8P4R_5%
VDD N1 VDD N1 RPD6 MD@
DDR_M0_CLK0 J7 VDD N9 DDR_M0_CLK0 J7 VDD N9 DDR_M0_CKE1 1 8
DDR_M0_CLK#0 K7 CK VDD R1 DDR_M0_CLK#0 K7 CK VDD R1 DDR_M0_CKE0 2 7
DDR_M0_CKE0 K9 CK VDD R9 DDR_M0_CKE0 K9 CK VDD R9 DDR_M0_MA4 3 6
CKE/CKE0 VDD CKE/CKE0 VDD DDR_M0_MA15 4 5
DDR_M0_ODT0_DRAM K1 A1 DDR_M0_ODT0_DRAM K1 A1 36_0804_8P4R_5%

DDR_M0_CS#0 L2 ODT/ODT0 VDDQ A8 DDR_M0_CS#0 L2 ODT/ODT0 VDDQ A8 +1.35V_VDDQ
DDR_M0_RAS# J3 CS/CS0 VDDQ C1 DDR_M0_RAS# J3 CS/CS0 VDDQ C1 DDR_M0_RAS# RD1521 MD@ 2 36_0402_5%
DDR_M0_CAS# K3 RAS VDDQ C9 DDR_M0_CAS# K3 RAS VDDQ C9 DDR_M0_MA7 RD1531 MD@ 2 36_0402_5%
DDR_M0_WE# L3 CAS VDDQ D2 DDR_M0_WE# L3 CAS VDDQ D2 DDR_M0_ODT0_DRAM 1 MD@ 2
WE VDDQ E9 WE VDDQ E9 DDR_M0_ODT1_DRAM RD1541 MD@ 2 1K_0402_5%
VDDQ F1 VDDQ F1 RD155 1K_0402_5%
DDR_M0_DQS5 F3 VDDQ H2 DDR_M0_DQS7 F3 VDDQ H2
DDR_M0_DQS4 C7 DQSL VDDQ H9 DDR_M0_DQS6 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ
E7 A9 E7 A9
D3 DML VSS B3 D3 DML VSS B3 DDR_M0_CLK0 RD100 1 MD@ 2 30_0402_5%
DMU VSS E1 DMU VSS E1 DDR_M0_CLK#0 RD101 1 MD@ 2 30_0402_5%
VSS G8 VSS G8
VSS VSS 2
DDR_M0_DQS#5 G3 J2 DDR_M0_DQS#7 G3 J2 MD@
DDR_M0_DQS#4 B7 DQSL VSS J8 DDR_M0_DQS#6 B7 DQSL VSS J8 CD74
DQSU VSS M1 DQSU VSS M1
VSS VSS .1U_0402_16V7K
M9 M9 1
VSS P1 VSS P1
DDR_M0_DRAMRST# T2 VSS P9 DDR_M0_DRAMRST# T2 VSS P9
<6,16> DDR_M0_DRAMRST# RESET VSS T1 RESET VSS T1
RD1582 MD@ 1 240_0402_1%
L8 VSS T9 RD1562 MD@ 1 240_0402_1% L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS In APL DDR3L Memory Down WhitePaper (559207)
3 3
DDR_M0_ODT1_DRAM J1 B1 DDR_M0_ODT1_DRAM J1 B1
DDR_M0_CS#1 L1 NC/ODT1 VSSQ B9 DDR_M0_CS#1 L1 NC/ODT1 VSSQ B9
DDR_M0_CKE1 J9 NC/CS1 VSSQ D1 DDR_M0_CKE1 J9 NC/CS1 VSSQ D1
RD1592 MD@ L9 NC/CE1
1 240_0402_1% VSSQ D8 RD1572 MD@ 1 240_0402_1% L9 NC/CE1 VSSQ D8
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
VSSQ E8 VSSQ E8 DDR_M0_CLK0
VSSQ F9 VSSQ F9
VSSQ VSSQ 1
G1 G1 MD@
VSSQ G9 VSSQ G9 CD184
VSSQ VSSQ 1.5P_0402_50V8B
96-BALL 96-BALL DDR_M0_CLK#0 2
SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 Place @ DDR side
X76@ X76@
Cterm=1.6pF in APL DDR3L Memory Down WhitePaper (559207)

+0.675V_DDRM0_VREFDQ +0.675V_DDRM0_VREFCA
2 2 2 2
MD@ MD@ MD@ MD@
CD107 CD108 CD105 CD106
.1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K
1 1 1 1
CD186
CD196
CD189
CD192
CD193
CD187
CD195
CD188
CD194
CD191
CD190
4 4
1 1 1 1 1 1 1 1
1
close UD3 close UD4 close UD3 close UD4

MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
MD@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2
2 2 2 2 2 2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2014/05/19
Compal Secret Data
2015/12/31 Title
Place around UD3 & UD4 Place close to UD3 Place close to UD4 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR3L_Memorydown-2
Custom 1.A
A B C D E
A B C D E
<6> DDR_M1_DQS#[0..7]
+0.675V_DDRM1_VREFDQ Normal Type
10mils JDIMM2
1 2
<6> DDR_M1_D[0..63] D/DQ Signals link to CPU 3 VREF_DQ VSS1 4 DDR_M1_D11
2-3A to 1 DIMMs/channel
VSS2 DQ4
.1U_0402_16V7K
2.2U_0402_6.3V6M
DDR_M1_D9 5 6 DDR_M1_D10
<6> DDR_M1_DQS[0..7] DDR_M1_D8 7 DQ0 DQ5 8
2 DQ1 VSS3
CD48
9 10 DDR_M1_DQS#1 +1.35V_VDDQ
VSS4 DQS#0
CD47
11 12 DDR_M1_DQS1
<6> DDR_M1_MA[0..15] 13 DM0 DQS0 14
@
2
DDR_M1_BS0 @ 1 DDR_M1_D15 15 VSS5 VSS6 16 DDR_M1_D12
<6> DDR_M1_BS0 DQ2 DQ6
1
DDR_M1_BS1 CMD Signals from CPU DDR_M1_D13 17 18 DDR_M1_D14
<6> DDR_M1_BS1 DDR_M1_BS2 19 DQ3 DQ7 20 RD26
<6> DDR_M1_BS2 21 VSS7 VSS8 22
DDR_M1_WE# DDR_M1_D3 DDR_M1_D7 1K_0402_5%
1 <6> DDR_M1_WE# DDR_M1_CAS# DDR_M1_D2 23 DQ8 DQ12 24 DDR_M1_D1 1
<6> DDR_M1_CAS# DDR_M1_RAS# 25 DQ9 DQ13 26
2
<6> DDR_M1_RAS# DDR_M1_DQS#0 27 VSS9 VSS10 28
DDR_M1_DQS0 29 DQS#1 DM1 30 DDR_M1_DRAMRST#_R 1 2
DDR_M1_CLK0 31 DQS1 RESET# 32 DDR_M1_DRAMRST# <6> From CPU
RD27
<6> DDR_M1_CLK0 VSS11 VSS12
.1U_0402_16V7K
DDR_M1_CLK#0 Clock Signals from CPU DDR_M1_D6 33 34 DDR_M1_D4 0_0402_5%
<6> DDR_M1_CLK#0 DDR_M1_CLK1 DDR_M1_D0 35 DQ10 DQ14 36 DDR_M1_D5
<6> DDR_M1_CLK1 DQ11 DQ15 2
DDR_M1_CLK#1 37 38
EMC@
<6> DDR_M1_CLK#1 VSS13 VSS14
CD58
DDR_M1_D19 39 40 DDR_M1_D16
DDR_M1_D23 41 DQ16 DQ20 42 DDR_M1_D18
DDR_M1_CKE0 43 DQ17 DQ21 44 1
<6> DDR_M1_CKE0 DDR_M1_CKE1 CTL Signals from CPU DDR_M1_DQS#2 45 VSS15 VSS16 46
<6> DDR_M1_CKE1 DDR_M1_CS#0 DDR_M1_DQS2 47 DQS#2 DM2 48
<6> DDR_M1_CS#0 49 DQS2 VSS17 50
DDR_M1_CS#1 DDR_M1_D20
<6> DDR_M1_CS#1 DDR_M1_D17 51 VSS18 DQ22 52 DDR_M1_D22 ESD request 05/04
DDR_M1_D21 53 DQ18 DQ23 54
DDR_SMB_DA SMBUS Signals link to CPU 55 DQ19 VSS19 56 DDR_M1_D28
<7> DDR_SMB_DA DDR_SMB_CK DDR_M1_D31 57 VSS20 DQ28 58 DDR_M1_D26
<7> DDR_SMB_CK 59 DQ24 DQ29 60
DDR_M1_D25
61 DQ25 VSS21 62 DDR_M1_DQS#3 +0.675V_DDRM1_VREFDQ
DDR_M1_ODT0 63 VSS22 DQS#3 64 DDR_M1_DQS3 +1.35V_VDDQ
<6> DDR_M1_ODT0 DDR_M1_ODT1 From SOC ODT Signals to CH B 65 DM3 DQS3 66
<6> DDR_M1_ODT1 67 VSS23 VSS24 68
DDR_M1_D27 DDR_M1_D24 RD29 2 13.65K_0402_1%
DDR_M1_D30 69 DQ26 DQ30 70 DDR_M1_D29
71 DQ27 DQ31 72
VSS25 VSS26 RD30 2 13.65K_0402_1%
DDR_M1_CKE0 73 74 DDR_M1_CKE1
75 CKE0 CKE1 76
Layout Note: 77 VDD1 VDD2 78 DDR_M1_MA15
Place near to SO-DIMM connector.
DDR_M1_BS2 79 NC1 A15 80 DDR_M1_MA14
2 Place near JDIMM2 81 BA2 A14 82 2
DDR_M1_MA12 83 VDD3 VDD4 84 DDR_M1_MA11
DDR_M1_MA9 85 A12/BC# A11 86 DDR_M1_MA7
+1.35V_VDDQ 87 A9 A7 88 +1.35V_VDDQ +0.675V_DDRM1_VREFCA
DDR_M1_MA8 89 VDD5 VDD6 90 DDR_M1_MA6
DDR_M1_MA5 91 A8 A6 92 DDR_M1_MA4
+1.35V_VDDQ @EMC@ CD59 1 2 .1U_0402_16V7K 93 A5 A4 94 RD37 2 1 3.65K_0402_1%
@EMC@ CD60 1 2 .1U_0402_16V7K DDR_M1_MA3 95 VDD7 VDD8 96 DDR_M1_MA2
@EMC@ CD61 1 2 .1U_0402_16V7K DDR_M1_MA1 97 A3 A2 98 DDR_M1_MA0
A1 A0
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
@EMC@ CD62 1 2 .1U_0402_16V7K 99 100 RD36 2 1 3.65K_0402_1%

@1 @1 @1 @1 @EMC@ CD63 1 2 .1U_0402_16V7K DDR_M1_CLK0 101 VDD9 VDD10 102 DDR_M1_CLK1
1 1 CK0 CK1
@EMC@ CD68 1 2 .1U_0402_16V7K DDR_M1_CLK#0 103 104 DDR_M1_CLK#1
CK0# CK1#
CD32
CD33
CD34
CD35
CD36
CD37
@EMC@ CD69 1 2 .1U_0402_16V7K 105 106

@EMC@ CD75 1 2 .1U_0402_16V7K DDR_M1_MA10 107 VDD11 VDD12 108 DDR_M1_BS1
2 2 2 2 2 2 @EMC@ CD79 1 2 .1U_0402_16V7K DDR_M1_BS0 109 A10/AP BA1 110 DDR_M1_RAS#
111 BA0 RAS# 112
DDR_M1_WE# 113 VDD13 VDD14 114 DDR_M1_CS#0
DDR_M1_CAS# 115 WE# S0# 116 DDR_M1_ODT0
117 CAS# ODT0 118
DDR_M1_MA13 119 VDD15 VDD16 120 DDR_M1_ODT1
EMI request 11/03 A13 ODT1 +0.675V_DDRM1_VREFCA
DDR_M1_CS#1 121 122
123 S1# NC2 124
+1.35V_VDDQ VDD17 VDD18 10mils
125 126
127 NCTEST VREF_CA 128
DDR_M1_D33 129 VSS27 VSS28 130 DDR_M1_D36
DQ32 DQ36
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
DDR_M1_D39 131 132 DDR_M1_D34

133 DQ33 DQ37 134
VSS29 VSS30
330U_D3_2.5VY_R6M
1 DDR_M1_DQS#4 135 136

@1 @1 @ DDR_M1_DQS4 137 DQS#4 DM4 138
1 1 1 1 1 1 DQS4 VSS31
CD38
CD39
CD40
CD41
CD42
CD43
CD44
CD45
CD46
+ 139 140 DDR_M1_D37

DDR_M1_D32 141 VSS32 DQ38 142 DDR_M1_D38
DDR_M1_D35 143 DQ34 DQ39 144
3 2 2 2 2 2 2 2 2 2 145 DQ35 VSS33 146 DDR_M1_D41 3
DDR_M1_D43 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_M1_DQS#5 +3VS +3VALW
153 VSS36 DQS#5 154 DDR_M1_DQS5
155 DM5 DQS5 156
DDR_M1_D40 157 VSS37 VSS38 158 DDR_M1_D45
DQ42 DQ46
RD164
RD166
RD168
DDR_M1_D44 159 160 DDR_M1_D46
161 DQ43 DQ47 162
VSS39 VSS40
2
DDR_M1_D54 163 164 DDR_M1_D52
DDR_M1_D53 165 DQ48 DQ52 166 DDR_M1_D55
Layout Note: Layout Note: DQ49 DQ53
167 168 @ @
Place near JDIMM2.203,204 Place near JDIMM2.199 DDR_M1_DQS#6 169 VSS41 VSS42 170
DQS#6 DM6
10K_0402_5%
10K_0402_5%
10K_0402_5%
DVT2 modify DDR_M1_DQS6 171 172
1
173 DQS6 VSS43 174 DDR_M1_D49
DDR_M1_D51 177 DQ50 DQ55 178
+3VS +3VALW 179 DQ51 VSS45 180 DDR_M1_D59
VSS46 DQ60 DVT2 modify
+0.675VS_VTT DDR_M1_D57 181 182 DDR_M1_D63 DDR_M1_SA0
DDR_M1_D58 183 DQ56 DQ61 184
DQ57 VSS47
1
VDDSPD @ 185 186 DDR_M1_DQS#7 DDR_M1_SA1

VSS48 DQS#7
RD165
RD167
RD254 RD253 187 188 DDR_M1_DQS7
DM7 DQS7
.1U_0402_16V7K
.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
2.2U_0402_6.3V6M
0_0402_5% 0_0402_5% 189 190

VSS49 VSS50
2
2 2 1 1 2 DDR_M1_D56 191 192 DDR_M1_D61
DQ58 DQ62
1
CD50
CD51
CD54
DDR_M1_D62 193 194 DDR_M1_D60

2
+0.675VS_VTT DQ59 DQ63

CD52
CD53
CD55
195 196 @ @
@ DDR_M1_SA0 197 VSS51 VSS52 198 +0.675VS_VTT
2
@1 1 2 2 1 SA0 EVENT#
0_0402_5%
10K_0402_5%
@ VDDSPD 199 200 DDR_SMB_DA
1
DDR_M1_SA1 201 VDDSPD SDA 202 DDR_SMB_CK
+0.675VS_VTT 203 SA1 SCL 204 +0.675VS_VTT
VTT1 VTT2
PreMP modify
205 206 M1 Address : A4
4 G1 G2 4
FOX_AS0A621-H2S6-7H
CONN@
SP07000OF10
Non-Interleaved Memory
2014/05/19
Compal Secret Data
2015/12/31 Title
DDR3L_DIMMB
Custom 1.A
A B C D E
5 4 3 2 1
+3VALW R1 +3V_EMMC +1.8V_EMMC R2 +1.8VALW

0_0805_5% 0_0805_5%
1 2 1 2
EMMC@ 1 1 1 1 EMMC@
C71 EMMC@ C72 EMMC@ C73 EMMC@ C74 EMMC@

4.7U_0603_6.3V6K .1U_0402_16V7K 4.7U_0603_6.3V6K .1U_0402_16V7K
2 2 2 2
AA3
AA5
T10
W4
M6
N5
U9
K6
Y4
D U3 D
A4
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCC
VCC
VCC
VCC
U3 A6 NC
A9 NC
A11 NC W5 EMMC_CMD_R R3 1 EMMC@ 2 10_0402_5% EMMC_CMD
NC CMD EMMC_CMD <5>
B2
B13 NC @EMC@
D1 NC C76 1 2 .1U_0402_16V7K
EMMC32G-M525-A01 D14 NC
NC EMI request 11/11
KINGSTON32G@ H1 U5 EMMC_RST#
H2 NC RST_n
SA00009KE10 NC
H6 W6 EMMC_CLK_R R5 1 EMMC@ 2 10_0402_5% EMMC_CLK EMMC_CLK <5>
H7 NC CLK @EMC@
H8 NC C77 1 2 .1U_0402_16V7K +1.8V_EMMC
NC EMI request 11/18
H9
H10 NC
H11 NC H3 EMMC_D0_R R11 1 EMMC@ 2 10_0402_5% EMMC_D0 EMMC_D0 R4 1 @ 2 20K_0402_5%
NC DAT0 EMMC_D0 <5>
H12 H4 EMMC_D1_R R13 1 EMMC@ 2 10_0402_5% EMMC_D1 EMMC_D1 R6 1 @ 2 20K_0402_5%
NC DAT1 EMMC_D1 <5>
H13 H5 EMMC_D2_R R15 1 EMMC@ 2 10_0402_5% EMMC_D2 EMMC_D2 R7 1 @ 2 20K_0402_5%
NC DAT2 EMMC_D2 <5>
H14 J2 EMMC_D3_R R16 1 EMMC@ 2 10_0402_5% EMMC_D3 EMMC_D3 R8 1 @ 2 20K_0402_5%
NC DAT3 EMMC_D3 <5>
J1 J3 EMMC_D4_R R18 1 EMMC@ 2 10_0402_5% EMMC_D4 EMMC_D4 R9 1 @ 2 20K_0402_5%
NC DAT4 EMMC_D4 <5>
NC DAT5 EMMC_D5 <5>
NC DAT6 EMMC_D6 <5>
NC DAT7 EMMC_D7 <5>
J10
J11 NC EMMC_CMD R17 1 @ 2 20K_0402_5%
J12 NC EMMC@
J13 NC K2 EMMC_VDDI C75 2 1 1U_0402_6.3V6K EMMC_CLK R20 1 @ 2 20K_0402_5%
J14 NC VDDi
C K1 NC EMMC_RCLK R32 1 @ 2 20K_0402_5% C
K3 NC U1
K5 NC NC U2
K7 NC NC U3
K8 NC NC U6
K9 NC NC U7
K10 NC NC U10
K11 NC NC U12
K12 NC NC U13
NC NC change to buffer
K13 U14
K14 NC NC V1
L1 NC NC V2
L2 NC NC V3 +1.8V_EMMC
L3 NC NC V12
L4 NC NC V13
L12 NC NC V14
NC NC
1
L13 W1 EMMC@
L14 NC NC W2 R33 +3VALW
M1 NC NC W3 10K_0402_5%
M2 NC NC W7
M3 NC NC W8
2
NC NC
5
M5 W9 U2
EMMC_VSF1 M8 NC NC W10 1
@ T6
P
EMMC_VSF2 M9 NC NC W11 EMMC_RST# 4 NC
@ T5 NC NC Y
@ T3 EMMC_VSF3 M10 W12 2 SOC_PLTRST#
NC NC A SOC_PLTRST# <9>
G
M12 W13
M13 NC NC W14 NL17SZ07DFT2G_SC70-5
3
M14 NC NC Y1 SA00004BV00
N1 NC NC Y3
B N2 NC NC Y6 B
N3 NC NC Y7 EMMC@
EMMC_VSF4 N10 NC NC Y8
@ T4 NC NC
N12 Y9 D1
N13 NC NC Y10 RB751V-40_SOD323-2
N14 NC NC Y11 2 1
P1 NC NC Y12 @
P2 NC NC Y13
P3 NC NC Y14
EMMC_VSF5 P10 NC NC AA1
@ T9 NC NC
P12 AA2
P13 NC NC AA7
P14 NC NC AA8
For R1 NC NC AA9
NC NC
eMMC5.0 EMMCV5@
R2
R3 NC NC
AA10
AA11
2 1 EMMC_RCLK_R R5 NC NC AA12
<5> EMMC_RCLK NC NC
10_0402_5% R31 R12 AA13
R13 NC NC AA14
@EMC@ R14 NC NC AE1
.1U_0402_16V7K 2 1 C78 T1 NC NC AE14
T2 NC NC AG2
T3 NC NC AG13
T5 NC NC AH4
T12 NC NC AH6
EMI request 11/18 NC NC
T13 AH9
T14 NC NC AH11
NC NC
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
A A
KE4CN5B6A_FBGA169
K4
Y2
Y5
AA4
AA6
M7
P5
R10
U8
2014/11/10
Compal Secret Data
2016/11/10 Title
EMMC STORAGE
5 4 3 2 1
A B C D E
Place closed to JEDP1

+LCDVDD
+3VS
LCD POWER CIRCUIT SM010014520 3000ma

1 1
220ohm@100mhz CX6 CX7

1 +3VS +LCDVDD .1U_0402_16V7K .1U_0402_16V7K 1
UX1
DCR 0.04 2 2
5 1
W=60mils EMC@
EMC@ @
IN OUT +19VB LX1 +INVPWR_B+
1 2 1 W=60mils HCB2012KF-221T30_2P W=60mils
GND 1 2
CX1 4 3 CX3
1U_0402_6.3V6K EN OC 4.7U_0603_6.3V6K
2 2 1 1
SY6288C20AAC_SOT23-5 @EMC@ @EMC@
CX2 CX5
68P_0402_50V8J 1000P_0402_50V7K
2 2
<5> ENVDD
eDP
CX8 1 2 0.1U_0402_16V7K EDP_TXN0_C EC_BKOFF# RX1 1 @ 2 10K_0402_5%
<5> EDP_TXN0 1 2 <27> EC_BKOFF#
CX9 0.1U_0402_16V7K EDP_TXP0_C
<5> EDP_TXP0
@EMC@
CX12 1 2 220P_0402_50V7K
LCD/ LED PANEL Conn.
CX10 1 2 0.1U_0402_16V7K EDP_TXN1_C INVT_PWM_SOC RX2 1 @ 2100K_0402_5%
2 <5> EDP_TXN1 <5> INVT_PWM_SOC 2
CX11 1 2 0.1U_0402_16V7K EDP_TXP1_C
<5> EDP_TXP1
@EMC@
CX13 1 2 220P_0402_50V7K
+3VS
<5> EDP_AUXN CX14 1 2 0.1U_0402_16V7K EDP_AUXN_C RX3 2 @ 1 100K_0402_5%

<5> EDP_AUXP CX15 1 2 0.1U_0402_16V7K EDP_AUXP_C RX4 2 @ 1 100K_0402_5% W=60mils JEDP1
+INVPWR_B+ 1
2 1 41
3 2 G1 42
4 3 G2 43
5 4 G3 44
INVT_PWM_SOC 6 5 G4 45
EC_BKOFF# 7 6 G5 46
8 7 G6
<24> EDP_HPD_CONN 8
9
For Touch Panel +LCDVDD
10 9
10
11
12 11
+5VS +TS_PWR EDP_AUXN_C 13 12
EDP_AUXP_C 14 13
15 14
1 @ 2 EDP_TXP0_C 16 15
RX8 0_0603_5% EDP_TXN0_C 17 16
18 17
+3VS EDP_TXP1_C 19 18
EDP_TXN1_C 20 19
3 3
21 20
1 @ 2 22 21
RX7 0_0603_5% 23 22
24 23
25 24
26 25
27 26
+TS_PWR 27
28
TS_EN 29 28
<27> TS_EN 30 29
For Camera <7>
<7>
USB20_P5
USB20_N5
31 30
31
I2C3_SCL_PNL 32
<9> I2C3_SCL_PNL 33 32
Touch Screen I2C3_SDA_PNL
<9> I2C3_SDA_PNL 33
TS_RST# 34
<27> TS_RST# TS_INT# 35 34
<24> TS_INT# 35
36
1 @ 2 +3VS_Camcra 37 36
For Camera +3VS
RX12 0_0402_5% USB20_P6_CAMERA 38 37
USB20_N6_CAMERA 39 38
USB20_P6 1 @ 2 USB20_P6_CAMERA 40 39
<7> USB20_P6 40
RX11 0_0402_5%
USB20_N6 1 @ 2 USB20_N6_CAMERA STARC_107K40-000001-G2
<7> USB20_N6
RX10 0_0402_5% CONN@
SP01000XE00
EMI request 11/03
4 4

Issued Date 2014/03/19 Deciphered Date 2015/03/18 Title
eDP CONN.
A B C D E
A B C D E
HDMI_C_CLK- RY1 1 @ 2 0_0402_5% HDMI_R_CK-
+5VS
W=40mils +HDMI_5V_OUT
HDMI_C_CLK+ RY2 1 @ 2 0_0402_5% HDMI_R_CK+
UY1
3
OUT
1
1
IN CY378
2 .1U_0402_16V7K
1 GND 2 1
HDMI_C_TX0- RY3 1 @ 2 0_0402_5% HDMI_R_D0-
AP2330W-7_SC59-3
HDMI_C_TX0+ RY4 1 @ 2 0_0402_5% HDMI_R_D0+
CY1 2 1 .1U_0402_16V7K HDMI_C_TX2+

<5> HDMI_TX2+
CY2 2 1 .1U_0402_16V7K HDMI_C_TX2-
<5> HDMI_TX2-
CY3 2 1 .1U_0402_16V7K HDMI_C_TX1+
<5> HDMI_TX1+
CY4 2 1 .1U_0402_16V7K HDMI_C_TX1-
<5> HDMI_TX1-
CY5 2 1 .1U_0402_16V7K HDMI_C_TX0+
<5> HDMI_TX0+
CY6 2 1 .1U_0402_16V7K HDMI_C_TX0-
<5> HDMI_TX0-
CY7 2 1 .1U_0402_16V7K HDMI_C_CLK+
<5> HDMI_CLK+
CY8 2 1 .1U_0402_16V7K HDMI_C_CLK-
<5> HDMI_CLK-
2
PreMP modify +1.8VALW 2
SOC_DP0_CTRL_DATA 2.2K_0402_5% 2 @ 1 RY17

SOC_DP0_CTRL_CLK 2.2K_0402_5% 2 @ 1 RY18 +HDMI_5V_OUT
EMI 4/25 confirm OK
HDMI_SDATA 2.2K_0402_5% 2 1 RY19
HDMI_SCLK 2.2K_0402_5% 2 1 RY20 DVT2 modify
RPY1
470_0804_8P4R_5%
HDMI_C_TX2+ 4 5
HDMI_C_TX2- 3 6
+HDMI_5V_OUT HDMI_C_TX0+ 2 7
Level Shifter (Other BOM) HDMI_C_TX0- 1 8
2 @ 1
HDMI_GND
RY13 200K_0402_5%
HDMI_C_CLK- 4 5
HDMI_C_CLK+ 3 6
+1.8VALW HDMI_C_TX1- 2 7
@ HDMI_C_TX1+ 1 8
8
UY2
RPY2
EN
470_0804_8P4R_5%
3
2 7
VREF1 VREF2
SOC_DP0_CTRL_CLK 3 6 HDMI_SCLK
<5> SOC_DP0_CTRL_CLK SCL1 SCL2 5
3 +3VS 3
4 5 HDMI_SDATA
<5> SOC_DP0_CTRL_DATA SDA1 SDA2
SOC_DP0_CTRL_DATA
GND
Intel Sugesstion QY3B
4
L2N7002DW1T1G_SC88-6
G3401A91G ADFN3X2 8P
1
SA00006YA00 RY16 1 @ 2 20K_0402_5%

HDMI connector
JHDMI1
+1.8VALW HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
17
HDMI_SDATA 16 DDC/CEC_GND
SDA
5
HDMI_SCLK 15
14 SCL
G
Utility
2
4 3 13
CEC
S
QY1A HDMI_R_CK- 12
CK-
2
PJT138KA 2N SOT363-6 11
SB000016K00 HDMI_R_CK+ 10 CK_shield
G
1 6 HDMI_R_D0- 9 CK+
D0-
S
QY1B 8
PJT138KA 2N SOT363-6 DY1 HDMI_R_D0+ 7 D0_shield
SB000016K00 @EMC@ HDMI_R_D1- 6 D0+
YSLC05CH_SOT23-3 5 D1-
1
+1.8VALW HDMI_R_D1+ 4 D1_shield 20
HDMI_R_D2- 3 D1+ GND 21 ZZZ1
DVT2 modify D2- GND
2 22
D2_shield GND
1
Reserved for ESD HDMI_R_D2+ 1 23

@ RY14 D2+ GND
10K_0402_5% YUQIU_H050FD019M190BA
CONN@
HDMI_ROYALTY
DC232004800
2
4 ROYALTY HDMI W/LOGO+HDCP 4

<5> HDMI_HPD#
RO0000003HM
6
45@
2 HDMI_HPD
1
RY15 Security Classification Compal Secret Data Compal Electronics, Inc.

1
QY3A 100K_0402_5% Issued Date 2014/03/19 2015/03/18 Title

Deciphered Date
HDMI CONN.
2
Custom 1.A
A B C D E
A B C D E
+3VALW +3V_LAN
DVT2 modify
RL1 1 @ 2 0_0805_5%
Change to R-short at PVT if test ok.
60mil 60mil
UL1 @
5 1 ( Should be place within 200 mils ) 0.1uF close to Pin 3,8,22,30
IN OUT
PreMP modify 1uF reserved for Pin 22
2 Close to U20 Close to Pin 24 0.1uF close to Pin 11,32
1 GND 1
4 3 Pin23
EN OC RL13 1 @ 2 0_0805_5%
2 W=60mils
SY6288C20AAC_SOT23-5 +3V_LAN
CL1 W=60mils W=60mils +LAN_VDD +3V_LAN
1U_0402_6.3V6K LAN_PWR_EN LAN_PWR_EN <27> LL1
1 +REGOUT 1 2
2.2UH +-5% NLC252018T-2R2J-N
0.1U_0402_16V7K
4.7U_0603_6.3V6K
0.1U_0402_16V7K
CL6
1U_0402_6.3V6K
CL7
0.1U_0402_16V7K
CL8
0.1U_0402_16V7K
CL9
0.1U_0402_16V7K
CL10
0.1U_0402_16V7K
CL11
4.7U_0603_6.3V6K
CL12
4.7U_0603_6.3V6K
CL13
0.1U_0402_16V7K
CL14
0.1U_0402_16V7K
2 IDC=1200mA
CL21 8111H@
CL4 8111GUS@
CL5 8111GUS@
1 8111GUS@ 1 1 1 1 1 1
1
CL2 8111GUS@ CL3 8111GUS@
4.7U_0603_6.3V6K 0.1U_0402_16V7K
2
1 @ @ @
2
2 2 2 2 2 2 2
+3V_LAN Rising time request: 0.5~100mS
SA000028Y10
High active.
EN threshold voltage :1.2~2.0V
Current limit threshold :1.5~2.8A
Output turn-on rising time: 1.3~2.7ms
UL2
2 2
close to Pin 17,
LAN_MIDI0+ 1 17 18
PCIE_PRX_C_DTX_P2 .1U_0402_16V7K 2 1 CL15 +3V_LAN
2 MDIP0 HSOP 18 PCIE_PRX_DTX_P2 <8>
LAN_MIDI0- PCIE_PRX_C_DTX_N2 .1U_0402_16V7K 2 1 CL16 SJ10000E800
+LAN_VDD 3 MDIN0 HSON 19 PLT_RST_BUF# PCIE_PRX_DTX_N2 <8>
YL1
LAN_MIDI1+ 4 AVDD10 PERSTB 20 ISOLATEB PLT_RST_BUF# <9,12,23,27,28> 25MHZ_10PF_7V25000014
MDIP1 ISOLATEB
1
LAN_MIDI1- 5 21 LAN_PME# 1 @ 2
LAN_MIDI2+ 6 MDIN1 LANWAKEB 22 +LAN_VDD RL2 0_0402_5% EC_PME# <27> RL12 XTLI 1 3 XTLO
LAN_MIDI2- 7 MDIP2 DVDD10 23 +3V_LAN 10K_0402_5% 1 3
+LAN_VDD 8 MDIN2 VDDREG 24 +REGOUT GND GND
AVDD10 REGOUT 1 1
LAN_MIDI3+ 9 25 LAN_LED2 T7 @
2
LAN_MIDI3- 10 MDIP3 LED2 26 GPO LAN_PME# CL17 2 4 CL18
PU to +3VS at PCH +3V_LAN 11 MDIN3 LED1/GPIO 27 LAN_LED0 +3V_LAN
T8 @ 10P_0402_50V8J 10P_0402_50V8J
side 12 AVDD33 LED0 28 XTLO 2 2
<8> LAN_CLKREQ# 13 CLKREQB CKXTAL1 29 XTLI
<8> PCIE_PTX_C_DRX_P2 HSIP CKXTAL2
1
14 30 +LAN_VDD RL3
<8> PCIE_PTX_C_DRX_N2 HSIN AVDD10
15 31 LAN_RST 1 2 RL4
<8> CLK_PCIE_LAN 16 REFCLK_P RSET 32 +3V_LAN 2.49K_0402_1% 10K_0402_5%
<8> CLK_PCIE_LAN# REFCLK_N AVDD33 33 @
GND
2
GPO 1 @ 2
RL5 0_0402_5% LAN_GPO <27>
Consider VCC33 may be connected to Main
Power or chipset/bios's GPO, the pull-low
resistor RL7 can be NC only when Main
UL2 RTL8111GS-CG_QFN32_4X4 8111GUS@ Power
SA00006ML00 or chipset/bios's GPO can ensure to drive
the
Use 8111GS symbol , pop 8111GUS part LAN ISOLATEB pin to a voltage level < 0.8V at the
Connector system state S3~S5.
S IC RTL8111H-CG QFN 32P E-LAN CTRL +3VS
3 8111H@ JRJ45 3
SA000080P00 RJ45_MIDI0+ 1
PR1+
2
RJ45_MIDI0- 2
PR1- RL6
RJ45_MIDI1+ 3 1K_0402_5%
PR2+
RJ45_MIDI2+ 4
1
PR3+
TL1 RJ45_MIDI2- 5 ISOLATEB
PR3-
1
LAN_TERMAL 1 24 RJ45_MIDI1- 6
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+ PR2- RL7
LAN_MIDI0- 3 TD1+ MX1+ 22 RJ45_MIDI0- RJ45_MIDI3+ 7 9 15K_0402_5%
TD1- MX1- PR4+ GND 10
4 21 RJ45_MIDI3- 8 GND
2
LAN_MIDI1+ 5 TCT2 MCT2 20 RJ45_MIDI1+ PR4-
LAN_MIDI1- 6 TD2+ MX2+ 19 RJ45_MIDI1- SANTA_130452-W
TD2- MX2- CONN@
7 18 40mil
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ DC23400AX00
LAN_MIDI2- 9 TD3+ MX3+ 16 RJ45_MIDI2- RJ45_GND 1 2 LANGND
TD3- MX3- CL19
10 15 40mil 10P_0402_50V8J
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+
LAN_MIDI3- 12 TD4+ MX4+ 13 RJ45_MIDI3- LANGND
TD4- MX4-
1
@EMC@
JUMP_43X118
JPL1 JPL2
GST5009-E @EMC@
DL1 B88069X9231T203_4P5X3P2-2
1
SP050006B10 MESC5V02BD03_SOT23-3
2
8
7
6
5
4 EMC@ 4
Place close to TCT pin CL20 H : 4mm RPL1
0.1U_0402_16V7K 75_0804_8P4R_1%
1
2
1
2
3
4
RJ45_GND
LAN_RTL8111GUS-CG
A B C D E
A B C D E
1 1
For Wireless LAN

NGFF WL+BT (KEY E)
+3VS
60mil +3VS_WLAN
RM1
1 2 0_0805_5%
2 NBYOC@ 1 1
@
CM3 CM1 CM2 JNGFF1
470P_0402_50V7K 4.7U_0603_6.3V6K .1U_0402_16V7K 1 2
1 2 2 GND_1 3.3VAUX_2 +3VS_WLAN
3 4
EMC@ <7> USB20_P4 USB_D+ 3.3VAUX_4
5 6
<7> USB20_N4 USB_D- LED1# @ T3801
7 8
9 GND_7 PCM_CLK 10
+3VALW +3VS_WLAN 11 SDIO_CLK PCM_SYNC 12
@ 13 SDIO_CMD PCM_OUT 14
RM10 2 1 0_0805_5% 15 SDIO_DAT0 PCM_IN 16
SDIO_DAT1 LED2# @ T3802
17 18
19 SDIO_DAT2 GND_18 20
UM1 21 SDIO_DAT3 UART_WAKE 22
5 1 23 SDIO_WAKE UART_TX UART_RXD_NGFF <9>
IN OUT W=60mils SDIO_RST
2 24
GND UART_RX UART_TXD_NGFF <9,11>
1U_0402_6.3V6K
25 26 RM3 1 2 100K_0402_5%
GND_33 UART_RTS
CM5
CM4
4 3 27 28
EN OC <8> PCIE_PTX_C_DRX_P3 29 PET_RX_P0 UART_CTS 30
1 1 E51TXD_P80DATA_R 1 @ 2 0_0402_5% RM2
<8> PCIE_PTX_C_DRX_N3 31 PET_RX_N0 CLink_RST 32 E51RXD_P80CLK_R 1 2 0_0402_5% RM7 E51TXD_P80DATA <27>
SY6288C20AAC_SOT23-5 @
33 GND_39 CLink_DATA 34 E51RXD_P80CLK <27>
@ BYOC@ <8> PCIE_PRX_DTX_P3 PER_TX_P0 CLink_CLK
.1U_0402_16V7K
2 35 36 2
2 2 <8> PCIE_PRX_DTX_N3 PER_TX_N0 COEX3 @ T3803
37 38
GND_45 COEX2 @ T3804
39 40
WLAN_ON <27> <8> CLK_PCIE_WLAN REFCLK_P0 COEX1 @ T3805
41 42
<8> CLK_PCIE_WLAN# REFCLK_N0 SUSCLK(32KHz) @ T3806
43 44
45 GND_51 PERST0# 46 BT_ON PLT_RST_BUF# <9,12,22,27,28>
<8> WLAN_CLKREQ# CLKREQ0# W_DISABLE2# BT_ON <27>
47 48 WL_OFF#
<27> WLAN_PME# PEWAKE0# W_DISABLE1# WL_OFF# <27>
49 50 MINI1_SMBDATA RM8 1 @ 2 0_0402_5%
GND_57 I2C_DAT EC_SMB_DA2 <27>
51 52 MINI1_SMBCLK RM9 1 @ 2 0_0402_5%
RSVD/PCIE_RX_P1 I2C_CLK EC_SMB_CK2 <27>
53 54
55 RSVD/PCIE_RX_N1 I2C_IRQ 56
2 1 WLAN_PME# 57 GND_63 RSVD_64 58
+3VS_WLAN RSVD/PCIE_TX_P1 RSVD_66
RM6 4.7K_0402_5% 59 60
61 RSVD/PCIE_TX_N1 RSVD_68 62
63 GND_69 RSVD_70 64
RSVD_71 3.3VAUX_72 +3VS_WLAN
65 66
67 RSVD_73 3.3VAUX_74
GND_75 68
69 GND1
GND2
BELLW_80152-3221
CONN@
SP070013E00
P80CLK and BT_ON enable seperate.
3 3
4 4

NGFF WLAN
Custom 1.A
A B C D E
5 4 3 2 1
eDP Level Shifter (Other for BOM)

+1.8VALW +1.8VS
DVT2 modify
1
@ @
D
RC383 RC384 TP_INT Level Shifter D
10K_0402_5% 10K_0402_5%
2
+1.8VALW
<9> EDP_HPD#
1
D
QC13 2 EDP_HPD_CONN
EDP_HPD_CONN <20>
1
L2N7002LT1G_SOT23-3 G +3V_PTP
1
S RK1166
3
2.2K_0402_5%
5
RC364 UK2510
100K_0402_5% 1
P
2
TP_INT# 4 NC
<10> TP_INT#
2
Y 2
A TP_INT#_EC <27,28>
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
C C
TS Level Shifter (Other for BOM)
+TS_PWR
+1.8VALW
2
B B
RC635
1
10K_0402_5%
TSI@ RC634 TSI@
10K_0402_5% TSI@
1
5
UC2511
1
P
2
TS_INT_R# 4 NC
<10> TS_INT_R# Y 2 TS_INT#
A TS_INT# <20>
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
A
Security Classification Compal Secret Data Compal Electronics, Inc. A
Issued Date 2013./02/04 Deciphered Date 2015/03/18 Title
Level shift
Custom 1.A
5 4 3 2 1
A B C D E
SATAJHDD1
HDD Conn.
SATA_PTX_DRX_P0 CO1 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0
1
2 GND
SATA ODD
<8> SATA_PTX_DRX_P0
<8> SATA_PTX_DRX_N0
SATA_PTX_DRX_N0 CO2 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
4
A+
A- Conn.
SATA_PRX_DTX_N0 CO3 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND JODD1
1 <8> SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 B- 1
CO4
<8> SATA_PRX_DTX_P0 7 B+ 1
+3VS GND CO5 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2 GND
<8> SATA_PTX_DRX_P1 A+
CO6 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3
<8> SATA_PTX_DRX_N1 A-
8 4
9 V33 CO7 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND
10 V33 <8> SATA_PRX_DTX_N1 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6 B-
CO8
11 V33 <8> SATA_PRX_DTX_P1 7 B+
+5VS 12 GND GND
JO1 13 GND +5VS
1 2 +5VS_HDD 14 GND 8
15 V5 1 2 0_0805_5%
80mils +5VS_ODD 9 DP
RO2
JUMP_43X118 16 V5 10 +5V
V5 +5V
10U_0603_6.3V6M
.1U_0402_16V7K
@ 17 NBYOC@ 1 1 ODD_MD 11
GND MD
CO9
CO10
18 T188 @ 12 14
19 Reserved 23 13 GND GND 15
20 GND GND 24 GND GND
21 V12 GND 25 2 2
22 V12 GND 26 SANTA_201501-2
V12 GND CONN@
SANTA_194403-1 SP01001MV00
CONN@ +5VS
+5VS_ODD
LTCX0078W00 UO1
5 1
IN OUT
2
GND
1
+3VS +5VS_HDD BYOC@ 4 3 ODD_OC# @ T189
CO16 EN OC
2 1U_0402_6.3V6K SY6288C20AAC_SOT23-5 2
100mils 2 BYOC@
10U_0603_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
CO13
CO14
CO15
1 1 1 1 1 ODD_EN <27>
CO12
CO11
.1U_0402_16V7K @ @ @
2 @ 2 2 2 2
3 3
4 4

HDD/ODD
A B C D E
A B C D E
USB3.0 Port 1 6
DS21 EMC@
3 USB20_N1_L +USB3_VCCA
LS20 EMC@ I/O4 I/O2
MCM1012B900F06BP_4P +USB3_VCCA W=100mils
2 1 USB20_P1_L
<7> USB20_P1
5
VDD GND
2 USB3.0
.1U_0402_16V7K
CS26 EMC@
<7> USB20_N1
3 4 USB20_N1_L 1 1 Conn.
JUSB1
220U_C6_6.3V_M_R15
SF000006900
CS25
1
SM070003Z00 4 1 USB20_P1_L + USB20_N1_L 2 VBUS
I/O3 I/O1 USB20_P1_L 3 D-
1 2 D+ 1
EMI request 11/03 AZC099-04S.R7G_SOT23-6 4
2 U3RXDN1 5 GND
U3RXDP1 6 StdA-SSRX- 10
7 StdA-SSRX+ GND 11
DS22 EMC@ U3TXDN1 8 GND-DRAIN GND 12
U3TXDP1 9 StdA-SSTX- GND 13
2 1 PCH_USB3_TX1_N_C 1 2 1 1 StdA-SSTX+ GND
<8> PCH_USB3_TX1_N @ U3TXDN1 U3TXDP1 10 9 U3TXDP1
CS22 .1U_0402_16V7K RS25 0_0402_5% ACON_TARAC-9V1391
U3TXDN1 2 2 9 8 U3TXDN1 CONN@
<8> PCH_USB3_TX1_P 2 1 PCH_USB3_TX1_P_C 1 @ 2 U3TXDP1 DC23300AG00
CS21 .1U_0402_16V7K RS24 0_0402_5% U3RXDP1 4 4 7 7 U3RXDP1
U3RXDN1 5 5 6 6 U3RXDN1
PCH_USB3_RX1_N 1 @ 2 U3RXDN1 3 3 +5VALW

<8> PCH_USB3_RX1_N +USB3_VCCA
RS26 0_0402_5%
8 CS23
PCH_USB3_RX1_P 1 @ 2 U3RXDP1 .1U_0402_16V7K US21
<8> PCH_USB3_RX1_P
RS27 0_0402_5% L05ESDL5V0NA-4_SLP2510P8-10-9 1 2 5 1 W=60mils
IN OUT
2
GND
<27> USB_PWR_EN 4 3 RS23 1 @ 2 0_0402_5%
EN OC USB_OC1# <7>
For ESD request SY6288C20AAC_SOT23-5 1
CS24
2 2
.1U_0402_16V7K
2
@
RF request 11/03
USB2.0 Port 2
pin define need to update
USB/B (USB, AUDIO, CR)

LS23 EMC@
MCM1012B900F06BP_4P
USB20_N2 2 1 USB20_N2_L SP010011U00
<7> USB20_N2
JUSB3
<29> HPOUT_L_1 HPOUT_L_1 1
USB20_P2 3 4 USB20_P2_L HPOUT_R_1 2 1
<7> USB20_P2 +USB3_VCCA <29> HPOUT_R_1 2
3
<29> SLEEVE SLEEVE 3 3
SM070003Z00 RING2 4 3
<29> RING2 4
<29> HP_PLUG# HP_PLUG# 5
6 5
GNDA 6
EMI request 11/03 7
8 7
JUSB2 +3VS 8
.1U_0402_16V7K
CS27
9
1 5 10 9
1 VBUS G1 10
USB20_N2_L 2 6 USB20_N7 11
D- G2 <7> USB20_N7 11
USB20_P2_L 3 7 Card reader USB20_P7 12
D+ G3 <7> USB20_P7 12
4 8 13
2 GND G4 13
EMC@
USB20_P3 14
<7> USB20_P3 14
ACON_UARC9-4K1986 USB 2.0 port USB20_N3 15
<7> USB20_N3 15
DS23 EMC@ CONN@ 16
6 3 USB20_P2_L USB_PWR_EN 17 16
I/O4 I/O2 DC23300AH00 17
18
+USB3_VCCA 19 18
20 19
+5VALW 20
5 2 21
VDD GND 22 G1
G2
4 1 USB20_N2_L ACES_85201-2005N
I/O3 I/O1 CONN@
AZC099-04S.R7G_SOT23-6
4 4

USB Conn
A B C D E
A B C D E
+3VALW_EC
1
RB1091
0_0603_5%
@
2
For abnormal shutdown +3VLP +3VALW_EC LB31 +EC_VCCA
BLM15AG121SN1D_L0402_2P
DB25 1 @ 2 1 2 +EC_VCCA +VCC_LPC
RB751V-40_SOD323-2 +1.8VALW +1.8VALW_EC
1
.1U_0402_16V7K
CB502
.1U_0402_16V7K
CB503
1000P_0402_50V7K
CB504
1000P_0402_50V7K
CB505
SPOK 1 2 EC_RSMRST# RB236 1 1 2 2 .1U_0402_16V7K2 1 CB506
+VCC_LPC
0_0805_5% CB508
DB26 .1U_0402_16V7K 1 @ 2 .1U_0402_16V7K2 1 CB507
1 RB751V-40_SOD323-2 2 @ 1
1 2 SOC_PWROK 2 2 @1 @1 RB237
ECAGND <33> +3VALW_EC
@ 0_0805_5%
111
125
LID_SW# RB476 1 2 47K_0402_5%
22
33
96
67
9
UB28
+3VS
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
EC_MUTE# RB481 1 @ 2 10K_0402_5%
PMC_SUSPWRDNACK_R 1 21
+3VALW_EC EC_KBRST# 2 GATEA20/GPIO00 GPIO0F 23 EN_1.05VS <37>
<9> EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# <29> Reserve EC_CLR_CMOS for clear CMOS
<7,28> LPC_SERIRQ_R 4 SERIRQ GPIO12 27 FAN_PWM1 <30>
<7,28> LPC_FRAME#_R LPC_FRAME# ACOFF/GPIO13 TS_RST# <20> CLR_CMOS# <12>
RB484 1 @ 2 100K_0402_5% EC_PME# 5
<7,28> LPC_IO3_R 7 LPC_AD3
PWM Output CB510 2 1 100P_0402_50V8J ECAGND
<7,28> LPC_IO2_R LPC_AD2
RB496 1 @ 2 10K_0402_5% PM_SLP_S3# 8 63 BATT_TEMP
<7,28> LPC_IO1_R LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <33>
1
10 64 D
<7,28> LPC_IO0_R LPC_AD0LPC & MISC AD1/GPIO39 VCIN1_BATT_DROP <33>
65 ADP_I EC_CLR_CMOS 2 QB51
+3VALW_EC LPC_CLK0_R 12 ADP_I/AD2/GPIO3A 66 AD_BID0 ADP_I <33,34>
AD Input G L2N7002LT1G_SOT23-3
<7> LPC_CLK0_R CLK_PCI_EC AD3/GPIO3B
2
RPB12 13 75 S @
3
1 8 EC_SMB_CK1 <9,12,22,23,28> PLT_RST_BUF# 37 PCIRST#/GPIO05 AD4/GPIO42 76 EC_PME# WLAN_PME# <23>
RB483
2 7 EC_SMB_DA1 <30> EC_RST# 20 EC_RST# IMON/AD5/GPIO43 EC_PME# <22>
<10> EC_SCI# EC_SCII#/GPIO0E 10K_0402_5%
3 6 EC_SMB_CK2 38
<23> WLAN_ON GPIO1D @
4 5 EC_SMB_DA2
+3VS
1
68
DAC_BRIG/GPIO3C 70 LAN_PWR_EN <22>
2.2K_0804_8P4R_5% DA Output
+1.8VALW_EC KSI0 55 EN_DFAN1/GPIO3D 71
56 KSI0/GPIO30 IREF/GPIO3E 72 PM_SLP_S0# <9>
KSI1 EC I2C reserve
KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F
KSI3 58 KSI2/GPIO32 83 EC_I2C_TPCLK RB11731 @ 2 0_0402_5%
1 2 10K_0402_5% EC_SCI# KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 EC_I2C_TPDAT RB11741 2 0_0402_5% I2C4_SCL_TP <9,28>
RB492 @ @
2 1 2 10K_0402_5% EC_LID_OUT# KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 EC_MUTE# I2C4_SDA_TP <9,28> 2
RB494 @
RB493 1 @ 2 10K_0402_5% EC_KBRST# KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 EC_MUTE# <29>
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D USB_PWR_EN <26>
KSI7 62 87
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_CLK <28> 1 2 0_0402_5%
KSO0 H_PROCHOT#_EC RB1169
1 @EMC@2 LPC_CLK0_R KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <28>
1 KSO1/GPIO21
CB1015 RB149 33_0402_5% KSO2 41
10P_0402_50V8J KSI[0..7] KSO3 42 KSO2/GPIO22 97 RB482 1 @ 20_0402_5%
<28> KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 DDI1_ENBKL <5> <39,40> VR_HOT# H_PROCHOT# <9>
@EMC@ KSO4 43 98
2 KSO[0..17] KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 TP_PWR_EN <28>
<28> KSO[0..17] KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH ME_EN <10> PreMP modify
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <33> Latest design guide suggest change to
KSO7/GPIO27 SPI Device Interface 74LVC1G06.
KSO8 47
KSO9 48 KSO8/GPIO28 119
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120
ESD request 0926 KSO10/GPIO2A SPIDO/GPIO5C BT_ON <23>
KSO11 50 SPI Flash ROM 126
@EMC@ KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 PMC_SUSPWRDNACK_R 1 2
KSO12/GPIO2C SPICS#/GPIO5A EN_1.8VALW <38> PMC_SUSPWRDNACK <9>
CB511 1 2 0.01U_0402_16V7K PLT_RST_BUF# KSO13 52 RB489 0_0402_5%
KSO13/GPIO2D
2
KSO14 53
KSO15 54 KSO14/GPIO2E 73 EC_CLR_CMOS @
KSO16 81 KSO15/GPIO2F ENBKL/AD6/GPIO40 74 RB1054
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 +1.05VSP_PG <37> PVT modify
KSO17 82 89 100K_0402_5%
KSO17/GPIO49 FSTCHG/GPIO50 90 BATT_4S <34>
1
BATT_CHG_LED#/GPIO52 91 BATT_BLUE_LED# <28>
CAPS_LED#/GPIO53 ODD_EN <25>
ESD request 0926 77 GPIO 92
<33,34> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_LED#_R <28>
EMC@ 78 93
<33,34> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# <28>
CB1157 2 1 0.047U_0402_25V7K SOC_PWROK 79 SM Bus 95
<23> EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 SYSON <31,36>
<23> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 TP_INT#_EC <24,28> DVT2 modify
PM_SLP_S4#/GPIO59 EN_1.8VS# <31>
Charger and BATT
1 @ 2
6 100 EC_RSMRST# EC_LID_OUT# <10>
RB491 0_0402_5%
<9> PM_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 H_THERMTRIP#_R EC_RSMRST# <9,12> 1 2
To SOC <39> VCC_VCGI_ON PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 H_THERMTRIP# <9>
3 15 102 VCIN1_PROCHOT RB490 0_0402_5% 3
<31,35> SPOK 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 VCIN1_PROCHOT <33>
H_PROCHOT#_EC
<28> TP_EN GPIO0A H_PROCHOT#_EC/GPXIOA06
1 2 TS_RST# 17 104 MAINPWON For Thermal Portect Shutdown
<20> TS_EN GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <30,33,35>
RB636 18 GPO 105 DB23
<23> WL_OFF# 19 GPIO0C BKOFF#/GPXIOA08 106 EC_BKOFF# <20>
100K_0402_5% GPIO RB751V-40_SOD323-2
<9> AC_PRESENT 25 GPIO0D PBTN_OUT#/GPXIOA09 107 3V_EN_R LAN_GPO <22> MAINPWON 1 2 3V_EN
<31> EN_3V_SOC 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 3V_EN <35>
<30> FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 EC_SUSPWRDNACK <31>
RB497
<40> VR_ON 30 EC_PME#/GPIO15 1 2
For 1A Board ID 3V_EN_R RB4901 1 2
<23> E51TXD_P80DATA 31 EC_TX/GPIO16 110
PreMP modify ACIN ACIN <34> 1M_0402_5%
<23> E51RXD_P80CLK SOC_PWROK 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 1K_0402_5%
<9> SOC_PWROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON <35>
<28> PWR_SUSP_LED# 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 LID_SW# ON/OFFBTN# <28>
<39> VR_PWRGD NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# <28>
116
SUSP#/GPXIOD05 117 SUSP# <31,34,36>
RB506 RB506 EMC@
GPXIOD06 118 VNN_PWRGD <31,40> ACIN 2 1 100P_0402_50V8J
CB512
PECI_KB9012/GPXIOD07 +1.24VALW_PG <38>
AGND/AGND
122
<9> PBTN_OUT# 123 XCLKI/GPIO5D 124 1 2
@
GND/GND
GND/GND
GND/GND
GND/GND
<9> PM_SLP_S4# XCLKO/GPIO5E V18R +1.8VALW_EC

1 RB5119 0_0402_5%
GND0
+3VALW_EC
270K_0402_1% 33K_0402_1% @ CB509 1 @ 2
+3VALW_EC
PCB17A@ PCB15A@ .1U_0402_16V7K RB5120 0_0402_5%
SD00000G280 SD034330280 KB9022QD_LQFP128_14X14 2
11
24
35
94
113
69
Part Number = SA000075S30 20mil
2
ECAGND 1 2 @ @
LB32 RB696 RB697
Board ID BLM15AG121SN1D_L0402_2P 10K_0402_5% 10K_0402_5%
+3VALW_EC
Analog Board ID definition,
1
VCIN0_PH
Please see page 3. VCIN1_PROCHOT
2
4
15" 17" 4
Ra RB503 Phase Revision BID0 Phase Revision BID1 @EMC@

PreMP modify 100K_0402_1% EC_RSMRST# CB11561 2 22P_0402_50V8J
EVT 0.1 01 EVT - -
1
RB506 AD_BID0 For ESD request

DVT 0.2 02 DVT 0.2 11
1
PCB15@ 1
RB506 @ PVT 0.3 03 PVT 0.3 12
Rb 27K_0402_1% CB517 Security Classification Compal Secret Data Compal Electronics, Inc.
2
.1U_0402_16V7K PreMP 1.0 04 PreMP 1.0 13 Issued Date 2014/03/19 Deciphered Date 2015/03/18 Title
240K_0402_1%
EC ENE KB9022
2
PCB17@ PreMP 1.A 05 PreMP 1.A 14 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SD000001B80 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
A B C D E
A B C D E
+3VALW
+3V_PTP
UK1 W=20mils
5 1
IN OUT
2 1
GND
4 3 CK1
CK3
1 EN
SY6288C20AAC_SOT23-5
OC
2
4.7U_0603_6.3V6K Lid Switch
1U_0402_6.3V6K +3VLP
2 (Hall Effect Switch)
1 TP_PWR_EN <27> 1
UG1
+3V_PTP 3
<27> LID_SW# OUT 2
1 VDD
RK2 1 @ 2 0_0402_5% GND
+3VALW 1
APX8132AI_TSOT-23-3
TP module Conn. RK3 1 @ 2 0_0402_5%
+3VS @ CG8
1
C7
.1U_0402_16V7K
JTP1 2
10P_0402_50V8J
1 CK2 1 2 .1U_0402_16V7K 2
1 2 TP_CLK
2 3 TP_DATA
3 4
4 5 +3V_PTP
5 6 I2C4_SDA_TP <9,27>
6 I2C4_SCL_TP <9,27> SA00008K800, S IC APX8132AI-TRG SOT-23 3P HALL SENSOR
7 TP_INT#_EC
7 8 TP_EN TP_INT#_EC <24,27>
8 TP_EN <27>
9
GND 10
GND
2
RK5 RK6
ACES_51524-00801-001
CONN@
4.7K_0402_5% 4.7K_0402_5% LED
SP01001A910
1
+3V_PTP TP_CLK +5VALW
TP_DATA TP_CLK <27>
TP_DATA <27>
1 1 LED1
@EMC@ @EMC@ RG4
2 TP_INT#_EC 2 1 CK4 CK5 1.24K_0402_1% 2
RK4 10K_0402_5% 100P_0402_50V8J 100P_0402_50V8J BATT_AMB_LED# 1 2 3 A 4
2 2 <27> BATT_AMB_LED#
BATT_BLUE_LED# 1 2 1 B 2
<27> BATT_BLUE_LED#
RG6
910_0402_5%
LTST-C295TBKF-CA_AMBER-BLUE
LED2
RG11
1.24K_0402_1%
KB <27> PWR_SUSP_LED#
PWR_SUSP_LED#
PWR_LED#
1
1
2
2
3
1
A 4
Conn.
B
RG10
910_0402_5%
LTST-C295TBKF-CA_AMBER-BLUE
JKB1
RG8
30 0_0402_5%
29 GND2 1 @ 2 PWR_LED#
28 GND1
ON/OFFBTN# 27 28
27
1
KSO0 26 D QG2
KSO1 25 26 2 L2N7002LT1G_SOT23-3
25 <27> PWR_LED#_R
KSO2 24 G @
24
2
KSO3 23 @ S
3
KSO4 22 23 RG9
KSO5 21 22
21 100K_0402_5%
3 KSO6 20 3
KSO7 19 20
1
KSO8 18 19
18
avoid flash issue when
KSO9 17 abnormall shutdown
KSO10 16 17
KSI[0..7] KSO11 15 16
KSI[0..7] <27> 14 15
KSO12
KSO[0..17] KSO13 13 14
KSO[0..17] <27> KSO14 12 13 +3VALW +3VALW_TPM TPM Reserve Need to check UW1 TPM@
KSO15 11 12 1
11 +3VALW_TPM VSB +3VALW_TPM
KSO16 10 @ 29
KSO17 9 10 1 2 30 XOR_OUT/SDA/GPIO0 8
9 SCL/GPIO1 VDD1 +3VS_TPM
KSI0 8 3 14
8 GPX/GPIO2 VDD2
10U_0603_6.3V6M
.1U_0402_16V7K
KSI1 7 RW1 10K_0402_5%1 @ 2 RW3 TPM_BADD 6 22

7 GPIO3/BADD VDD3
1
CW1 TPM@
CW2 TPM@
KSI2 6 0_0603_5% 1 1
KSI3 5 6 RW6 RW7 LPC_IO0_R 24 2
4 5 <7,27> LPC_IO0_R 21 LAD0/MISO NC1 7
KSI4 10K_0402_5%@ @ 10K_0402_5% LPC_IO1_R
KSI5 3 4 <7,27> LPC_IO1_R LPC_IO2_R 18 LAD1/MOSI NC2 10
KSI6 2 3 +3VALW 2 2 <7,27> LPC_IO2_R LPC_IO3_R 15 LAD2/SPI_IRQ# NC3 11
2
KSI7 1 2
near 2 LPC_SERIRQ_R <7,27> LPC_IO3_R LAD3 NC4 25
1 LPC_CLK1_R 19 NC5 26
Pin5 <7> LPC_CLK1_R LCLK/SCLK NC6
@ LPC_CLKRUN#_R LPC_FRAME#_R 20 31
ACES_85201-2805 1 2 <7,27> LPC_FRAME#_R PLT_RST_BUF# 17 LFRAME#/SCS# NC7
CONN@ <9,12,22,23,27> PLT_RST_BUF# LPC_SERIRQ_R 27 LRESET#/SPI_RST#/SRESET# 9
+3VS RW5 +3VS_TPM <7,27> LPC_SERIRQ_R LPC_CLKRUN#_R 13 SERIRQ GND1 16
SP01000GO00 0_0603_5% BADD SELECTION
<7> LPC_CLKRUN#_R 28 CLKRUN#/GPIO4/SINT# GND2 23
LPCPD# GND3 32
near GND4
1 @ 2 4 33
RW2
Pin10,19,24 * 1 AEh(write), AFh(read) 5 PP PGND 12
ON/OFF BTN TEST Reserved
10U_0603_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
0_0603_5%
CW3 TPM@
CW4 TPM@
CW5 TPM@
CW6 TPM@
LPCPD# had internal PH NPCT650LA0YX_QFN32_5X5

4
Test only 1 1 1 1
4
@EMC@ @EMC@
SA00008EL40, S IC NPCT650AB1YX QFN 32P TPM
2 2 2 2 LPC_CLK1_R RW4 1 2 33_0402_5% CW7 1 2 22P_0402_50V8J
RK1
2 1
+3VLP
SWK1
EVQPLDA15_4P
1 3 100K_0402_5%
2 4 ON/OFFBTN# 2014/03/19 2015/03/18 Title
ON/OFFBTN# <27> Issued Date Deciphered Date
DBG@ KB/TP/LED/TPM / Hall sensor
6
5
A B C D E
A B C D E
HD Audio Codec +PVDD_HDA

SM01000EJ00 3000mA 220ohm@100mhz DCR 0.04 (output = 300 mA)
+5VS +VDDA
40mil 40mil JPA1 40mil Int. Speaker Conn.
+VDDA
LA1 2 1 1 2 40mil JSPK1
HCB2012KF-221T30_0805 1 1 1 SPKR+ EMC@1 LA2 2 PBY160808T-121Y-N_2P SPK_R+ 1
1
1
10U_0603_6.3V6M
CA1
.1U_0402_16V7K
CA2
.1U_0402_16V7K
CA3
.1U_0402_16V7K
CA4
JUMP_43X118 4.75V SPKR- EMC@1 LA3 2 PBY160808T-121Y-N_2P SPK_R- 2
@ SPKL+ EMC@1 LA4 2 PBY160808T-121Y-N_2P SPK_L+ 3 2
SPKL- EMC@1 LA5 2 PBY160808T-121Y-N_2P SPK_L- 4 3
2
2 2 @ +AVDD1_HDA 2 5 4
GND & GNDA moat G1
3
@EMC@ EMI request for solve EMI noise, SM01000OW00. 6
G2
GND GND
GND ACES_50278-00401-001
Place near Pin41 Place near Pin46 DA1 DA2 GND CONN@
MESC5V02BD03_SOT23-3 MESC5V02BD03_SOT23-3
1
@EMC@ @EMC@ SP02000RR00 1
20mil @
CA5 1 2 10U_0603_6.3V6M 1 2
GND +VDDA
1
10U_0603_6.3V6M
CA9
1 RA1 0_0603_5%
1
.1U_0402_16V7K
CA8
Pin9 need to matching with SOC HDA CA6 1 2 .1U_0402_16V7K
interface. GND GND
1 @ 2 Place near Pin9 +1.8VS_DVDDIO
+1.8VS
2
RA2 0_0402_5% 2 @
+3VS_DVDD GND & GNDA moat
Analog MIC(SMD)
20mil GNDA +MICBIAS2
1 @ 2 Place near Pin26
+3VS
RA5 0_0402_5%
1 1
2
.1U_0402_16V7K
CA11
CA10 +1.8VS_VDDA 1 @ 2 +1.8VS
1 RA6 0_0402_5% RA7
1
.1U_0402_16V7K
CA12
CA13
10U_0603_6.3V6M
10U_0603_6.3V6M 2.2K_0402_5%
2 2
15mil @ 15mil AMIC1
1
2 @ INT_MIC_R 1 2 INT_MIC_R_1 1
RA8 0_0603_5% +
Place near Pin1 GND GNDA
2
Place near Codec 1
CA14 -
41
46
26
40
1
9
UA1 Place near Pin40 @EMC@ GETTOP SOM4013SL-G423-RC-HS
220P_0402_50V7K @
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
2
CY000002V00
22
Omnidirectional
LINE1-L
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
LINE1-R(PORT-C-R) SPK-OUT-L- GNDA Follow EA52_BM(LA-B511P) footprint
UA1 INT_MIC_R 2 1 INT_MIC CA32 1 2 LINE2_L 42 SPKL+
RA9 1K_0402_5% 4.7U_0603_6.3V6K 24 SPK-OUT-L+
CA33 1 2 LINE2_R 23 LINE2-L(PORT-E-L) 45 SPKR+
4.7U_0603_6.3V6K LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR-
2 RING2 17 SPK-OUT-R- 2
40mil SLEEVE 18 MIC2-L(PORT-F-L) /RING2
ALC233-VB2-CG_MQFN48_6X6 MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT
Combo MIC HPOUT-L(PORT-I-L)
233@ +MICBIAS 31 33 HP_RIGHT
+MICBIAS LINE1-VREFO-L HPOUT-R(PORT-I-R)
SA00007BF10 +MICBIAS2 +MICBIAS2 30
LINE1-VREFO-R 10 HDA_SYNC_AUDIO
SYNC HDA_SYNC_AUDIO <10>
2 6 HDA_BITCLK_AUDIO
GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO <10>
3
GPIO1/DMIC-CLK 1 @EMC@2 1 2 CA15 @EMC@ GND
RA10 0_0402_5% 22P_0402_50V8J
<27> EC_MUTE# EC_MUTE# 47 5 HDA_SDOUT_AUDIO HDA_SDOUT_AUDIO <10>
HDA_RST_AUDIO# 11 PDB SDATA-OUT 8 HDA_SDIN0_AUDIO 1 RA33 2
<10> HDA_RST_AUDIO# RESETB SDATA-IN HDA_SDIN0 <10>
33_0402_5%
48
SPDIF-OUT/GPIO2 HDA_SDIN0_AUDIO <10>
Close codec MONO_IN 12
10mil PCBEEP 16 Intel HDA issue, Fix on QS sample
HP_PLUG# RA13 2 1 200K_0402_1% SENSE_A 13 MONO-OUT
<26> HP_PLUG# SENSE A +MIC2_VREFO
RA14 2 1 100K_0402_1% 14
+3VS SENSE B
1 29 10U_0603_6.3V6M 2 1 CA18 GND
37 MIC2-VREFO
CA19 35 CBP 7 10U_0603_6.3V6M 2 1 CA20
CBN LDO3-CAP GNDA
2.2U_0402_6.3V6M 39
2 LDO2-CAP 27 10U_0603_6.3V6M 2 1 CA21
LDO1-CAP GNDA
36
+3VS_DVDD CPVDD 1 RA15 2
28 CODEC_VREF 100K_0402_5% 10mil
RA16 1 @ 2 0_0402_5% 20 VREF
+3VALW CPVREF 1 1
Headphone Out
.1U_0402_16V7K
CA23
2.2U_0402_6.3V6M
CA24
Pin20 15
10U_0603_6.3V6M 2 1 CA22 19 JDREF 34 CPVEE
ALC283 : NC GNDA MIC-CAP CPVEE
ALC255/256/233 : Power for combo jack depop @ 2 2
1
4 +MIC2_VREFO
circuit at system shutdown mode DVSS
49 25 CA26
Thermal PAD AVSS1 38 2.2U_0402_6.3V6M
Pin4 AVSS2 2
3 ALC283 : DVSS 3
ALC255/256/233 : DC DET (For Japen customer only) Place near pin28
ALC255-CG_MQFN48_6X6
1
SA000082700 GND
GND 255@ RA19 RA20
GNDA 2.2K_0402_5% 2.2K_0402_5%
GNDA
2
RA21 CA27 SLEEVE
SLEEVE <26>
DOS mode 12K_0402_5% .1U_0402_16V7K Pin15 RING2 RING2 <26>
2 1 BEEP#_R 1 2 MONO_IN
<27> BEEP# ALC283 : Ref. Resistor for Jack Detect
ALC255/256/233 : Jack Detect for SPDIF-OUT and SPK-OUT port
2
RA22 1 10/20 vendor review change to 0.1uF.

OS mode 12K_0402_5% @
100P_0402_50V8J
CA28
4.7K_0402_5%
RA23
2 1 PreMP modify
<10> SOC_SPKR
2
1
HP_LEFT RA24 2 @ 1 0_0603_5% HPOUT_L_1

HPOUT_L_1 <26>
HP_RIGHT RA27 2 @ 1 0_0603_5% HPOUT_R_1 HPOUT_R_1 <26>
GND
LINE1-L 1 2
CA29 4.7U_0603_6.3V6K
GND & GNDA moat LINE1-R 1 2
JPA2 JPA3 CA30 4.7U_0603_6.3V6K
JUMP_43X39 JUMP_43X39 +MICBIAS DA5
1 2 1 2 2 2 RA29 1
@ 1 2 @ 1 2 4.7K_0402_5%
1
JPA4 JPA5
JUMP_43X39 JUMP_43X39 3 2 RA32 1
1 2 1 2 4.7K_0402_5%
@ 1 2 @ 1 2 BAT54A-7-F_SOT23-3
4 4
JPA6 JPA7
JUMP_43X39 JUMP_43X39
1 2 1 2
@ 1 2 @ 1 2
JPA8 JPA9
JUMP_43X39 JUMP_43X39
1 2 1 2
@ 1 2 @ 1 2
CA31 @ Security Classification Compal Secret Data Compal Electronics, Inc.

.1U_0402_16V7K 2015/10/02 2016/11/10 Title
1 2 1 @ 2
HD Audio Codec ALC255/ALC233 Colay
RA25 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
GND GNDA GND 0_0402_5% GNDA Custom 1.A
A B C D E
A B C D E
FAN1 Conn Screw Hole
+5VS
40mil
H3 H4 H5 H6 H9 H10 H11 FD1 FD2
1 RF1 1 @ 2 0_0603_5% +VCC_FAN1 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 1
1 1
@ @
1
@EMC@ CF2 CF1
1
1000P_0402_50V7K 4.7U_0603_6.3V6K FIDUCIAL_C40M80 FIDUCIAL_C40M80
2 2
FD3 FD4
@ @ @ @ @ @ @
H13 H14 H15 @ @
1
H_3P6 H_3P6 H_3P6
FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
+3VS
@ @ @
1
RF2
10K_0402_5%
40mil +VCC_FAN1 JFAN1

2
1
2 1 H23 H25 H12
<27> FAN_SPEED1 3 2 H_3P3X3P0N H_3P0N H_2P8X2P5N
<27> FAN_PWM1 4 3
1 4
CF3 5
1000P_0402_50V7K 6 G1 @ @ @
1
@EMC@ G2
2 CONN@
ACES_50278-00401-001 H24 H26
SP02000RR00 H_1P0N H_1P0N
2 2
@ @
1
+3VLP RG1 1 @ 2 0_0402_5%
Reset Circuit MAINPWON <27,33,35>
RG2 1 @ 2 0_0402_5%
EC_RST# <27>
2
RG3
10K_0402_5% DVT2 modify
3
1
BI_GATE# 5
BI_GATE PH to +RTCVCC at PWR side
6
1 QG1B
4
CG347
BI_GATE2 .1U_0402_16V7K
<33> BI_GATE 2
1
QG1A
3 3
Reset Button
BI SW
Reset Button 3 SWG1 1
SWG2
1 2 BI_GATE
BI_S <33>
4 2
SKPMAME010_2P
ATE-2-V-TR_4P
H : 3.8mm
Release : Battery Off

Push : Battery ON
4 4

FAN & Screw Hole & Reset Button
A B C D E
A B C D E
CQ5
VIH=1.2~5.5V .1U_0402_16V7K
3.3V@100k/0.1uF=3.538ms 1 2 Rise Time:
3.3V@120k/0.1uF=4.272ms 3.3V@330pF = 889.68us
UQ1 JPQ1 JP@
1 14 +3VS_OUT
5.0V@330pF = 1348us Q2509,Q2510,Q2511
DVT2 modify
+3VALW
2 VIN1
VIN1
VOUT1
VOUT1
13
CQ1 JUMP_43X118
+3VS
+3VS_OUT Power-off sequencing schematic Change to SB00000I200
1
SUSP# RQ1 1 @ 2 0_0402_5% 3VS_ON 3
ON1 CT1
12 2 1 470P_0402_50V7K CQ7 Vgs = 0.49V~1V
@ .1U_0402_16V7K
CQ2 2 1 4 11
1 +5VALW VBIAS GND 2 1
.1U_0402_16V7K EC_SUSPWRDNACK
1 2 0_0402_5% 5VS_ON 5 10 2 1 470P_0402_50V7K <27> EC_SUSPWRDNACK
RQ2 @
ON2 CT2 CQ3
@ 6 9 JPQ2 JP@ +5VS_OUT
+5VALW VIN2 VOUT2
1 2 7 8 +5VS_OUT 1
VIN2 VOUT2 +5VS
CQ4 CQ8
.1U_0402_16V7K 1 2 15 JUMP_43X118 .1U_0402_16V7K
GPAD
2 +1.8V_PG <38>
CQ6 TPS22966DPUR_SON14_2X3
1
.1U_0402_16V7K D Q21
+1.24VALW_OFF 2 L2N7002LT1G_SOT23-3
G @
S
3
PreMP modify
+3VALW VNN_PWRGD <27,40>
@
1
UQ2 D Q22
1 2 5 1 +1.8VALW_OFF 2 L2N7002LT1G_SOT23-3
IN OUT +3V_SOC
CQ9 .1U_0402_16V7K G @
DVT2 modify 2 S
3
GND 1 2
EN_3V_SOC RQ3 1 @ 2 1_0402_5% +3V_SOC_ON 4 3 CQ11 .1U_0402_16V7K
<27> EN_3V_SOC EN OC SPOK
@ SY6288C20AAC_SOT23-5
1
1 2 D Q23
CQ10 +3V_SOC_OFF 2 L2N7002LT1G_SOT23-3
.1U_0402_16V7K G @
need to check JPQ3 JP@ S
3
SPOK 2 @ 1 +3V_SOC_ON
<27,35> SPOK +3VALW +3V_SOC
RQ4 47K_0402_5%
JUMP_43X79
2 2
+1.8VALW TO +1.8VS +5VALW +0.675VS_VTT
+5VALW +1.35V_VDDQ
1
+1.8VALW +1.8VS
2
R26
2
@ R25 @ @ 470_0603_5%
2
RQ5 1 20_0603_5% 100K_0402_5% R27 R28
100K_0402_5% 470_0603_5%
2
@ @
1
S
3 1 SUSP +0.675VS_VTT_R
1
SYSON# +1.35V_R
QQ1
1
6
DMG2301U-7_SOT23-3 Q4A @ Q4B @ Q5B Q5A
G
2
R29 L2N7002DW1T1G_SC88-6 L2N7002DW1T1G_SC88-6 L2N7002DW1T1G_SC88-6 L2N7002DW1T1G_SC88-6

RQ6 470_0603_5%
EN_1.8VS# 1 2 SUSP# 2 5 SUSP SYSON 5 2 SYSON#
<27> EN_1.8VS# <27,34,36> SUSP# <27,36> SYSON
1K_0402_5% 1
2
1
CQ12 R30 @ @
1
1
1U_0402_6.3V6K D 10K_0402_5%
2 EN_1.8VS# 2 @
3 G 3
2
S QQ2
3
L2N7002LT1G_SOT23-3
PVT modify
4 4

DC INTERFACE
Custom 1.A
A B C D E
5 4 3 2 1
@ PJP101
+19V_ADPIN 5A_Z120_25M_0805_2P
+19V_VIN
ACES_50305-00441-001_4P
D +19V_ADPIN 1 2 D
1
2 EMI@ PL101
3
4
GND
1
GND
1
EMI@ PC101
100P_0603_50V8 EMI@ PC102
2
1000P_0603_50V7K
2
@ PR111
0_0402_5%
1 2
+3VLP +CHGRTC
C C
- PBJ1 @ + PR112
560_0603_5%
PR113
560_0603_5%
2 1 1 2 1 2
+RTCBATT
ML1220T13RE
B B
A A

PWR DCIN / Pre-charge
5 4 3 2 1
5 4 3 2 1
+3VLP
PR202 100_0402_1%
1 2
EC_SMB_DA1 33
PR203 100_0402_1%
1 2
EC_SMB_CK1 33
1
@ PC202
0.1U_0603_25V7K
1
PR206
D @ PJP201 6.49K_0402_1% @ PR204 @ PR205 D
1 1 2 10K_0402_1% 10K_0402_1%
1 2 +3VLP
2
2 3
1
EC_SMB_DA1-1 PR207 @ PU201
3 4 EC_SMB_CK1-1 1K_0402_1% @ PR201 1 8
4 5 BATT_TS 1 2 100K_0402_1% VCC TMSNS1
5 6 BATT_B/I
BATT_TEMP 2 7 2 1
6 7 GND RHYST1
2
7 8 MAINPWON 3 6 @ PR208
8 9 34 MAINPWON OT1 TMSNS2
1
+RTCVCC 47K_0402_1%
GND 10 4 5
GND OT2 RHYST2 @ PH201
CVILU_CI9908M2HR0-NH G718TM1U_SOT23-8 100K_0402_1%_NCP15WF104F03RC
2
PR209
100K_0402_5% Close to fan
1
D
+17.4V_BATT+ BI_GATE
2 PQ201
G BSS138LT1G_SOT23-3
EMI@ PL202 S
3
5A_Z120_25M_0805_2P
1 2
BI_S
1
1 2
+17.4V_BATT @ PR217
EMI@ PL201 0_0402_5%
EMI@ 5A_Z120_25M_0805_2P
1
EMI@
2015/09/30 update
2
PC201 PC203
C 1000P_0603_50V7K 0.01U_0603_50V7K C
When PR210=16.9K
2
VCIN1_PROCHOT
For KB9022 Active Recovery PR211
For KB9022
OTP Active Recovery sense 20mΩ
84.5W,0.61V 84.5W,0.61V
19.1KΩ
65W SD034191280
VCIN0_PH(V) 92'C, 1V 56'C, 2V
58.5W,0.61V 58.5W,0.61V
10KΩ
PH202(ohm) 7.3092K 26.11K 45W SD034100280
130% 130%
VCIN1_PROCHOT=PW/19*20*0.02*PR214/(PR211+PR214)
+EC_VCCA
ADP_I 33
1
65W@ PR211
1
PR210 19.1K_0402_1%
B 16.9K_0402_1% PR211 B
10K_0402_1%
45W@
2
VCIN0_PH
+19VB_5V
VCIN1_PROCHOT
1
PH202
1
@ PR212 100K_0402_1%_NCP15WF104F03RC
80.6K_0402_1%
Close to CPU
COMMON PART
2
@ PR213
2
0_0402_5% @
1 2 T1
VCIN1_BATT_DROP @
T2
1
2
@ PC204
1
1
PR214
0.1U_0402_25V6 @ PR215 @ PR216 10K_0402_1%
1
0_0402_5%
2
10K_0402_1%
2
2
ECAGND
A A

PWR-BATTERY CONN/OTP
5 4 3 2 1
A B C D
Protection for reverse input
Vgs = 20V
1
PQ301 D
2
Vds = 60V +19VB
G Id = 250mA
S 2N7002KW _SOT323-3
3
PR302 RBFET AON7506 SB000010A00
PR301
1 2 1 2
Rds(on):13~15.8mohm
1M_0402_5% 3M_0402_5% Vgs=20V
1
Vds=30V 2014/01/21 update PL301 change BATFET AON7506 SB000010A00 1
Need check the SOA for inrush ID= 10.5A (Ta=70C) Common part SH00000YG00 Rds(on):13~15.8mohm
+19V_VIN PQ303 Vgs=20V
+19V_P1 AON7506_DFN33-8-5 +19V_P2 PQ304 Vds=30V
1 1 PR303 EMI@ PL301 +19VB_CHG AON7506_DFN33-8-5 ID= 10.5A (Ta=70C)
2 2 0.02_1206_1% 1UH +-30% 2.8A 1
5 3 3 5 1 4 1 2 2
Isat: 4A 5 3
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
2 3
2200P_0402_50V7K
0.1U_0402_25V6
DCR: 27mohm
0.1U_0402_25V6
4
@EMI@PC306
1
1
PC303
PC304
EMI@ PC305
PQ302 0_0402_5%
0.01U_0402_50V7K
PC301
@ PR304
4
1
1
MDU1512RH_POW ERDFN56-8-5 +19V_VIN
PC302
PC307
2
2
2
VF = 0.5V
2
2
3
2
PD301
BQ24725A_ACDRV_1 BAS40CW _SOT323-3
0.1U_0402_25V6
BQ24725A_BATDRV 1 2BQ24725A_BATDRV_1
0.1U_0402_25V6
ACFET MDU1512 SB00000SY00
1
1
PC308
PR305
PC310
Rds(on):4.2~5mohm
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
Vgs=20V 0.047U_0402_25V7K
PR306
2
Vds=30V PC309 1 2
0.1U_0402_25V6 PD302
ID= 24.2A (Ta=70C)
5
2.2_0603_5%
RB751V-40_SOD323-2
AON7506_DFN33-8-5
PR307
Choke 4.7uH SH00000YC00 (Common Part)
BQ24725A_VCC2
VF = 0.37V (Size:6.6 x 7.3 x 3 mm)
@ PR308
BQ24725A_ACP
0_0603_5% (DCR:28m~33m) Support max charge 3.5A
BQ24725A_REGN
BQ24725A_BST2
2
DH_CHG 1 2 4
Power loss: 0.245W
BQ24725A_LX
PQ305
4.12K_0603_1%
4.12K_0603_1%
2 2
CSR rating: 1W
1
PC312 +17.4V_BATT
PR309
PR310
DH_CHG
1 2 PL302 VSRP-VSRN spec < 81.28mV
4.7UH_5.5A_20%_7X7X3_M PR311
3
2
1
1U_0603_25V6K 1 2 0.01_1206_1%
BQ24725A_ACN
BQ24725A_LX 1 2 CHG1 4
2
PC313
5
1U_0603_25V6K 2 3
20
19
18
17
16
AON7506_DFN33-8-5
PU301
CSON1
CSOP1
1
4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
@EMI@
PR312
21
PAD
0.1U_0402_25V6
0.1U_0402_25V6
PC314
PC315
1
1
1 15 DL_CHG 4
ACN LODRV
PQ306
PC316
PC317
2
2
2 14
680P_0402_50V7K
ACP GND PR313
3
2
1
2
1
@EMI@
BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
PC318
BQ24725A_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR314
2
6.8_0603_1%
BQ24725A_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN PC319
0.1U_0603_16V7K
1 2 5 11 BQ24725A_BATDRV
+3VLP ACOK BATDRV
PR315 100K_0402_1%
ACDET
+3VLP
IOUT
SDA
SCL
ILIM
H/L Side AON7506 SB000010A00
1 2
ACIN PR324
Rds(on):13~15.8mohm
6
10
316K_0402_1% +3VALW Vgs=20V
3
Vds=30V 3
BQ24725A_ACDET
BQ24725A_ILIM 1 2 ID= 10.5A (Ta=70C)

BQ24725A_IOUT
@ PR316
100K_0402_1%
316K_0402_1%
0.01U_0402_25V7K
1
For 4S per cell 4.35V battery
PC320
PR317
1
PR318
422K_0402_1%
1 2
2
BQ24725A_ACDET
+19V_VIN
2
1
4S_BATT@ PR321
2M_0402_1%
2200P_0402_50V7K
2
66.5K_0402_1%
EC_SMB_CK1 32
100P_0402_50V8J
1
1
PC321
1
PC322
PR319
@ PR322
0_0402_5% 32
2
EC_SMB_DA1
2
PR320
2
1 2
0_0402_5%
4S_BATT@ 1 2
ADP_I 32
PQ307
4S_BATT@ PR323 LTC015EUBFS8TL_UMT3F
1
100K_0402_1%
1 2 2 PC323
BATT_4S
100P_0402_50V8J
2
4
Close EC chip 4
4S_BATT@ Vin Dectector

3
1
PQ308 D
2 Min. Typ Max.
SUSP# 35
G
L-->H 17.16V 17.63V 18.12V
2N7002KW _SOT323-3 S H-->L 16.76V 17.22V 17.70V
3

VILIM = 20*ILIM*Rsr Issued Date 2013/10/01 Deciphered Date 2014/05/24 Title
ILIM = 3.3*100/(100+316)/20/0.01
= 3.966 A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Common Circuit 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D
5 4 3 2 1
PR402
499K_0402_1%
ENLDO_3V5V 1 2
+19VB
D D
1
150K_0402_1%
PR404
2
+19VB EMI@ PL401 @ PR401
5A_Z120_25M_0805_2P PU401 0_0603_5% PC403
SY8286BRAC_QFN20_3X3 0.1U_0402_25V6
1 2 +19VB_3V BST_3V1 2 1 2
Choke 1.5uH SH000016800 (Common Part)
(Size:4.9 x 5.2 x 3 mm)
2200P_0402_50V7K
1
@ PJ403 (DCR:20m~25m)
@EMI@ PC401
EMI@ PC404
1 2
10U_0805_25V6K
0.1U_0402_25V6
IN
IN
IN
IN
BS
1 2
1
PL402
PC405
JUMP_43X79 LX_3V 6 20 1.5UH_PCMB053T-1R5MS_6A_20%
LX LX
2
7 19 LX_3V 1 2
GND LX +3VALWP
@EMI@ PR405
8 18
GND GND
4.7_1206_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
9 17
PG LDO +3VLP
PC407
PC408
PC409
@ PC410
1
10 16
2
NC NC PC411
OUT
EN2
EN1
21
NC
FF
4.7U_0603_6.3V6M
2
GND
13V_SN 2
PR412
11
12
13
14
15
100K_0402_5% 3.3V LDO 150mA~300mA
680P_0603_50V7K
@EMI@ PC412
1 2
C +3VALWP C
ENLDO_3V5V
Vout is 3.234V~3.366V
Ipeak=4.78A
2
SPOK
Imax=3.35A
Check pull up resistor of
@ PJ401
SPOK at HW side PC402 PR403 1 2
+3VALWP 1 2 +3VALW
1000P_0402_25V8J 1K_0402_5%
3V_EN 3V_FB 1 2 1 2 JUMP_43X118
+19VB EMI@ PL403 @ PR407 @ PJ402

5A_Z120_25M_0805_2P +19VB_5V 0_0603_5% PC416 +5VALWP 1 2 +5VALW
0.1U_0402_25V6 1 2
1 2 +19VB_5V BST_5V 1 2 1 2 JUMP_43X118
PU402 SY8286CRAC_QFN20_3X3
2200P_0402_50V7K
0.1U_0402_25V6
(Size:4.9 x 5.2 x 3 mm)

4.7U_0603_25V6K
4.7U_0603_25V6K
@ PJ404 (DCR:20m~25m)
1
1
PC414
PC415
EMI@ PC417
@EMI@ PC418
1 2
1 2
IN
IN
IN
IN
BS
JUMP_43X79 PL404
2
LX_5V 6 20 1.5UH_PCMB053T-1R5MS_6A_20%
LX LX
7 19 LX_5V 1 2 +5VALWP
B GND LX B
8 18
GND GND
1
PR408
PC419
680P_0603_50V7K 4.7_1206_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
@EMI@
SPOK 1 2 9 17 1 2
PG VCC
PC420
PC421
PC422
@ PC423
PC428
PC427
@ PR413 10 16
2
NC NC 4.7U_0603_6.3V6M
15V_SN
0_0402_5%
OUT
LDO
EN2
EN1
2
21
FF
GND
11
12
13
14
15
PC425
VL
@EMI@
2
Vout is 4.998V~5.202V
ENLDO_3V5V
PR409 5V LDO 150mA~300mA

2.2K_0402_5%
Ipeak=7A
1
5V_EN
PC424
1 2
4.7U_0603_6.3V6M
EC_ON @ PR410 Imax=4.9A

0_0402_5%
2
1 2
32 MAINPWON
5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
PC413 PR406
1
PR411
PC426
1000P_0402_25V8J 1K_0402_5%
5V_FB 1 2 1 2
2
2
A EC VDD0 is +3VL, PC426 UNPOP A

EC VDD0 is +3VALW, PC426 POP

3VALW/5VALW
Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1A_LA-D641P
5 4 3 2 1
5 4 3 2 1
D D
Pin19 need pull separate from +1.35VP.

EMI@ PL501 +19VB_1.35VP If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
5A_Z120_25M_0805_2P you can change from +1.35VP to +1.35VS. TDC 0.7A
1 2 +19VB_1.35VP PR501 Peak Current 1A
+19VB 2.2_0603_5%
BST_1.35VP_R 1 2 BST_1.35VP
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1 +1.35VP
1
@ PJ503
@EMI@ PC501
EMI@ PC502
PC503
PC504
1 2
1 2 UG_1.35VP +0.675VSP
2
2
JUMP_43X79
LX_1.35VP
10U_0603_6.3V6M
10U_0603_6.3V6M
1
PC505
1
PC506
PC507
0.1U_0603_25V7K
16
17
18
19
20
2
PU501
2
C C
VLDOIN
PHASE
UGATE
BOOT
VTT
21
4 PAD
LG_1.35VP 15 1
(Size:7.3 x 6.6 x 3 mm) LGATE VTTGND
(DCR:14m~15m) IOCP
PQ501 14 2
1
2
3
+1.35VP PL502 AON7408L_DFN8-5 PR502 PGND VTTSNS
Vout=1.365V 1.5UH_PCMC063T-1R5MN_9A_20% 13K_0402_1%
1 2LX_1.35VP 1 2 CS_1.35VP 13 3
PC508 CS RT8207PGQW _W QFN20_3X3 GND
1
1U_0402_10V6K
5 1 2 12 4 VTTREF_1.35VP
@EMI@ PR503 PR504 VDDP VTTREF
4.7_1206_5% 5.1_0603_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1 2 VDD_1.35VP 11 5
1 2
+5VALW VDD VDDQ +1.35VP
1
PGOOD
PC509
PC510
PC511
@ PC512
@ PC513
PC514
@ PC515
PC520
PC521
PC522
TON
2
1
@EMI@ PC517 PC516 0.033U_0402_16V7K
FB
S5
S3
2
680P_0402_50V7K
2
1U_0402_10V6K
10
6
PQ502
1
2
3
SI7716ADN-T1-GE3_POW ERPAK8-5
FB_1.35VP
TON_1.35VP
PR506
EN_0.675VSP
5.1_0603_5% Frequency PR505
EN_1.35VP
1 2 8.2K_0402_1%
+5VALW PR507 1 2 +1.35VP
470K_0402_1%
+19VB_1.35VP 1 2
B B
1
H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm @ PR509 PR508
Vout=0.75*(1+Rup/Rdown)
Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A 0_0402_5% 10K_0402_1% =0.75*(1+(8.06/10))
1 2
SYSON =1.354 [x1.002]
2
L/S SI7716 Rds(on) :typ:13.5mOhm, max:16.5mOhm Vout=0.75*(1+Rup/Rdown)
1
Idsm(TA=25)=16A, Idsm(TA=70)=9.5A @ PC518
0.1U_0402_10V7K =0.75*(1+(8.2/10))
=1.365 [x1.01]
2
Choke: 7x7x3
Rdc=14mohm(Typ), 15mohm(Max)
Switching Frequency: 530kHz
Ipeak=6.4A, Imax=4.48A PR510 @ PJ501
Iocp~7.7A 1_0402_1% JUMP_43X118
1 2 +1.35VP 1 2 +1.35V_VDDQ
OVP: 110%~120% 33 SUSP# 1 2
VFB=0.75V, Vout=1.365V
1
@ PC519 @ PJ502
JUMP_43X39
0.1U_0402_10V7K 1 2
+0.675VSP +0.675VS_VTT
2
1 2
A A
Security Classification Compal Secret Data

Title
Issued Date 2014/07/31 Deciphered Date 2015/12/31
RT8207K
Custom 1.A
5 4 3 2 1
A B C D
1 1
@ PJ602
1 2
+1.05VP 1 2 +1.05VS
JUMP_43X79
+3VS @ PR601
0_0402_5%
EN_1.05VP 1 2
EN_1.05VS
0.1U_0402_16V7K
1
PC601
PR602
1
100K_0402_5% PR603
1M_0402_5%
@
2
2 2
+1.05VSP_PG PU601
2
Choke 1uH SH00000YG00 (Common Part)
9
1 PGND 8 (Size:3.8 x 3.8 x 1.9 mm)
FB SGND (DCR:20m~25m)
@ PJ601 2 7 PL601
PG EN 1UH_2.8A_30%_4X4X2_F
+3VALW Vout=1.0608V
1 2 3 6 LX_1.05VP 1 2
1 2 IN LX +1.05VP
1
4 5
68P_0402_50V8J
JUMP_43X79 PGND NC
1
@EMI@ PR604
4.7_0603_5%
1
PC603
22U_0603_6.3V6M
2
Ipeak=3A
1
PR605
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
SY8003ADFC_DFN8_2X2 Rup Imax=2.1A
PC602
@ PC604
PC605
PC607
7.68K_0402_1%
2
2
2
FB_1.05VP
FB=0.6V SNUB_1.05VP
1
1
680P_0402_50V7K
@EMI@ PC606
PR606
10K_0402_1%
Rdown
2
Note:
3 When design Vin=5V, please stuff snubber 3
to prevent Vin damage

Vout=0.6V* (1+Rup/Rdown)
4 4

SY8003A
Custom 1.A
A B C D
5 4 3 2 1
D D
@ PJP702
JUMP_43X79
1 2
+1.8VALWP 1 2 +1.8VALW

PC701
22U_0603_6.3V6M (Size:3.8 x 3.8 x 1.9 mm)
(DCR:20m~25m)
1 2 PU701
SY8032ABC_SOT23-6
@ PJP701 PL701
JUMP_43X79 1UH_2.8A_30%_4X4X2_F Vout=1.8V
1 2 VIN_1.8VALW 4 3 LX_1.8VALW 1 2
+3VALW 1 2 IN LX +1.8VALWP
5 2
37 +1.8V_PG PG GND
68P_0402_50V8J
1
PR701 100K_0402_5% 6 1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
1 2 FB EN @EMI@ PR702
PC702
+3VALW Ipeak=0.8A
1
PR703
@ PC703
PC704
PC713
@ PR704 4.7_0603_5% Imax=0.56A
2
0_0402_5% 20K_0402_1%
2
1 2 EN_1.8VALW_R
EN_1.8VALW
2
Rup
SNUB_1.8VALW
1
1
PR705 @ PC705 FB_1.8VALW
1M_0402_1% 0.1U_0402_16V7K
FB=0.6V
1
C C
2
PR706
1
@EMI@ PC706
10K_0402_1%
Rdown
680P_0402_50V7K
2
Note:
When design Vin=5V, please stuff snubber
@ PJP704
1 2
+1.24VALWP 1 2 +1.24VALW
JUMP_43X79
(Size:3.8 x 3.8 x 1.9 mm)
PC707 (DCR:20m~25m)
22U_0603_6.3V6M
B B
PU702
1 2 SY8032ABC_SOT23-6
PL702
@ PJP703JUMP_43X79 Vout=1.242V
+3VALW 1 2 4 3 LX_1.24V 1 2
1 2 PR707 100K_0402_5% IN LX +1.24VALWP
+3VALW 1 2 5 2
68P_0402_50V8J
PG GND 1UH_2.8A_30%_4X4X2_F
22U_0603_6.3V6M
1
6 1
PC708
37 +1.24VALW_PG
22U_0603_6.3V6M
22U_0603_6.3V6M
FB EN
1
@ PC709
PC710
PC714
Ipeak=1.3A
2
@ PR710 @EMI@ PR708 PR709 Imax=0.91A
2
0_0402_5% 4.7_0603_5% 10.7K_0402_1%
1 2 EN_1.24V
37 +1.8V_PG
2
Rup
2
0.1U_0402_16V7K
1
SNUB_1.24V
PC711
1
PR711 FB_1.24V
1M_0402_1%
FB=0.6V
2
1
@
2
@EMI@ PC712
680P_0402_50V7K PR712
2
10K_0402_1%
Rdown
2
Note:
When design Vin=5V, please stuff snubber
A A

Title
Issued Date 2011/06/13 Deciphered Date 2012/06/13
SY8032
C 1.A
5 4 3 2 1
5 4 3 2 1
PR802 and PR804 pull high resistor are pop at the end of VR SVID.
0.68uH Choke 7x7x4 7x7x3 Note Other VR is unpop.
Size and DCR 0.67m +-5% 0.9m +-5%
SVID_ALERT# pull high resistor is at HW side.
PH802 10K(3370K) 1K(3650K)
confirm with power sequence,
PR831 10K 1K +1.05VS it need behind +5VS.
D D
ISEN
PR830 243 549
[49] VR_HOT#
+19VB_VCC_VCGI
PR828 604 665
169_0402_1%
0.1U_0402_25V6
@ PR804
84.5_0402_1%
PR833 40.2K 37.4K COMP Height 8 mm
0.47U_0402_6.3V6K
1
@ PR802
@ PC802
PR813 68.1K 73.2K VREF_VCCGI VR_HOT# 90 degreeC 100u_SF000000I80
1
PC801
IMON
33U_25V_NC_6.3X4.5
ALERT# 87.3 degreeC 1
2
PR841 0 1.11K Height 6 mm
@ PC855
+
576_0402_1% 49.9K_0402_1%
68u_SF000000W00
2
1
PR806
PR805
100_0402_1%
Close to PQ801
1
1 2 2
Height 4.5 mm
3.9_0402_1%
SOC_SVID_CLK [11]
PR809
PH801 @ PR807 33u_SF000007200
2
100K_0402_1%_B25/50 4250K 0_0402_5%
1 2 1 2
SOC_SVID_ALERT#_R [11]
2
1
PR808
PR810
57.6K_0402_1%
1
20_0402_1%
1 2
PR813
PR812 SOC_SVID_DAT [11]
1
+19VB_VCC_VCGI
10K_0402_1%
41.2K_0402_1%
2
TSEN_VCCGI_R1 2
PR811
EMI@ PL801
5A_Z120_25M_0805_2P
8.06K_0402_1%
2
1
1 2
PR814
Vboot=0V +19VB
1
0_0402_5%
@ PR841
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
1
@EMI@ PC854
@EMI@ PC807
EMI@ PC808
@ PC809
1
PC803
PC804
PC805
@ PC806
ALERT#_VCCGI
0.1U_0402_25V6
VREF_VCCGI
TSEN_VCCGI
VREF_VCCGI
VCLK_VCCGI
IMON_VCCGI
SDIO_VCCGI
2
2
1
200_0402_1%
562_0402_1% 26.1K_0402_1%
38.3K_0402_1%
2
+19VB_VCC_VCGI
PR840
27K_0402_1%
1
1 @ PR815 EN: high > 0.7V, Low < 0.3V

PR816
PR817
PR818
0_0402_5%
VCCGI_VR_EN 1 2
VCC_VCGI_ON [49]
5
SET1 connect to 5V is into test mode. PR819
16
18
17
2
1 2
2
1_0603_5% PR820 PQ801
The output is 1.05V. 2.2_0603_5% AON6428L_DFN8-5
VRHOT#
VCLK
VDIO
ALERT#
TSEN
IMON
VREF
EN
BST_VCCGI 1 2
PR821
PC810
C C
0.22U_0402_25V6K
0.22U_0402_16V7K
2
1 2 13 UG_VCCGI 4
1
VIN
PC811
Choke 0.15uH SH00001EE00 (Common Part)
2
PSYS_VCCGI 19 PU801
PSYS (Size:6.8 x 7.3 x 3.8 mm)
2
SET1_VCCGI RT3601EAGQW_WQFN28_4X4 (DCR:0.67m +-5%)
3
2
1
SET2_VCCGI +VCC_VCGI
SET3_VCCGI PL802
8.25K_0402_1%
PR826
28 0.15UH_NA__36A_20%
19.1K_0402_1%
1
SET1 1 4
2K_0402_1%
LX_VCCGI
27
PR824
PR825
SET2 14 AISP1_R 2 3
Local sense, for debug only. PWM
Close output cap that near choke. 26
1
SET3
@EMI@ PR827
4.7_1206_5%
2
1 2
1
11 LG_VCCGI PR828
5
LGATE
140_0402_1%
750_0603_1%
10
PR837
@ PR829 LX_VCCGI PQ802 PC812

100_0402_1% PHASE AON6794_DFN5X6-8-5 0.47U_0402_25V6K
2
1 2 VSEN_VCCGI 25 9 UG_VCCGI 1 2
+VCC_VCGI
1 SNUB_VCCGI 2
VSEN UGATE PR830 PR831
2
8 BST_VCCGI LG_VCCGI 4 300_0402_1% 10K_0402_1%

BOOT 1 2AVcore1_NTC 1 2
AVcore1
@ PR842 @ PR844
AISP1
0_0402_5% 0_0201_5%
3
2
1
[49] VCC_VCGI_SENSE_P 1 2 1 2AVcore1_NTC_R
1 2
680P_0603_50V7K
COMP_VCCGI 23
COMP
@EMI@ PC816
PC814 PC815
1
470P_0402_50V7K 100P_0402_50V8J FB_VCCGI 24 PH802

@ PC813 1 2 1 2 FB 10K_0402_1%_B25/50 3370K
2
0.1U_0402_25V6 29
2
GND
PR832 PR833 RGND_VCCGI 22 VCC_VCGI (LL=6m) Close to PL802
RGND
10K_0402_1%
1 2
45.3K_0402_1%
1 2
FSW = 600kHz
VR_READY
DCR = 0.67 mohm +/- 5%
ISEN1N
ISEN1P
DRVEN
TYP MAX
1
PVCC
VCC
@ PC817 H/S_AON6428 Rds(on) = 11.3 mohm , 14.5 mohm

0.1U_0402_25V6
L/S_AON6794 Rds(on) = 2.8 mohm , 3.5 mohm
2
@ PR843
7
+VCC_VCCGI1
12
15
21
20
B 0_0402_5% B
[49] VCC_VCGI_SENSE_N 1 2
[49] VR_PWRGD +5VALW
1U_0402_10V6K
1
PC819
AISP1
100_0402_1%
@ PC818
1
PR834
0.1U_0402_25V6
2
PR835 AVcore1
100K_0402_5%
0.1U_0402_25V6
2
1
22_0402_1%
@
1
1
PR836
PC821
2
PC820
2.2U_0603_10V6K
2
2
2
Local sense, for debug only.

Close output cap that near choke. +3VS
+5VALW
+VCC_VCGI
2pcs close choke, others close CPU. +VCC_VCGI +VCC_VCGI

close CPU solder ball pin.
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC822
PC823
PC824
PC825
PC826
PC827
PC828
PC829
PC830
PC831
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
+
PC832
PC833
PC834
PC835
PC836
PC837
PC838
PC839
PC840
PC841
PC842
PC843
2
@ @ PC856
330U_D1_2VY_R9M
2
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC844
PC845
PC846
PC847
PC848
PC849
PC850
PC851
PC852
PC853
POS CAP (D2)

A Height 1.9 mm A
2
@ @ @ 330u_SGA00009S00

RT3601EA VCCGI
Custom 1.A
5 4 3 2 1
5 4 3 2 1
PR902 and PR904 pull high resistor are pop at the end of VR SVID.
+1.8VALW Other VR is unpop.
SVID_ALERT# pull high resistor is at HW side.
1
PR901 +1.05VS
1K_0402_5%
2
D D
[49] VR_HOT#
0.1U_0402_25V6
0.47U_0402_6.3V6K
1
PC902
169_0402_1%
VREF_VNN
PR904
PR902
2
PC901
84.5_0402_1%
1
VR_HOT# 90 degreeC
150K_0402_1%
2
1
ALERT# 87.3 degreeC
PR905
PR906
100_0402_1%
2
VCLK_VNN 1 2
SOC_SVID_CLK [11]
2
Close to PQ901
1
@ PR908
3.9_0402_1%
PR909
PH901 0_0402_5%
1
1 2
1K_0402_5%
100K_0402_1%_B25/50 4250K ALERT#_VNN SOC_SVID_ALERT#_R [11]
PR907
1 2 PR910
2
20_0402_1%
1 2
0_0402_5% 30K_0402_1%
SDIO_VNN SOC_SVID_DAT [11]
1
PR911
PR914
41.2K_0402_1%
TSEN_VNN_R1 2
10K_0402_1%
1
7.15K_0402_1%
1 2
1
PR913
Vboot=1.05V
PR912
VREF_VNN
@ PR941
2
1
140K_0402_1%
@ PC903
2
1
ALERT#_VNN
0.1U_0402_25V6
TSEN_VNN
VREF_VNN
PR917
301_0402_1%
VCLK_VNN
IMON_VNN
SDIO_VNN
2
PR940
PR915 EN: high > 0.7V, Low < 0.3V
+19VB_VNN 1_0402_1%
SET1 connect to 5V is into test mode. VNN__VR_EN 1 2 VR_ON [49]
2 +19VB_VNN
The output is 1.05V.
1
EMI@ PL901
1
1
PR919 5A_Z120_25M_0805_2P
287K_0402_1%
191K_0402_1%
1.54K_0402_1%
16
18
17
2
1_0603_5%
PR921
PR923
PR922
1 2
VRHOT#
VCLK
VDIO
ALERT#
TSEN
IMON
VREF
EN
PC908 +19VB
2
C C
0.22U_0402_25V6K
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2
1 2 13
@EMI@ PC906
EMI@ PC907
PU901
1
VIN
PC904
PC905
@ PJ901
PSYS_VNN 19 RT3601EAGQW_WQFN28_4X4 JUMP_43X79
SET1_VNN PSYS 1 2
2
SET2_VNN 1 2
SET3_VNN
11.8K_0402_1%
11.3K_0402_1%
1
28
210_0402_1% 15.8K_0402_1%
SET1
PR926
PR927
PR928
Local sense, for debug only.

Close output cap that near choke. 27
SET2 14 PR920
PWM Choke 0.47uH SH00001ED00 (Commom Part)
26 2.2_0603_5%
(Size:5.7 x 5.4 x 3.0 mm)
2
SET3 BST_VNN 1 2
11 LG_VNN (DCR:6.2m +-5%)
1
LGATE +VNN
0_0402_5%
0_0402_5%
@ PR931 UG_VNN
10
@ PR938
PR937
@ PR939
100_0402_1% LX_VNN PL902
4
1 2 PHASE 0.47UH_NA__12.2A_20%
+VNN VSEN_VNN 25 9 UG_VNN PC909 1 4
G1
D1
D1
D1
VSEN UGATE 0.22U_0402_16V7K
2
2
8 BST_VNN AISP2_R 2 3
@ PR942 BOOT LX_VNN 9 10
1
D2/S1 D1
@EMI@ PR924
221_0603_1%
0_0402_5%
4.7_1206_5%
1
[49] VNN_SENSE 1 2 PQ901
PR925
AON7934_DFN3X3A8-10
G2
S2
S2
S2
1
@ PC912 PC913 COMP_VNN 23
1 SNUB_VNN 2
PC914 330P_0402_50V7K 68P_0402_50V8J COMP LG_VNN PC910
2
0.1U_0402_25V6 1 2 1 2 FB_VNN 24 0.47U_0402_25V6K
2
FB 1 2
PR932 PR933 29 PR929 PR930
10K_0402_1% 100K_0402_1% GND 255_0402_1% 1K_0402_1%
1 2 1 2 22 1 2AVcore2_NTC 1 2
680P_0603_50V7K
RGND
@EMI@ PC911
AVcore2
AISP2
VR_READY
1
ISEN1N
ISEN1P
@ PR944
DRVEN
+VNN (LL=0m)
2
PVCC
@ PC915 1 2AVcore2_NTC_R
1 2
VCC
0.1U_0402_25V6 FSW = 600kHz

2
@ PR943 0_0201_5%
0_0402_5% DCR = 6.2 mohm +-5% PH902
7
12
15
21
20
1 2 RGND_VNN 1K_0402_5%_TSM0B102J3652RE
B
DaulMOS AON7934 TYP MAX B
H/S Rds(on) = 12.4 mohm , 15.8 mohm

+VCC_VNN
[49] VNN_PWRGD +5VALW Close to PL902

1
AISP2
100_0402_1%
L/S Rds(on) = 9.1 mohm , 11.6 mohm

1
PR934
1U_0402_10V6K
1
PC917
@ PC916 AVcore2
0.1U_0402_25V6
2
@ PR935
0.1U_0402_25V6
2
100K_0402_5%
1
22_0402_1%
2
1
PR936
Confirm HW the pull high resister. PC919

PC918
The GND trace need close to Local sense, for debug only. 2.2U_0603_10V6K
2
2
CPU pin AE47 or AE48. Close output cap that near choke. +3VALW
2
Differential with VNN_SENSE.
+5VALW
+VNN 2pcs close choke, others close CPU.

+VNN close CPU solder ball pin.
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1
1
PC920
PC921
PC922
PC923
PC924
PC925
PC926
PC927
PC928
PC929
PC930
PC931
PC932
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC933
PC934
PC935
PC936
PC937
PC938
PC939
PC940
PC941
PC942
2
2
A A

RT3601EA VNN
Custom 1.A
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Change the PQ305 from MDV1528 to AON7506.
1 Design update Solution Change 01 34 Change the PQ306 from MDV1527 to AON7506. 12/01 EVT
D D
2 Design update Power Sequence Modify 02 40 Change the PR935.2 from connect +1.8VALW to +3VALW. 12/11 DVT
3 Design update Solution Change 02 34 Change the PL302 from 10uF to 4.7uF. 12/15 DVT
4 Design update Solution Change 02 39 Change the PC803, PC804, PC805, PC806 from 4.7uF_0603 *4 to 10uF_0805 *3. 12/15 DVT
Change the PR704.2 net name from VNN_PWRGD to EN_1.8VALW.
5 Design update Power Sequence Modify 02 38 Add the PR707.2 page symbol +1.24VALW_PG. 12/28 DVT
Change the PC814 from 270pF to 470pF. Change the PR833 from 40.2k Ohm to 45.3k Ohm.
6 Design update CPU transient test result 02 39 Change the PR828 from 604 Ohm to 750 Ohm. Change the PR830 from 243 Ohm to 300 Ohm. 12/31 DVT
Change the PR813 from 68.1k Ohm to 57.6k Ohm. Change the PC856 to un-pop.
Design update Solution Change 02 39 Delete the jump PJ801. 12/31 DVT
7
8 Design update Change the P/N to comment part 02 39 Change the PL802 P/N from SH00001D900 to SH00001EE00. 01/05 DVT
Change the PR401 from 0 Ohm to R-short.
9 Design update Solution Change 02 35 Change the PR407 from 0 Ohm to R-short. 01/28 DVT
C C
10 Design update Cancel Co-lay 03 34,39 Delete the jump PJ301 and capacitance PC857. 04/25 DVT-2
36,37
11 Design update Solution Change 03 38,39 Change the PR509, PR601, PR704, PR710, PR815 from 1 Ohm to R-short. 04/25 DVT-2
12 Design update Solution Change 03 39,40 Change the PR842, PR843, PR807, PR942, PR943, PR908 from 0 Ohm to R-short. 04/28 DVT-2
13 Design update Solution Change 03 40 Change the PC930, PC931 from 0402 1uF to 0603 22uF. 04/28 DVT-2
14 Design update Solution Change 03 40 Change the PC924, PC929, PC931, PC933, PC939 from un-pop to pop for PVT test. 04/28 DVT-2
Change the PC913 from 39pF to 68pF. Change the PR933 from 100k Ohm to 60.4k Ohm.
15 Design update CPU transient test result 03 40 Change the PR925 from 191 Ohm to 221 Ohm. Change the PR929 from 232 Ohm to 255 Ohm. 05/04 DVT-2
Change the PR914 from 21.5k Ohm to 35.7k Ohm. Change the PL902 from 0.68uH to 0.47uH.
16 Design update Solution Change 1.0 40 Change the PR942 from R-short to 0 Ohm . 05/17 Pre MP
B B
17 Design update ME red ink result 1.0 36 Add PC520、PC521、PC522 to on-pup, and change PC512、PC513、PC515 to un-pop. 06/20 Pre MP
Change the PR914 from 35.7k Ohm to 30k Ohm.
18 Design update CPU transient test result 1.0 40 Change the PR933 from 60.4k Ohm to 100k Ohm. 07/07 Pre MP
19 Design update Solution Change 1.0 39,40 Change the PR841, PR938, PR939, PR941, PR942 from 0 Ohm to R-short. 07/07 Pre MP
A A

PIR (PWR)
Custom 1.A
5 4 3 2 1
5 4 3 2 1
COMPAL CONFIDENTIAL AC DC
MODEL NAME: B5W1A Power Sequence Block Diagram 2 1 ON_OFFBTN#
Power
D
PCB NAME: LA-D641P Button D
REVISION:
DATE: 2015/10/27
AC DC
+19VB 1 2
EC_ON
+5VALW 8 EC_RSMRST#
3 3V_EN 9
+3VALW PBTN_OUT#
ENE9022 10 PM_SLP_S4# SOC

C 4 3V_EN C
+3V_SOC
12 PM_SLP_S3#
5 VR_ON
+VNN 15 SOC_PWROK
Note:
1.7 to 8 need over 10ms
(compal setting 30ms) need to check
EN_1.8VALW 6
2.10 to 11 need under 2.5~4ms. +1.8VALW
3.+0.675VS rising time need
under 100us. need to check
4.12 to +1.05VS need under 5ms. +1.8V_PG 7

5.14 to 15 need set 5ms~100ms. +1.24VALW 16
(compal setting 20ms)
PLT_RST#
B B
+1.35V 11 SYSON
13A EN_1.05VS
+1.05VS 14 1.05VS_PG
+0.675VS
+1.8VS 13B SUSP#
+3.3VS
A
+5VS A
+VCC_VCGI SVID

Power Sequence
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.A
5 4 3 2 1
5 4 3 2 1
B5W1A Power UP Sequence

2016-04-12
EC V0.15 Plug in S5->S0 S0>S3 S3>S0 S0>S5
ACIN
ACIN
SOC +3VLP
EC_ON
0ms
209.8us -> 8.824s

DC mode
+3VLP
EC_ON
D -> 2.110ms -> 8.814s +5VALW D
+5VALW 1.444ms
-> <- -> 8.824s +3V_EN
3V_EN
-> 681.2us -> 1.057ms +3VALW
+3VALW(+3V_SOC)
-> 1.441ms -> 15.93us SPOK
SPOK
PVT modify
-> 4.267ms -> 7.794ms -> 13.84ms -> 6.464ms VR_ON

VR_ON
-> 1.780ms -> 124us -> 1.783ms -> 111.7us +VNN
+VNN
-> 8.784ms -> 9.403us EN_1.8VALW
EN_1.8VALW
-> 1.495ms -> 2.688ms +1.8VALW
+1.8VALW
-> 3.495ms -> 6.356ms +1.24VALW
+1.24VALW
C
ON/OFF C
ON/OFF
-> 36.78ms -> 15.00us EC_RSMRST#
EC_RSMRST# ->
->
-> 3.314ms 30ms -> 3.434us PBTN_OUT#
PBTN_OUT#
-> 15.3ms EC_SLP_S4#
PM_SLP_S4#
-> 15.3ms EC_SLP_S3#
PM_SLP_S3#
-> 14.81ms -> 28.76ms SYSON
SYSON
-> 819.9us -> 1.730ms +1.35V
+1.35V
-> 44.92ms -> 17.6ms -> 23.94ms -> 18.79ms SUSP#
SUSP#
-> 2.888us -> 540us -> 3.310us -> 494.5us +0.675VS
+0.675VS
-> 1.341ms -> 1.695ms -> 1.299ms -> 1.355ms +1.05VS
+1.05VS
-> 1.232ms -> ms -> 1.103ms -> s +1.8VS
+1.8VS
-> 366.2us -> 1.748ms -> 342.9us -> 1.539ms +3VS
+3VS
B -> 534us -> 2.898ms -> 567.7us -> 1.331ms +5VS B
+5VS
-> 518us -> 35.95us -> 1.803ms -> 37us 1.05VSP_PG
1.05VSP_PG
-> 8.910ms -> 7.800ms -> 33.52ms -> 6.462ms SOC_PWROK
SOC_PWROK
-> 9.750ms -> 7.790ms -> 10.04ms -> 6.502ms VCC_VCGI_ON
VCC_VCGI_ON
-> 105.7ms -> 67.95us -> 229.16ms -> 86.98us +VCC_VCGI
+VCC_VCGI
-> 1799ms -> 698.8ns -> 1.759ms -> 528.5ps VR_PWRGD
VR_PWRGD
-> 191.6ms -> 145.1us -> 165.5ms SOC_PLTRST#
SOC_PLTRST#
A A

Power Sequence
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.A
5 4 3 2 1
5 4 3 2 1

for HW
1 Design update Remove SOC side ODD_EN 0.2 P.09 only need reserve EC side ODD_EN 12/28 DVT
D 2 UC56 need PU to +3VS 0.2 P.09 Remove RC492 and add RC1162 12/28 DVT D
Design update
3 GPIO43 need to PD 0.2 P.11 RC408 un-stuff, pop RC433 12/28 DVT
Design update
Diode may cause leakage 0.2 P.19 D1 un-stuff, pop U2 12/28 DVT
4 Design update
reserve VNN_PWRGD(Pin117) & reserve only 12/28 DVT
5 Design update +1.24VALW_PG(Pin118) 0.2 P.27
for power sequence control +1.8VALW 0.2 P.27 add EC pin EN_1.8VALW 12/28 DVT
6 Design update
for EC Board ID 0.2 P.27 change RB506 to 15K 12/28 DVT
7 Design update
Change speaker bead PN 0.2 P.29 Change LA2,LA3,LA4,LA5 PN from 12/28 DVT
8 Design update by sourcer request. SM01000CC00 to SM01000OW00.
for 1.8VS discharge 0.2 P.31 add R29,QQ2 12/28 DVT
9 Design update
for 1.8VS soft start 0.2 P.31 pop CQ12 12/28 DVT
10 Design update
Reserve PD and follow EVT SMT BOM 0.2 P.09 Reserve RC492 and pop RC99 12/29 DVT
11 Design update
C 0.2 P.21 Remove RY11,RY12,QY2 12/29 DVT C
12 Design update For cost reivew
DFX highlight EM5209VF_DFN14_3X2 change UQ1 footprint to DVT
footprint symbol dosen't release 0.2 P.31 TPS22966DPUR_SON14_2X3 12/29
13 Design update
For enlarge H13~15 Screw GND pad to change Screw hole from 4.2mm to 3.6mm DVT
14 Design update avoid thermal module scrape to PCB 0.2 P.30 01/05
15 Design update follow memory down white paper 0.2 P.17 change RD154,RD155 to 1K 01/08 DVT
16 Design update follow vendor's suggestion 0.2 P.07 change CC7,CC137 to 15pF 01/08 DVT
17 Design update follow vendor's suggestion 0.2 P.12 change CC15,CC16 to 15pF 01/08 DVT
18 Design update For part count 0.2 P.20 RX10,RX11 change to R short 01/22 DVT
19 Design update For cost down experiment 0.2 P.09 change RC524,RC525,RC528,RC529 location
for QC2511 & QC2508 cost down 01/22 DVT
20 Design update For HDMI part count 0.2 P.21 change RY1~5,RY7,RY8,RY10 to 1ohm 01/22 DVT
21 Design update Follow intel checklist 0.2 P.09 Remove RPC27,add RC342~344 for
PM_RST_BTN# need to PU 2.7K 01/22 DVT
B 22 Design update For 0 ohm part count 0.2 P.09, RG8,RC213,RC211 change to R short B
P.28 01/22 DVT

23 Design update For common component 0.2 P.07,21 SB00000DH00 change to SB00000PV00
30,31 01/22 DVT
For common component 0.2 P.18 change SE00000G880 to
24 Design update SE076104K80(CD48,50,51,54,58) 01/22 DVT
25 Design update For intel suggestion 0.2 P09,27 H_THERMTRIP# connect to EC pin 126 01/22 DVT
26 Design update For I2C cost down 0.2 P.09 unpop QC2508,pop RC528,RC529 01/28 DVT
27 Design update For DVT phase part count reduce 0.2 P.26 USB3 CMC change to R short
(Del LS21~LS22,add RS24~27) 01/28 DVT
28 Design update For common part 0.2 P.30 change CF1 SE00000MA00 to SE107475K80
(10V change to 6.3V) 01/29 DVT
29 Design update for H_THERMTRIP# reserve 0.2 P.27 reserve RB490 01/29 DVT
30 Design update For correct to ABO material 0.2 P.12 change 105_0402_1% from SD00000FY8L 01/29 DVT
to SD00000FY00
31 Design update For DVT phase 0.2 P.05 change CPU PN for ES2 02/02 DVT
A QKKW(SA00009S800),QKKX@(SA00009S900), A
QKKY@(SA00009SA00)
32 Design update For Intel 2016 WW04 Sightings 0.2 P.10 Change RC79 from 1K_0402_1% to 02/02 DVT
Report update(560733) 680_0402_1%
PWR_PIR
Custom 1.A
5 4 3 2 1
5 4 3 2 1

for HW
33 Design update For different Fan table 0.2 P.27 Add 17" EC board ID 02/02 DVT
D 34 Design update for 1.8VS discharge 0.3 P.31 QQ2 change to Q4B,and stuff Q4 & R25, D
un stuff QQ2 04/12 DVT2

35 Design update verify +3V_SOC for cost down 0.3 P.31 Un stuff RQ3 as DVT memo 04/12 DVT2
36 Design update For intel request 0.3 P.27 change H_THERMTRIP# to EC pin 101 04/12 DVT2
37 Design update follow CRB 0.3 P.9 SOC_PLTRST# reserve PU +3VS change to 04/12 DVT2
+3V_SOC
38 Design update for BOM structure option
0.3 P.16 change memory down BOM structure to MD@04/12 DVT2
39 Design update for part count reduce.
0.3 P.21 HDMI RY1~RY5,RY7~RY8,RY10 change to R 04/25 DVT2
short 04/25 DVT2
40 Design update Intel HDA issue, Fix on QS sample. 0.3 P.10 RC4983&RC779 un-stuff
41 Design update Follow APL PDG v1.2 suggestion 0.3 P.7 Del RPC28, add RC522,RC524,RC525,RC516 04/25 DVT2
42 Design update Follow APL Checklist v1.2 suggestion 0.3 P.24 un stuff RC383,and BIOS internal PU 04/25 DVT2
43 Design update Follow APL Checklist v1.2 suggestion 0.3 P.21 un stuff RY14,and BIOS internal PU 04/25 DVT2
44 Design update For 0 ohm part count reduce 0.3 P9 10 RL1,RC99,RC528,RC529,RC1052,RG2 04/25 DVT2
22 23
45 Design update For part count reduce 0.3 P.31 RQ1,RQ2 change from 1ohm to RShort 04/25 DVT2
46 Design update for option SM Bus 0.3 P.18 reserve RD168 to PU +3VALW 04/26 DVT2
C C
47 Design update for part count reduce 0.3 P.18 RD165 change to 0ohm 04/26 DVT2
48 Design update intel checklist v1.2 update 0.3 P.9 RC344 change from 2.7K to 10K 04/26 DVT2
49 Design update Update DVT2 Board ID 0.3 P.27 RB506 change to 20K(15") and 200K(17") 04/26 DVT2
50 Design update Connect PMC_SUSPWRDNACK from SOC to EC0.3 P.27 Stuff RB489 05/12 PVT
51 Design update Update circuit 0.3 P.5 Update QS CPU in circuit 05/24 PVT
52 Design update add +1.8VS discharge circuit 0.3 P.31 stuff R29 & QQ2 05/24 PVT
53 Design update Update Pre MP Board ID 1.0 P.27 change EC board ID 15" to 27K,17" 06/27 PreMP
to 240K
54 Design update PDG 1.5 update 1.0 P.21 RY17&RY18 un stuff 06/27 PreMP
55 Design update RC517,RC519,RC480,RC481,RC476,RC145, 1.0 P.7,13,14 for 0 ohm part count reduce 06/27 PreMP
RC146,RD165,RL13,RB482 chagne to RS 18,22,24
56 Design update For ME EN 1.0 P.10 RC1052 change to 0ohm 06/27 PreMP
57 Design update For part count reduce 1.0 P.31 UQ2 un stuff 06/27 PreMP
58 Design update For intel PDG update 1.0 P.12 swap JCMOS1 & JCMOS2,SOC_SRTCRST# 07/04 PreMP
& SOC_RTCTEST#
59 Design update For part count reduce 1.0 P.13 RC476 & RC481 change to 0_0603 07/04 PreMP
B B
60 Design update For +1.35V power 1.0 P.14 add RC147 for +1.35V R short 07/05 PreMP
61 Design update For 0 ohm part count reduce 1.0 P.29 change RA24,RA27 to R short 07/05 PreMP
62 Design update For part count reduce 1.0 P.12 RC340 & RC402 change to @CMC@ 07/05 PreMP
63 Design update For MP BOM 1.A P.05 Update B0 & B1 CPU 07/22 PreMP
64 Design update For intel spec udpate 1.A P.12 un stuff RC273,RC266,RC268 07/22 PreMP
65 Design update For intel spec udpate 1.A P.12 change RC245,RC93 to 57.6K stuff RC251 07/22 PreMP
66 Design update For PCB update 1.A P.27 Add 1A board ID 07/22 PreMP
67 Design update For Acer request 1.A P.11 Add Micron on board RAM 07/22 PreMP
68 Design update For intel signting 1.A P.9 Un stuff RC343 07/22 PreMP
A A

PWR_PIR
Custom 1.A
5 4 3 2 1

La D641P

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A B C D E

Model Name : B5/B7W1A

B5/B7W1A M/B Schematics Document

DDR3L-ON BOARD 1Rx16

HDMI Conn. CHB:204pin DDR3L-SO-DIMM X1

port 2 Touch Panel

Conn P.26 Conn On Sub/B

page 05~15 HD Audio HDA Codec

RTC CKT. SATA HDD Conn.

Power Circuit DC/DC Touch Pad Int.KBD

Voltage Rails Board ID / SKU ID Table for AD channel BOARD ID Table_LA-D641P

43 level BOM table

43 Level Description BOM Structure

intel CMC CMC@ Micron DRAM on board MCN@

Security Classification Compal Secret Data Compal Electronics, Inc.

VR_ON RT3601EAGQW 4800mA

SYSON RT8207MZQW 6400mA SUSP#

EN_1.05VS SY8003ADFC 3000mA PJ601 0 ohm

VNN_PWRGD SY8032ABC 1192mA DMG2301U 785mA

Security Classification Compal Secret Data Compal Electronics, Inc.

<20> EDP_AUXP AH10 AF2

PreMP modify B0 step APL_BGA1296

@ UC1B APL_SOC @ UC1D APL_SOC

DDR_M0_DQS0 BB63 AW48 DDR_M1_DQS0 BG28 AR21

@ UC1L APL_SOC USB_OC0# RC522 1 210K_0402_5%

M54 Y61 LPC_IO0 RC532 1 2 20_0402_1%

J62 AB62 LPC_SERIRQ RC536 1 2 20_0402_1% LPC_SERIRQ_R <27,28> To TPM

2.2K_0402_5% 2 @ 1 RC2570 DDR_SMB_CK SOC_SMBCLK 3 4 @

@ .1U_0402_16V7K CC14 SOC_SPI_SO B58

UC56 SOC_SPI_CS#0 B57

+1.8VALW RC1147 2.2K_0402_5%

1 2 RC1001 1 2 3.3K_0402_5% SOC_SPI_IO3_0_R1

Intel HDA issue, Fix on QS sample 09/01

T5137 @ A38 C27

GPIO105 10KPD Pulled LOW when RSM_RST_N de-asserts

GPIO106 4.7KPU Pulled HIGH when RSM_RST_N de-asserts

GPIO110 0: 3.3V* 10KPD LPC 1.8V/3.3V mode select

GPIO111 10KPD Boot BIOS from SPI select

GPIO112 10KPD Pulled LOW when RSM_RST_N de-asserts

SOC_SRTCRST# 1 2 XDP_TCK0 RC463 1 2 51_0402_5%

R39 RC498 137_0402_1%

PCIE_REF_CLK_RCOMP RC272 60.4_0402_1%

RC477 1 @ 20_0402_5% 1 @ 2 +1.24V_1.35VALW _USB2

A-Step only support +1.24V. +1.24V_1.35VALW _MPHY +VNN +VCC_VCGI

RC467 1 @ 2 0_0402_5% @ UC1V APL_SOC

BSC Side PSC Side BSC Side

+1.24V_1.35VALW _GLML +1.24V_1.35VALW _PLL

Close Soc pin AM28

BSC Side PSC Side BSC Side PSC Side

AG48 VNN_SENSE <40>

BSC Side PSC Side APL_BGA1296

B RTC Battery CC79.CC84 Close UC1.AK19.

@ UC1S APL_SOC @ UC1T APL_SOC @ UC1U APL_SOC

APL_BGA1296 APL_BGA1296 APL_BGA1296

CH0 DDR3L Memory Down Lower Bits

RD32 2 MD@ 1 3.65K_0402_1% 2 2 DDR_M0_ODT0_DRAM K1 A1 DDR_M0_ODT0_DRAM K1 A1

CH0 DDR3L Memory Down Upper Bits Non-Interleaved Memory

DDR_M0_ODT0_DRAM K1 A1 DDR_M0_ODT0_DRAM K1 A1 36_0804_8P4R_5%

Cterm=1.6pF in APL DDR3L Memory Down WhitePaper (559207)

close UD3 close UD4 close UD3 close UD4

@EMC@ CD62 1 2 .1U_0402_16V7K 99 100 RD36 2 1 3.65K_0402_1%

@EMC@ CD69 1 2 .1U_0402_16V7K 105 106