MARWADI UNIVERSITY

Faculty of Technology
Department of Information and Communication Technology
Computer Organization and Architecture (01CT0301)

Assignment
CH-4 Register Transfer and Microoperation
1. A digital computer has a common bus system for 16 registers of 32 bits each. The bus
is constructed with multiplexers.

a. How many selection inputs are there in each multiplexer?

b. What size of multiplexers are needed?
c. How many multiplexers are there in the bus?

2. The 4-bit adder-subtractor circuit with controlling input M has the following values
for data inputs A and B. In each case, determine the values of the outputs: S3, S2, S1,
S0 and C4.

3. Design a 4-bit combinational decrementer circuit using four full-adder circuits. This
circuit decrement input 4-bit data by one.

4. The 8-bit registers AR, BR, CR, and DR initially have the following values:

AR=11110010
BR=11111111
CR=10111001
DR=11101010

Determine the 8-bit values in each register after the execution of the following
sequence of microoperations.

a. AR  AR + BR
b. CR  CR /\ DR , BR  BR + 1
c. AR  AR – CR

5. If register A holds AF data. Mention content of register A after in Hexadecimal

number system

a. SHL A
b. SHR A
c. CIL A
d. CIR A
e. ASHL A
f. ASHR A