ACKNOWLEDGEMENT

I place on record my heartfelt sincere gratitude and appreciation to all those who are responsible
in various ways in helping me to complete my research work and subsequent writing of my
thesis. I owe my profound gratitude to Mr. ……………………………, my supervisor, for his
guidance, patience, and providing me with brilliant atmosphere for doing research.

1
 ABSTRACT

AIM:

The main objective of this project is to develop an embedded system, which is a RFID
Technology based door accessing system.

IMPLEMENTATION:

This project is implemented 8051 based AT89S52 developed board interfaced with RFID reader,
RFID Tags and LCD for displaying the data.

BLOCK DIAGRAM:

2
POWER SUPPLY:

STEP BRIDGE FILTER

REGULAT
DOWN
RECTIFIER CIRCUIT OR
TRANSFOR SECTION
MER

DESCRIPTION:

This project is useful to security authentication in any home purpose, educational institutions.
After getting authentication then only gate will be open means the person is accessed to enter.

SOFTWARE:

EMBEDDED ‘C’

KEIL4.0 TO WRITE CODE

ISP TO BURN THE CHIP

HARDWARE:

1 AT89S52 BASED OUR OWN DEVELOPED BOARD

2 POWER SUPPLY

3 RFID TAGS

4. RFID READER

5 LCD

6. DC MOTOR

3
ADVANTAGES:

Low cost, automated operation, Low Power consumption.

REFERENCES

1. THE 8051 MICRO CONTROLLER AND EMBEDDED SYSTEMS BY MAZIDI.

2. WWW.WIKIPEDIA.ORG
3. WWW.ATMEL.COM
4. WWW.8051PROJECTS.COM
5. EMBEDDED SYSTEMS WITH 8051 BY KENITH J AYALA

4
 Contents

TITLE PAGE
NO

ACKNOWLEDGEMENT i

ABSTRACT 1

LIST OF FIGURES iv

LIST OF TABLES vi

CHAPTER I: Introduction

1.1 Introduction 1

1.2 Examples of Embedded Systems 2

CHAPTER II: Introduction to ARM Processor

2.1 Embedded processor overview 5

2.2 History and Development 5

2.3 Pin description 7

2.4 Block Diagram 8

CHAPTER III: Introduction to Hardware Modules

3.1 Sensors 20

3.1.1 Temperature Sensor - The LM35 20

3.1.2Heartbeat Sensor 26

3.1.3MEMS 32
3.1.4 3-Axis Orientation/Motion Detection Sensor

3.2 LCD (LIQUID CRYSTAL DISPLAY) 45

5
CHAPTER IV: Software module

4.1 KEIL IDE for developing micro controller code 71

4.2 ORCAD for designing schematics 74

4.3 FLASH MAGIC 75

CHAPTER V: Block Diagram

5.1 Block Diagram 76

5.2 Schematic Diagram 77

CHAPTER VI: Coding 79

CHAPTER VII: Prototype and Experimental Results 117

CHAPTER VIII: Conclusion and Future Scope 118

BIBLIOGRAPHY 98

6
 Chapter 1
INTRODUCTION
1.1 Embedded System

An embedded system is a special-purpose system in which the computer is completely

encapsulated by or dedicated to the device or system it controls. Unlike a general-purpose
computer, such as a personal computer, an embedded system performs one or a few predefined
tasks, usually with very specific requirements. Since the system is dedicated to specific tasks,
design engineers can optimize it, reducing the size and cost of the product. Embedded systems
are often mass-produced, benefiting from economies of scale.

Personal digital assistants (PDAs) or handheld computers are generally considered

embedded devices because of the nature of their hardware design, even though they are more
expandable in software terms. This line of definition continues to blur as devices expand. With
the introduction of the OQO Model 2 with the Windows XP operating system and ports such as a
USB port — both features usually belong to "general purpose computers", — the line of
nomenclature blurs even more. Physically, embedded systems ranges from portable devices such
as digital watches and MP3 players, to large stationary installations like traffic lights, factory
controllers, or the systems controlling nuclear power plants.

In terms of complexity embedded systems can range from very simple with a single
microcontroller chip, to very complex with multiple units, peripherals and networks mounted
inside a large chassis or enclosure.

Fig.1.1 Example of Embedded system

7
1.2 Examples of Embedded Systems

 Avionics, such as inertial guidance systems, flight control hardware/software and other
integrated systems in aircraft and missiles
 Cellular telephones and telephone switches
 Engine controllers and antilock brake controllers for automobiles
 Home automation products, such as thermostats, air conditioners, sprinklers, and security
monitoring systems
 Handheld calculators
 Handheld computers
 Household appliances, including microwave ovens, washing machines, television sets,
DVD players and recorders
 Medical equipment
 Personal digital assistant
 Videogame consoles
 Computer peripherals such as routers and printers.
 Industrial controllers for remote machine operation.

In recent times, wireless sensors and sensor networks have become a great interest to research,
scientific and technological community. Though sensor networks have been in place for more
than a few decades now, the wireless domain has opened up a whole new application space of
sensors. Wireless sensors and sensor networks are different from traditional wireless networks
as well computer networks and, therefore, pose more challenges to solve such as limited energy,
restricted life time, etc. [1].
Wireless sensing units integrate wireless communications and mobile computing with
transducers to deliver a sensor platform which is inexpensive to install in numerous applications.
Indeed, co-locating computational power and radio frequency (RF) communication within the
sensor unit itself is a distinct feature of wireless sensing. Today, the progress in science and
technology offers miniaturization, speed, intelligence, sophistication, and new materials at lower
cost, resulting in the development of various high-performance smart sensing system.

8
 Many new research is focused at improving quality of human life in terms of health [2] by
designing and fabricating sensors which are either in direct contact with the human body
(invasive) or indirectly (noninvasive). One of the reasons for more development in this area is
the global population and rise in ageing population [3], one statistic provided by the U.S.
Department of Health that by 2050 over 20% of the world’s population will be above 65 years of
age. This results in a requirement for medical care, which is expensive for long-term monitoring
and long waiting lists for consultations with health professionals. The cost of hospitalization is
ever increasing, so is the cost of rehabilitation after a major illness or surgery. Hospitals are
looking at sending people back as soon as possible to recoup at home. During this recovery
period, several physiological parameters need to be continuously measured. Hence, telemedicine
and remote monitoring of patients at home are gaining added importance and urgency [4]–[6].
Patients are being monitored using a network of wireless sensors [7]. Many elderly people dread
the idea of being forced to live with their adult children, or in a rest home or in other sheltered
living arrangement.

They want to live independently and keep control of their own lives. Yet at the same time
they know there is a high risk of injury or even death because of a fall or stroke. Such people
need to be monitored continuously and provided with immediate medical help and attention
when required. We seek to come up with solutions, which help to remove anxiety. As a result,
there is a need for an accurate, flexible, noninvasive, comfortable, reliable, and low-cost
monitoring unit that unites all these demands. A system to monitor the overall health of welfare
facility residents, who need constant care, has been reported in [5]–[8]. This system [8] has been
designed with wireless sensors, wireless repeaters and a host computer. The system consists of a
piezoelectric sensor, a two-axis accelerometer, a microcontroller, and a low-power transceiver. It
records respiration activity and indicators of posture for 24 hours. These data are transmitted to
the wireless repeater by the transceiver. The wireless repeaters, which are installed throughout
the welfare facility, send data, including the repeater’s ID, to the host computer. The ID is used
to detect the resident’s location in the welfare facility. The host computer stores the data, which
can be used to analyze the resident’s overall health condition. When the resident is in an
emergency situation, such as falling or in an inactive state for more that the allotted time, the

9
host computer automatically alerts the situation to the care staff by an alarm sound and also by
mobile phone.
After researching work related to fall detection, falls are the most widespread domestic
accidents among the elderly. Furthermore, it frequently happens that elderly people who have
previously experienced a fall fear a new fall and sink gradually into inactivity. Due to less
mobility it leads progressively to an increase in the risk of a fall [17]. Literature review reveals
that reliable fall detection based raw sensor data is much discussed in literature and requires
algorithm development of wide scope based on deeper knowledge of specific [18] application
principles as outlined in and to monitor a range of human movement. However, all reported
systems are relatively expensive and the cost depends on the number of sensors used. So, there is
an effort to develop the home monitoring system using optimum number of sensors [20]. These
facts show an increasing demand for long-term health monitoring which is affordable,
continuous, and unobtrusive [9], which will result in considerable impact on annual medical
costs [2] and health management [10], [19]. Wearable systems for continuous health monitoring
are a key technology in helping the transition to more practical and affordable healthcare. It not
only allows the user to closely monitor changes in her or his physiological parameters but also
provides feedback to help maintain an optimal health status. Currently, there are monitoring
products in the market that are aimed to provide emergency assistance to senior citizens,
rehabilitation patients, and medically or physically challenged individuals, but these have
limitations. St. John’s and Medic Alert’s Lifelink™ [12] allows the user to set off an alarm
manually if they are under medical stress, which will then dial designated contact phone
numbers. The fundamental problem with this system is that when medical emergencies happen to
the user, they are often unconscious and unable to press an “emergency alert button.” There is no
product on the market which does not require manual activation of the alarm and monitors a
user’s vital signs smartly, though research is currently undergoing [22]. This is the novel design
goal of the work presented in this paper. The reported device consists of a wrist strap and a
finger ring (circuitry). This allows the sensors to be mounted around the wrist and finger and the
8051 microcontroller unit connected via ribbon cable. In Section II, we present the complete
system overview. All the sensors are explained in Section III. The hardware details are in Section
IV and the algorithms in Section V.The prototype and test results are discussed in Section VI.
This paper ends with a discussion on future developments.

10
Figure: Functional block diagram

11
 Chapter 2

INTRODUCTION TO MICROCONTROLLER
Microcontrollers:
Microprocessors and microcontrollers are widely used in embedded systems products.
Microcontroller is a programmable device. A microcontroller has a CPU in addition to a fixed
amount of RAM, ROM, I/O ports and a timer embedded all on a single chip. The fixed amount
of on-chip ROM, RAM and number of I/O ports in microcontrollers makes them ideal for many
applications in which cost and space are critical.

The Intel 8051 is Harvard architecture, single chip microcontroller (µC) which was developed by
Intel in 1980 for use in embedded systems. It was popular in the 1980s and early 1990s, but
today it has largely been superseded by a vast range of enhanced devices with 8051-compatible
processor cores that are manufactured by more than 20 independent manufacturers including
Atmel, Infineon Technologies and Maxim Integrated Products.

8051 is an 8-bit processor, meaning that the CPU can work on only 8 bits of data at a time. Data
larger than 8 bits has to be broken into 8-bit pieces to be processed by the CPU. 8051 is available
in different memory types such as UV-EPROM, Flash and NV-RAM.

12
Features of AT89S52:
 8K Bytes of Re-programmable Flash Memory.
 RAM is 256 bytes.
 4.0V to 5.5V Operating Range.
 Fully Static Operation: 0 Hz to 33 MHz’s
 Three-level Program Memory Lock.
 256 x 8-bit Internal RAM.
 32 Programmable I/O Lines.
 Three 16-bit Timer/Counters.
 Eight Interrupt Sources.
 Full Duplex UART Serial Channel.
 Low-power Idle and Power-down Modes.
 Interrupt recovery from power down mode.
 Watchdog timer.
 Dual data pointer.
 Power-off flag.
 Fast programming time.
 Flexible ISP programming (byte and page mode).

Description:
The AT89S52 is a low-voltage, high-performance CMOS 8-bit microcomputer with 8K bytes of
Flash programmable memory. The device is manufactured using Atmel’s high density
nonvolatile memory technology and is compatible with the industry-standard MCS-51
instruction set. The on chip flash allows the program memory to be reprogrammed in system or
by a conventional non volatile memory programmer. By combining a versatile 8-bit CPU with
Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcomputer, which provides a
highly flexible and cost-effective solution to many embedded control applications.

13
In addition, the AT89S52 is designed with static logic for operation down to zero frequency and
supports two software selectable power saving modes. The Idle Mode stops the CPU while
allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The
power-down mode saves the RAM contents but freezes the oscillator disabling all other chip
functions until the next hardware reset.

14
Pin description:
Vcc Pin 40 provides supply voltage to the chip. The voltage source is +5V.
GND Pin 20 is the ground.

15
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight
TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.
Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to
external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives
the code bytes during Flash programming and outputs the code bytes during Program
verification. External pull-ups are required during program verification.

Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled
low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be
configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2
trigger input (P1.1/T2EX), respectively, as shown in the following table. Port 1 also receives the
low-order address bytes during Flash programming and verification.

Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled
low will source current (IIL) because of the internal pull-ups.

16
Port 2 emits the high-order address byte during fetches from external program memory and
during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In this
application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external
data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2
Special Function Register. The port also receives the high-order address bits and some control
signals during Flash programming and verification.

Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled
low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for
Flash programming and verification. Port 3 also serves the functions of various special features
of the AT89S52, as shown in the following table.

RST (Reset input): A high on this pin for two machine cycles while the oscillator is running
resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The
DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state
of bit DISRTO, the RESET HIGH out feature is enabled.

17
ALE/PROG (Address Latch Enable) is an output pulse for latching the low byte of the address
during accesses to external memory. This pin is also the program pulse input (PROG) during
Flash programming.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be
used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped
during each access to external data memory. If desired, ALE operation can be disabled by setting
bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC
instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if
the microcontroller is in external execution mode.

PSEN (Program Store Enable) is the read strobe to external program memory. When the
AT89S52 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external data
memory.

EA/VPP (External Access Enable) EA must be strapped to GND in order to enable the device
to fetch code from external program memory locations starting at 0000H up to FFFFH. Note,
however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be
strapped to VCC for internal program executions. This pin also receives the 12-volt
programming enable voltage (VPP) during Flash programming.

XTAL1: Input to the inverting oscillator amplifier and input to the internal clock operating
circuit.

XTAL2: Output from the inverting oscillator amplifier.

18
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator. Either a quartz crystal or ceramic resonator may be
used. To drive the device from an external clock source, XTAL2 should be left unconnected
while XTAL1 is driven. There are no requirements on the duty cycle of the external clock signal,
since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but
minimum and maximum voltage high and low time specifications must be observed.

19
Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
the following table. It should be noted that not all of the addresses are occupied and unoccupied
addresses may not be implemented on the chip. Read accesses to these addresses will in general
return random data, and write accesses will have an indeterminate effect.

User software should not write 1s to these unlisted locations, since they may be used in future
products to invoke new features. In that case, the reset or inactive values of the new bits will
always be 0.

Timer 2 Registers:
Control and status bits are contained in registers T2CON and T2MOD for Timer 2. The register
pair (RCAP2H, RCAP2L) is the Capture/Reload register for Timer 2 in 16-bit capture mode or
16-bit auto-reload mode.

Interrupt Registers:
The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the
six interrupt sources in the IP register.

20
21
22
Dual Data Pointer Registers:
To facilitate accessing both internal and external data memory, two banks of 16-bit Data Pointer
Registers are provided: DP0 at SFR address locations 82H-83H and DP1 at 84H and 85H. Bit
DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user should ALWAYS
initialize the DPS bit to the appropriate value before accessing the respective Data Pointer
Register.

Power off Flag:

The Power off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “1”
during power up. It can be set and rest under software control and is not affected by reset.

Memory Organization
MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes
each of external Program and Data Memory can be addressed.

Program Memory
If the EA pin is connected to GND, all program fetches are directed to external memory. On the
AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are
directed to internal memory and fetches to addresses 2000H through FFFFH are to external
memory.

23
Data Memory
The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel
address space to the Special Function Registers. This means that the upper 128 bytes have the
same addresses as the SFR space but are physically separate from SFR space.

When an instruction accesses an internal location above address 7FH, the address mode used in
the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR
space. Instructions which use direct addressing access the SFR space.

For example, the following direct addressing instruction accesses the SFR at location 0A0H
(which is P2).
MOV 0A0H, #data
The instructions that use indirect addressing access the upper 128 bytes of RAM. For example,
the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at
address 0A0H, rather than P2 (whose address is 0A0H).

MOV @R0, #data

It should be noted that stack operations are examples of indirect addressing, so the upper 128
bytes of data RAM are available as stack space.

Watchdog Timer (One-time Enabled with Reset-out)

The WDT is intended as a recovery method in situations where the CPU may be subjected to
software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset
(WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a
user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H).

When the WDT is enabled, it will increment every machine cycle while the oscillator is running.
The WDT timeout period is dependent on the external clock frequency. There is no way to
disable the WDT except through reset (either hardware reset or WDT overflow reset). When
WDT overflows, it will drive an output RESET HIGH pulse at the RST pin.

24
Using the WDT
To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register
(SFR location 0A6H). When the WDT is enabled, the user needs to service it regularly by
writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows
when it reaches 16383 (3FFFH) and this will reset the device. When the WDT is enabled, it will
increment every machine cycle while the oscillator is running. This means the user must reset the
WDT at least for every 16383 machine cycles.

To reset the WDT, the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only
register. The WDT counter cannot be read or written. When WDT overflows, it will generate an
output RESET pulse at the RST pin. The RESET pulse duration is 98xTOSC, where TOSC =
1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that
will periodically be executed within the time required to prevent a WDT reset.

WDT during Power-down and Idle

In Power down mode the oscillator stops, which means the WDT also stops. Thus the user does
not need to service the WDT in Power down mode.
There are two methods of exiting Power down mode:
1. By a hardware reset or
2. By a level-activated external interrupt which is enabled prior to entering Power down
mode.

When Power-down is exited with hardware reset, servicing the WDT should occur as it normally
does whenever the AT89S52 is reset. Exiting Power down with an interrupt is significantly
different.

The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought
high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt
pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the
WDT be reset during the interrupt service for the interrupt used to exit Power down mode.

25
To ensure that the WDT does not overflow within a few states of exiting Power down, it is best
to reset the WDT just before entering Power down mode.

Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether
the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit =
0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode,
the user should always set up a timer that will periodically exit IDLE, service the WDT and
reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and
resumes the count upon exit from IDLE.

UART
The Atmel 8051 Microcontrollers implement three general purpose, 16-bit timers/ counters.
They are identified as Timer 0, Timer 1 and Timer 2 and can be independently configured to
operate in a variety of modes as a timer or as an event counter. When operating as a timer, the
timer/counter runs for a programmed length of time and then issues an interrupt request. When
operating as a counter, the timer/counter counts negative transitions on an external pin. After a
preset number of counts, the counter issues an interrupt request. The various operating modes of
each timer/counter are described in the following sections.

A basic operation consists of timer registers THx and TLx (x= 0, 1) connected in cascade to form
a 16-bit timer. Setting the run control bit (TRx) in TCON register turns the timer on by allowing
the selected input to increment TLx. When TLx overflows it increments THx; when THx
overflows it sets the timer overflow flag (TFx) in TCON register. Setting the TRx does not clear
the THx and TLx timer registers. Timer registers can be accessed to obtain the current count or
to enter preset values. They can be read at any time but TRx bit must be cleared to preset their
values, otherwise the behavior of the timer/counter is unpredictable.

The C/T control bit (in TCON register) selects timer operation or counter operation, by selecting
the divided-down peripheral clock or external pin Tx as the source for the counted signal. TRx
bit must be cleared when changing the mode of operation, otherwise the behavior of the
timer/counter is unpredictable. For timer operation (C/Tx# = 0), the timer register counts the

26
divided-down peripheral clock. The timer register is incremented once every peripheral cycle (6
peripheral clock periods). The timer clock rate is FPER / 6, i.e. FOSC / 12 in standard mode or
FOSC / 6 in X2 mode. For counter operation (C/Tx# = 1), the timer register counts the negative
transitions on the Tx external input pin. The external input is sampled every peripheral cycle.
When the sample is high in one cycle and low in the next one, the counter is incremented.

Since it takes 2 cycles (12 peripheral clock periods) to recognize a negative transition, the
maximum count rate is FPER / 12, i.e. FOSC / 24 in standard mode or FOSC / 12 in X2 mode.
There are no restrictions on the duty cycle of the external input signal, but to ensure that a given
level is sampled at least once before it changes, it should be held for at least one full peripheral
cycle. In addition to the “timer” or “counter” selection, Timer 0 and Timer 1 have four operating
modes from which to select which are selected by bit-pairs (M1, M0) in TMOD. Modes 0, 1and
2 are the same for both timer/counters. Mode 3 is different.

The four operating modes are described below. Timer 2, has three modes of operation: ‘capture’,
‘auto-reload’ and ‘baud rate generator’.

Timer 0
Timer 0 functions as either a timer or event counter in four modes of operation. Timer 0 is
controlled by the four lower bits of the TMOD register and bits 0, 1, 4 and 5 of the TCON
register. TMOD register selects the method of timer gating (GATE0), timer or counter operation
(T/C0#) and mode of operation (M10 and M00). The TCON register provides timer 0 control
functions: overflow flag (TF0), run control bit (TR0), interrupt flag (IE0) and interrupt type
control bit (IT0).

For normal timer operation (GATE0= 0), setting TR0 allows TL0 to be incremented by the
selected input. Setting GATE0 and TR0 allows external pin INT0# to control timer operation.
Timer 0 overflow (count rolls over from all 1s to all 0s) sets TF0 flag, generating an interrupt
request. It is important to stop timer/counter before changing mode.

27
Mode 0 (13-bit Timer)
Mode 0 configures timer 0 as a 13-bit timer which is set up as an 8-bit timer (TH0 register) with
a modulo-32 prescaler implemented with the lower five bits of the TL0 register. The upper three
bits of TL0 register are indeterminate and should be ignored. Prescaler overflow increments the
TH0 register.

Mode 1 (16-bit Timer)

Mode 1 is the same as Mode 0, except that the Timer register is being run with all 16 bits. Mode
1 configures timer 0 as a 16-bit timer with the TH0 and TL0 registers connected in cascade. The
selected input increments the TL0 register.

Mode 2 (8-bit Timer with Auto-Reload)

Mode 2 configures timer 0 as an 8-bit timer (TL0 register) that automatically reloads from the
TH0 register. TL0 overflow sets TF0 flag in the TCON register and reloads TL0 with the
contents of TH0, which is preset by software.

Mode 3 (Two 8-bit Timers)

Mode 3 configures timer 0 so that registers TL0 and TH0 operate as separate 8-bit timers. This
mode is provided for applications requiring an additional 8-bit timer or counter. TL0 uses the
timer 0 control bits C/T0# and GATE0 in the TMOD register, and TR0 and TF0 in the TCON
register in the normal manner. TH0 is locked into a timer function (counting FPER /6) and takes
over use of the timer 1 interrupt (TF1) and run control (TR1) bits. Thus, operation of timer 1 is
restricted when timer 0 is in mode 3.

Timer 1
Timer 1 is identical to timer 0, except for mode 3, which is a hold-count mode. The following
comments help to understand the differences:

28
• Timer 1 functions as either a timer or event counter in three modes of operation. Timer 1’s
mode 3 is a hold-count mode.
• Timer 1 is controlled by the four high-order bits of the TMOD register and bits 2, 3, 6 and 7 of
the TCON register. The TMOD register selects the method of timer gating (GATE1), timer or
counter operation (C/T1#) and mode of operation (M11 and M01). The TCON register provides
timer 1 control functions: overflow flag (TF1), run control bit (TR1), interrupt flag (IE1) and
interrupt type control bit (IT1).
• Timer 1 can serve as the baud rate generator for the serial port. Mode 2 is best suited for this
purpose.
• For normal timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented by the
selected input. Setting GATE1 and TR1 allows external pin INT1# to control timer operation.
• Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag generating an
interrupt request.
• When timer 0 is in mode 3, it uses timer 1’s overflow flag (TF1) and run control bit (TR1). For
this situation, use timer 1 only for applications that do not require an interrupt (such as a baud
rate generator for the serial port) and switch timer 1 in and out of mode 3 to turn it off and on.
• It is important to stop timer/counter before changing modes.

Mode 0 (13-bit Timer)

Mode 0 configures Timer 1 as a 13-bit timer, which is set up as an 8-bit timer (TH1 register)
with a modulo-32 prescaler implemented with the lower 5 bits of the TL1 register. The upper 3
bits of the TL1 register are ignored. Prescaler overflow increments the TH1 register.

Mode 1 (16-bit Timer)

Mode 1 configures Timer 1 as a 16-bit timer with the TH1 and TL1 registers connected in
cascade. The selected input increments the TL1 register.

Mode 2 (8-bit Timer with Auto Reload)

Mode 2 configures Timer 1 as an 8-bit timer (TL1 register) with automatic reload from the TH1
register on overflow. TL1 overflow sets the TF1 flag in the TCON register and reloads TL1 with
the contents of TH1, which is preset by software. The reload leaves TH1 unchanged.

29
Mode 3 (Halt)
Placing Timer 1 in mode 3 causes it to halt and hold its count. This can be used to halt Timer 1
when TR1 run control bit is not available i.e., when Timer 0 is in mode 3.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type
of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has three operating modes:
capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by
bits in T2CON. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the
TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator
periods, the count rate is 1/12 of the oscillator frequency.

30
In the Counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T2. In this function, the external input is sampled during S5P2
of every machine cycle. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. The new count value appears in the register during S3P1 of the cycle
following the one in which the transition was detected. Since two machine cycles (24 oscillator
periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the
oscillator frequency. To ensure that a given level is sampled at least once before it changes, the
level should be held for at least one full machine cycle.

Capture Mode
In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2
is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be
used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-0
transition at external input T2EX also causes the current value in TH2 and TL2 to be captured
into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in
T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt.

31
Auto-reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload
mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR
T2MOD. Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When
DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.

32
The above figure shows Timer 2 automatically counting up when DCEN = 0. In this mode, two
options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and
then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded
with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H
and RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an
overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit.
Both the TF2 and EXF2 bits can generate an interrupt if enabled.

Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 10-2. In this
mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count
up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit
value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2,
respectively.

A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal
the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH
to be reloaded into the timer registers.
The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit
of resolution. In this operating mode, EXF2 does not flag an interrupt.

33
Baud Rate Generator
Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON. Note
that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or
transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2
into its baud rate generator mode.

The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2 causes
the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L,
which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2’s
overflow rate according to the following equation.

The Timer can be configured for either timer or counter operation. In most applications, it is
configured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it
is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12
the oscillator frequency). As a baud rate generator, however, it increments every state time (at
1/2 the oscillator frequency). The baud rate formula is given below.

34
where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned
integer.

Timer 2 as a baud rate generator is shown in the below figure. This figure is valid only if RCLK
or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an
interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not
cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud
rate generator, T2EX can be used as an extra external interrupt.

It should be noted that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator
mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is
incremented every state time, and the results of a read or write may not be accurate. The RCAP2
registers may be read but should not be written to, because a write might overlap a reload and
cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the
Timer 2 or RCAP2 registers.

35
Programmable Clock Out
A 50% duty cycle clock can be programmed to come out on P1.0, as shown in the below figure.
This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to
input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from
61 Hz to 4 MHz (for a 16-MHz operating frequency).

To configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and
bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out
frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers
(RCAP2H, RCAP2L), as shown in the following equation.

In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar
to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate
generator and a clock generator simultaneously. Note, however, that the baud rate and clock-out
frequencies cannot be determined independently from one another since they both use RCAP2H
and RCAP2L.

36
Interrupts
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three
timer interrupts (Timers 0, 1, and 2) and the serial port interrupt. These interrupts are all shown
in the below figure.

Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit
in Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once. The below table shows that bit position IE.6 is unimplemented. User software
should not write a 1 to this bit position, since it may be used in future AT89 products.

Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON.
Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the
service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt,
and that bit will have to be cleared in software.

The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers
overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2
flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.

37
Power saving modes of operation :
8051 has two power saving modes. They are:
1. Idle Mode
2. Power Down mode.
The two power saving modes are entered by setting two bits IDL and PD in the special
function register (PCON) respectively.
The structure of PCON register is as follows.
PCON: Address 87H

38
 The schematic diagram for 'Power down' mode and 'Idle' mode is given as follows:

Idle Mode:
Idle mode is entered by setting IDL bit to 1 (i.e., IDL=1). The clock signal is gated off to
CPU, but not to interrupt, timer and serial port functions. The CPU status is preserved
entirely. SP, PC, PSW, Accumulator and other registers maintain their data during IDLE
mode. The port pins hold their logical states they had at the time Idle was initialized.
ALE and PSEN(bar) are held at logic high levels.

Ways to exit Idle Mode:

1. 1. Activation of any enabled interrupt will clear PCON.0 bit and hence the Idle Mode is
exited. The program goes to the Interrupt Service Routine (ISR). After RETI is executed
at the end of ISR, the next instruction will start from the one following the instruction that
enabled the Idle Mode.
2.
3. 2. A hardware reset exits the idle mode. The CPU starts from the instruction following
the instruction that invoked the Idle mode.

39
Power Down Mode:
The Power Down Mode is entered by setting the PD bit to 1. The internal clock to the
entire microcontroller is stopped. However, the program is not dead. The Power down
Mode is exited (PCON.1 is cleared to 0) by Hardware Reset only. The CPU starts from
the next instruction where the Power down Mode was invoked. Port values are not
changed/ overwritten in power down mode. Vcc can be reduced to 2V in Power down
Mode. However Vcc has to be restored to normal value before Power down Mode is
exited.

Program Memory Lock Bits

The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P)
to obtain the additional features listed in the table.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset.
If the device is powered up without a reset, the latch initializes to a random value and holds that

40
value until reset is activated. The latched value of EA must agree with the current logic level at
that pin in order for the device to function properly.

Programming the Flash – Parallel Mode

The AT89S52 is shipped with the on-chip Flash memory array ready to be programmed. The
programming interface needs a high-voltage (12-volt) program enable signal and is compatible
with conventional third-party Flash or EPROM programmers. The AT89S52 code memory array
is programmed byte-by-byte.

Programming Algorithm:
Before programming the AT89S52, the address, data and control signals should be set up
according to the “Flash Programming Modes”. To program the AT89S52, take the following
steps:
1. Input the desired memory location on the address lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/VPP to 12V.
5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte write
cycle is self-timed and typically takes no more than 50 µs. Repeat steps 1 through 5, changing
the address and data for the entire array or until the end of the object file is reached.

Data Polling:
The AT89S52 features Data Polling to indicate the end of a byte write cycle. During a write
cycle, an attempted read of the last byte written will result in the complement of the written data
on P0.7. Once the write cycle has been completed, true data is valid on all outputs, and the next
cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

41
Ready/Busy:
The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.0 is
pulled low after ALE goes high during programming to indicate BUSY. P3.0 is pulled high again
when programming is done to indicate READY.

Program Verify:
If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read
back via the address and data lines for verification. The status of the individual lock bits can be
verified directly by reading them back.

Reading the Signature Bytes:

The signature bytes are read by the same procedure as a normal verification of locations 000H,
100H, and 200H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned
are as follows.
(000H) = 1EH indicates manufactured by Atmel
(100H) = 52H indicates AT89S52
(200H) = 06H

Chip Erase:
In the parallel programming mode, a chip erase operation is initiated by using the proper
combination of control signals and by pulsing ALE/PROG low for a duration of 200 ns - 500 ns.
In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase
instruction. In this mode, chip erase is self-timed and takes about 500 ms. During chip erase, a
serial read from any address location will return 00H at the data output.

Programming the Flash – Serial Mode

The Code memory array can be programmed using the serial ISP interface while RST is pulled to
VCC. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After RST is
set high, the Programming Enable instruction needs to be executed first before other operations
can be executed. Before a reprogramming sequence can occur, a Chip Erase operation is
required.

42
The Chip Erase operation turns the content of every memory location in the Code array into
FFH. Either an external system clock can be supplied at pin XTAL1 or a crystal needs to be
connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should
be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK
frequency is 2 MHz.

Serial Programming Algorithm

To program and verify the AT89S52 in the serial programming mode, the following sequence is
recommended:
1. Power-up sequence:
a. Apply power between VCC and GND pins.
b. Set RST pin to “H”.
If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to
XTAL1 pin and wait for at least 10 milliseconds.
2. Enable serial programming by sending the Programming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the
CPU clock at XTAL1 divided by 16.
3. The Code array is programmed one byte at a time in either the Byte or Page mode. The write
cycle is self-timed and typically takes less than 0.5 ms at 5V.
4. Any memory location can be verified by using the Read instruction which returns the content
at the selected address at serial output MISO/P1.6.
5. At the end of a programming session, RST can be set low to commence normal device
operation.

Power-off sequence (if needed):

1. Set XTAL1 to “L” (if a crystal is not used).
2. Set RST to “L”.
3. Turn VCC power off.

43
Data Polling:
The Data Polling feature is also available in the serial mode. In this mode, during a write cycle
an attempted read of the last byte written will result in the complement of the MSB of the serial
output byte on MISO.

Serial Programming Instruction Set

The Instruction Set for Serial Programming follows a 4-byte protocol and is shown in the table
given below.

Programming Interface – Parallel Mode

Every code byte in the Flash array can be programmed by using the appropriate combination of
control signals. The write operation cycle is self-timed and once initiated, will automatically time
itself to completion.

44
45
After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to
clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster
than 1/16 of the system clock at XTAL1.

For Page Read/Write, the data always starts from byte 0 to 255. After the command byte and
upper address byte are latched, each byte thereafter is treated as data until all 256 bytes are
shifted in/out. Then the next instruction will be ready to be decoded.

46
 Chapter 3

Introduction to Hardware Modules

3.1 RFID TECHNOLOGY
History of RFID:

In a very interesting article, the San Jose Mercury News tells us about Charles Walton, the man
behind the radio frequency identification technology (RFID). Since his first patent about it in
1973, Walton, now 83 years old, collected about $3 million from royalties coming from his
patents. Unfortunately for him, his latest patent about RFID expired in the mid-1990s. So he will
not make any money from the billions of RFID tags that will appear in the years to come. But he
continues to invent and his latest patent about a proximity card with incorporated PIN code
protection was granted in June 2004.

What is RFID.

RFID is short for Radio Frequency Identification. Generally a RFID system consists of 2
parts. A Reader, and one or more Transponders, also known as Tags. RFID systems evolved
from barcode labels as a means to automatically identify and track products and people. You will
be generally familiar with RFID systems as seen in:

 Access Control.
RFID Readers placed at entrances that require a person to pass their proximity card (RF
tag) to be
"read' before the access can be made.
 Contact less Payment Systems.
RFID tags used to carry payment information. RFIDs are particular suited to electronic
Toll collection
systems. Tags attached to vehicles, or carried by people transmit payment information to
a fixed
reader attached to a Toll station. Payments are then routinely deducted from a users

47
 account, or
information is changed directly on the RFID tag.
 Product Tracking and Inventory Control. RFID systems are commonly used to track
and record the movement of ordinary items such as library books, clothes, factory pallets,
electrical goods and numerous items.

How do RFIDs work.

Shown below is a typical RFID system. In every RFID system the transponder
Tags contain information. This information can be as little as a single binary bit , or be a large
array of bits representing such things as an identity code, personal medical information, or
literally any type of information that can be stored in digital binary format.

Shown is a RFID transceiver that communicates with a passive Tag. Passive tags have no
power source of their own and instead derive power from the incident electromagnetic
field. Commonly the heart of each tag is a microchip. When the Tag enters the generated RF
field it is able to draw enough power from the field to access its internal memory and transmit
its stored information.

48
 Fig 3.8 RFID

When the transponder Tag draws power in this way the resultant interaction of the RF fields
causes the voltage at the transceiver antenna to drop in value. This effect is utilized by the Tag
to communicate its information to the reader. The Tag is able to control the amount of power
drawn from the field and by doing so it can modulate the voltage sensed at the Transceiver
according to the bit pattern it wishes to transmit.

COMPONENTS OF RFID

A basic RFID system consists of three components:

 An antenna or coil
 A transceiver (with decoder)
 A transponder (RF tag) electronically programmed with unique information

These are described below:

49
1. ANTENNA

The antenna emits radio signals to activate the tag and read and write data to it. Antennas are the
conduits between the tag and the transceiver, which controls the system's data acquisition and
communication. Antennas are available in a variety of shapes and sizes; they can be built into a
door frame to receive tag data from persons or things passing through the door, or mounted on an
interstate tollbooth to monitor traffic passing by on a freeway. The electromagnetic field
produced by an antenna can be constantly present when multiple tags are expected continually. If
constant interrogation is not required, a sensor device can activate the field.

Often the antenna is packaged with the transceiver and decoder to become a reader (a.k.a.
interrogator), which can be configured either as a handheld or a fixed-mount device. The reader
emits radio waves in ranges of anywhere from one inch to 100 feet or more, depending upon its
power output and the radio frequency used. When an RFID tag passes through the
electromagnetic zone, it detects the reader's activation signal. The reader decodes the data
encoded in the tag's integrated circuit (silicon chip) and the data is passed to the host computer
for processing.

Fig 3.9 ANTENNA

50
2. TAGS (Transponders)

An RFID tag is comprised of a microchip containing identifying information and an antenna that
transmits this data wirelessly to a reader. At its most basic, the chip will contain a serialized
identifier, or license plate number, that uniquely identifies that item,

similar to the way many bar codes are used today. A key difference, however is that RFID tags
have a higher data capacity than their bar code counterparts. This increases the options for the
type of information that can be encoded on the tag, including the manufacturer, batch or lot
number, weight, ownership, destination and history (such as the temperature range to which an
item has been exposed). In fact, an unlimited list of other types of information can be stored on
RFID tags, depending on application needs. An RFID tag can be placed on individual items,
cases or pallets for identification purposes, as well as on fixed assets such as trailers, containers,
totes, etc.

Tags come in a variety of types, with a variety of capabilities. Key variables include:

"Read-only" versus "read-write"

Fig 3.10 "READ ONLY" VERSUS "WRITE"

There are three options in terms of how data can be encoded on tags: (1) Read-only tags contain
data such as a serialized tracking number, which is pre-written onto them by the tag

51
manufacturer or distributor. These are generally the least expensive tags because they cannot
have any additional information included as they move throughout the supply chain.

Any updates to that information would have to be maintained in the application software that
tracks SKU movement and activity. (2) "Write once" tags enable a user to write data to the tag
one time in production or distribution processes. Again, this may include a serial number, but
perhaps other data such as a lot or batch number. (3) Full "read-write" tags allow new data to be
written to the tag as needed—and even written over the original data. Examples for the latter
capability might include the time and date

of ownership transfer or updating the repair history of a fixed asset. While these are the most
costly of the three tag types and are not practical for tracking inexpensive items, future standards
for electronic product codes (EPC) appear to be headed in this direction.

Fig 3.11 RFID TAGS

Data capacity

The amount of data storage on a tag can vary, ranging from 16 bits on the low end to as much as
several thousand bits on the high end. Of course, the greater the storage capacity, the higher the
price per tag.

52
 Form factor

The tag and antenna structure can come in a variety of physical form factors and can either be
self-contained or embedded as part of a traditional label structure (i.e., the tag is inside what
looks like a regular bar code label—this is termed a 'Smart Label') companies must choose the
appropriate form factors for the tag very carefully and should expect to use multiple form factors
to suit the tagging needs of different physical products and units of measure. For example, a
pallet may have an RFID tag fitted only to an area of protected placement on the pallet itself. On
the other hand, cartons on the pallet have RFID tags inside bar code labels that also provide
operators human-readable information and a back-up should the tag fail or pass through non
RFID-capable supply chain links.

Passive versus active

“Passive” tags have no battery and "broadcast" their data only when energized by a reader. That
means they must be actively polled to send information. "Active" tags are capable of
broadcasting their data using their own battery power. In general, this means that the read ranges
are much greater for active tags than they are for passive tags—perhaps a read range of 100 feet
or more, versus 15 feet or less for most passive tags. The extra capability and read ranges of
active tags, however, come with a cost; they are several times more expensive than passive tags.
Today, active tags are much more likely to be used for high-value items or fixed assets such as
trailers, where the cost is minimal compared to item value, and very long read ranges are
required. Most traditional supply chain applications, such as the RFID-based tracking and
compliance programs emerging in the consumer goods retail chain, will use the less expensive
passive tags.

Frequencies

Like all wireless communications, there are a variety of frequencies or spectra through which
RFID tags can communicate with readers. Again, there are trade-offs among cost, performance
and application requirements. For instance, low-frequency tags are cheaper than ultra high-
frequency (UHF) tags, use less power and are better able to penetrate non-metallic substances.
They are ideal for scanning objects with high water content, such as fruit, at close range. UHF

53
frequencies typically offer better range and can transfer data faster. But they use more power and
are less likely to pass through some materials. UHF tags are typically best suited for use with or
near wood, paper, cardboard or clothing products.

Compared to low-frequency tags, UHF tags might be better for scanning boxes of goods as they
pass through a bay door into a warehouse. While the tag requirements for compliance mandates
may be narrowly defined, it is likely that a variety of tag types will be required to solve specific
operational issues. You will want to work with a company that is very knowledgeable in tag and
reader technology to appropriately identify the right mix of RFID technology for your
environment and applications.

EPC Tags

EPC refers to "electronic product code," an emerging specification for RFID tags, readers and
business applications first developed at the Auto-ID Center at the Massachusetts Institute of
Technology. This organization has provided significant intellectual leadership toward the use and
application of RFID technology. EPC represents a specific approach to item identification,
including an emerging standard for the tags themselves, including both the data content of the tag
and open wireless communication protocols. In a sense, the EPC movement is combining the
data standards embodied in certain bar code specifications, such as the UPC or UCC-128 bar
code standards, with the wireless data communication standards that have been developed by
ANSI and other groups.

3. RF Transceiver:

The RF transceiver is the source of the RF energy used to activate and power the passive RFID
tags. The RF transceiver may be enclosed in the same cabinet as the reader or it may be a
separate piece of equipment. When provided as a separate piece of equipment, the transceiver is
commonly referred to as an RF module. The RF transceiver controls and modulates the radio
frequencies that the antenna transmits and receives. The transceiver filters and amplifies the
backscatter signal from a passive RFID tag.

54
Typical Applications for RFID

 Automatic Vehicle identification

 Inventory Management
 Work-in-Process
 Container/ Yard Management
 Document/ Jewellery tracking
 Patient Monitoring

The Advantages of RFID Over Bar Coding

1. No "line of sight" requirements: Bar code reads can sometimes be limited or

problematic due to the need to have a direct "line of sight" between a scanner and
a bar code. RFID tags can be read through materials without line of sight.

2. More automated reading: RFID tags can be read automatically when a tagged
product comes past or near a reader, reducing the labor required to scan product
and allowing more proactive, real-time tracking.

3. Improved read rates: RFID tags ultimately offer the promise of higher read
rates than bar codes, especially in high-speed operations such as carton sortation.

4. Greater data capacity: RFID tags can be easily encoded with item details
such as lot and batch, weight, etc.

55
 5. "Write" capabilities: Because RFID tags can be rewritten with new data as supply
chain activities are completed, tagged products carry updated information as they move
throughout the supply chain.

Common Problems with RFID

Some common problems with RFID are reader collision and tag collision. Reader collision
occurs when the signals from two or more readers overlap. The tag is unable to respond to
simultaneous queries. Systems must be carefully set up to avoid this problem. Tag collision
occurs when many tags are present in a small area; but since the read time is very fast, it is easier
for vendors to develop systems that ensure that tags respond one at a time. See Problems with
RFID for more details.

3.2 LCD (LIQUID CRYSTAL DISPLAY)

Introduction
Liquid crystal displays (LCD s) have materials which combine the properties of both
liquids and crystals. Rather than having a melting point, they have a temperature range within
which the molecules are almost as mobile as they would be in a liquid, but are grouped together
in an ordered form similar to a crystal.
An LCD consists of two glass panels, with the liquid crystal material sand witched in
between them. The inner surface of the glass plates are coated with transparent electrodes which
define the character, symbols or patterns to be displayed polymeric layers are present in between
the electrodes and the liquid crystal, which makes the liquid crystal molecules to maintain a
defined orientation angle.
one each polarisers are pasted outside the two glass panels. These polarisers would rotate the
light rays passing through them to a definite angle, in a particular direction
When the LCD is in the off state, light rays are rotated by the two polarisers and the
liquid crystal, such that the light rays come out of the LCD without any orientation, and hence
the LCD appears transparent.

56
 When sufficient voltage is applied to the electrodes, the liquid crystal molecules would be
aligned in a specific direction. The light rays passing through the LCD would be rotated by the
polarisers, which would result in activating / highlighting the desired characters.
The LCD’s are lightweight with only a few millimeters thickness. Since the LCD’s
consume less power, they are compatible with low power electronic circuits, and can be powered
for long durations.
The LCD s won’t generate light and so light is needed to read the display. By using
backlighting, reading is possible in the dark. The LCD’s have long life and a wide operating
temperature range. Changing the display size or the layout size is relatively simple which
makes the LCD’s more customer friendly.
The LCD s used exclusively in watches, calculators and measuring instruments is the
simple seven-segment displays, having a limited amount of numeric data. The recent advances in
technology have resulted in better legibility, more information displaying capability and a wider
temperature range.
These have resulted in the LCD s being extensively used in telecommunications and
entertainment electronics. The LCD s has even started replacing the cathode ray tubes (CRTs)
used for the display of text and graphics, and also in small TV applications.
LCD operation

In recent years the LCD is finding widespread use replacing LED s (seven-segment LED or
other multi segment LED s). This is due to the following reasons:
1. The declining prices of LCD s.
2. The ability to display numbers, characters and graphics. This is in
contract to LED s, which are limited to numbers and a few characters.
3. Incorporation of a refreshing controller into the LCD, there by relieving
the CPU of the task of refreshing the LCD. In the contrast, the LED must be refreshed
by the CPU to keep displaying the data.
4. Ease of programming for characters and graphics.

57
LCD pin description

The LCD discussed in this section has 14 pins. The function of each pin is given in table.

TABLE 1: Pin description for LCD:

Pin Symbol I/O Description

1 Vss -- Ground

2 Vcc -- +5V power supply

3 VEE -- Power supply to control contrast

4 RS I RS=0 to select command register

RS=1 to select

data register

5 R/W I R/W=0 for write

R/W=1 for read

6 E I/O Enable

7 DB0 I/O The 8-bit data bus

8 DB1 I/O The 8-bit data bus

58
9 DB2 I/O The 8-bit data bus

10 DB3 I/O The 8-bit data bus

11 DB4 I/O The 8-bit data bus

12 DB5 I/O The 8-bit data bus

13 DB6 I/O The 8-bit data bus

14 DB7 I/O The 8-bit data bus

59
TABLE4. 2: LCD Command Codes

Code Command to LCD Instruction

(hex) Register

1 Clear display screen

2 Return home

4 Decrement cursor

6 Increment cursor

5 Shift display right

7 Shift display left

8 Display off, cursor off

A Display off, cursor on

C Display on, cursor off

E Display on, cursor on

F Display on, cursor blinking

10 Shift cursor position to left

14 Shift cursor position to right

18 Shift the entire display to the left

1C Shift the entire display to the right

80 Force cursor to beginning of 1st line

C0 Force cursor to beginning of 2nd line

38 2 lines and 5x7 matrix

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Uses

The LCDs used exclusively in watches, calculators and measuring instruments are the
simple seven-segment displays, having a limited amount of numeric data. The recent advances in
technology have resulted in better legibility, more information displaying capability and a wider
temperature range. These have resulted in the LCDs being extensively used in
telecommunications and entertainment electronics. The LCDs have even started replacing the
cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV
applications.

LCD INTERFACING

Sending commands and data to LCDs with a time delay:

Fig: 4.14 LCD

To send any command from table 2 to the LCD, make pin RS=0. For data, make RS=1.Then
place a high to low pulse on the E pin to enable the internal latch of the LCD

BUZZER

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 Figure 2.19 Buzzer

A buzzer or beeper is an audio signaling device, which may be mechanical, electromechanical

or Piezoelectric. Typical uses of buzzers and beepers include alarms, timers and confirmation of
user input such as a mouse click or keystroke. A joy buzzer is an example of a purely mechanical
buzzer.
Early devices were based on an electromechanical system identical to an electric
bell without the metal gong. Similarly, a relay may be connected to interrupt its own
actuating current, causing the contacts to buzz. Often these units were anchored to a wall or
ceiling to use it as a sounding board. The word "buzzer" comes from the rasping noise that
electromechanical buzzers made.
A piezoelectric element may be driven by an oscillating electronic circuit or other audio
signal source, driven with a piezoelectric audio amplifier. Sounds commonly used to indicate
that a button has been pressed are a click, a ring or a beep.

Uses
Anunciator panels
Electronic metronomes
Game shows
Microwave ovens and other household appliances
Sporting events such as basketball games

62
 Chapter 4
Software module
KEIL µVision IDE Overview
The µVision IDE from Keil combines project management, make facilities, source code editing, program
debugging, and complete simulation in one powerful environment. The µVision development platform is
easy-to-use and it helps you quickly create embedded programs that work. The µVision editor and
debugger are integrated in a single application that provides a seamless embedded project development
environment.

µVision is the Keil Integrated Development and Debugging Environment that helps you quickly create
and test embedded applications for ARM7, ARM9, Cortex-M3, C16x, ST10, XC16x, C251, and C51
embedded micro controllers. It combines all aspects of embedded project development including source
code editing, project organization and management, revision control, make facility, target debugging,
simulation, and Flash programming. µVision offers a significant advantage to new users and to
developers who must get projects working quickly.

A51 Macro Assembler

The A51 Assembler is a macro assembler for the 8051 family of microcontrollers. It supports all
8051 derivatives. It translates symbolic assembly language mnemonics into relocatable object
code where the utmost speed, small code size, and hardware control are critical. The macro
facility speeds development and conserves maintenance time since common sequences need only
be developed once. The A51 assembler supports symbolic access to all features of the 8051
architecture.

The A51 assembler translates assembler source files into a relocatable object modules. The
DEBUG directive adds full symbolic information to the object module and supports debugging
with the µVision Debugger or an in-circuit emulator. In addition to object files, the A51
assembler generates list files which may optionally include symbol table and cross reference
information.

63
 C51 C Compiler

Compiler Details

 Compiler Directives
 Code Optimizer
 Memory Models
 Memory Types
 Pointers
 Interrupt Functions
 Library Reference

The Keil C51 C Compiler for the 8051 microcontroller is the most popular 8051 C compiler in
the world. It provides more features than any other 8051 C compiler available today.

The C51 Compiler allows you to write 8051 microcontroller applications in C that, once
compiled, have the efficiency and speed of assembly language. Language extensions in the C51
Compiler give you full access to all resources of the 8051.

The C51 Compiler translates C source files into relocatable object modules which contain full
symbolic information for debugging with the µVision Debugger or an in-circuit emulator. In
addition to the object file, the compiler generates a listing file which may optionally include
symbol table and cross reference information.

Features

 Nine basic data types, including 32-bit IEEE floating-point,

 Flexible variable allocation with bit, data, bdata, idata, xdata, and pdata memory
types,
 Interrupt functions may be written in C,
 Full use of the 8051 register banks,
 Complete symbol and type information for source-level debugging,

64
  Use of AJMP and ACALL instructions,
 Bit-addressable data objects,
 Built-in interface for the RTX51 Real-Time Kernel,
 Support for dual data pointers on Atmel, AMD, Cypress, Dallas Semiconductor, Infineon,
Philips, and Triscend microcontrollers,
 Support for the Philips 8xC750, 8xC751, and 8xC752 limited instruction sets,
 Support for the Infineon 80C517 arithmetic unit.

BL51 Code Banking Linker/Locator

The BL51 code banking linker/locator combines OMF51 object modules and creates executable
8051 programs. The linker resolves external and public references and assigns absolute or fixed
addresses to relocatable program segments.

The BL51 Linker processes object files created by the Keil C51 Compiler and A51 Assembler
and the Intel PL/M-51 Compiler and ASM-51 Assembler. These object modules must adhere to
the OMF51 object module specification. BL51 outputs an absolute OMF51 object module that
may be loaded into practically any emulator, the Keil µVision Debugger, or the OH51 Object-
HEX converter (to create an Intel HEX file).

OH51 Object-HEX Converter

The OH51 Object-HEX converter creates Intel HEX files from absolute OMF51 object modules.
Absolute object files may be created by the following:

 The BL51 code banking linker.

 The A51 assembler.
 The OC51 banked object converter.

Intel HEX files are ASCII files that contain a hexadecimal representation of your program. They
may be easily loaded into a device programmer for writing EPROMs or other memory devices.

Several utilities are available that may help you with your HEX files:

65
  HEX2BIN converts an Intel HEX file into a flat BINARY file.
 BIN2HEX converts a flat BINARY file into an Intel HEX file.

The following documents provide additional information about the different output file formats.

 Description of the Intel OMF51 Object Module Format.

 Description of the Intel HEX File Format.

OC51 Banked Object Converter

The OC51 banked object file converter creates an absolute object module for each code bank in a
banked object module. You do not need this utility unless you have created a code banking
program using the BL51 code banking linker.

When you create a code banking application, all symbolic and source-level information is
maintained in the banked object module and is transferred by OC51 to each individual absolute
object module for each code bank.

Once you have used OC51 to create the absolute object modules, you may use OH51 to create an
Intel HEX file for each code bank.

Why You Need A Simulator

We agree that you can probably create, test, and debug your embedded applications without a
simulator. However, there are several reasons why a simulator (like the µVision Debugger) can
make your engineering tasks easier and save you lots of development time.

 Customers with the simulator spend less time debugging simple program errors. The
simulator lets them learn about things like on-chip peripherals and addressing modes
without designing real hardware.
 It is our experience that customers who have a simulator require LESS technical support
and are able to get up-to-speed with the tools faster. The simulator makes it easy to write
and test code and learn about programming your microcontroller.

66
  The µVision Debugger provides complete simulation support for on-chip peripherals like
PWM, Power saving modes, A/D, Serial I/O, and so on.
 It is easier for our support engineers to explain complex problems if you have a
simulator.
 It is easier to discover if a problem is in the hardware or software when you use a
simulator. For example, if the application works in the simulator and if it works in the
emulator, there's most likely a problem with the target hardware.
 The simulator requires no setup time. An emulator may require configuration and a target
board before you can debug.

The simulator is not a replacement for an emulator. A simulator is a different tool

entirely. While an emulator allows you to debug software running on your target hardware, a
simulator allows you to debug your software as well as your understanding of the
microcontroller and the programming language. There are no real-time debugging effects of a
simulator.

For debugging embedded applications, we have a general list of favorite tools that we use in-
house.

 Logic Probe
 Digital Multi-Meter
 High-speed Analog Oscilloscope
 High-speed Digital Storage Oscilloscope
 Logic Analyzer (with a disassembly pod)
 Emulator
 Software Simulator

It is always a difficult trade-off when deciding what you need. However, a simulator is relatively
inexpensive and has a great utility value for the price.

67
 Chapter 5

Block diagram

68
 Chapter 6

Code

# include <reg52.h>

# define NO_OF_CARDS 1

# define OFF 1

# define ON 0

# define OPEN 0

# define CLOSE 1

# define RX_BUF_SIZE 12

# define RFID_CODE_SIZE 10

# define CR_LF_SIZE 2

#define CARD_CHARGE 1

#define CARD_DEDUCT 2

# define DEBUG 1

sbit buzzer = P3^7;

sbit mf = P0^0;

sbit mb = P0^1;

bit flag=0;

unsigned char AccessCards[NO_OF_CARDS][12] = { "2100884855B4"};

69
unsigned char CardNumber[12];

unsigned char RxBuf[RX_BUF_SIZE];

unsigned char RxCount = 0;

unsigned char ReadFlag = 0;

void test();

void DisplayVersion();

void SerialInit(void);

void ReadCard(void);

unsigned char CheckCard();

unsigned char ucCardId = 0;

void transmit(unsigned char *);

void serial0() interrupt 4

if(RI == 1)

RxBuf[RxCount] = SBUF;

RxCount++;

if(RxCount >= RX_BUF_SIZE+CR_LF_SIZE)

RxCount = 0;

RI = 0;

70
 unsigned char status;

void delay_ms(unsigned int i)

unsigned int j;

while(i-->0)

for(j=0;j<500;j++)

void cmd_lcd(unsigned char c)

unsigned char temp;

temp=c>>4;

LCD=temp<<4|0x02; //logical or with 0x02 since rs(rs=0) & en(en=1) are

LCD=0; //connected to p2.0 & p2.1 respectively

//transmit low byte

LCD=c<<4|0x02;

LCD=0;

delay_ms(2); //delay 2 milliseconds

71
void init_lcd(void)

delay_ms(10); //delay 10 milliseconds

cmd_lcd(0x28); //4 bit initialize, 5x7 character font, 16x2 display

cmd_lcd(0x0c); //lcd on, cursor on

cmd_lcd(0x06); //right shift cursor automatically after each character is displayed

cmd_lcd(0x01); //clear lcd

void write_lcd(unsigned char c)

unsigned char temp;

temp=c>>4;

LCD=temp<<4|0x03; //logical or with 0x03 since rs(rs=1) & en(en=1) are

LCD=0;

LCD=c<<4|0x03;

LCD=0;

delay_ms(2);

void display_lcd(unsigned char *s)

while(*s)

write_lcd(*s++);

72
void main(void)

unsigned char i = 0;

IE = 0x92;

buzzer=1;

mf=mb=1;

SerialInit();

init_lcd();

DisplayVersion();

delay_ms(1000);

while(1)

DisplayVersion();

for(i = 0; i < RX_BUF_SIZE; i++)

RxBuf[i] = 0x00;

RxCount = 0;

ReadCard();

ucCardId = CheckCard();

for(i = 0; i < RxCount; i++)

write_lcd(CardNumber[i]);

delay_ms(1000);

if(ucCardId==99)

73
 buzzer=0;

init_lcd();

display_lcd("INVALID CARD.... ");

cmd_lcd(0xc0);

display_lcd("TRY AGAIN..... ");

delay_ms(1500);

buzzer=1;

continue;

test();

void test()

if(ucCardId==0)

init_lcd();

display_lcd("STATUS:VALID");

cmd_lcd(0xc0);

display_lcd("GATE:OPEN");

mf=0;

74
 mb=1;

delay_ms(100);

mf=0;

mb=0;

delay_ms(2000);

mf=1;

mb=0;

delay_ms(100);

mf=0;

mb=0;

init_lcd();

display_lcd("STATUS:VALID");

cmd_lcd(0xc0);

display_lcd("GATE:CLOSE");

void SerialInit(void)

TMOD = 0x20;

TH1 = 0xfd;

SCON = 0x50;

TR1 = 1;

75
void DisplayVersion()

init_lcd();

display_lcd("RFID BASED DOOR ");

cmd_lcd(0xc0);

display_lcd("ACCESSING SYSTEM ");

delay_ms(100);

void ReadCard(void)

unsigned char i;

while(RxCount == 0);

delay_ms(200);

for(i = 0; i < RFID_CODE_SIZE; i++)

CardNumber[i] = RxBuf[i];

unsigned char CheckCard()

unsigned char i = 0;

unsigned char j = 0;

76
 for(i = 0; i < NO_OF_CARDS; i++)

for(j = 0; j <RFID_CODE_SIZE ; j++)

if(CardNumber[j] != AccessCards[i][j])

break;

if(j == RFID_CODE_SIZE-1)

return i;

return 99;

void transmit(unsigned char *t_data)

while(*t_data!='\0')

SBUF = *t_data;

while(!TI);

TI=0;

t_data++;

77
 Chapter 7

PROTOTYPE AND EXPERIMENTAL RESULTS

78
 Chapter 8
CONCLUSION AND FUTURE SCOPE

In this paper we have presented a modular approach that can be used to implement a
more flexible home automation system. This method allows for a more cost-effective solution for
the installation of a domestic system and is beneficial for both the customer and the provider. We
have shown controlling different household appliances the relay, light dimming, motor, air
conditioning that can be easily implemented using the proposed infrastructure. A PC based
energy management control system is developed in this paper for a small residential building
model. A novel method is adopted to represent the electrical equipment and the sensors that are
necessary in real world application.
The PC is used to monitor to switch ON and switch OFF any electrical equipment
automatically when a person enters and leaves the rooms, respectively, in a building. Energy
savings is achieved by having proper interface with minimum hardware and software. A
successful energy management control system using a PC is demonstrated in this paper, to avoid
energy wastage by human carelessness.

79
 Bibliography

Reference books:

1. 8051-MICROCONTROLLER AND EMBEDDED SYSTEM.

Mohd. Mazidi. , Janice Gillispie Mazadi

2. ELECTRONIC COMPONENTS Ramesh S. Gaonkar

3. EMBEDDED SOFTWARE PRIMER. David .E. Simon.

Reference Websites:

1. www.mitel.databook.com
2. www.atmel.databook.com
3. www.franklin.com
4. www.keil.com
5. http://www.ikalogic.com/cat_microcontrollers.php
6. http://www.electronicsforu.com/Electronicsforu/articles/subcategory.asp?cid=23&id=14
7. http://electrosofts.com/dtmf/

80