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LED TV
SERVICE MANUAL
CHASSIS : LB43B

MODEL : 32LB620B/623B/623Z
32LB620B-TA 32LB623B/623Z-TF
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67982524 (1403-REV00) Printed in Korea


CONTENTS

CONTENTS . ............................................................................................. 2

SAFETY PRECAUTIONS ......................................................................... 3

SERVICING PRECAUTIONS ................................................................... 4

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION ................................................................ 8

EXPLODED VIEW .................................................................................. 14

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed


metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder
on page 3 of this publication, always follow the safety precau- ES devices.
tions. Remember: Safety First. 4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug (Most replacement ES devices are packaged with leads elec-
or other electrical connection. trically shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective mate-
installation of electrolytic capacitors may result in an explo- rial to the chassis or circuit assembly into which the device will
sion hazard. be installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or cir-
high voltage meter or other voltage measuring device (DVM, cuit, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropri-
(by volume) isopropyl alcohol (90 % - 99 % strength) ate tip size and shape that will maintain tip temperature within
CAUTION: This is a flammable mixture. the range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication 2. Use an appropriate gauge of RMA resin-core solder composed
of contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks Do not use freon-propelled spray-on cleaners.
are correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand
ily by static electricity. Such components commonly are called against the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharg-
ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.

Copyright © LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed when-
gently prying up on the lead with the soldering iron tip as the ever this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remain- good copper pattern. Solder the overlapped area and clip off
ing on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.

Fuse and Conventional Resistor


Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

Copyright © LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method


This specification is applied to the LED TV used LB43B 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
2. Requirement for Test
Each part is tested as below without special appointment.

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C


2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about5 minutes prior to
the adjustment.

4. Model General Specification


No. Item Specification Remarks
Asia, Oceania, Africa, Middle East
1. Market
(PAL/DVB Market)
1) PAL/SECAM-B/G/D/K/I ► DTV
2. Broadcasting system 2) NTSC-M LB43B/LB43M support DVB-T
3) DVB-T/T2 LB43T support DVB-T//T2
3. Channel Storage ATV - 135EA, DTV - 1000EA
► DVB-T
- Guard Interval (Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
Analog : Upper Heterodyne
4. Receiving system ► DVB-T2
Digital : COFDM(DVB-T)
- Guard Interval (Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
5. Video(Composite Input) PAL, SECAM, NTSC 4 System : PAL, SECAM, NTSC, PAL60
6. Component Input Y/Cb/Cr, Y/Pb/Pr
HDMI1-DTV/DVI
7. HDMI Input Support HDCP
HDMI2-DTV/MHL
8. SPDIF out SPDIF out Except 32”HD model
9. USB Input For My Media(Movie/Photo/Music List) and SVC
10. Headphone

Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
5. Component Video Input (Y, Cb/Pb, Cr/Pr)
No. Resolution H-freq(kHz) V-freq(Hz) Porposed
1 720×480 15.73 60.00 SDTV, DVD 480i
2 720×480 15.63 59.94 SDTV, DVD 480i
3 720×480 31.47 59.94 480p
4 720×480 31.50 60.00 480p
5 720×576 15.625 50.00 SDTV, DVD 625 Line
6 720×576 31.25 50.00 HDTV 576p
7 1280×720 45.00 50.00 HDTV 720p
8 1280×720 44.96 59.94 HDTV 720p
9 1280×720 45.00 60.00 HDTV 720p
10 1920×1080 31.25 50.00 HDTV 1080i
11 1920×1080 33.75 60.00 HDTV 1080i
12 1920×1080 33.72 59.94 HDTV 1080i
13 1920×1080 56.250 50 HDTV 1080p
14 1920×1080 67.5 60 HDTV 1080p

6. HDMI Input : Refer to adjust specification about EDID data.


6.1. DTV mode
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed
1. 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 / 45 59.94 / 60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 / 33.75 59.94 / 60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 / 27 23.97 / 24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716/33.75 29.976/30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 HDTV 1080P

6.2. PC mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 640*350 @70Hz 31.468 70.09 25.17 EGA
2. 720*400 @70Hz 31.469 70.08 28.321 DOS
3. 640*480 @60Hz 31.469 59.940 25.175 VESA(VGA)
4. 800*600 @60Hz 37.879 60.31 40.000 VESA(SVGA)
5. 1024*768 @60Hz 48.363 60.00 65.000 VESA(XGA)
6 1152*864 @60Hz 54.348 60.053 80.002 VESA
7. 1280*1024 @60Hz 63.981 60.020 108 VESA(SXGA) FHD only(Support to HDMI-PC)
8. 1360*768 @60Hz 47.712 60.015 85.5 VESA(WXGA)
WUXGA
9. 1920*1080 @60Hz 67.5 60.0 148.5 FHD only(Support to HDMI-PC)
(Reduced blanking)

Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range (4) Click "Connect" tab. If "Can't" is displayed, check connection
between computer, jig and set.
This specification sheet is applied to all of the LED TV with
LB43B chassis. (2) (3)

2. Designation
(1) T he adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation: Above 5 Minutes (Heat Run) Please Check the Speed :
Temperature : at 25 °C ± 5 °C To use speed between
Relative humidity : 65 ± 10 % from 200KHz to 400KHz
Input voltage : 100-220 V~, 50/60 Hz
(6) Adjustment equipments (5) Click "Auto" tab and set as below.
: Color Analyzer(CA-210 or CA-110), Service remote control. (6) Click "Run".
(7) Push the “IN STOP" key - For memory initialization. (7) After downloading, check "OK" message.

Case1 : Software version up


1. After downloading S/W by USB , TV set will reboot (4)
automatically. filexxx.bin
2. Push “In-stop” key. (5)
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key. (7)...........OK
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first. (6)
2. Push “Power on” key for turning it on.
→ If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.

* USB DOWNLOAD(*.epk file download)


(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
3. Main PCB check process - If version of update file in USB Stick is lower, it will not
▪ APC - After Manual-Insert, executing APC work. But version of update file is higher, USB data will be
detected automatically.

* Boot file Download


(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message.
If "Error" is displayed, check connection between computer,
jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read"

(1)

filexxx.bin

Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
(3) Show the message "Copying files from memory". 4. ADC Process
4.1. ADC
- Enter Service Mode by pushing "ADJ" key,
- Enter Internal ADC mode by pushing "►" key at "8. ADC
Calibration".
EZ ADJUST ADC Calibration
0. Tool Option1
ADC Comp 480i NG
1. Tool Option2
ADC Comp 1080p NG
2. Tool Option3
ADC Type OPT
◄ ►
3. Tool Option4
4. Tool Option5
Start Reset
5. Tool Option Commercial
6. Country Group
7. Area Option
8. ADC Calibration ►

(4) Updating is starting.


9. White Balance
10. 10 Point WB
11. Test Pattern
12. EDID D/L
13. Sub B/C
14. Ext. Input Adjust

<Caution> U sing "P-ONLY" key of the Adjustment remote


control, power on TV.

(5) Updating Completed, The TV will restart automatically. * ADC Calibration Protocol (RS232)
(6) If your TV is turned on, check your updated version and NO Item CMD 1 CMD 2 Data 0

Tool option. (explain the Tool option, next stage) Enter Adjust
A A 0 0
When transfer the ‘Mode In’,
Adjust MODE ‘Mode In’ Carry the command.
* If updated version is higher than what TV has, the TV can
lost all channel data. In this case, you have to channel Automatically adjustment
ADC adjust ADC Adjust A D 1 0
(The use of a internal pattern)
recover. If all channel data is cleared, you didn’t have a
DTV/ATV test on production line.
Adjust Sequence
▪ aa 00 00 [Enter Adjust Mode]
* After downloading, have to adjust Tool Option again. ▪ xb 00 40 [Component1 Input (480i)]
(1) Push "IN-START" key in service remote control. ▪ ad 00 10 [Adjust 480i Comp1]
(2) Select "Tool Option 1" and push "OK" key. ▪ aa 00 90 End Adjust mode
(3) Punch in the number. (Each model has their number) * Required equipment : Adjustment remote control.
(4) Completed selecting Tool option.
4.2. Function Check
* RS-232C Connection Method. 4.2.1. Check display and sound
Connection : PCBA (USB Port) → USB to Serial Adapter ■ Check Input and Signal items.
(UC-232A) → RS-232C cable → PC(RS-232C port) (1) TV
● Product name of USB to Serial Adapter is UC-232A. (2) AV (CVBS)
(3) COMPONENT (480i)
(4) HDMI
* Display and Sound check is executed by Remote control.

<Caution> Not to push the "INSTOP" key after completion if


the function inspection.

Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
5. Total Assembly line process * Connecting picture of the measuring instrument
(On Automatic control)
5.1. Adjustment Preparation Inside Pattern is used when W/B is controlled. Connect to
▪ W/B Equipment condition auto controller or push Adjustment Remote control POWER
CA210: CH14, Test signal: Inner pattern(80IRE)-LED Module ON → Enter the mode of White-Balance, the pattern will
▪ Above 5 minutes H/run in the inner pattern. ("power on" key come out.
of Adjustment remote control)

* The spec of color temperature and coordinate.


Full White Pattern
Mode Color Temp Color coordinate Remark CA-210

X=0.271 (±0.002) <Test Signal> COLOR


Cool (C50) 13,000 K ANALYZER
Y=0.270 (±0.002) - Inner pattern TYPE : CA-210

X=0.286 (±0.002) for W/B adjust


Medium(0) 9,300 K
Y=0.289 (±0.002) - External white
X=0.313 (±0.002) pattern RS-232C Communication
Warm(W50) 6,500 K (80IRE, 204gray)
Y=0.329 (±0.002)
* W/B Table in process of aging time
- LGD Module * Auto-control interface and directions
(normal line) March ~ December (1) Adjust in the place where the influx of light like floodlight
Aging time(Min) Cool Medium Warm around is blocked. (Illumination is less than 10 lux).
color coordinate X y x y x y (2) Adhere closely the Color analyzer(CA210) to the module
Target 271 270 286 289 313 329 less than 10 cm distance, keep it with the surface of the
Module and Color analyzer's prove vertically.(80° ~ 100°).
1 0-2 282 289 297 308 324 348
(3) Aging time
2 3-5 281 287 296 306 323 346 - After aging start, keep the power on (no suspension of
3 6-9 279 284 294 303 321 343 power supply) and heat-run over 5 minutes.
4 10-19 277 280 292 299 319 339 - Using ‘no signal’ or ‘full white pattern’ or the others,
5 20-35 275 277 290 296 317 336 check the back light on.
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331 ▪ Auto adjustment Map(RS-232C)
8 80-119 272 271 287 290 314 330 RS-232C COMMAND
[CMD ID DATA]
9 Over 120 271 270 286 289 313 329
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
(normal line) January ~ Feburary
Aging time Cool Medium Warm RS-232C COMMAND CENTER
[CMD ID DATA] MIN (DEFAULT) MAX
color coordinate x y x y x y
Target 271 270 286 289 313 329 Cool Mid Warm Cool Mid Warm
1 0-2 286 295 301 314 328 354 R Gain jg Ja jd 00 172 192 192 192
2 3-5 284 290 299 309 326 349 G Gain jh Jb je 00 172 192 192 192
3 6-9 282 287 297 306 324 346 B Gain ji Jc jf 00 192 192 172 192
4 10-19 279 283 294 302 321 342 R Cut 64 64 64 128
5 20-35 276 278 291 297 318 337 G Cut 64 64 64 128
6 36-49 274 275 289 294 316 334 B Cut 64 64 64 128
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329 <Caution>
Color Temperature : COOL, Medium, Warm.
- AUO/COST/SHARP/BOE Module which cool spec is 13000 K One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
Cool Medium Warm adjust other two lower than C0.(When R/G/B Gain are all
x y x y x y C0, it is the FULL Dynamic Range of Module)
spec 271 270 285 293 313 329
target 276 277 290 300 318 336

Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
* Manual W/B process using adjust Remote control. * CASE Cool
■ Color analyzer(CA100+, CA210) should be used in the First adjust the coordinate far away from the target
calibrated ch by CS-1000. value(x, y).
■ Operate the zero-calibration of the CA100+ or CA-210, 1) x, y > target
then stick sensor to the module when adjusting. i) Decrease the R, G.
■ After enter Service Mode by pushing “ADJ” key, 2) x, y < target
■ Enter White Balance by pushing “►” key at “9. White i) First decrease the B gain,
Balance”. ii) Decrease the one of the others.
EZ ADJUST 3) x > target, y < target
0. Tool Option1
i) First decrease B, so make y a little more than the
Whit Balance
1. Tool Option2 target.
Color Temp. ◄ Cool ►
2. Tool Option3
3. Tool Option4 R-Gain 172
ii) Adjust x value by decreasing the R.
4. Tool Option5 G-Gain 192 4) x < target, y > target
5. Tool Option Commercial
6. Country Group
B-Gain
R-Cut
192
64
i) First decrease B, so make x a little more than the
7. Area Option G-Cut 64 target.
8. ADC Calibration
9. White Balance
B-Cut
Test-Pattern ON
64
ii) Adjust x value by decreasing the G.
10. 10 Point WB Backlight 100 * After You finish all adjustments, Press “In-start” button
11. Test Pattern Reset To Set
and compare Tool option and Area option value with its
12 EDID D/L
13. Sub B/C BOM, if it is correctly same then unplug the AC cable.
14. Ext. Input Adjust If it is not same, then correct it same with BOM and
unplug AC cable.
For correct it to the model’s module from factory JIG
■ For manual adjustment, it is also possible by the following model.
sequence. * Push the “IN STOP" key after completing the function
(1) Set TV in Adj. mode using “P-ONLY” key on remote inspection.
controller and then operate heat run longer than 15
minutes.(If not executed this step, the condition for W/B 5.2. DDC EDID Write (HDMI 256Byte)
may be different.) ■ Connect HDMI Signal Cable to HDMI Jack.
(2) Push “Exit” key. ■ Write EDID DATA to EEPROM(24C02) by using DDC2B
(3) Enter White Balance mode by pushing the ADJ key and protocol.
select “9. White Balance”. When KEY (►) is pressed, ■ Check whether written EDID data is correct or not.
206 Gray internal pattern will be displayed. * For SVC main Assembly, EDID have to be downloaded to
(4) Zero Calibrate the probe of Color Analyzer, then place it Insert Process in advance.
on the center of LCD module within 10cm of the surface
(5) S elect each items (Red/Green/Blue Gain) using
▲/▼(CH +/-) key on Remote control. 5.3. EDID DATA
(6) Adjust R/ G/ B Gain using ◄/►(VOL +/-) key on R/C. 1) All Data : HEXA Value
(7) Adjust three modes all (Cool / Medium / Warm) 2) Changeable Data :
- For All model w/o LS345 *: Serial No : Controlled / Data:01
Fix the one of R/G/B gain and change the others **: Month : Controlled / Data:00
- For G-FIX model ***: Year : Controlled
Cool Mode ****: Check sum
1) Fix the one of R/G/B gain to 192 (default data) and
decrease the others. (If G gain is adjusted over 172 - Auto Download
and R and B gain less than 192 , Adjust is O.K.) ■ After enter Service Mode by pushing “ADJ” key,
2) If G gain is less than 172, Increase G gain by up to ■ Enter EDID D/L mode.
172, and then increase R gain and G gain same ■ Enter “START” by pushing “OK” key.
amount of increasing G gain. EZ ADJUST EDID D/L
3) If R gain or B gain is over 255, readjust G gain less 0. Tool Option1 HDMI1 NG
1. Tool Option2 HDMI2 NG
than 172, Conform to R gain is 255 or B gain is 255 2. Tool Option3

Medium / Warm Mode - Fix the one of R/G/B gain 3. Tool Option4 Start Reset

4. Tool Option5
to 192 (default data) and decrease the others. 5. Tool Option Commercial
EDID D/L
(8) When adjustment is completed, exit adjustment mode 6. Country Group
HDMI1 OK

using EXIT key on Remote control.


7. Area Option
HDMI2 OK
8. ADC Calibration
9. White Balance Start Reset
10. 10 Point WB
11. Test Pattern
12. EDID D/L ►
13. Sub B/C
14. Ext. Input Adjust

Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
[Caution] 5.4. Outgoing condition Configuration
* Use the proper signal cable for EDID Download ■ When pressing IN-STOP key by Service remote control,
- Analog EDID : Pin3 exists Red LED are blinked alternatively. And then automatically
- Digital EDID : Pin3 exists turn off. (Must not AC power OFF during blinking)

* Edid data and Model option download (RS232) 5.5. GND and HI-POT Test
NO Item CMD 1 CMD 2 Data 0
Enter download Download When transfer the ‘Mode In’,
5.5.1. GND & HI-POT auto-check preparation
A A 0 0
Mode ‘Mode In’ Carry the command. (1) Check the POWER CABLE and SIGNAL CABE insertion
EDID data and
Automatically adjustment condition.
Model option ADC Adjust A E 00 10
download
(The use of a internal pattern) (2) You can’t use Tuner Ground & Tuner signal line at all
models (applied Isolator inner tuner)
No. Item Condition Hex Data
1 Manufacturer ID GSM 1E6D 5.5.2. GND & HI-POT auto-check
2 Version Digital : 1 01 (1) Pallet moves in the station.(POWER CORD / AV CORD is
3 Revision Digital : 3 03 tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(1) HD 8BIT 3D HDMI EDID DATA (4) GND Test (Auto)
0 1 2 3 4 5 6 7 8 9 A B C D E F - If Test is failed, Buzzer operates.
0 00 FF FF FF FF FF FF 00 1E 6D a b - If Test is passed, execute next process(Hi-pot test).
10 c 01 03 80 A0 5A 78 0A EE 91 A3 54 c 01 03 (Remove A/V CORD from A/V JACK BOX)
20 0F 50 54 A1 08 00 31 40 45 40 61 40 0F 50 54 A1
(5) HI-POT test (Auto)
30 01 01 01 01 01 01 66 21 50 B0 51 00 01 01 01 01
40 36 00 40 84 63 00 00 1E 64 19 00 40 36 00 40 84 - If Test is failed, Buzzer operates.
50 18 88 03 06 40 84 63 00 00 18 00 00 18 88 03 06 - If Test is passed, GOOD Lamp on and move to next
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 3E process automatically.
70 d 01 e
80 02 03 33 F1 4E 10 1F 04 93 05 14 03 02 12 20 21
90 22 15 01 26 15 07 50 09 57 07 f 5.5.3. Checkpoint
A0 80 1E 20 C0 0E 01 40 0A 0F 08 10 18 10 98 10 58 (1) Test voltage
B0 10 38 10 01 1D 80 18 71 1C 16 20 58 2C 25 00 A0 1) 3 Poles
C0 5A 00 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 - GND: 1.5 KV/min at 100 mA
D0 00 20 C2 31 00 00 1E 8C 0A D0 8A 20 E0 2D 10 10
- SIGNAL: 3 KV/min at 100 mA
E0 3E 96 00 A0 5A 00 00 00 18 02 3A 80 18 71 38 2D
F0 40 58 2C 45 00 A0 5A 00 00 00 1E 00 00 00 00 e 2) 2 Poles
- SIGNAL: 3 KV/min at 100 mA
(2) Detail EDID Options are below (2) TEST time: 1 second
a. Product ID (3) TEST POINT
Model Name HEX EDID Table DDC Function 1) 3 Poles
- GND Test = POWER CORD GND and SIGNAL
HD/FHD Model 0001 01 00 Analog/Digital
CABLE GND.
b. Serial No: Controlled on production line. - Hi-pot Test = POWER CORD GND and LIVE &
c. Month, Year: Controlled on production line: NEUTRAL.
ex) Week : '01' -> '01' 2) 2 Poles
Year : '2013' -> '18' fix - Hi-pot Test = Accessible Metal and LIVE & NEUTRAL.
d. Model Name(Hex): (4) LEAKAGE CURRENT: At 0.5 mArms
cf) TV set’s model name in EDID data is below.
MODEL NAME MODEL NAME(HEX)
LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)

e. Checksum: Changeable by total EDID data.


3D HD
EDID C/S data
HDMI
Block 0 75
Check Sum
50 (HDMI1)
(Hex) Block 1
40 (HDMI2)

f. Vendor Specific
- FHD 8bit/ HD Model
Input Model name(HEX)
HDMI1 67030C001000
HDMI2 67030C002000

Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
6. 3D function test
(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode No. 872 , pattern No.83
(1) Please input 3D test pattern like below.

(2) When 3D OSD appear automatically, then select OK button.

(3) Don't wear a 3D Glasses, check the picture like below.

Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

500

502
400

501
521

121

900
410

540
530
LV1

120

AG1

Set + Stand
A10
200

A2

Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
TP for NON-EU models(except EU and China)

TP for CI slot TP for SCART TP for Headphone


/PCM_REG PCM_D[0] PCM_A[8] CI_TS_CLK SCART1_MUTE HP_LOUT

/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT

/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE

/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] HP_DET

/PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT

/PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout

/PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout

/PCM_CD PCM_D[7] CI_TS_DATA[4]

/PCM_WAIT CI_TS_DATA[5] SC1_R+/COMP1_Pr+

PCM_RST CI_TS_DATA[6] SC1_G+/COMP1_Y+

PCM_5V_CTL CI_TS_DATA[7] SC1_B+/COMP1_Pb+

/CI_DET SC1/COMP1_DET

SC1/COMP1_L_IN

SC1/COMP1_R_IN

TP for S2 TP for FE_TS_DATA

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_L14 2013.05.09
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TP_NON_EN 3

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
L14 POWER BLOCK (POWER DETECT 2)

+24V +12V +3.5V_POWER_DET +3.5V_ST

FROM LIPS or POWER B/D R435


100K PD_+3.5V
Power_DET PANEL_VCC
+3.5V_ST OPT OPT R454-*1 OPT +12V PANEL_VCC
R457 R430 R432 300
Q401 R438
8.2K 2.7K 0
1% 5% 5% 4.7K
MMBT3906(NXP) 1%
IC401
APX803D29 PD_+12V
R454 L408
1 3 100 5% UBW2012-121F Q405
OPT VCC 3 2 RESET
POWER_DET 120OHM DMP2130L
R412
R406

D
10K 2 33K C415 1
R431 C422
+3.5V_ST 0.1uF 1.2K GND OPT
R404 16V POWER_DET_RESET 0.1uF C425 R445 C427 R451 R452
1% 10uF 5.6K 5.6K
4.7K 0.1uF 33K G
25V 16V
OPT OPT
R400 +3.5V_POWER_DET R436
10K C Q400 +24V
100K
R402 R446
10K B MMBT3904(NXP)
12K
RL_ON OPT
OPT OPT
R401 R455 R427 R458 IC402
E +3.3V_Normal 27K 0 APX803D29 OPT R442 C
10K 0 R437
1% 5% 100 5% 10K B Q403
OPT VCC 3 2 RESET PANEL_CTL
R456 MMBT3904(NXP)
0 +3.5V_ST 1
R420 OPT OPT R441 E
1K C413 R428 GND 10K
ZD404 0.1uF 5.1K
5V R419 16V 1%
100 R426
+3.5V_POWER_DET 10K
P401
SMAW200-H18S5
C
R425 Ready - Dual Power Det Power Detect activity
B 10K
L400 INV_CTL
CB2012PK501T
+3.5V_ST Detect Valtage Now is Use Circuit Designator FET_2.5V_DIODE
E Q402
PWR ON 1 2 DRV ON MMBT3904(NXP) Q406-*1
L401
C407
10uF
10V
C400
1uF
10V
ZD400
5V
CB2012PK501T 3.5V
3.5V
3 4 PDIM#1
3.5V
PWM_DIM Power Detect +3.5V R432, R454-*1, R438 +3.3V_Normal DMP2130L

D
2012 1005 5 6
OPT GND PDMI#2
L402 7 8 PWM1 * Notice Power Detect +12V O R430, R431, R454
MLB-201209-0120P-N2 24V 24V
+24V 9 10 PWM_DIM_PULL_DOWN PWM2_2CH_POWER
OPT
- Applying all inch models for LCD L14 +3.5V_ST +3.3V_Normal

G
+24V_CAP GND GND R424 R423
C401 11 12
100
R467 - Dual Power Det is used Power Detect +24V R457, R454
C432 12V 12V 3.9K 1K
4.7uF 0.1uF 13 14 for detecting two kinds of voltage
50V 12V NC FET_2.5V_AOS
50V 15 16
Q406 L410
3216 GND 17 18 GND
L403 AO3435 BLM18PG121SN1D
MLB-201209-0120P-N2
+12V

D
+12V_CAP
C433
4.7uF
C402
0.1uF
19
+1.10V_VDDC
.

C428 C429 C430

G
16V 16V R443 R447 ZD402
+3.5V_ST 10K 22K 2.2uF 0.1uF 22uF
3216 5V
IC403 +3.3V_Normal 10V 16V 10V
L406 TPS5432DDAR [EP]GND
CB2012PK501T
C418
OPT 0.01uF
C437 C436 C414 C435 BOOT SS R429 R448
1 8 2.2K
0.1uF 10uF 10uF 0.1uF 10K

THERMAL
16V 10V 10V 16V
+1.10V_VDDC VIN EN

9
2 7 C

+1.5V_DDR Vout=1.25*(1+R2/R1)+Iadj*R2 L407 C417 POWER_ON/OFF_1


R444
10K B Q404
3.6uH 0.1uF MMBT3904(NXP)
16V PH COMP
3 6 C416
+3.3V_Normal +1.5V_DDR 3A 0.33uF E
OPT R433 16V
ZD401 C424 C421 C420 GND VSENSE 2.7K
22uF 22uF 4 5
L409 IC404 L411 2.5V 0.1uF 1%
AZ1117EH-ADJTRG1 16V 10V 10V C419 C434
BLM18PG121SN1D CB2012PK501T C423 R439 0.039uF 390pF
50V 20K
R1 50V 50V
270pF 1%
IN OUT
ADJ/GND
C426 R449 R453 ZD403
10uF 1K R1 0 2.5V R440 R2
10V 1/16W 47K
1% C431 1%
10uF
1.3A R450
200
1/16W R2
10V

1%
Vout=0.808*(1+R1/R2)

+5V_Normal & +5V_USB with OCP


+12V

C405 C406
10uF 10uF
16V
[EP]GND

PGND_2

PGND_1
PGOOD

VIN_2

VIN_1

OPT R410
V7V

100K
C403
100pF +5V_Normal
50V C409 L405
24

23

22

21

20

19

0.047uF 4.7uH
EN BST 25V
C404
R408 4700pF 1 18
4.7K 50V THERMAL
+3.3V_Normal COMP 25
LX_2 R421 C411 C412
2 17 18K 82pF 22uF
+3.3V_Normal OPT SS LX_1 1% 50V 16V
R459 3 16
OPT OPT 0 IC400 R1
ROSC FB
R403 R405 4 15
4.7K 4.7K TPS65282REGR
EN_SW2 SW_IN_2 R2
MHL_5V_EN 5 14
MHL_SW_TR
R463
MHL_SW_TR
R464
USB1_CTL
EN_SW1
6
4A 13
SW_IN_1
R422
3.3K
2.7K 10K 1%
10

11

12
7

MHL_SW_TR +3.3V_Normal C410


+5V_USB 10uF
Q408 10V
FAULT2

FAULT1

SW_OUT2

RLIM

AGND

SW_OUT1

E C
MHL_5V_EN R407 R409
MHL_SW_TR 10K 10K
C
R461 R415 5V_HDMI_4 AVDD5V_MHL
10K B R466
B 15K
/VBUS_EN 20K
5%
D401 R418
(Active Low) MHL_SW_TR MBR230LSFT1G
E MHL_SW_TR
Q407 R465 30V 10
10K
MHL_SW_TR C OPT C408
R462 R416 10uF
10K
/MHL_OCP_DET

USB1_OCD

B 100K 10V
MHL_OCP_EN
MHL_SW_TR
(Active High) Q409 E

Vout=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 2013.10.28
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power_PD2 4

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
USB (SIDE)

+5V_USB

JK700
ZD700 C700 C703
SD05 22uF 22uF
3AU04S-305-ZC-(LG)

5V 10V 10V
USB DOWN STREAM

OPT USB_HDD_CAP
2

SIDE_USB1_DM
3

SIDE_USB1_DP
OPT OPT OPT
C701 C702 D700
5pF 5pF RCLAMP0502BA
4

50V 50V
5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 13/04/30
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_S1 7

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
HDMI (REAR 1 / SIDE 1 MHL)
HDMI_1 HDMI_2 MHL
VA805
5V_HDMI_2 5V_DET_HDMI_2 5V_HDMI_4 5V_DET_HDMI_4
ESD_HDMI2
R808
HDMI-2
10K R814
HPD4
33
SHIELD ESD_HDMI2
R803 GND VA808
C HDMI-2
20 R809 R815 100
1K 10K 20
Q800 B DDC_SDA_4
MMBT3904(NXP) HPD2
19 HP_DET R816 100
19 DDC_SCL_4
R802 E R810 100 HDMI-2
VA802 DDC_SDA_2 5V R812
18 1.8K 18
ESD_HDMI1 VA809 VA810
R805

3.3K

R811 100 1.8K


VA800 DDC_SCL_2 GND HDMI-2
R813
ESD_HDMI2 ESD_HDMI2
17 17 3.3K
HDMI-2
VA803 VA804 16 DDC_DATA
16 ESD_HDMI1_VARISTOR
ESD_HDMI1 ESD_HDMI1
15 DDC_CLK HDMI_CEC
15 VA811
HDMI_ARC NC ESD_HDMI2
14 14
HDMI_CEC
13 CE_REMOTE
13
EAG59023302

EAG62611204
D803 12 CK-
12
1 10 D805
CK-_HDMI2
11 CK_GND 1 10
11 CK-_HDMI4
CK+ 2 9
10 CK+_HDMI2
10
CK+ 2 9
CK+_HDMI4
D0- 3 8
9
9
D0- 3 8
D0_GND 4 7
8 D0-_HDMI2
8
D0_GND 4 7
D0-_HDMI4
D0+ 5 6
7 D0+_HDMI2
7
D0+ 5 6
D1- D0+_HDMI4
6 ESD_HDMI1_IP4294 BODY_SHIELD
D1-
6 ESD_HDMI2_IP4294
D1_GND IP4294CZ10-TBR
5 20
D1_GND IP4294CZ10-TBR
19
HOT_PLUG_DETECT 5
D1+ D804 18
VDD[+5V]

4 17
D1+ D806
1 10 D1-_HDMI2
16
DDC/CEC_GND

SDA
4
3
D2-
15

14
SCL

RESERVED
D2-
1 10
2 9 D1+_HDMI2
13

12
CEC
3 D1-_HDMI4
2
D2_GND 11
TMDS_CLK-

TMDS_CLK_SHIELD

D2_GND
2 9
3 8 10

9
TMDS_CLK+

TMDS_DATA0- 2 D1+_HDMI4
1
D2+ 8

7
TMDS_DATA0_SHIELD

D2+
3 8
4 7 D2-_HDMI2
6
TMDS_DATA0+

TMDS_DATA1-
1
5

4
TMDS_DATA1_SHIELD

TMDS_DATA1+
4 7
VA801 5 6 D2+_HDMI2
3

2
TMDS_DATA2- D2-_HDMI4
ESD_HDMI1_VARISTOR 1
TMDS_DATA2_SHIELD

TMDS_DATA2+ 5 6
JK800 D2+_HDMI4
ESD_HDMI1_IP4294 JK801-*1 JK801 ESD_HDMI2
VA800-*1 DAADR019A HDMI-2 VA806
IP4294CZ10-TBR ESD_HDMI2_IP4294
1uF HDMI-2_EMI_FOOSUNG
10V IP4294CZ10-TBR
ESD_HDMI1_CAP MHL_CD_SENSE
VA801-*1
1uF C800
10V VA807 0.047uF R817
5.6V 25V 300K
ESD_HDMI1_CAP
OPT
MHL Spec
HDMI-2 HDMI-2

D803-*1 D804-*1 D805-*1 D806-*1

TMDS_CH1- NC_4 TMDS_CH1- NC_4 TMDS_CH1- NC_4 TMDS_CH1- NC_4

CEC TMDS_CH1+

GND_1
1

2
10

9
NC_3

GND_2
TMDS_CH1+

GND_1
1

2
10

9
NC_3

GND_2
TMDS_CH1+

GND_1
1

2
10

9
NC_3

GND_2
TMDS_CH1+

GND_1
1

2
10

9
NC_3

GND_2
3 8 3 8 3 8 3 8

TMDS_CH2- NC_2 TMDS_CH2- NC_2 TMDS_CH2- NC_2 TMDS_CH2- NC_2


4 7 4 7 4 7 4 7

TMDS_CH2+ NC_1 TMDS_CH2+ NC_1 TMDS_CH2+ NC_1 TMDS_CH2+ NC_1


R804 5 6 5 6 5 6 5 6

100
HDMI_CEC CEC_REMOTE_S7 ESD_HDMI1_IP4283 ESD_HDMI1_IP4283 ESD_HDMI2_IP4283 ESD_HDMI2_IP4283
IP4283CZ10-TBA IP4283CZ10-TBA IP4283CZ10-TBA IP4283CZ10-TBA

D803-*2 D804-*2 D805-*2 D806-*2


1 10 1 10 1 10 1 10
5V_HDMI_4 +5V_Normal 2 9 2 9 2 9 2 9
5V_HDMI_2 +5V_Normal +3.5V_ST
3 8 3 8 3 8 3 8
4 7 4 7 4 7 4 7
A1

A2

A1

A2
A1

A2

5 6 5 6 5 6 5 6
MMBD6100 MMBD6100
MMBD6100 D801 D802
D800 ESD_HDMI1_SEMTECH ESD_HDMI1_SEMTECH ESD_HDMI2_SEMTECH ESD_HDMI2_SEMTECH
C

RCLAMP0524PA RCLAMP0524PA RCLAMP0524PA RCLAMP0524PA


C

R800 R801 R806 R807


2.7K 2.7K
2.7K 2.7K
DDC_SDA_4
DDC_SDA_2

DDC_SCL_4
DDC_SCL_2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 2013/08/15
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
HDMI_R1_S1 8
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
SPDIF

SPDIF OPTIC JACK


+3.3V_Normal
5.15 Mstar Circuit Application

SPDIF_OPTIC
JK1001
JST1223-001

GND

Fiber Optic
VCC

2
VINPUT

3
SPDIF_OUT

4
SPDIF_CAP_47pF
C1001 C1002

FIX_POLE
OPT 1uF 47pF
10V 50V
SPDIF_CAP_18pF
C1002-*1
ESD Ready 18pF
50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_L14 2013/10/29
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SPDIF 10

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
LVDS (NON EU)

[51Pin LVDS Connector] FOR FHD REVERSE(10bit) [30Pin LVDS Connector]


(For FHD 60Hz) (For HD 60Hz_Normal)
Change in S7LR
MO_FHD MO_HD
P1100 MIRROR Pol-change P1101
FI-RE51S-HF-J-R1500 10031HR-30
RXA4+ RXA0+ RXA0-

. RXA4- RXA0- RXA0+


1 1
. RXA3+ RXA1+ RXA1-
2 2
. LVDS_SEL RXA3- RXA1- RXA1+
3 3 VCOM_SCL
. RXACK+ RXA2+ RXA2-
4 +3.3V_Normal 4
VCOM_SDA VCOM_SDA
. RXACK- RXA2- RXA2+
5 VCOM_SCL 5
. OPT RXA2+ RXACK+ RXACK-
6 R1103 6 RXA3+
3.3K RXA2- RXACK- RXACK+
.
7 7 RXA3-
. RXA1+ RXA3+ RXA3-
8 OPT 8
R1104
. RXA1- RXA3- RXA3+
9 10K 9 RXACK+
. RXA0+ RXA4+ RXA4-
10 10 RXACK-
. RXA0- RXA4- RXA4+
11 11
RXA0-
12 RXA4+ 12 RXA2+
RXA0+ RXB4+ RXB0+ RXB0-
13 RXA4- 13 RXA2-
RXA1- RXB4- RXB0- RXB0+
14 RXA3+ 14
RXA1+ RXB3+ RXB1+ RXB1-
15 RXA3- 15 RXA1+
RXA2- RXB3- RXB1- RXB1+
16 RXACK+ 16 RXA1-
RXA2+ RXBCK+ RXB2+ RXB2-
17 RXACK- 17
. LVDS_SEL
18 RXBCK- RXB2- RXB2+ 18 RXA0+
RXACK- RXB2+ RXBCK+ RXBCK- +3.3V_Normal
19 RXA2+ 19 RXA0-
RXACK+ RXB2- RXBCK- RXBCK+
20 RXA2- 20
. OPT
21 RXB1+ RXB3+ RXB3- 21 R1109
3.3K
RXA3- RXB1- RXB3- RXB3+
22 RXA1+ 22
RXA3+ PANEL_VCC
23 RXB0+ RXB4+ RXB4- 23 OPT
RXA1- R1110
RXA4- RXB0- RXB4- RXB4+ 10K
24 RXA0+ 24 MO_HD
RXA4+ L1101
25 RXA0- 25 120OHM
. UBW2012-121F
26 R1100 0 26
. MO_FHD
27 27
RXB0-
28 RXB4+ 28 MO_HD
RXB0+ C1101
29 RXB4- 29
0.1uF
RXB1-
30 RXB3+ FOR FHD REVERSE(8bit) 30 16V
RXB1+
31 RXB3- 31
32
RXB2-
RXBCK+
Change in S7LR
RXB2+
33 RXBCK-
. MIRROR Pol-change Shift
34
RXBCK- RXA4+ RXA4+ RXA4- RXA0-
35 RXB2+
RXBCK- RXA4- RXA4- RXA4+ RXA0+
36 RXB2-
. RXA3+ RXA0+ RXA0- RXA1-
37
RXB3- RXA3- RXA0- RXA0+ RXA1+
38 RXB1+
RXB3+ RXACK+ RXA1+ RXA1- RXA2-
39 RXB1-
RXB4- RXACK- RXA1- RXA1+ RXA2+
40 RXB0+
RXB4+ RXA2+ RXA2+ RXA2- RXACK-
41 RXB0- MO_FHD
. RXA2- RXA2- RXA2+ RXACK+
42 R1101 0
. RXA1+ RXACK+ RXACK- RXA3-
43 R1102 0
PANEL_VCC
. RXA1- RXACK- RXACK+ RXA3+
44 MO_FHD
. MO_FHD RXA0+ RXA3+ RXA3- RXA4-
45
L1100
. 120OHM RXA0- RXA3- RXA3+ RXA4+
46
UBW2012-121F
.
47
. RXB4+ RXB4+ RXB4- RXB0-
48
. MO_FHD
49 RXB4- RXB4- RXB4+ RXB0+
C1100
50
. 0.1uF
16V
RXB3+ RXB0+ RXB0- RXB1- EU pin assign is different from NON EU.
.
51 RXB3- RXB0- RXB0+ RXB1+ Because of position of HD wafer.
RXBCK+ RXB1+ RXB1- RXB2-
52
RXBCK- RXB1- RXB1+ RXB2+
. RXB2+ RXB2+ RXB2- RXBCK-

RXB2- RXB2- RXB2+ RXBCK+ V-COM I2C


RXB1+ RXBCK+ RXBCK- RXB3-

RXB1- RXBCK- RXBCK+ RXB3+ +3.3V_Normal

RXB0+ RXB3+ RXB3- RXB4-

RXB0- RXB3- RXB3+ RXB4+


VCOM_I2C_PULL_UP VCOM_I2C_PULL_UP
R1114 R1115
2K 2K

VCOM_I2C
R1105
0
VCOM_SCL URSA/VCOM_SCL URSA/VCOM_SCL
R1106
0
VCOM_SDA URSA/VCOM_SDA URSA/VCOM_SDA
VCOM_I2C

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_S7LR(M1A) 2013/05/22
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_NON_EU 11

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
+1.5V_DDR +1.5V_DDR Option : Ripple Check !!!
R12011K1%

R1205 1K 1% R1204 1K 1%

+1.5V_DDR +1.5V_DDR
DDR_EXT

DDR_EXT
C1202 1000pF

A-MVREFDQ A-MVREFCA
1K1%

C1201 0.1uF

C1213 0.1uF

C12141000pF

10uF 10V

C1219

C1220

C1221

C1222

C1223
DDR_EXT
DDR_EXT

DDR_EXT

DDR_EXT

0.1uF

0.1uF

0.1uF
C1217

C1218

C1224
DDR_EXT

DDR_EXT

C1216

1uF

1uF

1uF

1uF

1uF
R1202

OPT OPT OPT OPT OPT OPT OPT OPT


OPT

CLose to DDR3 CLose to Saturn7M IC

DDR_1600_1G_HYNIX
IC1201 M1A_256M M1A_128M
H5TQ1G63EFR-PBC IC101 IC101-*1
DDR_1600_1G_SS DDR_1600_2G_HYNIX_OLD DDR_1600_2G_HYNIX_NEW DDR_1600_2G_SS LGE2132(M1A_256M) LGE2131(M1A_128M)
EAN61829003
IC1201-*1 IC1201-*2 IC1201-*3 IC1201-*4
M8 N3
K4B1G1646G-BCK0 H5TQ2G63DFR-PBC H5TQ2G63FFR-PBC K4B2G1646Q-BCK0 A-MVREFCA VREFCA A0 A-MA0
EAN61836301 EAN61829203 EAN61829204 EAN61848803 P7
A1 A-MA1 E11 E11
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 P3 A-MA0 B_DDR3_A[0] B_DDR3_A[0]
P7
A1
P7
A1
P7
A1
P7
A1 A2 A-MA2 F12 F12
P3
A2
P3
A2
P3
A2
P3
A2 H1 N2 A-MA1 B_DDR3_A[1] B_DDR3_A[1]
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 A-MVREFDQ VREFDQ A3 A-MA3 D10 D10
P8
A4
P8
A4
P8
A4
P8
A4 P8 A-MA2 B_DDR3_A[2] B_DDR3_A[2]
P2
A5
P2
A5
P2
A5
P2
A5 A4 A-MA4 B10 B10
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8
DDR_EXT P2 A-MA3 B_DDR3_A[3] B_DDR3_A[3]
R2
A7
R2
A7
R2
A7
R2
A7 R1203 A5 A-MA5 E15 E15
T8
A8
T8
A8
T8
A8
T8
A8 L8 R8 A-MA4 B_DDR3_A[4] B_DDR3_A[4]
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2
ZQ A6 A-MA6 B11 B11
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9
240 R2 A-MA5 B_DDR3_A[5] B_DDR3_A[5]
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 +1.5V_DDR A7 A-MA7 F14 F14
N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 1% T8 A-MA6 B_DDR3_A[6] B_DDR3_A[6]
T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8
A8 A-MA8 C11 C11
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1 B2 R3 A-MA7 B_DDR3_A[7] B_DDR3_A[7]
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9
VDD_1 A9 A-MA9 D14 D14
DDR_EXT 10V C1203 D9 L7 A-MA8 B_DDR3_A[8] B_DDR3_A[8]
R1 R1 R1 R1
VDD_8 VDD_8 VDD_8 VDD_8 10uF A-MA10 A12 A12
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9
VDD_2 A10/AP
N8
BA1
N8
BA1
N8
BA1
N8
BA1 DDR_EXT C1204 0.1uF G7 R7 A-MA9 B_DDR3_A[9] B_DDR3_A[9]
M3
BA2
M3
BA2
M3
BA2
M3
BA2 VDD_3 A11 A-MA11 F16 F16
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
DDR_EXT C1205 0.1uF K2 N7 A-MA10 B_DDR3_A[10] B_DDR3_A[10]
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8
VDD_4 A12/BC A-MA12 D13 D13
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1
DDR_EXT C1206 0.1uF K8 T3 A-MA11 B_DDR3_A[11] B_DDR3_A[11]
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9
VDD_5 NC_7 A-MA13 D15 D15
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
DDR_EXT C1207 0.1uF N1 A-MA12 B_DDR3_A[12] B_DDR3_A[12]
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9
VDD_6 C12 C12
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1
DDR_EXT C1208 0.1uF N9 M7 A-MA13 B_DDR3_A[13] B_DDR3_A[13]
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2
VDD_7 NC_5 E13 E13
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9
DDR_EXT C1209 0.1uF R1 A-MA14 B_DDR3_A[14] B_DDR3_A[14]
L3
WE
L3
WE
L3
WE
L3
WE VDD_8
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
DDR_EXT C1210 0.1uF R9 M2
T2 J9 T2 J9 T2 J9 T2 J9
VDD_9 BA0 A-MBA0 A-MCK A9 A9

1%
DDR_EXT DDR_EXT
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2

R1207
NC_3
L1
NC_3
L1
NC_3
L1
NC_3
L1
DDR_EXT C1211 0.1uF N8 A-MBA0 B_DDR3_BA[0] B_DDR3_BA[0]
NC_4
L9
NC_4
L9
NC_4
L9
NC_4
L9
BA1 A-MBA1 D16 D16
F3 T7 F3 T7 F3 T7 F3 T7
C1212 0.1uF M3 A-MBA1 B_DDR3_BA[1] B_DDR3_BA[1]

56
G3
DQSL NC_6
G3
DQSL NC_6
G3
DQSL NC_6
G3
DQSL NC_6
DDR_EXT BA2 A-MBA2 DDR_EXT A10 A10
DQSL DQSL DQSL DQSL
A1 C1215 A-MBA2 B_DDR3_BA[2] B_DDR3_BA[2]
C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9
VDDQ_1
A8 J7

1%
B7 B3 B7 B3 B7 B3 B7 B3

R1208
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
VSS_3
E1
VSS_3
E1
VSS_3
E1
VSS_3
E1
VDDQ_2 CK 0.01uF C13 C13
E7
DML VSS_4
G8 E7
DML VSS_4
G8 E7
DML VSS_4
G8 E7
DML VSS_4
G8 C1 K7 50V A-MCK B_DDR3_MCLK B_DDR3_MCLK
B13 B13

56
D3 J2 D3 J2 D3 J2 D3 J2
DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 VDDQ_3 CK
VSS_6
J8
VSS_6
J8
VSS_6
J8
VSS_6
J8 C9 K9 A-MCKB B_DDR3_MCLKZ B_DDR3_MCLKZ
E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1
VDDQ_4 CKE A-MCKE E17 E17
F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 D2 A-MCKE B_DDR3_MCLKE B_DDR3_MCLKE
F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1
VDDQ_5 A-MCKB
F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9 E9 L2
H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1
VDDQ_6 CS A/B_DDR3_CS B8 B8
H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 F1 K1 A-MODT B_DDR3_ODT B_DDR3_ODT
G2
DQL6
G2
DQL6
G2
DQL6
G2
DQL6 VDDQ_7 ODT A-MODT C8 C8
H7
DQL7
H7
DQL7
H7
DQL7
H7
DQL7 H2 J3 A-MRASB B_DDR3_RASZ B_DDR3_RASZ
VSSQ_1
B1
VSSQ_1
B1
VSSQ_1
B1
VSSQ_1
B1
VDDQ_8 RAS A-MRASB +1.5V_DDR B9 B9
D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 H9 K3 A-MCASB B_DDR3_CASZ B_DDR3_CASZ
C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1
VDDQ_9 CAS A-MCASB DDR_EXT D11 D11
L3 A-MWEB

A-MDQSU
A-MDQSL
C8 D8 C8 D8 C8 D8 C8 D8
B_DDR3_WEZ B_DDR3_WEZ
A-MWEB R1206
DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4
C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2
WE
A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 J1
A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9
NC_1 10K F10 F10
B8 G1 B8 G1 B8 G1 B8 G1 J9 T2 A-MRESETB B_RESET B_RESET

A-MDQSUB
A-MDQSLB
DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8
A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9
NC_2 RESET A-MRESETB
L1
NC_3 D12 D12
L9 A/B_DDR3_CS B_DDR3_CS0 B_DDR3_CS0
NC_4
T7 F3
A-MA14 NC_6 DQSL A-MDQSL A19 A19
G3 B_DDR3_DQSL B_DDR3_DQSL
DQSL A-MDQSLB B18 B18
B_DDR3_DQSU B_DDR3_DQSU
A9 C7
VSS_1 DQSU A-MDQSU C16 C16
B3 B7 A-MDML B_DDR3_DQML B_DDR3_DQML
VSS_2 DQSU A-MDQSUB D21 D21
E1 A-MDMU B_DDR3_DQMU B_DDR3_DQMU
VSS_3
G8 E7
VSS_4 DML A-MDML C18 C18
J2 D3 B_DDR3_DQSBL B_DDR3_DQSBL
VSS_5 DMU A-MDMU C17 C17
J8 B_DDR3_DQSBU B_DDR3_DQSBU
VSS_6
M1 E3
VSS_7 DQL0 A-MDQL0 A20 A20
M9 F7 A-MDQL0 B_DDR3_DQL[0] B_DDR3_DQL[0]
VSS_8 DQL1 A-MDQL1 A16 A16
P1 F2 A-MDQL1 B_DDR3_DQL[1] B_DDR3_DQL[1]
VSS_9 DQL2 A-MDQL2 C19 C19
P9 F8 A-MDQL2 B_DDR3_DQL[2] B_DDR3_DQL[2]
VSS_10 DQL3 A-MDQL3 C15 C15
T1 H3 A-MDQL3 B_DDR3_DQL[3] B_DDR3_DQL[3]
VSS_11 DQL4 A-MDQL4 C20 C20
T9 H8 A-MDQL4 B_DDR3_DQL[4] B_DDR3_DQL[4]
VSS_12 DQL5 A-MDQL5 C14 C14
G2 A-MDQL5 B_DDR3_DQL[5] B_DDR3_DQL[5]
DQL6 A-MDQL6 B21 B21
H7 A-MDQL6 B_DDR3_DQL[6] B_DDR3_DQL[6]
DQL7 A-MDQL7 B15 B15
B1 A-MDQL7 B_DDR3_DQL[7] B_DDR3_DQL[7]
VSSQ_1 F18 F18
B9 D7 A-MDQU0 B_DDR3_DQU[0] B_DDR3_DQU[0]
VSSQ_2 DQU0 A-MDQU0 D19 D19
D1 C3 A-MDQU1 B_DDR3_DQU[1] B_DDR3_DQU[1]
VSSQ_3 DQU1 A-MDQU1 D17 D17
D8 C8 A-MDQU2 B_DDR3_DQU[2] B_DDR3_DQU[2]
VSSQ_4 DQU2 A-MDQU2 E21 E21
E2 C2 A-MDQU3 B_DDR3_DQU[3] B_DDR3_DQU[3]
VSSQ_5 DQU3 A-MDQU3 E19 E19
E8 A7 A-MDQU4 B_DDR3_DQU[4] B_DDR3_DQU[4]
VSSQ_6 DQU4 A-MDQU4 D20 D20
F9 A2 A-MDQU5 B_DDR3_DQU[5] B_DDR3_DQU[5]
VSSQ_7 DQU5 A-MDQU5 D18 D18
G1 B8 A-MDQU6 B_DDR3_DQU[6] B_DDR3_DQU[6]
VSSQ_8 DQU6 A-MDQU6 F20 F20
G9 A3 A-MDQU7 B_DDR3_DQU[7] B_DDR3_DQU[7]
VSSQ_9 DQU7 A-MDQU7
R1209
E9 E9
ZQ ZQ
240
1%

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_S7LR(M1A) 2013/05/20
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 1_DDR 12

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Serial Flash for SPI boot

+3.5V_ST +3.5V_ST

SPI_FLASH_MACRONIX
OPT IC1300
R1301
+3.5V_ST 4.7K MX25L8006EM2I-12G
C1300
CS# VCC 0.1uF
/SPI_CS 1 8
OPT
R1300
10K SO/SIO1 HOLD#
SPI_SDO 2 7

WP# SCLK
/FLASH_WP 3 6 SPI_SCK
R1302
GND SI/SIO0 33
4 5 SPI_SDI

SPI_FLASH_WINBOND
IC1300-*1
W25Q80BVSSIG

CS VCC
1 8

DO[IO1] HOLD[IO3]
2 7

%WP[IO2] CLK
3 6

GND DI[IO0]
4 5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_S7LR(M1A) 2013/04/29
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. S_FLASH 13

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
GLOBAL tuner block KR & AJ FE_TS_SYNC

FE_TS_VAL_ERR
FE_AGC_SPEED_CTL
IF_AGC_SEL

TUNER_RESET

RF_SWITCH_CTL
FE_TS_CLK

FE_TS_DATA[0]

TU_ATSC
TU1601 R1609 100
+3.3V_Normal
IF_AGC_MAIN +3.3V_TU
+3.3V_TU
TDJH-H101F should be guarded by ground
C1611 Size change,0929
0.1uF
16V L1600
UBW2012-121F
R1610-*1
1K
B1[+3.3V] TU_IIC_NON_ATSC_1K
C1602 C1603 C1605 C1607
1 +3.3V_TU 22uF 0.1uF 22uF 0.1uF
R1611-*1 6.3V 16V 6.3V 16V
1K
NC_1 C1615 C1616
TU_IIC_NON_ATSC_1K

2 100pF 0.1uF
50V 16V
CHANGE TO CHANGE TO
IF_AGC 6.3V 2012 X5R 6.3V 2012 X5R
3 close to the tuner pin, add,09029
R1610 R1611
1.8K 1.8K
TU_IIC_ATSC_1.8K TU_IIC_ATSC_1.8K
SCL
4 R1607 33
TU_SCL

SDA
5 R1608 33
TU_SDA
C1610 OPT OPT
IF[P] R1605 0
C1609
18pF
18pF
50V
C1613
20pF
C1614
20pF
6 IF_FILTER_AJ
R1605-*1 50V 50V 50V
IF_NON_FILTER_KR 10
IF[N] R1606 0
7 IF_FILTER_AJ
IF_NON_FILTER_KR R1606-*1
10
NC_2 C1601 Close to the tuner
R1612
82
8 0.1uF 16V TU_SIF
OPT
OPT
NC_3 close to TUNER R1613
0
9 TU_CVBS
OPT

IF_P_MSTAR
A1 B1
A1 B1
IF_N_MSTAR
47
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
SHIELD
TU_GND_A

Ground Width >= 24mils

GND seperation for ASIS tuner

TU_AJ_T/C
TU1601-*1
TDJH-G101D

B1[+3.3V]
1
NC_1
2
IF_AGC
3
SCL
4
SDA
5
IF[P]
6
IF[N]
7
NC_2
8
NC_3
9

A1 B1
A1 B1
47

SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 2013/06/05
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_KR_AJ 16

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
COMPONENT & AV1(COMMON), AV2
COMP_AV1/2_YG
JK1701
PPJ248-21

6C [RD3]E-LUG R1716
10K
AV2_R_IN
AV2
VA1706
5.6V R1700 C1701 R1718
AV2_LR_ZENER 470K 1000pF 12K

5C [RD3]O-SPRING AV2 50V


OPT
AV2

4C [RD3]CONTACT R1717
10K
AV2_L_IN
AV2

VA1704 R1701 C1702 R1719


5.6V 470K 1000pF 12K
AV2 5B [WH2]O-SPRING AV2_LR_ZENER AV2 50V
OPT
AV2

+3.3V_Normal

R1708
10K

4A [YL]CONTACT AV2

R1711 1K
AV2_CVBS_DET
AV2
VA1705
5.6V
OPT

5A [YL]O-SPRING
SC1/AV2_CVBS_IN
ZD1706-*1
COMP_AV1_YG ZD1706
AV2_CVBS_ZENER_ROHM
AV2
R1702
C1703
47pF
AV2_CVBS_ZENER_KEC
75 ZD1707-*1
JK1702 6A [YL]E-LUG ZD1707
AV2_CVBS_ZENER_ROHM
1608
1%
50V
AV2 AV2_CVBS_ZENER_KEC

PPJ245N2-01
Size Check !!!

6E [RD2]E-LUG 6H [RD2]E-LUG R1714


10K
COMP2_R_IN

VA1700
5.6V C1704 R1720
COMP_LR_ZENER R1703 1000pF

5E [RD2]O-SPRING 5H [RD2]O-SPRING 470K 50V


OPT
12K

R1715
10K
COMP2_L_IN

4E [RD2]CONTACT 4H [RD2]CONTACT VA1701


5.6V C1705 R1721
COMP_LR_ZENER R1704 1000pF
470K 50V 12K
OPT
+3.3V_Normal

5D [WH]O-SPRING 5G [WH1]O-SPRING R1709


10K

COMP2_DET

4C [RD1]CONTACT 4F [RD1]CONTACT VA1702


R1712
1K
5.6V
OPT

COMPONENT 5C [RD1]O-SPRING 5F [RD1]O-SPRING


COMP2_Pr+
& ZD1700
COMP_Pr_ZENER_ROHM
ZD1700-*1
COMP_Pr_ZENER_KEC
AV1 7C [RD1]E-LUG-S 7F [RD1]E-LUG-S ZD1701
COMP_Pr_ZENER_ROHM
R1705
75 ZD1701-*1
COMP_Pr_ZENER_KEC

5B [BL]O-SPRING 5E [BL]O-SPRING
COMP2_Pb+
ZD1702 ZD1702-*1
COMP_Pb_ZENER_ROHM COMP_Pb_ZENER_KEC
R1706

4A [GN/YL]CONTACT 4D [YL/GN]CONTACT ZD1703


COMP_Pb_ZENER_ROHM
75 ZD1703-*1
COMP_Pb_ZENER_KEC
+3.3V_Normal

R1710

5A [GN/YL]O-SPRING 5D [YL/GN]O-SPRING 10K

AV_CVBS_DET
R1713
1K
VA1703
5.6V

6A [GN/YL]E-LUG 6D [YL/GN]E-LUG OPT

COMP2_Y+/AV_CVBS_IN
ZD1704 ZD1704-*1
COMP_Y_ZENER_ROHM COMP_Y_ZENER_KEC
* One Ton Color Jack - Yellow/Green R1707
ZD1705 75 ZD1705-*1
COMP_Y_ZENER_ROHM 1608 COMP_Y_ZENER_KEC

JK1702-*1 JK1701-*1 1%
CVBS_OUT_TEST
PPJ248-01 R1724
PPJ245-01 COMP_AV1/2_G Size Check !!! 0
[RD3]E-LUG DTV/MNT_VOUT

CVBS_OUT_TEST
7C
COMP_AV1_G
[RD3]C-SPRING
7E [RD2]E-LUG 6C

4C [RD3]CONTACT R1723
75
6E [RD2]C-SPRING
5B [WH2]C-SPRING

4E [RD2]CONTACT 4A [YL]CONTACT

6A [YL]C-SPRING
5D [WH]C-SPRING
7A [YL]E-LUG

4C [RD1]CONTACT [RD2]E-LUG
7H

6H [RD2]C-SPRING
6C [RD1]C-SPRING
4H [RD2]CONTACT

8C [RD1]E-LUG-S
5G [WH1]C-SPRING

[RD1]CONTACT
5B [BL]C-SPRING 4F

6F [RD1]C-SPRING

4A [GN]CONTACT
8F [RD1]E-LUG-S

6A [GN]C-SPRING 5E [BL]C-SPRING

4D [GN]CONTACT
7A [GN]E-LUG
6D [GN]C-SPRING

7D [GN]E-LUG

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_S7LR(M1A) 2013.08.15
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_JACK_NON_EU 17

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Headphone
*Option : HEAD_PHONE_EU
Close to the Main IC
HEAD_PHONE
L3000
5.6uH HEAD_PHONE
HP_LOUT
HEAD_PHONE C3000 OPT C
C3004 HEAD_PHONE E
10uF C3002 R3002
4.7uF 16V 1000pF Q3002 B Q3004
1K MMBT3904(NXP)
10V 50V MMBT3904(NXP) B OPT HEAD_PHONE
OPT JK3000
+3.5V_ST E +3.3V_Normal
C KJA-PH-0-0177
GND 5
E
OPT OPT HEAD_PHONE
Q3001 R3005
10K L 4
OPT MMBT3906(NXP)
C R3001 B
R3000 3.3K
1K B C DETECT 3
SIDE_HP_MUTE HP_DET
Q3000 R3004
MMBT3904(NXP) 1K
OPT E HEAD_PHONE R 1

HEAD_PHONE
L3001 HEAD_PHONE
5.6uH
HP_ROUT
HEAD_PHONE C3001 OPT HEAD_PHONE C E
C3005 10uF C3003 R3003
4.7uF 16V 1000pF Q3003 B Q3005
1K MMBT3904(NXP) MMBT3904(NXP)
10V 50V B
OPT OPT
E C

Close to the Main IC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_M1A 2013.04.29
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HEAD_PHONE_EU 30

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
RS-232C 4PIN & MSTAR DEBUG 4PIN

RS-232C 4PIN

RS232C_DEBUG_4P
+3.5V_ST P4000
12507WS-04L

R4001
100 VCC
1
PM_TXD
R4000
100 PM_RXD
2
PM_RXD

GND
3

RM_TXD
4

GND

MSTAR DEBUG 4PIN

MSTAR_DEBUG_4P

P4001
JP_GND1

JP_GND2

JP_GND3

JP_GND4

12505WS-04A00

3 RGB_DDC_SCL

4 RGB_DDC_SDA

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_S7LR(M1A) 2013/04/30
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_MSTAR_DEBUG_4P 40

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
IR/LED + Digital Eye + Control

+3.5V_ST

R4603 R4604
10K 10K
1% 1%

R4601
100 P4600 OPT
KEY1
OPT 12507WR-10L P4601
C4602 12507WR-08L
0.1uF
16V
R4602 1
100 1
KEY2
OPT
C4603 2
0.1uF 2
+3.5V_ST 16V
3
L4600 3
BLM18PG121SN1D
4
4
R4606
+3.5V_ST C4600 C4601 1.8K
0.1uF 1000pF LED_R/BUZZ 5
16V 50V 5
VA4600
LED_R_Zener
R4600 6
3.3K 6

IR 7
C4604 7
VA4601
100pF IR_Zener
50V 8
8

9 9
+3.3V_Normal

10

Digital Eye Digital Eye Digital Eye 11


R4605 R4607 C4605
1K 1K 18pF
50V
R4608 100
SENSOR_SCL
Digital Eye

R4609 100
SENSOR_SDA
Digital Eye Digital Eye
C4606
18pF
50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 2013/09/03
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR_EYE_SENSOR 46

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
IC102
H27U1G8F2CTR-BC
NAND FLASH MEMORY +3.3V_Normal +3.3V_Normal

NC_1 NC_29
1 48 IC101
NAND_FLASH_1G_HYNIX
NC_2 NC_28 LGE2132(M1A_256M)
2 EAN35669103 47
NC_3 NC_27 PCM_A[0-7]
3 46 EEPROM CI_TS_CLK
22 <CHIP Config> (IC104)
M1A_256M
NC_4 NC_26 CI_TS_DATA[0-7]
4 45 AR101 Y1 V10
R106 NC_5 I/O7 PCM_A[7]
(SPI_SDI, PM_LED, PWM_PM) TUNER_RESET
W4
GPIO78 TS0CLK/GPIO92
T14 CI_TS_DATA[0] CI_TS_SYNC
R110 LG-NonOS SB51_ExtSPI 3’b000 51boot from SPI
1K 3.9K 5 44 5V_DET_HDMI_4 GPIO79 TS0DATA[0]/GPIO82 CI_TS_DATA[1] CI_TS_VAL
LG-OS HEMCU_ExtSPI 3’b001 MIPS boot from SPI T13
NC_6 I/O6 PCM_A[6] TS0DATA[1]/GPIO83 CI_TS_DATA[2]
AR103 6 43 R129 22 K17 U13
22
R/B I/O5 PCM_A[5]
I2C_SCL
J15
I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84 CI_TS_DATA[3] from CI SLOT
R128 22 V15
7 42 I2C_SDA I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85 CI_TS_DATA[4]
U8 U12
/F_RB RE I/O4 PCM_A[4] +3.5V_ST URSA/VCOM_SDA SDAM2/GPIO55 TS0DATA[4]/GPIO86 CI_TS_DATA[5]
8 41 T7 V13
/PF_OE URSA/VCOM_SCL SCKM2/GPIO56 TS0DATA[5]/GPIO87 CI_TS_DATA[6]
CE NC_25 U7 U14
9 40 DEMOD_SCL SENSOR_SCL SENSOR_SCL SCKM0/GPIO58 TS0DATA[6]/GPIO88
/PF_CE0 AUD_MASTER_CLK R123 V7 T11 CI_TS_DATA[7]
NC_7 NC_24 AUD_MASTER_CLK_0 DEMOD_SDA SENSOR_SDA SENSOR_SDA SDAM0/GPIO59 TS0DATA[7]/GPIO89
10 39 C102 56 R126 22 DVB_T2 F6 T12

4.7K
OPT DEMOD_SCL I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91 FE_TS_CLK

4.7K

2.7K
OPT NC_8 NC_23 10uF 10V G6 V12
R127 22 DVB_T2 FE_TS_DATA[0-7]
+3.3V_Normal R107 C101 11 38 C112 DEMOD_SDA I2S_IN_SD/GPIO160 TS0VALID/GPIO90
1K AA4 Y14

OPT

OPT
0.1uF VCC_1 VCC_2 100pF AMP_SCL TU_SCL FE_TS_SYNC
I2C_SCKM1/GPIO80 TS1CLK/GPIO103 FE_TS_DATA[0]
OPT 12 37 50V Y4 Y16

R115

R117

R121
AMP_SDA TU_SDA I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93 FE_TS_DATA[1] FE_TS_VAL_ERR
R104 VSS_1 VSS_2 C103 AA15
13 36 0.1uF
1K
J6
TS1DATA[1]/GPIO94
Y13 FE_TS_DATA[2] Internal demod out
NC_9 NC_22 AV_CVBS_DET ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95 FE_TS_DATA[3]
14 35 K6 AA16
AV2_CVBS_DET AV2_CVBS_DET EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96 FE_TS_DATA[4] FE_TS_DATA[0]
NC_10 NC_21 W12
15 34 TS1DATA[4]/GPIO97 FE_TS_DATA[0]
G7 AA13 FE_TS_DATA[5]
CLE NC_20 LED_R/BUZZ COMP2_DET I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98 FE_TS_DATA[6]
16 33 W14
AR102 TS1DATA[6]/GPIO99 FE_TS_DATA[7]
/PF_CE1 ALE I/O3 PCM_A[3] PM_LED J4 W13
17 32 DEMOD_RESET DEMOD_RESET ET_COL/GPIO60 TS1DATA[7]/GPIO100
PF_ALE J5 Y15
WE I/O2 PCM_A[2] SPI_SDI MODEL_OPT_0 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
/PF_WE 18 31 W15

4.7K

4.7K

2.7K
MODEL_OPT_1 TS1VALID/GPIO101
/PF_WP WP I/O1 PCM_A[1] H19
19 30 MODEL_OPT_2 LCK/GPIO194
G20

OPT
B3 R133 33
AR104 NC_11 I/O0 PCM_A[0] LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13 /SPI_CS
22 R105 20 29 /MHL_OCP_DET G19 A3R134 33

R116

R118

R122
R101 1K LHSYNC/GPIO196 PM_SPI_SCK/GPIO1 SPI_SCK
NC_12 NC_19 22 G21 A4
3.3K 21 28 FRC_RESET FRC_RESET LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0 SIDE_HP_MUTE
33 R125 C3
NC_13 NC_18 PM_SPI_SDI/GPIO2 SPI_SDI
22 27 J17 A2 R135 33
HP_DET UART2_RX/GPIO69 PM_SPI_SDO/GPIO3 SPI_SDO
NC_14 NC_17 J16
23 26 SC1/COMP1_DET UART2_TX/GPIO70 for SERIAL FLASH
E8 B1
NC_15 NC_16 MHL_OCP_EN UART3_TX/GPIO52 RP EPHY_RP EPHY_RP
24 25 D7 C2
AMP_RESET UART3_RX/GPIO53 TN EPHY_TN EPHY_TN
U6 C1
MODEL_OPT_4 GPIO46[CTS] TP EPHY_TP
V6 B2 EPHY_TP
RF_SWITCH_CTL GPIO47[RTS] RN EPHY_RN EPHY_RN
/CI_CD1 33 R124 K15
/CI_CD1 UART1_TX/GPIO48
L16 D2
/CI_CD2 /CI_CD2 UART1_RX/GPIO49 SPDIF_IN/GPIO161 5V_DET_HDMI_2
D1
R132 100 SPDIF_OUT
SPDIF_OUT/GPIO162 SPDIF_OUT
H5 SPDIF_OPTIC
USB1_CTL ET_TX_EN/GPIO63
K5 D8 5V_DET_HDMI_2
MODEL_OPT_5 ET_RXD[0]/GPIO65 HWRESET SOC_RESET
NAND_FLASH_1G_TOSHIBA NAND_FLASH_2G_TOSHIBA NAND_FLASH_1G_SS NAND_FLASH_4G_HYNIX K4 E5
MODEL_OPT_6 ET_MDC/GPIO66 IRIN/GPIO5 IR
EAN61508002 EAN60991002 EAN61857001 EAN61950603 H6 G4
USB1_OCD ET_MDIO/GPIO67 DDCA_CK/UART0_RX RGB_DDC_SCL
IC102-*3 IC102-*4 IC102-*5 IC102-*6 L5 G5
NAND_FLASH_2G_HYNIX_OLD
EAN60708702 TC58NVG0S3HTA00 TC58NVG1S3HTA00 K9F1G08U0D-SCB0 H27U4G8F2ETR-BC /CI_DET ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX RGB_DDC_SDA
IC102-*1 PCM_A[0-14]
H27U2G8F2CTR
PCM_A[0] U17 J18
IC101-*1
NC_1
1 48
NC_29
LGE2131(M1A_128M) PCM_A[1] PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71 PWM0
NC_2 NC_28
R18 K18
NC_3
2 47
NC_27
NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 PCM_A[2] PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72 PWM1
3 46 1 48 1 48 1 48 1 48 M1A_128M V17 K16
NC_4
4 45
NC_26 Y1
GPIO78 TS0CLK/GPIO92
V10
PCM_A[3] PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73 PWM2
NC_5
5 44
I/O7 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 W4
GPIO79 TS0DATA[0]/GPIO82
T14 R16 L18
NC_6
6 43
I/O6 2 47 2 47 2 47 2 47 TS0DATA[1]/GPIO83
T13
PCM_A[4] PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74 PWM3
R/B I/O5
K17
I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84
U13 U16 L17
RE
7 42
I/O4
NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 J15
I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85
V15
PCM_A[5] PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75 PCM_5V_CTL
8 41 3 46 3 46 3 46 3 46 U8
SDAM2/GPIO55 TS0DATA[4]/GPIO86
U12 T17
T7 V13
CE
9 40
NC_25
SCKM2/GPIO56 TS0DATA[5]/GPIO87 PCM_A[6] PCMADR[5]/NF_AD[5]/GPIO106
NC_7 NC_24 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 U7
SCKM0/GPIO58 TS0DATA[6]/GPIO88
U14 W18 T8
10 39
4 45 4 45 4 45 4 45 V7 T11
PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146 PF_ALE +3.3V_Normal
NC_8
11 38
NC_23
F6
SDAM0/GPIO59 TS0DATA[7]/GPIO89
T12 PCM_A[7] U20 T9
VCC_1 VCC_2 I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91
VSS_1
12 37
VSS_2
NC_5 I/O8 NC_5 I/O8 NC_5 I/O7 NC_5 I/O7 G6
I2S_IN_SD/GPIO160 TS0VALID/GPIO90
V12
PCM_A[8] PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142 /PF_CE0 L101
13 36 5 44 5 44 5 44 5 44 AA4
I2C_SCKM1/GPIO80 TS1CLK/GPIO103
Y14 Y19 U9 BLM18PG121SN1D
NC_9
14 35
NC_22 Y4
I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93
Y16
PCM_A[9] PCMADR[8]/GPIO113 NF_CLE/GPIO141 /PF_CE1 HALF_NIM/EU_NON_T2
NC_10
15 34
NC_21 NC_6 I/O7 NC_6 I/O7 NC_6 I/O6 NC_6 I/O6 TS1DATA[1]/GPIO94
AA15 AA19 U11
CLE
16 33
NC_20 6 43 6 43 6 43 6 43 J6
ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95
Y13
PCM_A[10] PCMADR[9]/GPIO115 NF_RBZ/GPIO147 /F_RB
ALE I/O3
K6
EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96
AA16 AA20 V9
WE
17 32
I/O2
RY/BY I/O6 RY/BY I/O6 R/B I/O5 R/B I/O5 TS1DATA[4]/GPIO97
W12
PCM_A[11] PCMADR[10]/GPIO119 NF_REZ/GPIO144 /PF_OE HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2
18 31 7 42 7 42 7 42 7 42 G7
I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
AA13 W21 U10 C119
WP
19 30
I/O1
TS1DATA[6]/GPIO99
W14
PCM_A[12] PCMADR[11]/GPIO117 NF_WEZ/GPIO145 /PF_WE R137 0.1uF
NC_11
20 29
I/O0 RE I/O5 RE I/O5 RE I/O4 RE I/O4 J4
ET_COL/GPIO60 TS1DATA[7]/GPIO100
W13 V20 T10 10K
NC_12
21 28
NC_19 8 41 8 41 8 41 8 41 J5
ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
Y15
PCM_A[13] PCMADR[12]/GPIO109 NF_WPZ/GPIO199 /PF_WP
NC_13 NC_18 TS1VALID/GPIO101
W15 Y17 R140
NC_14
22 27
NC_17
CE NC_25 CE NC_25 CE NC_25 CE NC_25 H19
LCK/GPIO194 PCM_A[14] PCMADR[13]/GPIO112 0
23 26 9 40 9 40 9 40 9 40 G20
LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13
B3
/PCM_CD V18 W2
NC_15
24 25
NC_16 G19
LHSYNC/GPIO196 PM_SPI_SCK/GPIO1
A3
/PCM_CE PCMADR[14]/GPIO111 IF_AGC IF_AGC_MAIN
NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 G21
LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0
A4 V19 W1 HALF_NIM/EU_NON_T2
10 39 10 39 10 39 10 39 PM_SPI_SDI/GPIO2
C3 PCM_D[0-7] PCMCD_N/GPIO135 SIFM
J17
UART2_RX/GPIO69 PM_SPI_SDO/GPIO3
A2 W19 W3 C120
NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 J16
UART2_TX/GPIO70 PCMCE_N/GPIO120 SIFP 0.047uF
11 38 11 38 11 38 11 38 E8
UART3_TX/GPIO52 RP
B1 PCM_D[0] U18 V2
D7
UART3_RX/GPIO53 TN
C2
PCMDATA[0]/GPIO131 IM 25V
VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 U6
GPIO46[CTS] TP
C1 PCM_D[1] V16 V1 HALF_NIM/EU_NON_T2
12 37 12 37 12 37 12 37 V6
GPIO47[RTS] RN
B2
PCMDATA[1]/GPIO132 IP
K15
UART1_TX/GPIO48 PCM_D[2] W17
VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 L16
UART1_RX/GPIO49 SPDIF_IN/GPIO161
D2
PCMDATA[2]/GPIO133
13 36 13 36 13 36 13 36 SPDIF_OUT/GPIO162
D1 PCM_D[3] Y20 AA2
H5
ET_TX_EN/GPIO63 PCMDATA[3]/GPIO125 XIN
NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 K5
ET_RXD[0]/GPIO65 HWRESET
D8 PCM_D[4] R15 Y2 C115 0.1uF R141 47
14 35 14 35 14 35 14 35 K4
ET_MDC/GPIO66 IRIN/GPIO5
E5
PCMDATA[4]/GPIO124 XOUT
NAND_FLASH_2G_HYNIX_NEW
H6
ET_MDIO/GPIO67 DDCA_CK/UART0_RX
G4 PCM_D[5] AA18 C116 0.1uF R142 47
EAN60708703
IC102-*2
NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 L5
ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX
G5
PCMDATA[5]/GPIO123
H27U2G8F2DTR-BD 15 34 15 34 15 34 15 34 PCM_D[6] T15 C123
U17
PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71
J18
PCMDATA[6]/GPIO122 1000pF
NC_1
1 48
NC_29 CLE NC_20 CLE NC_20 CLE NC_20 CLE NC_20 R18
PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72
K18
PCM_D[7] Y21 ANALOG SIF OPT
NC_2 NC_28
16 33 16 33 16 33 16 33 V17
PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73
K16
PCMDATA[7]/GPIO121
NC_3
2 47
NC_27
R16
PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74
L18 W20 Close to MSTAR TU_SIF
3 46 ALE I/O4 ALE I/O4 ALE I/O3 ALE I/O3 U16
PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75
L17
/PCM_IORD PCMIORD_N/GPIO116
NC_4
4 45
NC_26
17 32 17 32 17 32 17 32 T17
PCMADR[5]/NF_AD[5]/GPIO106 V21
NC_5
5 44
I/O7 W18
PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146
T8
/PCM_IOWR PCMIOWR_N/GPIO114
NC_6
6 43
I/O6 WE I/O3 WE I/O3 WE I/O2 WE I/O2 U20
PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142
T9 Y18
R/B I/O5
18 31 18 31 18 31 18 31 Y19
PCMADR[8]/GPIO113 NF_CLE/GPIO141
U9
/PCM_IRQA PCMIRQA_N/GPIO110 Close to MSTAR
RE
7 42
I/O4
AA19
PCMADR[9]/GPIO115 NF_RBZ/GPIO147
U11 T16
8 41 WP I/O2 WP I/O2 WP I/O1 WP I/O1 AA20
PCMADR[10]/GPIO119 NF_REZ/GPIO144
V9
/PCM_OE PCMOE_N/GPIO118 HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2
CE
9 40
NC_25
19 30 19 30 19 30 19 30 W21
PCMADR[11]/GPIO117 NF_WEZ/GPIO145
U10 R17 IF_N_MSTAR
NC_7
10 39
NC_24 V20
PCMADR[12]/GPIO109 NF_WPZ/GPIO199
T10
/PCM_REG PCMREG_N/GPIO128 0 0.1uF C121
NC_8 NC_23 NC_11 I/O1 NC_11 I/O1 NC_11 I/O0 NC_11 I/O0 Y17 T18 R138 C117
11 38
20 29 20 29 20 29 20 29
PCMADR[13]/GPIO112
OPT
VCC_1
12 37
VCC_2
V18
V19
PCMADR[14]/GPIO111 IF_AGC
W2
W1
PCM_RST
W16
PCM_RESET/GPIO134
100pF DTV_IF
VSS_1 VSS_2 PCMCD_N/GPIO135 SIFM
13 36 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 W19
PCMCE_N/GPIO120 SIFP
W3
/PCM_WAIT PCMWAIT_N/GPIO105
NC_9
14 35
NC_22
21 28 21 28 21 28 21 28 U18
PCMDATA[0]/GPIO131 IM
V2 U15 HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2
NC_10
15 34
NC_21 V16
PCMDATA[1]/GPIO132 IP
V1
/PCM_WE PCMWE_N/GPIO198 IF_P_MSTAR
CLE
16 33
NC_20 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 W17
PCMDATA[2]/GPIO133 0 0.1uF IF_FILTER_AJ/CSA
ALE I/O3
22 27 22 27 22 27 22 27 Y20
PCMDATA[3]/GPIO125 XIN
AA2
R139 C118 C122
WE
17 32
I/O2
R15
PCMDATA[4]/GPIO124 XOUT
Y2
33pF IF_FILTER_AJ/CSA
18 31 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 AA18
PCMDATA[5]/GPIO123 C124
WP
19 30
I/O1
23 26 23 26 23 26 23 26 T15
PCMDATA[6]/GPIO122 33pF
NC_11 I/O0 Y21
20 29 PCMDATA[7]/GPIO121
NC_12
21 28
NC_19 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 W20
PCMIORD_N/GPIO116
NC_13 NC_18
24 25 24 25 24 25 24 25 V21
PCMIOWR_N/GPIO114 XTAL_LOAD_15pF
22 27 Y18
NC_14
23 26
NC_17 T16
PCMIRQA_N/GPIO110 C113 15pF
PCMOE_N/GPIO118
NC_15 NC_16 R17
24 25 PCMREG_N/GPIO128
T18

R136
W16
PCM_RESET/GPIO134 X101 XTAL_LOAD_18pF XTAL_LOAD_22pF XTAL_LOAD_27pF

1M
PCMWAIT_N/GPIO105
U15
PCMWE_N/GPIO198 24MHz C114 15pF C113-*1 18pF C113-*2 22pF C113-*3 27pF

XTAL_LOAD_15pF XTAL_LOAD_18pF XTAL_LOAD_22pF XTAL_LOAD_27pF


C114-*1 18pF C114-*2 22pF C114-*3 27pF

DIMMING I2C XTAL_LOAD_30pF


+3.3V_Normal PM MODEL OPTION PM_MODEL_OPT_0 C113-*4 30pF
- HIGH : LCD
+3.5V_ST
- LOW :: PDP IC101 XTAL_LOAD_30pF
LGE2132(M1A_256M) C114-*4 30pF
R103 100 IC101-*1
PWM_DIM PWM2 LGE2131(M1A_128M)

R102 10K R111 R112 R113 R114 M1A_256M U19


M1A_128M
D5
PWM0 1K 1K 2.2K 2.2K U19 D5 T20
LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35
F8
R119 RXA4+
LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36
10K LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35 KEY1 T21
LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37
E7

LCD T20 F8 T19


LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38
E6
R143 10K RXA4- LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36 KEY2 R21
LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39
D6
PWM3 T21 E7 R20
LVACKM/TTL_B[5]/GCLK/GPIO175
AMP_SDA PM_MODEL_OPT_0 RXA3+ LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37 PM_MODEL_OPT_0 R19
LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20
W10
T19 E6 P20
LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21
Y10

AMP_SCL RXA3- LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38 PANEL_CTL PM_LED/GPIO4


P3
R21 D6 P19
LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7
Y3
RXACK+ LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39 SCART1_MUTE N20
LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17
Y5

I2C_SDA R20 N21


LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22
W11
RXACK- LVACKM/TTL_B[5]/GCLK/GPIO175 N19
LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11
D3

I2C_SCL R120 R19 W10 M21


LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14
AA3
10K RXA2+ LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20 MHL_CD_SENSE M20
LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15
W5
PDP P20 Y10 M19
LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200
D4
RXA2- LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21 /VBUS_EN L20
LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
L15
P3 PM_UART_RX/GPIO_PM[5]/GPIO12
Y11

PM_LED/GPIO4 PM_LED L19


LVBCKP/TTL_R[0]/EPI4+/GPIO186
P19 Y3 K20
LVBCKM/TTL_R[1]/EPI4-/GPIO187
RXA1+ LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7 POWER_DET K21
LVB2P/TTL_R[2]/EPI5+/GPIO188
N20 Y5 K19
LVB2M/TTL_R[3]/EPI5-/GPIO189
RXA1- LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17 AMP_MUTE J21
LVB1P/TTL_R[4]/EPI6+/GPIO190
N21 W11 J20
LVB1M/TTL_R[5]/EPI6-/GPIO191
RXA0+ LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22 INV_CTL J19
LVB0P/TTL_R[6]/EPI7+/GPIO192
N19 D3 H20
LVB0M/TTL_R[7]/EPI7-/GPIO193
RXA0- LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11 POWER_ON/OFF_1
EEPROM M21 AA3
+3.3V_Normal RXB4+ LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14 RL_ON
M20 W5
RXB4- LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15 /FLASH_WP
M19 D4
RXB3+ LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200 LED_R/BUZZ
L20 L15
RXB3- LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8 PM_TXD
Y11
NVRAM_ST NVRAM_RENESAS NVRAM_ATMEL NVRAM_ROHM L19
PM_UART_RX/GPIO_PM[5]/GPIO12 PM_RXD
C105
IC104 IC104-*1 RXBCK+ LVBCKP/TTL_R[0]/EPI4+/GPIO186
0.1uF IC104-*2 IC104-*3 K20
M24256-BRMN6TP RXBCK- LVBCKM/TTL_R[1]/EPI4-/GPIO187
R1EX24256BSAS0A AT24C256C-SSHL-T BR24G256FJ-3 K21
RXB2+ LVB2P/TTL_R[2]/EPI5+/GPIO188
K19
E0 VCC RXB2- LVB2M/TTL_R[3]/EPI5-/GPIO189
1 8 A0 VCC A0 VCC A0 VCC J21
1 8 1 8 1 8 RXB1+ LVB1P/TTL_R[4]/EPI6+/GPIO190
J20
E1 WC RXB1- LVB1M/TTL_R[5]/EPI6-/GPIO191
2 7 A1 WP A1 WP A1 WP J19
2 7 2 7 2 7 RXB0+
A0’h H20
LVB0P/TTL_R[6]/EPI7+/GPIO192
E2 SCL RXB0- LVB0M/TTL_R[7]/EPI7-/GPIO193
3 6 R108 22 I2C_SCL A2 SCL A2 SCL A2 SCL
3 6 3 6 3 6

VSS SDA
4 5 R109 22 VSS SDA GND SDA GND SDA
I2C_SDA 4 5 4 5 4 5
C104 C106
8pF 8pF
EAN61548301 OPT OPT
EAN62389501 EAN61133501 EAN62389502

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_L14 2013/09/16
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1_NON_EU 51

Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
MODEL OPTION ("MO")
+3.3V_Normal PIN NAME PIN NO. LOW HIGH +1.10V_VDDC
MODEL OPTION
VDDC 1.05V +1.10V_VDDC

MODEL_OPT_0 J5 MO_FHD MO_HD VDDC : 2026mA


MO_DVB_T2/C/S2
MO_DUALSTREAM

MO_S/W_EU/AJ
DDR_EXT:256

DDR_EXT:128
1K

1K

1K

1K

1K

1K

1K
1K

MO_S/W_AJ MODEL_OPT_1 H19 MO_S/W_AJ

0.1uF
MO_S/W_NON_AJ
MO_M120

MO_HD

10V

10V

1uF

1uF
MODEL_OPT_2 G20 MO_DVB_T/C MO_DVB_T2/C/S2

C237
R212

R214

R216

R218

R219

R221

R224

C235
R210

G19

10uF

10uF
MODEL_OPT_3 MO_M120_NON MO_M120

C240

C244

C247
IF_AGC_SEL
R205 OPT 100
MODEL_OPT_0
MODEL_OPT_4 U6 DDR_EXT:256 or NON DDR_EXT : 128
R206 OPT100
MODEL_OPT_1
R207 OPT100 MODEL_OPT_5 K5 MO_S/W_TW MO_S/W_EU/AJ
MODEL_OPT_2
AUD_LRCH MODEL_OPT_6 K4 DDR_EXT:128 or NON
R201 OPT 100 DDR_EXT : 256
MODEL_OPT_4
R202 OPT 100 MODEL_OPT_5 MODEL_OPT_7 L5 MO_DUALSTREAM_NON MO_DUALSTREAM
R203 OPT 100 MODEL_OPT_6
DDR_EXT:128 or NON

DDR_EXT:256 or NON

AUD_LRCK * Dual Stream is only Korea 3D spec


M1A_256M
MO_DUALSTREAM_NON

MO_S/W_NON_AJ

Normal Power 3.3V IC101


1K
MO_M120_NON
1K
1K

1K
1K

1K

1K

1K
MO_DVB_T/C

Memory OPTION
MO_S/W_TW

+3.3V_Normal VDD33 LGE2132(M1A_256M)


MO_FHD
R222

Memory Auto L204


R211
R209

R217
R213

R215

R220

R223

MODEL_OPT_4 MODEL_OPT_6 BLM18PG121SN1D R4 U3


INT+EXT Det AVDD_AU33 AVDD_AU33 AUVRM AUVRM

0.1uF
0.1uF

0.1uF
L11 A6

0.1uF

0.1uF
AVDD_DDR0_CLK GND_1

10uF

C236 10uF
L13 A13

10V

10V
128M Only 0 0 0 AVDD_DDR1_CLK GND_2
M11 A15
AVDD_DDR0_CMD GND_3
K13 A18

C233

C241
C238

C245
AVDD_DDR1_CMD GND_4

C231

C232
256M Only 1 0 0 +1.5V_DDR C5 B12
AVDD_DDR0_D_1 GND_5
K12 B14
AVDD_DDR0_D_2 GND_6
0 1 L12 B16
128M+128M 0 AVDD_DDR0_D_3 GND_7
C6 B17
AVDD_DDR1_D_1 GND_8
K14 B19
128M+256M 0 0 1 AVDD_DDR1_D_2 GND_9
L14 B20
AVDD_DDR1_D_3 GND_10
B5 C9
M1A_128M
256M+256M 1 0 1 AVDD_DRAM_1 GND_11
B6 C10
AVDD_DRAM_2 GND_12
R8 C21
IC101-*1 AVDD_NODIE AVDD_DVI_USB_MPLL_1 GND_13
R9 D9
LGE2131(M1A_128M) AVDD_DVI_USB_MPLL_2 GND_14
L7 E20
VDD33 AVDD_MOD_1 GND_15
L8 F9
AVDD_MOD_2 GND_16
P8 F11
AVDD_NODIE AVDD_NODIE GND_17
M4 T6 K9 F13
ARC0 CVBSOUT1 VDD33 AVDD_PLL GND_18
W7 V5 R5 F15
RXC0N CVBS0 AVDD_DMPLL AVDD3P3_DMPLL GND_19
Y8 U5 P11 F17
RXC0P CVBS1 +1.10V_VDDC
W8 T5 AVDDL_MOD GND_20
RXC1N C7 F19
CVBS2 +1.10V_VDDC DVDD_DDR_1 GND_21
Y9 V4 M13 F21
RXC1P VCOM DVDD_DDR_2 GND_22
AA9 1uFC250 R6 G8
RXC2N DVDD_NODIE GND_23
W9 E4 A7 G9
RXC2P I2S_OUT_BCK/GPIO165 DVDD_RX_1_1 GND_24
AA7 F4
Y7
RXCCKN I2S_OUT_MCK/GPIO163
F7
Normal 2.5V M12
B7
DVDD_RX_1_2 GND_25
G10
G11
RXCCKP I2S_OUT_SD/GPIO166 DVDD_RX_2_1 GND_26
N2 F5 M14 G12
CEC/GPIO6 I2S_OUT_WS/GPIO164 DVDD_RX_2_2 GND_27
E3
E2
DDCDA_CK/GPIO27
DDCDA_DA/GPIO28 USB0_DM
C4 ฀ 2.5V embedded
M1A +1.10V_VDDC
N11
N12
VDDC_1 GND_28
G13
G14
W6 Y12 VDDC_2 GND_29
DDCDC_CK/GPIO31 N13 G15
USB1_DM VDDC_3 GND_30
AA6 B4 N14 G16
DDCDC_DA/GPIO32 USB0_DP VDDC_4 GND_31
L4 AA12 N15 G17
HOTPLUGA/GPIO23 USB1_DP VDDC_5 GND_32
Y6 P12 G18
HOTPLUGC/GPIO25 VDDC_6 GND_33
F1 J2 P13 H7
RXA0N BIN0M VDDC_7 GND_34
G3 J3 P14 H8
RXA0P BIN0P VDDC_8 GND_35
G1 K3 L9 H9
RXA1N GIN0M VDD33 VDDP GND_36
G2 J1 H10
RXA1P GIN0P GND_37
H3 K2 AA10 H11
RXA2N RIN0M AVDD5V_MHL AVDD5V_MHL GND_38
H2 K1 H12
RXA2P RIN0P
F3
RXACKN HSYNC0
M6 DDR3 1.5V GND_39
GND_40
H13
F2 L6 M1A_128M H14
RXACKP VSYNC0 GND_41
IC101-*1
LGE2131(M1A_128M) H15
U4 L2 GND_42
EAR_OUTL H16
BIN1M GND_43
T4 L3 U3 R4 H17
EAR_OUTR BIN1P