Bu3A System Diagram: AMD Congo

1 2 3 4 5 6 7 8
3&%67$&.83
LAYER 1 : TOP
BU3A SYSTEM DIAGRAM 01
LAYER 2 : SGND DDRII-SODIMM1 DDRII 667/800 MHz
AMD Lion CPU THERMAL
A LAYER 3 : IN1 PAGE 8 Sabie SENSOR A
Congo 14.318MHz
LAYER 4 : SVCC ASB1 Processor PAGE 6
DDRII-SODIMM2 DDRII 667/800 MHz
812 FCBGA 27x27
LAYER 5 : IN2 CPU_CLK
PAGE 8 PAGE 4,5,6,7
LAYER 6 : IN3 NBGFX_CLK CLOCK GEN
NBGPP_CLK ICS9LPRS480AKLFT
LAYER 7 : SGND1 SBLINK_CLK SLG8SP628VTR
16*16 HT LINK
LAYER 8 : BOT RTM880N-795
PAGE 3
HDMI
PCI-E SBSRC_CLK
PAGE 18

NORTH BRIDGE
CRT
Atheros RS780M PAGE 17
PCIE-LAN Mini PCI-E Card Mini PCI-E Card
B
21mm X 21mm, 528pin BGA B
AR8132 (Wireless LAN) (3G Card) LVDS
(10/100/LAN)
PAGE 17
PAGE 23 PAGE 20 PAGE 20
PAGE 9,10,11
Side Port Memory
DDR2 64M*16
RJ45 Board PCIE X4 PAGE 9
3G SIM Card Wi-Fi Mini PCI-E Card x1
3G Mini PCI-E Card x1
PAGE 20
6
SATA USB2.0 7,8
SATA - HDD SOUTH BRIDGE
SYSTEM CHARGER(ISL88731)
PAGE 19 0,1 3 5 10 11 9
PAGE 24 SB710 USB2.0 Ports USB2.0 Ports 11.6"Card CCD Bluetooth
SATA Sleep charge Reader Conn 13.3"Card Reader
SATA - ODD 21mm X 21mm, 528pin BGA X2 PAGE 21 PAGE 17 Conn PAGE 21
PAGE 19 4.5W(Ext) X1 PAGE 18 PAGE 18 PAGE 21
C
SYSTEM POWER ISL6237IRZA-T C
4.3W(Int)
Azalia
PAGE 29
PAGE 12,13,14,15,16 RT5159 RT5159
CPU CORE OZ828

PAGE 28 G-Sensor
SMBUS
PAGE 19 LPC Azalia Conn
+1.2V(UP6111AQDD) Keyboard PAGE 21 PAGE 21

PAGE 28 WINBOND KBC
WPCE775L
+NB_CORE 1.0V(UP6111AQDD)
Touch Pad PAGE 21 CONEXANT
Kill SW PAGE 21 CX20582
PAGE 27
PAGE 22
D
DDR II SMDDR_VTERM D
1.8V/1.8VSUS(TPS51116REGR) Earphone External MIC Speaker
PAGE 26
FAN FLASH
DISCHARGE +1.5/+1.2V_S5/2.5V/1.1V
SPI 8Mbit 352-(&7%8
PAGE 6 PAGE 22 4XDQWD&RPSXWHU,QF
PAGE 30
Size Document Number Rev
Custom 1B
BLOCK DIAGRAM
1%
Date: Sunday, May 31, 2009 Sheet 1 of 32
1 2 3 4 5 6 7 8
5 4 3 2 1
INDEX
PAGE# DESCRIPTION NOTE
AC IN
Power Sequence
02
1 SCHEMATIC BLOCK DIAGRAM
3V/5VPCU
2 SYSTEM INFORMATION
D
RS780 SM BUS D
3 CLOCK GENERATOR_SLG8SP628 NBSWON#
4 K8G BGA HT I/F 1/4

DNBSWON# RS780 I2C (S0) I2C and AUX Function Define
5 K8G BGA DDR2 MEMORY I/F 2/4
DAC_SCL
S5_ON/S5 CRT (+5V)
6 K8G BGA CTRL & DEBUG 3/4 DAC_SDA
I2C_CLK
7 K8G BGA PWR & GND 4/4 RSMRST# LVDS (+3V)
I2C_DATA
8 DDR2 SODIMMS: A/B CHANNEL DDC_CLK0/AUX0N
HDMI (+5V)
PCIE_WAKE# DDC_DATA1/AUX0P
9 RS780-HT LINK/PCIE/MEM I/F 1/4
DDC_CLK1/AUX1N
10 RS780-SYSTEM/STRAPS I/F 3/5 SUSC not used
DDC_DATA1/AUX1P
11 RS780-POWER/GND 3/3
SUSB
12 SB710-PCIE/PCI/CPU/LPC 1/4
C C
SUSON
13 SB710-ACPI/GPIO/USB 2/4 SB710 SM BUS
14 SB710-ACPI/GPIO/USB 2/4 MAINON SB710 SMBUS SMBUS Function Define
15 SB710-PWR/DECOUPLING 4/4
VR_ON SMBCLK0
DDR / DDR THER / CLOCK GEN
16 SB710-STRAPS & PWRGD SMBDAT0
CPU_CORE
17 LCD/CCD/CRT(O) (+3V)
18 HDMI IC VRM_PWRGD SMBCLK1

LAN IC//WI-FI
SMBDAT1
19 HDD/ODD/G-SENSOR(O)
1.2_ON (+3V_S5)
20 MINI Card (Wi-Fi and 3G)
SMBCLK2
NB_CORE
21 KB/TP/PB/LEB/CONN/HOLE/ EMI SMBDAT2 3G mini card
(+3V_S5)
22 EC WPCE775L HWPG
B B
23 Atheros Lan
ECPWROK
24 CHARGER (ISL88731)
KBC(EC) SM BUS
SB_PWRGD_IN
25 CPU Core ( OZ828)
KBC SMBUS SMBUS Function Define
26 DDR 1.8V(TPS51116REGR) NB_PWRGD_IN (+3VPCU)
MBCLK
27 NB_CORE 1.1V(UP6111AQDD) BATTERY (+3VPCU)
CPU CLK IN MBDAT
28 +1.2V(UP6111AQDD)
CPU RESET 2ND_MBCLK CPU THER SENSOR(+3V)
29 SYSTEM 5V/3V (ISL6237)
2ND_MBDATA EC EEPROM (+3VPCU)
30 DISCHARGE/+1.5V/+1.2V_S5/+2.5V/+1.1V CPU POWER OK
3ND_MBCLK
31 Change List G-SENSOR(+3VS5)
CPU_LDTSTOP# 3ND_MBDATA
A A
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
SYSTEM INFORMATION
1%
Date: Tuesday, June 30, 2009 Sheet 2 of 32
5 4 3 2 1
5 4 3 2 1
CLK_GEN_SLG8SP628
+3V +1.2V +1.2V_CLK_VDDIO
03
+3V_CLK_VDD
3.3V(250mA) 1.2V(53mA)
L31 BLM18EG601SN1D_6 L28 BLM18AG601SN1D_6
C412 C233 C197 C198 C196 C221 C408 C276 C396 C195 C199 C224 C401 C274
D 22u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 22u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 D
,&6/356 31$/356 Clock chip has internal serial terminations

for differencial pairs, external resistors are
6/*63 31$/63 reserved for debug purpose.
5701 31$/
Place within 0.5"
of CLKGEN R95
U11
*261/F_4
4 50 CPUCLKP_R RP33 1 2 0_4P2R_4
+3V_CLK_VDD VDDDOT CPUK8_0T CPU_CLKP {6}
16 49 CPUCLKN_R 3 4 To CPU Diff 200MHz
VDDSRC CPUK8_0C CPU_CLKN {6}
26
VDDATIG
35
VDDSB_SRC NBGFX_CLKP_R RP34
40 30 1 2 0_4P2R_4 NBGFX_CLKP {10}
VDDSATA ATIG0T NBGFX_CLKN_R To NB Diff 100MHz
48 29 3 4 NBGFX_CLKN {10}
+3V +3V_CLK_48 VDDCPU ATIG0C
55 28
VDDHTT ATIG1T
L16 BLM18AG601SN1D_6
3.3V(53mA) 56
VDDREF ATIG1C
27
63
VDD48
C273 37 SBLINK_CLKP_R RP31 1 2 0_4P2R_4
C SB_SRC0T SB_REFCLKP {10} C
11 36 SBLINK_CLKN_R 3 4 To NB Diff 100MHz
+1.2V_CLK_VDDIO VDDSRC_IO0 SB_SRC0C SB_REFCLKN {10}
2.2u/6.3V_6 17 32 SBSRC_CLKP_R RP32 1 2 0_4P2R_4
VDDSRC_IO1 SB_SRC1T SBSRC_CLKP {12}
25 31 SBSRC_CLKN_R 3 4 To SB Diff 100MHz
VDDATIG_IO SB_SRC1C SBSRC_CLKN {12}
34
VDDSB_SRC_IO
47
VDDCPU_IO NBGPP_CLKP_R
22 T30
SRC0T NBGPP_CLKN_R
21 T31
SRC0C CLK_PCIE_NEW_R
1 20 T85
GND48 SRC1T CLK_PCIE_NEW#_R
7 19 T86
GNDDOT SRC1C CLK_PCIE_MINI_R RP36
10 15 1 2 0_4P2R_4 CLK_PCIE_MINI {20}
GNDSRC0 SRC2T CLK_PCIE_MINI#_R To Mini PCIE Slot (Wi-Fi)
18 14 3 4 CLK_PCIE_MINI# {20}
GNDSRC1 SRC2C CLK_PCIE_MINI2_R RP71
24 QFN64 13 1 2 3G@0_4P2R_4 CLK_PCIE_MINI2 {20}
GNDATIG SRC3T CLK_PCIE_MINI2#_R To Mini PCIE Slot (3G)
33 12 3 4 CLK_PCIE_MINI2# {20}
GNDSB_SRC SRC3C CLK_PCIE_LAN_R RP37
43 9 1 2 0_4P2R_4 CLK_PCIE_LAN {23}
GNDSATA SRC4T CLK_PCIE_LAN#_R To LAN Controller
46 8 3 4 CLK_PCIE_LAN# {23}
C249 GNDCPU SRC4C
52
CG_XIN GNDHTT
60
GNDREF
42 T18
SRC6T/SATAT
2
33p/50V_4 41 T19
Y3 CG_XIN SRC6C/SATAC
61 6 T36
14.318MHZ CG_XOUT X1 SRC7T/27M_SS
62 5 T37
C257 X2 SRC7C/27M_NS
1
CG_XOUT
2 54 NBHT_REFCLKP_R RP35 1 2 0_4P2R_4
{8,13} PCLK_SMB SMBCLK HTT0T/66M HT_REFCLKP {10}
33p/50V_4 3 53 NBHT_REFCLKN_R 3 4 To NB Diff 100MHz
{8,13} PDAT_SMB SMBDAT HTT0C/66M HT_REFCLKN {10}
CLK_PD# 51 64 CLK_48M_USB_R R150 33_4 To SB 48MHz

PD# 48MHz_0 CLK_48M_USB {13}
+3V_CLK_VDD SEL_HTT66
NB CLOCK INPUT TABLE
T29 23 59
CLKREQ0# REF0/SEL_HTT66 SEL_SATA R275 33_4 To SB 14.318MHz NB CLOCKS RX780 RS780
T24 45 58 EXT_SB_OSC {12}
CLKREQ1# REF1/SEL_SATA SEL_27 R250 158/F_4 To NB 14.318MHz
B
T22 44 57 EXT_NB_OSC {10}
B
R107 8.2K_4 CLK_PD# CLKREQ2# REF2/SEL_27 HT_REFCLKP 100M DIFF 100M DIFF
T20 39
CLKREQ3# R263 90.9/F_4
T21 38
CLKREQ4# HT_REFCLKN 100M DIFF 100M DIFF
TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6
TGND7
TGND8
TGND9
REFCLK_P 14M SE (1.8V) 14M SE (1.1V)
SLG8SP628 R4004/R4005 (value may change) REFCLK_N NC vref

65
66
67
68
69
70
71
72
73
74
NB_OSC GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*
RES CHIP 82.5 1/16W +-1%(0402) --> CS08252FB11 GPP_REFCLK 100M DIFF NC or 100M DIFF OUTPUT
RX780 1.8V 82.5R/130R RES CHIP 130 1/16W +-1%(0402)L-F --> CS11302FB15
GPPSB_REFCLK 100M DIFF 100M DIFF
RES CHIP 158 1/16W +-1%(0402) --> CS11582FB00
RS780 1.1V 158R/90.9R RES CHIP 90.9 1/16W +-1%(0402) --> CS09092FB15
+3V_CLK_VDD
CLK_48M_USB_R C275 *10p/50V_4
R249 1 66 MHz 3.3V single ended HTT clock

*8.2K_4 SEL_HTT66 SEL_SATA C413 *10p/50V_4
0* 100 MHz differential HTT clock
SEL_SATA 1 100 MHz non-spreading differential SRC clock SEL_27 C409 *10p/50V_4
SEL_SATA
SEL_HTT66 0 * 100 MHz spreading differential SRC clock
SEL_27 1 27MHz and 27M SS outputs EMI Cap placement close IC

SEL_27
A A
0* 100 MHz SRC clock
R260 R246 R247
8.2K_4 8.2K_4 8.2K_4 * default
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
CLOCK GENERATOR_SLG8SP628
1%
Date: Wednesday, June 03, 2009 Sheet 3 of 32
5 4 3 2 1
5 4 3 2 1
04
+1.2V_VLDT
D U16A D
AL4 VLDT_B4 VLDT_A4 F4

AL1 F1 C167 4.7u/6.3V_6
VLDT_B1 VLDT_A1
{9} HT_NB_CPU_CAD_H15 Y6 L0_CADIN_H15 L0_CADOUT_H15 Y9 HT_CPU_NB_CAD_H15 {9}

{9} HT_NB_CPU_CAD_L15 Y5 L0_CADIN_L15 L0_CADOUT_L15 Y8 HT_CPU_NB_CAD_L15 {9}
{9} HT_NB_CPU_CAD_H14 W7 L0_CADIN_H14 L0_CADOUT_H14 AB6 HT_CPU_NB_CAD_H14 {9}
{9} HT_NB_CPU_CAD_L14 W6 L0_CADIN_L14 L0_CADOUT_L14 AB5 HT_CPU_NB_CAD_L14 {9}
{9} HT_NB_CPU_CAD_H13 U6 L0_CADIN_H13 L0_CADOUT_H13 AC7 HT_CPU_NB_CAD_H13 {9}
{9} HT_NB_CPU_CAD_L13 U5 L0_CADIN_L13 L0_CADOUT_L13 AC6 HT_CPU_NB_CAD_L13 {9}
R7 AE6 HT_CPU_NB_CAD_H12 {9}
{9}
{9}
{9}
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H11
R6
M8
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
AE5
AE9
HT_CPU_NB_CAD_L12 {9}
HT_CPU_NB_CAD_H11 {9}
+1.2V +1.2V_VLDT Place close to socket
{9} HT_NB_CPU_CAD_L11 M7 L0_CADIN_L11 L0_CADOUT_L11 AE8 HT_CPU_NB_CAD_L11 {9}
L6 AH3 HT_CPU_NB_CAD_H10 {9} L3
{9} HT_NB_CPU_CAD_H10 L0_CADIN_H10 L0_CADOUT_H10
{9} HT_NB_CPU_CAD_L10 L5 L0_CADIN_L10 L0_CADOUT_L10 AH4 HT_CPU_NB_CAD_L10 {9}
J6 AK3 HT_CPU_NB_CAD_H9 {9} BLM21PG300SN1D_8
{9} HT_NB_CPU_CAD_L9 J5 L0_CADIN_L9 L0_CADOUT_L9 AK4 HT_CPU_NB_CAD_L9 {9}
H4 AK1 HT_CPU_NB_CAD_H8 {9} C72 C373 C375 C69 C70 C374
{9} HT_NB_CPU_CAD_L8 H3 L0_CADIN_L8 L0_CADOUT_L8 AK2 HT_CPU_NB_CAD_L8 {9}
4.7u/6.3V_6 4.7u/6.3V_6 0.22u/6.3V_4 0.22u/6.3V_4 180p/50V_4 180p/50V_4
HT LINK
C {9} HT_NB_CPU_CAD_H7 T3 L0_CADIN_H7 L0_CADOUT_H7 Y1 HT_CPU_NB_CAD_H7 {9} C
{9} HT_NB_CPU_CAD_L7 T4 L0_CADIN_L7 L0_CADOUT_L7 Y2 HT_CPU_NB_CAD_L7 {9}
{9} HT_NB_CPU_CAD_H6 T2 L0_CADIN_H6 L0_CADOUT_H6 Y4 HT_CPU_NB_CAD_H6 {9}
{9} HT_NB_CPU_CAD_L6 T1 L0_CADIN_L6 L0_CADOUT_L6 Y3 HT_CPU_NB_CAD_L6 {9}
{9} HT_NB_CPU_CAD_H5 P3 L0_CADIN_H5 L0_CADOUT_H5 AB1 HT_CPU_NB_CAD_H5 {9}
{9} HT_NB_CPU_CAD_L5 P4 L0_CADIN_L5 L0_CADOUT_L5 AB2 HT_CPU_NB_CAD_L5 {9}
{9} HT_NB_CPU_CAD_H4 P2 L0_CADIN_H4 L0_CADOUT_H4 AB4 HT_CPU_NB_CAD_H4 {9}
{9} HT_NB_CPU_CAD_L4 P1 L0_CADIN_L4 L0_CADOUT_L4 AB3 HT_CPU_NB_CAD_L4 {9} DESIGN NOTE:
{9} HT_NB_CPU_CAD_H3 M2 L0_CADIN_H3 L0_CADOUT_H3 AD4 HT_CPU_NB_CAD_H3 {9}
{9} HT_NB_CPU_CAD_L3 M1 AD3 HT_CPU_NB_CAD_L3 {9}
VLDT must be routed as a pour or a trace at least 200 mils wide.
L0_CADIN_L3 L0_CADOUT_L3
{9} HT_NB_CPU_CAD_H2 K3 L0_CADIN_H2 L0_CADOUT_H2 AF1 HT_CPU_NB_CAD_H2 {9} VLDT may be routed from the source to either ALx balls or Fx balls.
{9} HT_NB_CPU_CAD_L2 K4 L0_CADIN_L2 L0_CADOUT_L2 AF2 HT_CPU_NB_CAD_L2 {9}
{9} HT_NB_CPU_CAD_H1 K2 L0_CADIN_H1 L0_CADOUT_H1 AF4 HT_CPU_NB_CAD_H1 {9} Choose whichever makes routing simpler.
{9} HT_NB_CPU_CAD_L1 K1 L0_CADIN_L1 L0_CADOUT_L1 AF3 HT_CPU_NB_CAD_L1 {9} These six capacitors must be placed very near the selected balls.
{9} HT_NB_CPU_CAD_H0 H2 L0_CADIN_H0 L0_CADOUT_H0 AH1 HT_CPU_NB_CAD_H0 {9}
{9} HT_NB_CPU_CAD_L0 H1 L0_CADIN_L0 L0_CADOUT_L0 AH2 HT_CPU_NB_CAD_L0 {9} The "other" set of balls must be decoupled with a 4.7uF cap.
{9} HT_NB_CPU_CLK_H1 P6 L0_CLKIN_H1 L0_CLKOUT_H1 AF6 HT_CPU_NB_CLK_H1 {9}
{9} HT_NB_CPU_CLK_L1 P5 L0_CLKIN_L1 L0_CLKOUT_L1 AF5 HT_CPU_NB_CLK_L1 {9}
{9} HT_NB_CPU_CLK_H0 M3 L0_CLKIN_H0 L0_CLKOUT_H0 AD1 HT_CPU_NB_CLK_H0 {9}

{9} HT_NB_CPU_CLK_L0 M4 L0_CLKIN_L0 L0_CLKOUT_L0 AD2 HT_CPU_NB_CLK_L0 {9}
{9} HT_NB_CPU_CTL_H1 P8 L0_CTLIN_H1 L0_CTLOUT_H1 AB8 HT_CPU_NB_CTL_H1 {9}

B {9} HT_NB_CPU_CTL_L1 P9 L0_CTLIN_L1 L0_CTLOUT_L1 AB9 HT_CPU_NB_CTL_L1 {9} B
{9} HT_NB_CPU_CTL_H0 V2 L0_CTLIN_H0 L0_CTLOUT_H0 V4 HT_CPU_NB_CTL_H0 {9}

{9} HT_NB_CPU_CTL_L0 V1 L0_CTLIN_L0 L0_CTLOUT_L0 V3 HT_CPU_NB_CTL_L0 {9}
AM2-BGA-27-27-812-01
C26 D26 E26 F26 G26 H26 J26 K26 L26 M26 N26 P26 R26 T26 U26 V26 W26 Y26 AA26 AB26 AC26 AD26
B25 C25 D25 E25 F25 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25 U25 V25 W25 Y25 AA25 AB25 AC25 AD25 AE25
A24 B24 C24 D24 E24 F24 G24 H24 J24 K24 L24 M24 N24 P24 R24 T24 U24 V24 W24 Y24 AA24 AB24 AC24 AD24 AE24 AF24
A20 B20 C20 D20 E20 F20 H20 J20 K20 L20 M20 N20 P20 R20 T20 U20 V20 Y20 AA20 AB20 AC20 AD20 AE20 AF20
A19 B19 C19 D19 E19 F19 H19 J19 K19 L19 M19 N19 P19 R19 T19 U19 V19 Y19 AA19 AB19 AC19 AD19 AE19 AF19
A15 B15 C15 D15 E15 F15 G15 H15 J15 K15 L15 T15 U15 V15 W15 Y15 AA15 AB15 AC15 AD15 AE15 AF15
A A
A8 B8 C8 D8 E8 F8 H8 J8 K8 L8 M8 N8 P8 R8 T8 U8 V8 W8 AA8 AB8 AC8 AD8 AE8 AF8
A7 B7 C7 D7 E7 F7 H7 J7 K7 L7 M7 N7 P7 R7 T7 U7 V7 W7 AA7 AB7 AC7 AD7 AE7 AF7
352-(&7%8
CPU
4XDQWD&RPSXWHU,QF
A3 B3 C3 D3 E3 F3 G3 H3 J3 K3 L3 M3 N3 P3 R3 T3 U3 V3 W3 Y3 AA3 AB3 AC3 AD3 AE3
C2 D2 E2 F2 G2 H2 J2 K2 L2 M2 N2 P2 R2 T2 U2 V2 W2 Y2 AA2 AB2 AC2 AD2 AE2
A1 C1 D1 E1 F1 G1 H1 J1 K1 L1 M1 N1 P1 R1 T1 U1 V1 W1 Y1 AA1 AB1 AC1 AD1
BGA638_50_26SQ_S1G2_OEM Size Document Number Rev

B 1B
K8G BGA HT I/F 1/4
1%
Date: Tuesday, May 26, 2009 Sheet 4 of 32
5 4 3 2 1
A B C D E
+1.8VSUS +SMDDR_VREF
CPU 05
R83
1K/F_4
R80
*0_4 Processor Memory Interface
+SMDDR_VTERM U16C
{8} MEM_MB_DATA[0..63] MEM_MA_DATA[0..63] {8}
U16B MEM_MB_DATA63 AN13 AG11 MEM_MA_DATA63
MEM_MB_DATA62 MB_DATA63 MA_DATA63 MEM_MA_DATA62
A12 VTT1 RSVD#AH17 AH17 AL14 AH11
4 R82 C166 C171 MEM_MB_DATA61 MB_DATA62 MA_DATA62 MEM_MA_DATA61 4
B12 AG17 AL16 AJ12
VTT2 RSVD#AG17 MEM_MB_DATA60 MB_DATA61 MA_DATA61 MEM_MA_DATA60
C12 E20 AN17 AJ14
1K/F_4 1000p/50V_4 0.1u/10V_4 VTT3 RSVD#E20 MEM_MB_DATA59 MB_DATA60 MA_DATA60 MEM_MA_DATA59
D12 E19 AN12 AF11
VTT4 RSVD#E19 MEM_MB_DATA58 MB_DATA59 MA_DATA59 MEM_MA_DATA58
AK10 AB27 AM12 AF12
VTT5 RSVD#AB27 MEM_MB_DATA57 MB_DATA58 MA_DATA58 MEM_MA_DATA57
AN10 AB26 AM16 AG12
VTT6 RSVD#AB26 MEM_MB_DATA56 MB_DATA57 MA_DATA57 MEM_MA_DATA56
AL10 AN21 AN16 AH12
VTT7 RSVD#AN21 MEM_MB_DATA55 MB_DATA56 MA_DATA56 MEM_MA_DATA55
AM10 AM21 AL18 AK14
VTT8 RSVD#AM21 MEM_MB_DATA54 MB_DATA55 MA_DATA55 MEM_MA_DATA54
B11 A22 AN19 AF15
VTT9 RSVD#AN22 MEM_MB_DATA53 MB_DATA54 MA_DATA54 MEM_MA_DATA53
A23 AM24 AH19
MEMVREF_CPU RSVD#A23 MEM_MB_DATA52 MB_DATA53 MA_DATA53 MEM_MA_DATA52
A11 AB33 AN24 AK20
MEMVREF RSVD#AB33 MEM_MB_DATA51 MB_DATA52 MA_DATA52 MEM_MA_DATA51
AB32 AM18 AF14
R222 *0_4 CPU_VTT_SENSE_C RSVD#AB32 MEM_MB_DATA50 MB_DATA51 MA_DATA51 MEM_MA_DATA50
{26} CPU_VTT_SENSE B10 AN18 AG14
VTT_SENSE MEM_MA_CLK7_P MEM_MB_DATA49 MB_DATA50 MA_DATA50 MEM_MA_DATA49
AK18 MEM_MA_CLK7_P {8} AL22 AF17
R27 39.2F_4 M_ZN MA0_CLK_H2 MEM_MA_CLK7_N MEM_MB_DATA48 MB_DATA49 MA_DATA49 MEM_MA_DATA48
+1.8VSUS AG9 AJ17 MEM_MA_CLK7_N {8} AN23 AG19
R28 39.2F_4 M_ZP MEMZN MA0_CLK_L2 MEM_MA_CLK1_P MEM_MB_DATA47 MB_DATA48 MA_DATA48 MEM_MA_DATA47
AH9 D18 AM25 AG20
DDRII: DATA
MEMZP MA0_CLK_H1 MEM_MA_CLK1_P {8} MB_DATA47 MA_DATA47
F19 MEM_MA_CLK1_N MEM_MB_DATA46 AL26 AJ20 MEM_MA_DATA46
MA0_CLK_L1 MEM_MA_CLK1_N {8} MB_DATA46 MA_DATA46
DDR II: CMD/CTRL/CLK

PLACE THEM CLOSE AH29 Y28 MEM_MB_DATA45 AN28 AF22 MEM_MA_DATA45
RSVD#AH29 MA0_CLK_H0 MEM_MB_DATA44 MB_DATA45 MA_DATA45 MEM_MA_DATA44
TO CPU WITHIN 1" AE29
RSVD#AE29 MA0_CLK_L0
Y27 AL28
MB_DATA44 MA_DATA44
AK24
AK33 MEM_MB_DATA43 AL24 AF19 MEM_MA_DATA43
RSVD#AK33 MEM_MB_CLK7_P MEM_MB_DATA42 MB_DATA43 MA_DATA43 MEM_MA_DATA42
AF33 AN22 MEM_MB_CLK7_P {8} AN25 AF20
RSVD#AF33 MB0_CLK_H2 MEM_MB_CLK7_N MEM_MB_DATA41 MB_DATA42 MA_DATA42 MEM_MA_DATA41
AM22 MEM_MB_CLK7_N {8} AN27 AJ23
MB0_CLK_L2 MEM_MB_CLK1_P MEM_MB_DATA40 MB_DATA41 MA_DATA41 MEM_MA_DATA40
{8} MEM_MA0_CS#1 AH30 C22 MEM_MB_CLK1_P {8} AM28 AG23
MA0_CS_L1 MB0_CLK_H1 MEM_MB_CLK1_N MEM_MB_DATA39 MB_DATA40 MA_DATA40 MEM_MA_DATA39
{8} MEM_MA0_CS#0 AF29 B22 MEM_MB_CLK1_N {8} AM29 AF23
MA0_CS_L0 MB0_CLK_L1 MEM_MB_DATA38 MB_DATA39 MA_DATA39 MEM_MA_DATA38
{8} MEM_MB0_CS#1 AJ32 AA32 AL30 AF25
MB0_CS_L1 MB0_CLK_H0 MEM_MB_DATA37 MB_DATA38 MA_DATA38 MEM_MA_DATA37
{8} MEM_MB0_CS#0 AF31 AA33 AL32 AH27
MB0_CS_L0 MB0_CLK_L0 MEM_MB_DATA36 MB_DATA37 MA_DATA37 MEM_MA_DATA36
AL33 AK30
{8} MEM_MB_CKE1 N33 AH31 AK28 AJ25
MB_CKE1 RSVD#AH31 MEM_MB_DATA34 MB_DATA35 MA_DATA35 MEM_MA_DATA34
{8} MEM_MB_CKE0 P32 AF27 AN29 AG25
MB_CKE0 RSVD#AF27 MEM_MB_DATA33 MB_DATA34 MA_DATA34 MEM_MA_DATA33
{8} MEM_MA_CKE1 M30 AH33 MEM_MB0_ODT0 {8} AM31 AJ26
MA_CKE1 MB0_ODT0 MEM_MB_DATA32 MB_DATA33 MA_DATA33 MEM_MA_DATA32
{8} MEM_MA_CKE0 M28 AG29 MEM_MA0_ODT0 {8} AM32 AJ28
MA_CKE0 MA0_ODT0 MEM_MB_DATA31 MB_DATA32 MA_DATA32 MEM_MA_DATA31
{8} MEM_MA_ADD[0..15] MEM_MB_ADD[0..15] {8} E33 D28
MEM_MA_ADD15 MEM_MB_ADD15 MEM_MB_DATA30 MB_DATA31 MA_DATA31 MEM_MA_DATA30
P30 P33 D31 G28
MEM_MA_ADD14 MA_ADD15 MB_ADD15 MEM_MB_ADD14 MEM_MB_DATA29 MB_DATA30 MA_DATA30 MEM_MA_DATA29
M29 P31 B31 D26
3 AG28 AJ33 A31 E26 3
P28 T32 F33 F30
T30 T31 F31 E29
AC28 AD32 C32 F27
To SODIMM socket A (near)

P27 T33
To SODIMM socket B (Far)

B32 H26
R26 V32 C30 H25
R27 U33 A29 D24
U28 V33 B26 H22
V30 V31 A26 E22
U27 W33 B30 F26
Y30 Y31 A30 G26
AB29 Y33 A27 D22
W29 Y32 C26 G23
AC26 AC33 A24 G22
MA_ADD0 MB_ADD0 MEM_MB_DATA14 MB_DATA15 MA_DATA15 MEM_MA_DATA14
B24 G20
{8} MEM_MA_BANK2 R29 R33 MEM_MB_BANK2 {8} C18 G15
MA_BANK2 MB_BANK2 MEM_MB_DATA12 MB_DATA13 MA_DATA13 MEM_MA_DATA12
{8} MEM_MA_BANK1 AC29 AD33 MEM_MB_BANK1 {8} A18 F15
{8} MEM_MA_BANK0 AE28 AE33 MEM_MB_BANK0 {8} A25 D20
C24 F22
{8} MEM_MA_RAS# AC27 AF32 MEM_MB_RAS# {8} C20 D16
MA_RAS_L MB_RAS_L MEM_MB_DATA8 MB_DATA9 MA_DATA9 MEM_MA_DATA8
{8} MEM_MA_CAS# AF30 AH32 MEM_MB_CAS# {8} A19 E17
MA_CAS_L MB_CAS_L MEM_MB_DATA7 MB_DATA8 MA_DATA8 MEM_MA_DATA7
{8} MEM_MA_WE# AE27 AG33 MEM_MB_WE# {8} C16 H15
MA_WE_L MB_WE_L MEM_MB_DATA6 MB_DATA7 MA_DATA7 MEM_MA_DATA6
A16 H14
B14 G12
AM2-BGA-27-27-812-01 MEM_MB_DATA4 MB_DATA5 MA_DATA5 MEM_MA_DATA4
A13 H12
B18 E15
A17 E14
C14 E11
A14 F11
MB_DATA0 MA_DATA0
K33 K30
MEM_MA_CLK1_P MEM_MB_CLK1_P MB_CHECK7 MA_CHECK7
K31 MB_CHECK6 MA_CHECK6 J29
G32 MB_CHECK5 MA_CHECK5 G29
2 C180 C380 F32 F29 2
1.5p/50V_4 MB_CHECK4 MA_CHECK4
L33 MB_CHECK3 MA_CHECK3 L28
1.5p/50V_4 K32 L29
MEM_MA_CLK1_N MEM_MB_CLK1_N MB_CHECK2 MA_CHECK2
H31 H29
MB_CHECK1 MA_CHECK1
G33 MB_CHECK0 MA_CHECK0 H27
MEM_MA_CLK7_P MEM_MB_CLK7_P H33 H30

{8} MEM_MB_DM[0..7] MB_DM8 MA_DM8 MEM_MA_DM[0..7] {8}
MEM_MB_DM7 AN15 AL12 MEM_MA_DM7
C50 C367 MEM_MB_DM6 MB_DM7 MA_DM7 MEM_MA_DM6
AN20 MB_DM6 MA_DM6 AK16
1.5p/50V_4 MEM_MB_DM5 AK26 AK22 MEM_MA_DM5
1.5p/50V_4 MEM_MB_DM4 MB_DM5 MA_DM5 MEM_MA_DM4
AN31 MB_DM4 MA_DM4 AJ27
MEM_MA_CLK7_N MEM_MB_CLK7_N MEM_MB_DM3 MEM_MA_DM3
Place close to CPU within 1500 mils MEM_MB_DM2
C33
C28
MB_DM3 MA_DM3 E27
E23 MEM_MA_DM2
MEM_MB_DM1 MB_DM2 MA_DM2 MEM_MA_DM1
A20 H19
MEM_MB_DM0 MB_DM1 MA_DM1 MEM_MA_DM0
D14 G14
MB_DM0 MA_DM0
J33 J27
MB_DQS_H8 MA_DQS_H8
H32 MB_DQS_L8 MA_DQS_L8 J26
+SMDDR_VTERM AM14 AJ11
{8} MEM_MB_DQS7_P MB_DQS_H7 MA_DQS_H7 MEM_MA_DQS7_P {8}
{8} MEM_MB_DQS7_N AN14 AK12 MEM_MA_DQS7_N {8}
MB_DQS_L7 MA_DQS_L7
{8} MEM_MB_DQS6_P AL20 MB_DQS_H6 MA_DQS_H6 AG15 MEM_MA_DQS6_P {8}
{8} MEM_MB_DQS6_N AM20 MB_DQS_L6 MA_DQS_L6 AH15 MEM_MA_DQS6_N {8}
C49 C365 C170 C386 C169 C172 C168 C383 AN26 AH22
{8} MEM_MB_DQS5_P MB_DQS_H5 MA_DQS_H5 MEM_MA_DQS5_P {8}
{8} MEM_MB_DQS5_N AM26 AG22 MEM_MA_DQS5_N {8}
4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 MB_DQS_L5 MA_DQS_L5
{8} MEM_MB_DQS4_P AN30 AG26 MEM_MA_DQS4_P {8}
MB_DQS_H4 MA_DQS_H4
{8} MEM_MB_DQS4_N AM30 AH26 MEM_MA_DQS4_N {8}
MB_DQS_L4 MA_DQS_L4
{8} MEM_MB_DQS3_P D33 E28 MEM_MA_DQS3_P {8}
MB_DQS_H3 MA_DQS_H3
{8} MEM_MB_DQS3_N D32 F28 MEM_MA_DQS3_N {8}
MB_DQS_L3 MA_DQS_L3
{8} MEM_MB_DQS2_P B28 MB_DQS_H2 MA_DQS_H2 E25 MEM_MA_DQS2_P {8}
{8} MEM_MB_DQS2_N A28 F25 MEM_MA_DQS2_N {8}
MB_DQS_L2 MA_DQS_L2
{8} MEM_MB_DQS1_P A21 G17 MEM_MA_DQS1_P {8}
+SMDDR_VTERM MB_DQS_H1 MA_DQS_H1
{8} MEM_MB_DQS1_N B20 H17 MEM_MA_DQS1_N {8}
MB_DQS_L1 MA_DQS_L1
{8} MEM_MB_DQS0_P B16 E12 MEM_MA_DQS0_P {8}
MB_DQS_H0 MA_DQS_H0
{8} MEM_MB_DQS0_N A15 MB_DQS_L0 MA_DQS_L0 F12 MEM_MA_DQS0_N {8}
1 1
C371 C52 C47 C368 C385 C44 C370 C384 AM2-BGA-27-27-812-01
1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4
Place close to socket 352-(&7%8

4XDQWD&RPSXWHU,QF
Custom 1B
K8G BGA DDR2 MEMORY I/F 2/4
1%
Date: Monday, June 01, 2009 Sheet 5 of 32
A B C D E
5 4 3 2 1
CPU THERM
CPU
+2.5V
L25
BLM21PG300SN1D_8
500mA
C174
4.7u/6.3V_6
+2.5V_CPU_VDDA_RUN
C173
0.22u/6.3V_4
C381
3300p/50V_4 +1.8VSUS
06
+1.8VSUS
U16D
3
A8 AJ6 CPU_THERMTRIP_L#
VDDA2 THERMTRIP_L CPU_PROCHOT_L# Q20
B8 VDDA1 PROCHOT_L AN6
+1.8VSUS CPU_LDT_RST# AK6 R75 2 R71
{10,12} CPU_LDT_RST# RESET_L {22,25} VRM_PWRGD
CPU_PWRGD AM2
{12} CPU_PWRGD CPU_LDT_STOP# PWROK
D AM6 300_4 *0_4 D
{10,12} CPU_LDT_STOP# LDTSTOP_L CPU_VID5
B2 FDV301N
VID5 CPU_VID5 {25}
R214 300_4 CPU_SIC {13} SB_SCLK3 R215 *0_4 CPU_SIC AN4 C2 CPU_VID4
CPU_VID4 {25}
1
R216 *0_4 CPU_SID SIC VID4 CPU_VID3
{13} SB_SDATA3 AN5 C1 CPU_VID3 {25}
SID VID3 CPU_VID2
D2 CPU_VID2 {25}
R51 44.2/F_4 CPU_HTREF1 VID2 CPU_VID1
+1.2V_VLDT V10 D1 CPU_VID1 {25}
R50 44.2/F_4 CPU_HTREF0 HT_REF1 VID1 CPU_VID0 +1.8VSUS R68
V9 D3 CPU_VID0 {25}
HT_REF0 VID0 R67
AM3 CPU_PRESENT#_L 100K_4
CPU_PRESENT_L 1K_4
{25} CPU_VDD_RUN_FB_H E2
VDD_FB_H CPU_PSI# R69
{25} CPU_VDD_RUN_FB_L E1 E4 CPU_PSI# {25}
VDD_FB_L PSI_L
2
AM9 300_4
{26} CPU_VDDIO_FB_H VDDIO_FB_H
{26} CPU_VDDIO_FB_L AK9
VDDIO_FB_L CPU_THERMTRIP_L# 1 3 SYS_SHDN# {29}
C387 3900p/50V_4 CPU_CLKIN_P A6 Q19
{3} CPU_CLKP CPU_CLKIN_N CLKIN_H
A7 +1.8VSUS MMBT3904
CLKIN_L
CPU CLK R219
169/F_6
CPU_DBRDY
CPU_TMS
AH8
DBRDY DBREQ_L
AN9 CPU_DBREQ# R213 300_4
R65 *0_4
AN8 CPU_THERMTRIP# {13}
CPU_TCK TMS CPU_TDO
{3} CPU_CLKN AK8 AN7
C388 3900p/50V_4 CPU_TRST# TCK TDO
AL8 T11
CPU_TDI TRST_L
AM8
TDI
R221 511_4 CPU_TEST25_BYPASSCLK_H A9 E9 CPU_TEST29_H_FBCLKOUT R73 +1.8VSUS +1.8VSUS
+1.8VSUS TEST25_H TEST29_H
R220 511_4 CPU_TEST25_BYPASSCLK_L B9 D10 CPU_TEST29_L_FBCLKOUT
R78 300_4 CPU_TEST19_PLLTEST1 TEST25_L TEST29_L 80.6/F_4
A5
R79 300_4 CPU_TEST18_PLLTEST0 TEST19
B6
TEST18 R38 R37
AJ9 T10
TEST13
H8
CPU_TEST17_BP3 TEST9 CPU_TEST24_SCANCLK1 R41 1K_4 300_4 10K_4
T5 J8 AH6
CPU_TEST16_BP2 TEST17 TEST24 CPU_TEST23_TSTUPD
T14 C8 AG8 T1
CPU_TEST15_BP1 TEST16 TEST23 CPU_TEST22_SCANSHIFTEN R212 300_4
T13 D9 AN11
TEST15 TEST22
2
CPU_TEST14_BP0 H7 F9 CPU_TEST21_SCANEN R53 300_4
T7 CPU_TEST12_SCANSHIFTENAN3 TEST14 TEST21 CPU_TEST20_SCANCLK2
AM7 R217 300_4
T2 TEST12 TEST20 CPU_PROCHOT_L#
C 1 3 CPU_PROCHOT#_EC {22} C
C6 G11 CPU_TEST28_H_PLLCHRZ Q13
TEST7 TEST28_H CPU_TEST28_L_PLLCHRZ T15
AH7 H11 MMBT3904
TEST6 TEST28_L T12
H_THRMDC AL6 AJ8
H_THRMDA THERMDC TEST27 CPU_TEST26_BURNIN_L R218 300_4 R30 0_4
AM5 AM4 +1.8VSUS CPU_PROCHOT#_SB {12}
THERMDA TEST26
AJ5 D7
TEST3 TEST10
AJ7 B5
TEST2 TEST8
M31 L27
RSVD#M31 RSVD#L27
L32 B25
+1.8VSUS
HDT Connector M33
M32
RSVD#L32
RSVD#M33
RSVD#M32
RSVD#B25
RSVD1
G6
A10
RSVD2 +3V_S5
W27 B7
CN18 RSVD#W27 RSVD3
W26
RSVD#W26
AJ29 E8
RSVD#AJ29 RSVD#E8
1 2 P26 G5
CPU_LDT_RST# RSVD#P26 RSVD#G5 +1.8VSUS R35
3 4 M26
CPU_PWRGD RSVD#M26
5 6 {8} MEM_MA0_ODT1 AJ30
CPU_DBREQ# RSVD#AJ30 20K_4
7 8
CPU_DBRDY 9 10 R34 34.8K/F_4
CPU_TCK 11 12 R36
CPU_TMS 13 14 C54 0.1u/10V_4
CPU_TDI 15 16 AB31 1K_4
RSVD#AB31
2
CPU_TRST# 17 18 AB30 Q12
CPU_TDO RSVD#AB30
19 20 RSVD#AK31
AK31
21 22 AD31 CPU_PRESENT#_L 1 3
RSVD#AD31 CPU_PRESENT# {14}
MISC
23 24 CPU_LDT_RST_HTPA# AD30
RSVD#AD30 FDV301N
KEY 25 RSVD#AK32
AK32 MEM_MB0_ODT1 {8}
*HDT CONN
AM2-BGA-27-27-812-01
B B
+1.8V
CPU POWER-UP CPU_LDT_RST# R56 300_4 CPU H/W MONITOR

CPU_LDT_STOP# R42 300_4
CPU_PWRGD R40 300_4 +3V
+3V
+3V
2
+3V Q6
R54 {22} 2ND_MBCLK 3 1 R16 R17 R18 R25

R57 20K/F_04 CNTR_VREF
4.7K_4 10K_4 10K_4 10K_4 200_4
2
Q17 RHU002N06
C155 0.1U/10V_4
1 3 CPU_LDT_RST_HTPA# +3V_THERM C42 0.1u/10V_4
+3V
R59 34.8K/F_4 *FDV301N U2
2
Q7 LM86_SMC 8 1 H_THRMDA +3V

CPU_LDT_RST# SCLK VCC
{22} 2ND_MBDATA 3 1 LM86_SMD 7 2 C48

SDA DXP
R21 *0_4 SMBALERT# 6 3 2200P_4
RHU002N06 ALERT# DXN H_THRMDC R23
THERM_SHD# 4 5
OVERT# GND R26 330_4
CPU FAN +3V
MSOP
ADM1032
R29 *0_4
10K_4
FANPWR = 1.6*VSET
2
+5V Q10
{14} PM_THERM# MAX6657,G781P8,W83L771G
R203 MMBT3904
1 3 SYS_SHDN#
A 10K_4 A
+3V C35
{22} FANSIG
R24 OVERT# Check EC Setting Degree C37 *1u/16V_6
2.2u/16V_6
*10K_4
C359 ADDRESS: 98H
*0.01u/16V_4
CN15
2
U1
2 3 TH_FAN_POWER
VIN VO 1
SMBALERT# 1
Q11
3 CPU_FAN#_ON
ME2N7002E 1
GND
5
6
2 352-(&7%8
4
/FON GND
GND
7
8
C28 C25 3
4XDQWD&RPSXWHU,QF
{22} VFAN VSET GND
10u/10V_8 0.01u/16V_4
G995 85205-0300L Size Document Number Rev
G995/Pin1- internal pull high (+5V)
Custom K8G BGA CTRL & DEBUG 3/4 1B
1%
5 4 3 2 1
5 4 3 2 1
CPU 07
D
+VCC_CORE +VCC_CORE +1.8VSUS D
U16E U16F U16G U16H
A3 VDDC#A3 VDDC#AA10 AA10 A32 VSS1 VSS120 G4 G19 VSS121 VSS184 R1
A4 VDDC#A4 VDDC#AA12 AA12 Y29 VDDIO#Y29 AA1 VSS2 VSS119 G2 G25 VSS123 VSS185 R2
B3 VDDC#B3 VDDC#AA24 AA24 U29 VDDIO#U29 AA2 VSS3 VSS118 G1 G27 VSS124 VSS186 R4
B4 VDDC#B4 VDDC#AA25 AA25 R28 VDDIO#R28 AA4 VSS4 VSS117 F23 G30 VSS125 VSS187 R8
C3 VDDC#C3 VDDC#AB11 AB11 P29 VDDIO#P29 AA9 VSS5 VSS116 F20 H5 VSS126 VSS188 R15
C4 VDDC#C4 VDDC#AB13 AB13 W32 VDDIO#W32 AA11 VSS6 VSS115 F14 H6 VSS127 VSS189 R18
D4 VDDC#D4 VDDC#AC5 AC5 W30 VDDIO#W30 AA22 VSS7 VSS114 E32 H20 VSS128 VSS190 R20
D5 VDDC#D5 VDDC#AC10 AC10 W28 VDDIO#W28 AA23 VSS8 VSS113 E30 H23 VSS129 VSS191 T9
D6 VDDC#D6 VDDC#AC12 AC12 U30 VDDIO#U30 AB10 VSS9 VSS112 D30 H28 VSS130 VSS192 T14
E5 VDDC#E5 VDDC#AC24 AC24 N30 VDDIO#N30 AB12 VSS10 VSS111 D29 J1 VSS131 VSS193 T16
E6 VDDC#E6 VDDC#AC25 AC25 U32 VDDIO#U32 AB21 VSS11 VSS110 D27 J2 VSS132 VSS194 T19
E7 VDDC#E7 VDDC#AD9 AD9 R32 VDDIO#R32 AB22 VSS12 VSS109 D25 J4 VSS133 VSS195 T24
F5 VDDC#F5 VDDC#AD11 AD11 R30 VDDIO#R30 AB23 VSS13 VSS108 D23 J7 VSS134 VSS196 T25
F6 VDDC#F6 VDDC#AD12 AD12 N32 VDDIO#N32 AB24 VSS14 VSS107 D21 J11 VSS135 VSS197 V15
F7 VDDC#F7 VDDC#AD14 AD14 U26 VDDIO#U26 AB25 VSS15 VSS106 D19 J13 VSS136 VSS198 V18
F8 VDDC#F8 VDDC#AD18 AD18 Y26 VDDIO#Y26 AC11 VSS16 VSS105 D17 J16 VSS137 VSS199 V20
G8 VDDC#G8 VDDC#AD21 AD21 M27 VDDIO#M27 AC1 VSS17 VSS104 D15 J22 VSS138 VSS200 U1
G9 VDDC#G9 VDDC#AD25 AD25 AG32 VDDIO#AG32 AC2 VSS18 VSS103 D13 J24 VSS139 VSS201 U2
H9 VDDC#H9 VDDC#AE12 AE12 AG30 VDDIO#AG30 AC4 VSS19 VSS102 D11 J25 VSS140 VSS202 U4
J9 VDDC#J9 VDDC#AE14 AE14 AF28 VDDIO#AF28 AC8 VSS20 VSS101 D8 J28 VSS141 VSS203 U7
J10 VDDC#J10 VDDC#AE18 AE18 AE30 VDDIO#AE30 AC9 VSS21 VSS100 C31 J30 VSS142 VSS204 U8
POWER2
J12 VDDC#J12 VDDC#AE21 AE21 AE26 VDDIO#AE26 AC13 VSS22 VSS99 B33 J32 VSS143 VSS205 W1
J14 VDDC#J14 VDDC#AE23 AE23 AC32 VDDIO#AC32 AC21 VSS23 VSS98 B29 K11 VSS144 VSS206 W2
POWER1
J18 VDDC#J18 VDDC#V25 V25 AC30 VDDIO#AC30 AC22 VSS24 VSS97 B27 K13 VSS145 VSS207 W4
J20 VDDC#J20 VDDC#V24 V24 AE32 VDDIO#AE32 AC23 VSS25 VSS96 B21 K16 VSS146 VSS208 W8
J21 VDDC#J21 VDDC#Y19 Y19 AB28 VDDIO#AB28 AD10 VSS26 VSS95 B19 A2 VSS147 VSS209 W14
GND1
J23 VDDC#J23 VDDC#Y16 Y16 AA30 VDDIO#AA30 AD13 VSS27 VSS94 B17 K22 VSS148 VSS210 W16
K10 VDDC#K10 VDDC#Y14 Y14 AD16 VSS28 VSS93 B15 K24 VSS149 VSS211 W19
GND2
K12 VDDC#K12 VDDC#W20 W20 AD20 VSS29 VSS92 B13 K9 VSS150 VSS212 Y7
K14 VDDC#K14 VDDC#W18 W18 AD22 VSS30 VSS91 C10 L1 VSS151 VSS213 Y10
C C
K18 VDDC#K18 VDDC#W15 W15 AD23 VSS31 VSS90 AN32 L2 VSS152 VSS214 Y15
K20 VDDC#K20 VDDC#W5 W5 AD24 VSS32 VSS89 AN2 L4 VSS153 VSS215 Y18
K21 VDDC#K21 VDDC#V19 V19 AE1 VSS33 VSS88 AM33 L8 VSS154 VSS216 Y20
L7 T20 AM2-BGA-27-27-812-01 AE7 AM19 L21 F17
VDDC#L7 VDDC#T20 VSS36 VSS85 VSS157 VSS219
L9 VDDC#L9 VDDC#T18 T18 AE10 VSS37 VSS84 AM17 L22 VSS158 VSS220 AB7
L11 VDDC#L11 VDDC#T15 T15 AE11 VSS38 VSS83 AM15 L23 VSS159 VSS221 AG5
L13 VDDC#L13 VDDC#T10 T10 AE13 VSS39 VSS82 AM13 L24 VSS160 VSS222 B23
M5 VDDC#M5 VDDC#R19 R19 AE16 VSS40 VSS81 AM11 L25 VSS161 VSS223 B1
M10 VDDC#M10 VDDC#R16 R16 AE20 VSS41 VSS80 AM1 L26 VSS162 VSS224 G7
M12 VDDC#M12 VDDC#R14 R14 AE22 VSS42 VSS79 AL31 L30 VSS163
M25 VDDC#M25 VDDC#R5 R5 AE24 VSS43 VSS78 AK29 M6 VSS164
N9 VDDC#N9 AE25 VSS44 VSS77 AK27 M9 VSS165
N11 VDDC#N11 AF7 VSS45 VSS76 AK25 M11 VSS166
P15 VDDC#P15 AF26 VSS48 VSS73 AK19 M22 VSS169
P18 VDDC#P18 AG1 VSS49 VSS72 AK17 M23 VSS170
P20 VDDC#P20 AG2 VSS50 VSS71 AK15 M24 VSS171
P24 VDDC#P24 AG4 VSS51 VSS70 AK13 N1 VSS172
P25 VDDC#P25 AG6 VSS52 VSS69 AK11 N2 VSS173
AG7 VSS53 VSS68 AK7 N4 VSS174
AG27 VSS54 VSS67 AK5 N10 VSS175
AM2-BGA-27-27-812-01 AH5 AJ22 N12
VSS55 VSS66 VSS176
AH14 VSS56 VSS65 AJ19 N22 VSS177
AH20 VSS57 VSS64 AJ15 N23 VSS178
AH23 VSS58 VSS63 AJ4 P7 VSS179
AH25 VSS59 VSS62 AJ2 P10 VSS180
AH28 AJ1 P14
PROCESSOR POWER AND GROUND

VSS60 VSS61 VSS181
P16 VSS182
B AM2-BGA-27-27-812-01 P19 B
VSS183
AM2-BGA-27-27-812-01
DECOUPLING BETWEEN PROCESSOR AND DIMMs

+VCC_CORE BOTTOM SIDE DECOUPLING
PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS C94 C120 C133 C131 C91 C122 C103 C98 C93
22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8
C115 C100 C123 C118 C83 C90 C113 C128 C114
22/6.3V_8 22/6.3V_8 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 180p/50V_4 180p/50V_4 180p/50V_4

+VCC_CORE
+1.8VSUS C95 C89 C142 C146
0.22u/6.3V_4 0.22u/6.3V_4 0.01u/16V_4 180p/50V_4

A A
C73 C135 C84 C75 C74 C99 C78 C136 C134
0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.1u/10V_4 0.1u/10V_4 0.01u/25V_4
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
K8G BGA PWR & GND 4/4
1%
Date: Monday, May 18, 2009 Sheet 7 of 32
5 4 3 2 1
5 4 3 2 1
+SMDDR_VTERM
TERMINATOR DECOUPLING CAPACITOR DDR2 TERMINATOR +SMDDR_VTERM +SMDDR_VTERM
+SMDDR_VTERM MEM_MA_BANK2 RP30 4 3 47_4P2R_4 MEM_MB_CKE0 RP27 4 3 47_4P2R_4

MEM_MA_CKE0 2 1 MEM_MB_BANK2 2 1
MEM_MA0_CS#0 RP10 4 3 47_4P2R_4 MEM_MA_ADD9 RP26 4 3 47_4P2R_4 MEM_MB_ADD12 RP21 4 3 47_4P2R_4
C137 C77 C81 C156 C125 C88 C144 C124 C143 C82 C79 C154 C139 C87 C121 C152 MEM_MA_RAS# 2 1 MEM_MA_ADD12 2 1 MEM_MB_ADD9 2 1
MEM_MA_ADD5 RP23 4 3 47_4P2R_4 MEM_MB_ADD8 RP17 4 3 47_4P2R_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 MEM_MA_WE# RP11 4 3 47_4P2R_4 MEM_MA_ADD8 2 1 MEM_MB_ADD5 2 1
MEM_MA_CAS# 2 1 MEM_MA_ADD1 RP19 4 3 47_4P2R_4 MEM_MB_ADD3 RP13 4 3 47_4P2R_4
MEM_MA_ADD3 2 1 MEM_MB_ADD1 2 1
MEM_MA0_ODT1 RP5 4 3 47_4P2R_4 MEM_MA_BANK0 RP15 4 3 47_4P2R_4 MEM_MB_BANK0 RP9 4 3 47_4P2R_4
MEM_MA0_CS#1 2 1 MEM_MA_ADD10 2 1 MEM_MB_ADD10 2 1
+SMDDR_VTERM MEM_MB0_ODT0 RP8 4 3 47_4P2R_4 MEM_MA_ADD15 RP29 4 3 47_4P2R_4 MEM_MB_ADD15 RP28 4 3 47_4P2R_4
MEM_MB_BANK1 2 1 MEM_MA_CKE1 2 1 MEM_MB_CKE1 2 1
D D
MEM_MB0_CS#1 RP7 4 3 47_4P2R_4 MEM_MA_ADD6 RP22 4 3 47_4P2R_4 MEM_MB_ADD6 RP20 4 3 47_4P2R_4
C92 C117 C149 C126 C132 C116 C157 C127 C140 C101 C102 C148 C145 C86 C153 MEM_MB_CAS# 2 1 MEM_MA_ADD11 2 1 MEM_MB_ADD11 2 1
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 MEM_MB0_ODT1 RP3 4 3 47_4P2R_4 MEM_MA_ADD4 2 1 MEM_MB_ADD4 2 1
MEM_MB_WE# 2 1 MEM_MA_BANK1 RP14 4 3 47_4P2R_4 MEM_MB_RAS# RP12 4 3 47_4P2R_4
MEM_MA_ADD13 RP4 4 3 47_4P2R_4 MEM_MB0_CS#0 RP6 4 3 47_4P2R_4
+1.8VSUS MEM_MA0_ODT0 2 1 MEM_MB_ADD13 2 1
+1.8VSUS +1.8VSUS
MEM_MA_DATA[0..63] {5}
08
103
104
111
112
117
118
103
104
111
112
117
118
81
82
87
88
95
96
81
82
87
88
95
96
CN20 CN21
{5} MEM_MA_ADD[0..15] {5} MEM_MB_ADD[0..15] MEM_MB_DATA[0..63] {5}
MEM_MA_ADD0 102 5 MEM_MA_DATA5 MEM_MB_ADD0 102 5 MEM_MB_DATA4
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA4 MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA5
101 7 101 7
100 17 100 17
99 19 99 19
98 4 98 4
97 6 97 6
94 14 94 14
92 16 92 16
93 23 93 23
91 25 91 25
105 35 105 35
90 37 90 37
89 20 89 20
116 22 116 22
86 36 86 36
MEM_MA_ADD15 84
A14 DQ14
38 MEM_MA_DATA10 MEM_MB_ADD15 84
A14 DQ14
38 MEM_MB_DATA14 PLACE CLOSE TO SOCKET( PER EMI/EMC)
A15 DQ15 MEM_MA_DATA16 A15 DQ15 MEM_MB_DATA17
43 43
MEM_MA_BANK0 DQ16 MEM_MA_DATA21 MEM_MB_BANK0 DQ16 MEM_MB_DATA20
C {5} MEM_MA_BANK0 107 45 {5} MEM_MB_BANK0 107 45 C
MEM_MA_BANK1 BA0 DQ17 MEM_MA_DATA19 MEM_MB_BANK1 BA0 DQ17 MEM_MB_DATA22
{5} MEM_MA_BANK1 106 55 {5} MEM_MB_BANK1 106 55
MEM_MA_BANK2 BA1 DQ18 MEM_MA_DATA18 MEM_MB_BANK2 BA1 DQ18 MEM_MB_DATA23
{5} MEM_MA_BANK2 85 57 {5} MEM_MB_BANK2 85 57
BA2 DQ19 MEM_MA_DATA17 BA2 DQ19 MEM_MB_DATA16 +1.8VSUS
44 44
MEM_MA_DM0 DQ20 MEM_MA_DATA20 MEM_MB_DM0 DQ20 MEM_MB_DATA21
10 46 10 46
MEM_MA_DM1 DM0 DQ21 MEM_MA_DATA22 MEM_MB_DM1 DM0 DQ21 MEM_MB_DATA19
26 56 26 56
52 58 52 58
MEM_MA_DM3 DM2 DQ23 MEM_MA_DATA27 MEM_MB_DM3 DM2 DQ23 MEM_MB_DATA29 C104 C112 C111 C129
67 61 67 61
130 63 130 63
MEM_MA_DM5 DM4 DQ25 MEM_MA_DATA25 MEM_MB_DM5 DM4 DQ25 MEM_MB_DATA30 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
147 73 147 73
170 75 170 75
{5} MEM_MA_DM[0..7] 185 62 {5} MEM_MB_DM[0..7] 185 62
DM7 DQ28 MEM_MA_DATA31 DM7 DQ28 MEM_MB_DATA24
64 64
DQ29 MEM_MA_DATA28 DQ29 MEM_MB_DATA27
{5} MEM_MA_DQS0_P 13 74 {5} MEM_MB_DQS0_P 13 74
DQS0 DQ30 MEM_MA_DATA24 DQS0 DQ30 MEM_MB_DATA26
DQS5 DQ35 MEM_MA_DATA38 DQS5 DQ35 MEM_MB_DATA35 +1.8VSUS
134 134
{5} MEM_MA_DQS0_N 11 136 {5} MEM_MB_DQS0_N 11 136
DQS0 DQ39 MEM_MA_DATA44 DQS0 DQ39 MEM_MB_DATA46 C147 C119 C141 C110
DQS2 DQ41 MEM_MA_DATA43 DQS2 DQ41 MEM_MB_DATA42 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
{5} MEM_MA_DQS7_N 186 DQS7 DQ46 152 {5} MEM_MB_DQS7_N 186
DQS7 DQ46 152
154 MEM_MA_DATA47 154 MEM_MB_DATA47
157 157
{5} MEM_MA_CLK1_P 30 CK0 DQ49 159 {5} MEM_MB_CLK1_P 30
CK0 DQ49 159
32 173 MEM_MA_DATA54 32 173 MEM_MB_DATA54
{5} MEM_MA_CLK1_N CK0 DQ50 {5} MEM_MB_CLK1_N CK0 DQ50
{5} MEM_MA_CLK7_P CK1 DQ51 {5} MEM_MB_CLK7_P CK1 DQ51
{5} MEM_MA_CLK7_N CK1 DQ52 {5} MEM_MB_CLK7_N CK1 DQ52
B DQ53 DQ53 B
MEM_MA_CKE0 79 174 MEM_MA_DATA50 {5} MEM_MB_CKE0 MEM_MB_CKE0 79 174 MEM_MB_DATA51
{5} MEM_MA_CKE0 CKE0 DQ54 CKE0 DQ54
MEM_MA_CKE1 80 176 MEM_MA_DATA55 {5} MEM_MB_CKE1 MEM_MB_CKE1 80 176 MEM_MB_DATA50
{5} MEM_MA_CKE1 CKE1 DQ55 CKE1 DQ55
MEM_MA_RAS# DQ56 MEM_MA_DATA57 MEM_MB_RAS# DQ56 MEM_MB_DATA60
{5} MEM_MA_RAS# 108 181 {5} MEM_MB_RAS# 108 181
MEM_MA_CAS# RAS DQ57 MEM_MA_DATA63 MEM_MB_CAS# RAS DQ57 MEM_MB_DATA59
{5} MEM_MA_CAS# 113 CAS DQ58 189 {5} MEM_MB_CAS# 113
CAS DQ58 189
MEM_MA_WE# 109 191 MEM_MA_DATA56 MEM_MB_WE# 109 191 MEM_MB_DATA63
{5} MEM_MA_WE# WE DQ59 {5} MEM_MB_WE# WE DQ59
MEM_MA0_CS#0 110 180 MEM_MA_DATA58 MEM_MB0_CS#0 110 180 MEM_MB_DATA56
{5} MEM_MA0_CS#0 S0 DQ60 {5} MEM_MB0_CS#0 S0 DQ60
MEM_MA0_CS#1 115 182 MEM_MA_DATA60 MEM_MB0_CS#1 115 182 MEM_MB_DATA61
{5} MEM_MA0_CS#1 S1 DQ61 {5} MEM_MB0_CS#1 S1 DQ61
MEM_MA0_ODT0 DQ62 MEM_MA_DATA62 MEM_MB0_ODT0 DQ62 MEM_MB_DATA58
{5} MEM_MA0_ODT0 114 194 {5} MEM_MB0_ODT0 114 194
ODT0 DQ63 ODT0 DQ63
(STANDAR)
(REVERSE)
MEM_MA0_ODT1 119 MEM_MB0_ODT1 119

{6} MEM_MA0_ODT1 ODT1 {6} MEM_MB0_ODT1 ODT1
50 MEMHOT_DIMM#_1 R76 *0_4 MEMHOT_DIMM# 50 MEMHOT_DIMM#_2 R77 *0_4 MEMHOT_DIMM#
R13 10K_4 DIM1_SA0 NC1 MEM_MA_RESET#1 R19 10K_4 DIM2_SA0 NC1 MEM_MB_RESET#2
198 69 T6 +3V 198 69 T8
SO-DIMM
SO-DIMM
R12 10K_4 DIM1_SA1 SA0 NC2 R20 10K_4 DIM2_SA1 SA0 NC2
200 SA1 NC3 83 200
SA1 NC3 83
120 120
PDAT_SMB NC4 PDAT_SMB NC4
{3,13} PDAT_SMB 195 163 195 163
PCLK_SMB SDA NC/TEST PCLK_SMB SDA NC/TEST
{3,13} PCLK_SMB 197 197
SCL SCL +3V
+3V C27 0.1u/10V_4 199 +3V C26 0.1U/10V_4 199
VDDspd VDDspd
+1.8VSUS C211 0.1u/10V_4 SMVREF_DIM 1 196 +1.8VSUS C208 0.1u/10V_4 SMVREF_DIM 1 196 C219 *0.1u/10V_4
VREF VSS56 VREF VSS56
193 193
C193 C205 VSS55 C200 C206 VSS55
2 190 2 190
VSS0 VSS54 VSS0 VSS54
3 VSS1 VSS53 187 3
VSS1 VSS53
187
2.2u/6.3V_6 1000p/50V_4 8 184 2.2u/6.3V_6 1000p/50V_4 8 184 R110
VSS2 VSS52 oVSS2 VSS52 U10
9 183 9 183
VSS3 VSS51 VSS3 VSS51 *10K_4
12 178 12 178
15
18
21
VSS4
VSS5
VSS6
(H=4) VSS50
VSS49
VSS48
177
172
171
15
18
21
VSS4
VSS5
VSS6
(H=4) VSS50
VSS49
VSS48
177
172
171
+3V 7
6
5
A0
A1
+VS
8
VSS7 VSS47 VSS7 VSS47 A2 MEMHOT_DIMM# R115 *0_4

24 168 24 168 3 CPU_MEMHOT# {13}
VSS8 VSS46 +SMDDR_VREF +1.8VSUS VSS8 VSS46 O.S
27 165 27 165
VSS9 VSS45 VSS9 VSS45 PDAT_SMB
28 VSS10 VSS44 162 28 VSS10 VSS44 162 1 SDA
33 161 33 161 PCLK_SMB 2 4
VSS11 VSS43 VSS11 VSS43 SCL GND
34 156 34 156
VSS12 VSS42 R104 R100 VSS12 VSS42
39 VSS13 VSS41 155 39
VSS13 VSS41
155
A *DS75U+T&R A
40 150 40 150
VSS14 VSS40 *0_4 1K/F_4 VSS14 VSS40
41 149 41 149
42 VSS16 VSS38 145
SMVREF_DIM
42 VSS16 VSS38 145 ADDRESS: 92H Close DDR2 socket
47 VSS17 VSS37 144 47 VSS17 VSS37 144
DDRII
48 139 48 139
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
53 VSS19 VSS35 138 53 VSS19 VSS35 138
54 133 C212 R105 54 133
0.1u/10V_4 1K/F_4
59
60
65
66
71
72
77
78
121
122
127
128
132
59
60
65
66
71
72
77
78
121
122
127
128
132
352-(&7%8
4XDQWD&RPSXWHU,QF
AS0A421-N4RN-7F AS0A421-N4SN-7F
SMbus Address A0 SMbus Address A2 Size
Custom
Document Number
DDR2 SODIMMS: A/B CHANNEL
Rev
1B
1%
5 4 3 2 1
5 4 3 2 1
RS780
RS780 Display Port Support (muxed on GFX)
DP0
GFX_TX0,TX1,TX2 and TX3
09
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7

DP1
AUX1 and HPD1 Memory Side Port
U18B
Close to North Bridge U17 C2A
D D
D4 A5 GFX_TX0P_C C427 0.1u/10V_4 HDMI_DATA2P SPM_BA0 L2 B9 SPM_DQ11
GFX_RX0P GFX_TX0P HDMI_DATA2P {18} BA0 DQ15
C4 PART 2 OF 6 B5 GFX_TX0N_C C426 0.1u/10V_4 HDMI_DATA2N SPM_BA1 L3 B1 SPM_DQ14
GFX_RX0N GFX_TX0N HDMI_DATA2N {18} BA1 DQ14
A3 A4 GFX_TX1P_C C425 0.1u/10V_4 HDMI_DATA1P D9 SPM_DQ12
GFX_RX1P GFX_TX1P HDMI_DATA1P {18} DQ13
B3 B4 GFX_TX1N_C C424 0.1u/10V_4 HDMI_DATA1N SPM_A12 R2 D1 SPM_DQ10
GFX_RX1N GFX_TX1N HDMI_DATA1N {18} A12 DQ12
C2 C3 GFX_TX2P_C C422 0.1u/10V_4 HDMI_DATA0P SPM_A11 P7 D3 SPM_DQ15
GFX_RX2P GFX_TX2P HDMI_DATA0P {18} A11 DQ11
C1 B2 GFX_TX2N_C C421 0.1u/10V_4 HDMI_DATA0N SPM_A10 M2 D7 SPM_DQ9
GFX_RX2N GFX_TX2N HDMI_DATA0N {18} A10/AP DQ10
E5 D1 GFX_TX3P_C C420 0.1u/10V_4 HDMI_CLKP SPM_A9 P3 C2 SPM_DQ13
GFX_RX3P GFX_TX3P HDMI_CLKP {18} A9 DQ9
F5 D2 GFX_TX3N_C C419 0.1u/10V_4 HDMI_CLKN SPM_A8 P8 C8 SPM_DQ8
GFX_RX3N GFX_TX3N HDMI_CLKN {18} A8 DQ8
G5 E2 SPM_A7 P2 F9 SPM_DQ6
GFX_RX4P GFX_TX4P T95 A7 DQ7
G6 E1 SPM_A6 N7 F1 SPM_DQ2
GFX_RX4N GFX_TX4N T97 A6 DQ6
H5 F4 SPM_A5 N3 H9 SPM_DQ7
H6
GFX_RX5P
GFX_RX5N
GFX_TX5P
GFX_TX5N F3 To HDMI CONN SPM_A4 N8
A5
A4
DQ5
DQ4 H1 SPM_DQ1
J6 F1 SPM_A3 N2 H3 SPM_DQ3
GFX_RX6P GFX_TX6P SPM_A2 A3 DQ3 SPM_DQ5
J5 GFX_RX6N GFX_TX6N F2 M7 A2 DQ2 H7
J7 H4 SPM_A1 M3 G2 SPM_DQ0
GFX_RX7P GFX_TX7P SPM_A0 A1 DQ1 SPM_DQ4
J8 GFX_RX7N GFX_TX7N H3 M8 A0 DQ0 G8
PCIE I/F GFX

L5 H1 HDMI_CLKP R293 *80.6/F_4 HDMI_CLKN MEM_VDDQ +1.8V
GFX_RX8P GFX_TX8P HDMI_DATA0P R294 *80.6/F_4 HDMI_DATA0N
L6 GFX_RX8N GFX_TX8N H2 1.8V(700mA)
M8 J2 HDMI_DATA1P R295 *80.6/F_4 HDMI_DATA1N SPM_CLKN K8 A9 R85 *0.015_2010
GFX_RX9P GFX_TX9P HDMI_DATA2P R296 *80.6/F_4 HDMI_DATA2N SPM_CLKP CK VDDQ1
L8 GFX_RX9N GFX_TX9N J1 J8 CK VDDQ2 C1
P7 K4 C3 C210 C203 C184
GFX_RX10P GFX_TX10P SPM_CKE VDDQ3
M7 GFX_RX10N GFX_TX10N K3 K2 CKE VDDQ4 C7
P5 K1 C9 *0.1u/10V_4 *0.1u/10V_4 *1u/6.3V_4
GFX_RX11P GFX_TX11P VDDQ5
M5 GFX_RX11N GFX_TX11N K2 VDDQ6 E9
R8 GFX_RX12P GFX_TX12P M4 VDDQ7 G1
P8 M3 SPM_CS# L8 G3
GFX_RX12N GFX_TX12N CS VDDQ8 L9
R6 GFX_RX13P GFX_TX13P M1 VDDQ9 G7
R5 M2 SPM_WE# K3 G9 MEM_VDDQ
GFX_RX13N GFX_TX13N WE VDDQ10
P4 GFX_RX14P GFX_TX14P N2
P3 N1 SPM_RAS# K7 A1 *BLM18PG221SN1D_6
GFX_RX14N GFX_TX14N RAS VDD1
T4 GFX_RX15P GFX_TX15P P1 VDD2 E1
T3 P2 SPM_CAS# L7 J9 C186 C183
GFX_RX15N GFX_TX15N CAS VDD3
PCIE_TXP0_C
GPP0 X SPM_DM0 VDD4 M9
*1u/10V_4 *10u/6.3V_8
T92 AE3 GPP_RX0P GPP_TX0P AC1 T53 F3 LDM VDD5 R1
C AD4 AC2 PCIE_TXN0_C GPP1 PCIE LAN(Atheros) SPM_DM1 B3 C
T41 GPP_RX0N GPP_TX0N T52 UDM
AE2 AB4 PCIE_TXP1_C C433 0.1u/10V_4 J1
{23} PCIE_RXP1 GPP_RX1P GPP_TX1P PCIE_TXP1 {23} VDDL
AD3 AB3 PCIE_TXN1_C C434 0.1u/10V_4 GPP2 Wireless Lan J7
{23} PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 {23} VSSDL
AD1 AA2 PCIE_TXP2_C C435 0.1u/10V_4 SPM_ODT K9 C201
{20} PCIE_RXP2 GPP_RX2P GPP_TX2P PCIE_TXP2 {20} ODT
AD2 PCIE I/F GPP AA1 PCIE_TXN2_C C436 0.1u/10V_4 GPP3 3G Card
{20} PCIE_RXN2 GPP_RX2N GPP_TX2N PCIE_TXN2 {20}
V5 Y1 PCIE_TXP3_C C468 3G@0.1u/10V_4 *1u/6.3V_4
{20} PCIE_RXP3 GPP_RX3P GPP_TX3P PCIE_TXP3 {20}
W6 Y2 PCIE_TXN3_C C467 3G@0.1u/10V_4 SPM_DQS0P F7
{20} PCIE_RXN3 GPP_RX3N GPP_TX3N PCIE_TXN3 {20} LDQS
U5 Y4 SPM_DQS0N E8 A7
GPP_RX4P GPP_TX4P LDQS VSSQ1
U6 GPP_RX4N GPP_TX4N Y3 VSSQ2 B2
U8 GPP_RX5P GPP_TX5P V1 VSSQ3 B8
U7 GPP_RX5N GPP_TX5N V2 VSSQ4 D2
SPM_DQS1P B7 D8 MEM_VDDQ MEM_VDDQ
SB_TX0P_C C255 0.1u/10V_4 SPM_DQS1N UDQS VSSQ5
{12} PCIE_SB_NB_RX0P AA8 SB_RX0P SB_TX0P AD7 PCIE_NB_SB_TX0P {12} A8 UDQS VSSQ6 E7
Y8 AE7 SB_TX0N_C C259 0.1u/10V_4 F2
{12} PCIE_SB_NB_RX0N SB_RX0N SB_TX0N PCIE_NB_SB_TX0N {12} VSSQ7
AA7 AE6 SB_TX1P_C C277 0.1u/10V_4 F8
{12} PCIE_SB_NB_RX1P SB_RX1P SB_TX1P PCIE_NB_SB_TX1P {12} VSSQ8
Y7 AD6 SB_TX1N_C C269 0.1u/10V_4 SPM_VREF J2 H2 R89 R102
{12} PCIE_SB_NB_RX1N SB_RX1N SB_TX1N PCIE_NB_SB_TX1N {12} VREF VSSQ9
AA5 PCIE I/F SB AB6 SB_TX2P_C C286 0.1u/10V_4 H8
{12} PCIE_SB_NB_RX2P SB_RX2P SB_TX2P PCIE_NB_SB_TX2P {12} VSSQ10
AA6 AC6 SB_TX2N_C C282 0.1u/10V_4 A2 *1K/F_4 *1K/F_4
{12} PCIE_SB_NB_RX2N SB_RX2N SB_TX2N PCIE_NB_SB_TX2N {12} NC#A2
W5 AD5 SB_TX3P_C C290 3G@0.1u/10V_4 E2 A3
{12} PCIE_SB_NB_RX3P SB_RX3P SB_TX3P PCIE_NB_SB_TX3P {12} NC#E2 VSS1
Y5 AE5 SB_TX3N_C C289 3G@0.1u/10V_4 SPM_BA2 L1 E3 SPM_VREF SPM_VREF1
{12} PCIE_SB_NB_RX3N SB_RX3N SB_TX3N PCIE_NB_SB_TX3N {12} NC#L1 VSS2
R3 NC#R3 VSS3 J3
AC8 NB_PCIECALRP R142 1.27K/F_4 R7 N1
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R136 2K/F_4 NC#R7 VSS4 R93 C187 R109 C223
PCE_CALRN(PCE_BCALRN) AB8 +1.1V_VDD_PCIE R8 NC#R8 VSS5 P9
RS780M *1K/F_4 *0.1u/10V_4 *1K/F_4 *0.1u/10V_4

*23BC1147SC02
Qimonda
U18A
{4} HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 {4}
{4} HT_CPU_NB_CAD_L0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_NB_CPU_CAD_L0 {4}
B {4} HT_CPU_NB_CAD_H1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_NB_CPU_CAD_H1 {4} B
{4} HT_CPU_NB_CAD_L1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_NB_CPU_CAD_L1 {4} U18D
{4} HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 {4}
{4} HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 {4} PAR 4 OF 6
U24 F23 SPM_A0 AB12 AA18 SPM_DQ0
{4} HT_CPU_NB_CAD_H3 HT_RXCAD3P HT_TXCAD3P HT_NB_CPU_CAD_H3 {4} MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC)
U25 F22 SPM_A1 AE16 AA20 SPM_DQ1
{4} HT_CPU_NB_CAD_L3 HT_RXCAD3N HT_TXCAD3N HT_NB_CPU_CAD_L3 {4} MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC)
T25 H23 SPM_A2 V11 AA19 SPM_DQ2
{4} HT_CPU_NB_CAD_H4 HT_RXCAD4P HT_TXCAD4P HT_NB_CPU_CAD_H4 {4} MEM_A2(NC) MEM_DQ2/DVO_DE(NC)
T24 H22 SPM_A3 AE15 Y19 SPM_DQ3
{4} HT_CPU_NB_CAD_L4 HT_RXCAD4N HT_TXCAD4N HT_NB_CPU_CAD_L4 {4} MEM_A3(NC) MEM_DQ3/DVO_D0(NC)
P22 J25 SPM_A4 AA12 V17 SPM_DQ4
HYPER TRANSPORT CPU I/F
{4} HT_CPU_NB_CAD_H5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_H5 {4} MEM_A4(NC) MEM_DQ4(NC)

P23 J24 SPM_A5 AB16 AA17 SPM_DQ5
P25 K24 SPM_A6 AB14 AA15 SPM_DQ6
{4} HT_CPU_NB_CAD_H6 HT_RXCAD6P HT_TXCAD6P HT_NB_CPU_CAD_H6 {4} MEM_A6(NC) MEM_DQ6/DVO_D2(NC)
P24 K25 SPM_A7 AD14 Y15 SPM_DQ7
N24 K23 SPM_A8 AD13 AC20 SPM_DQ8
{4} HT_CPU_NB_CAD_H7 HT_RXCAD7P HT_TXCAD7P HT_NB_CPU_CAD_H7 {4} MEM_A8(NC) MEM_DQ8/DVO_D3(NC)
N25 K22 SPM_A9 AD15 AD19 SPM_DQ9
SBD_MEM/DVO_I/F
SPM_A10 AC16 AE22 SPM_DQ10
SPM_A11 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) SPM_DQ11
{4} HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 {4} AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC25 G21 SPM_A12 AC14 AB20 SPM_DQ12
{4} HT_CPU_NB_CAD_L8 HT_RXCAD8N HT_TXCAD8N HT_NB_CPU_CAD_L8 {4} MEM_A12(NC) MEM_DQ12(NC)
AB25 G20 SPM_A13 Y14 AD22 SPM_DQ13
{4} HT_CPU_NB_CAD_H9 HT_RXCAD9P HT_TXCAD9P HT_NB_CPU_CAD_H9 {4} T32 MEM_A13(NC) MEM_DQ13/DVO_D9(NC)
AB24 H21 AC22 SPM_DQ14
{4} HT_CPU_NB_CAD_L9 HT_RXCAD9N HT_TXCAD9N HT_NB_CPU_CAD_L9 {4} MEM_DQ14/DVO_D10(NC)
AA24 J20 SPM_BA0 AD16 AD21 SPM_DQ15
{4} HT_CPU_NB_CAD_H10 HT_RXCAD10P HT_TXCAD10P HT_NB_CPU_CAD_H10 {4} MEM_BA0(NC) MEM_DQ15/DVO_D11(NC)
AA25 J21 SPM_BA1 AE17
{4} HT_CPU_NB_CAD_L10 HT_RXCAD10N HT_TXCAD10N HT_NB_CPU_CAD_L10 {4} MEM_BA1(NC)
Y22 J18 SPM_BA2 AD17 Y17 SPM_DQS0P
{4} HT_CPU_NB_CAD_H11 HT_RXCAD11P HT_TXCAD11P HT_NB_CPU_CAD_H11 {4} MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC)
Y23 K17 W18 SPM_DQS0N
{4} HT_CPU_NB_CAD_L11 HT_RXCAD11N HT_TXCAD11N HT_NB_CPU_CAD_L11 {4} MEM_DQS0N/DVO_IDCKN(NC)
W21 L19 SPM_RAS# W12 AD20 SPM_DQS1P
{4} HT_CPU_NB_CAD_H12 HT_RXCAD12P HT_TXCAD12P HT_NB_CPU_CAD_H12 {4} MEM_RASb(NC) MEM_DQS1P(NC)
W20 J19 SPM_CAS# Y12 AE21 SPM_DQS1N
{4} HT_CPU_NB_CAD_L12 HT_RXCAD12N HT_TXCAD12N HT_NB_CPU_CAD_L12 {4} MEM_CASb(NC) MEM_DQS1N(NC)
V21 M19 SPM_WE# AD18
{4} HT_CPU_NB_CAD_H13 HT_RXCAD13P HT_TXCAD13P HT_NB_CPU_CAD_H13 {4} MEM_WEb(NC)
V20 L18 SPM_CS# AB13 W17 SPM_DM0
{4} HT_CPU_NB_CAD_L13 HT_RXCAD13N HT_TXCAD13N HT_NB_CPU_CAD_L13 {4} MEM_CSb(NC) MEM_DM0(NC)
U20 M21 SPM_CKE AB18 AE19 SPM_DM1 15mA
{4} HT_CPU_NB_CAD_H14 HT_RXCAD14P HT_TXCAD14P HT_NB_CPU_CAD_H14 {4} MEM_CKE(NC) MEM_DM1/DVO_D8(NC)
U21 P21 SPM_ODT V14
{4} HT_CPU_NB_CAD_L14 HT_RXCAD14N HT_TXCAD14N HT_NB_CPU_CAD_L14 {4} MEM_ODT(NC)
U19 P18 AE23 +1.8_IOPLLVDD18_NB BLM18PG221SN1D_6 L4 +1.8V
{4} HT_CPU_NB_CAD_H15 HT_RXCAD15P HT_TXCAD15P HT_NB_CPU_CAD_H15 {4} IOPLLVDD18(NC)
U18 M18 R96 **100/F_4 SPM_CLKP V15 AE24 +1.1_IOPLLVDD_NB BLM18PG221SN1D_6 L5 +1.1V
{4} HT_CPU_NB_CAD_L15 HT_RXCAD15N HT_TXCAD15N HT_NB_CPU_CAD_L15 {4} MEM_CKP(NC) IOPLLVDD(NC)
SPM_CLKN W14 MEM_CKN(NC) C188 C189
{4} HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 {4} IOPLLVSS(NC) AD23 26mA
T23 H25 R224 *40.2/F_4 SPM_COMPP AE12
{4} HT_CPU_NB_CLK_L0 HT_RXCLK0N HT_TXCLK0N HT_NB_CPU_CLK_L0 {4} MEM_COMPP(NC)
AB23 L21 MEM_VDDQ R223 *40.2/F_4 SPM_COMPN AD12 AE18 SPM_VREF1 2.2u/6.3V_6 2.2u/6.3V_6
{4} HT_CPU_NB_CLK_H1 HT_RXCLK1P HT_TXCLK1P HT_NB_CPU_CLK_H1 {4} MEM_COMPN(NC) MEM_VREF(NC)
A {4} HT_CPU_NB_CLK_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_NB_CPU_CLK_L1 {4} A
RS780M
{4} HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 {4}
C2A R103
{4} HT_CPU_NB_CTL_L0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_NB_CPU_CTL_L0 {4} MEM@0_6
{4} HT_CPU_NB_CTL_H1 R21 HT_RXCTL1P HT_TXCTL1P P19 HT_NB_CPU_CTL_H1 {4}
{4} HT_CPU_NB_CTL_L1 R20 HT_RXCTL1N HT_TXCTL1N R18 HT_NB_CPU_CTL_L1 {4}
R97 301/F_4 HT_RXCALP C23 B24 HT_TXCALP R94 301/F_4
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 HT_RXCALN HT_TXCALN B25
Close to NB within 1" RS780M Close to NB within 1"

352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
RS780-HT LINK/PCIE/MEM I/F 1/4
1%
Date: Friday, July 03, 2009 Sheet 9 of 32
5 4 3 2 1
5 4 3 2 1
+3V
10
L33
3.3V(110mA)
+3V_AVDD_NB
RS780 +1.8V
BLM18PG221SN1D_6
1.8V(20mA)
C432
2.2u/6.3V_6
C431
0.1u/10V_4
R119 0_6 +1.8V_AVDDDI_NB
C232
0.1u/10V_4
D 1.8V(4mA) D
L10 U18C
+1.8V_AVDDQ_NB F12 A22
AVDD1(NC) TXOUT_L0P(NC) INT_TXLOUT0+ {17}
BLM18PG221SN1D_6 E12 PART 3 OF 6 B22
AVDD2(NC) TXOUT_L0N(NC) INT_TXLOUT0- {17}
C213 F14 A21
AVDDDI(NC) TXOUT_L1P(NC) INT_TXLOUT1+ {17}
G15 AVSSDI(NC) TXOUT_L1N(NC) B21 INT_TXLOUT1- {17}
2.2U/6.3V_6 H15 B20
AVDDQ(NC) TXOUT_L2P(NC) INT_TXLOUT2+ {17}
H14 AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) A20 INT_TXLOUT2- {17}
A19 TXLOUT3+
TXOUT_L3P(NC) T26
150R Termination < 1000 mils trace E17 B19 TXLOUT3-
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) T27
CRT/TVOUT
F17 Y(DFT_GPIO2)
CLOSE TO NB Without TV-Out feature F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18
TXOUT_U0N(NC) A18
{17} CRT_R G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17
G17 REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) B17 INT_TXLCLKOUT+ {17}
{17} CRT_G E18 GREEN(DFT_GPIO1) TXOUT_U2P(NC) D20
F18 GREENb(NC) TXOUT_U2N(NC) D21
{17} CRT_B E19 D18 C13
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) *100p/50V_4
F19 BLUEb(NC) TXOUT_U3N(NC) D19
R118 R117 R99 HSYNC A11 B16

+1.1V {17} HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) +1.8V
VSYNC B11 A16 1.8V(15mA)
{17} VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) INT_TXLCLKOUT- {17}
133/F_4 150/F_4 150/F_4 L30 1.1V(65mA) F8 D16
{17} DDCCLK DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
E8 D17 L29
{17} DDCDAT DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
BLM18PG221SN1D_6
C400 R124 715/F_6 DAC_RSET_NB G14 BLM18PG221SN1D_6
DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB C398
VDDLTP18(NC) A13
2.2u/6.3V_6 +1.1V_PLLVDD A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC) 2.2u/6.3V_6 +1.8V
D14 PLLVDD18(NC) +1.8V_VDDLT_18_NB
LVTM
B12 PLLVSS(NC) VDDLT18_1(NC) A15
+1.8V
PLL PWR
B15 L26
L32 +1.8V_VDDA18HTPLL VDDLT18_2(NC)
H17 VDDA18HTPLL VDDLT33_1(NC) A14
1.8V(20mA) B14 BLM18PG221SN1D_6
BLM18PG221SN1D_6 +1.8V_VDDA18PCIEPLL VDDLT33_2(NC) C397 C394
D7 VDDA18PCIEPLL1
C C418 E7 C14 1.8V(300mA) C
+1.8V VDDA18PCIEPLL2 VSSLT1(VSS) 0.1u/10V_4 4.7u/6.3V_6
1.8V(20mA) VSSLT2(VSS) D15
L27 2.2u/6.3V_6 NB_RST#_IN D8 C16
+1.8V_VDDA18HTPLL NB_PWRGD_IN SYSRESETb VSSLT3(VSS)
{16} NB_PWRGD_IN A10 POWERGOOD VSSLT4(VSS) C18
BLM18PG221SN1D_6 NB_LDT_STOP# C10 C20
NB_ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS)
PM
C395 C12 E20
ALLOW_LDTSTOP VSSLT6(VSS)
VSSLT7(VSS) C22
2.2u/6.3V_6 HT_REFCLKP C25
{3} HT_REFCLKP HT_REFCLKP
HT NB HT_REFCLKN C24 I
{3} HT_REFCLKN HT_REFCLKN
1.8V(120mA) NB_REFCLK_P
L18 E11
{3} EXT_NB_OSC REFCLK_P/OSCIN(OSCIN)
+1.8V_VDDA18PCIEPLL NB_REFCLK_N
CLOCKs
F11 REFCLK_N(PWM_GPIO3) I
BLM18PG221SN1D_6 E9 INT_LVDS_DIGON
LVDS_DIGON(PCE_TCALRP) INT_LVDS_DIGON {17}
C291 C284 T2 F7 LVDS_BKL_PWM
{3} NBGFX_CLKP GFX_REFCLKP LVDS_BLON(PCE_RCALRP)
+1.1V R253 4.7K_4 R251 4.7K_4 T1 I/O G12 LVDS_BKL_EN
{3} NBGFX_CLKN GFX_REFCLKN LVDS_ENA_BL(PWM_GPIO2)
10u/6.3V_8 2.2u/6.3V_6
External CLK GPP_REFCLKP U1
T96 GPP_REFCLKP
GPP_REFCLKN U2 I/O
T94 GPP_REFCLKN
SB_REFCLKP V4
{3} SB_REFCLKP GPPSB_REFCLKP(SB_REFCLKP)
North Bridge A-Link SB_REFCLKN V3
{3} SB_REFCLKN GPPSB_REFCLKN(SB_REFCLKN)
LCD_DDCCLK B9
{17} LCD_DDCCLK I2C_CLK
LCD_DDCDAT
{17} LCD_DDCDAT
HDMI_DDC_DATA
A9
B8
I2C_DATA MIS. TMDS_HPD(NC) D9
D10 TMDS_HPD1
HDMI_HPD {18}
{18} HDMI_DDC_DATA DDC_DATA0/AUX0N HPD(NC) T35
HDMI_DDC_CLK A8
{18} HDMI_DDC_CLK DDC_CLK0/AUX0P
B7 D12 SUS_STAT#_NB R132 0_4
T42 AUX1P(NC) TVCLKIN(PWM_GPIO5) SUS_STAT# {13}
T98 A7 AUX1N(NC)
AE8 R_NB_THRMDA
THERMALDIODE_P T88
+NB_CORE_ON B10 AD8 R_NB_THRMDC
{27} +NB_CORE_ON STRP_DATA THERMALDIODE_N T87
G11 D13 TEST_EN R131 1.8K_4
RSVD TESTMODE
R169 150/F_4 RS780_AUX_CAL C8 AUX_CAL(NC)
B RS780M B
North Bridge RESET STRAP DEBUG BUS GPIO LVDS BLON

C2A
RS780M: Enables Side port memory +3V +15V
INT_LVDS_DIGON R163 4.7K_4
RS780 +3V R257 MEM@3K_4 HSYNC
1
R141 0_4 NB_RST#_IN
{12,14} A_RST#
R262 *3K_4 R161 R160
10K_4 10K_4
RX780 For Side Port Enables/Disable VGS-TH<1.7V
2
R146 *0_4 NB_LCD_CONTROL
{6,12} CPU_LDT_RST# 0 : Enable(Default) 1 : Disable NB_LCD_CONTROL
3
STRAP_DEBUG_BUS_GPIO_ENABLEb LVDS_BKL_EN 3 2 1 INT_LVDS_BLON {17} 2 Q23
2N7002E-G
3
Controlled by SB Q21
FDV301N R159 4.7K_4
R135 0_4 NB_LDT_STOP# +3V R254 3K_4 VSYNC
{6,12} CPU_LDT_STOP#
1
NB_PWRGD_IN 2
R256 *3K_4 Q24
BSS138_NL/SOT23
Enables the Test Debug Bus using GPIO.(RS780 -->VSYNC#)
1
A
+1.8V 1 : Enable(Defult) 0 : Disable NB_LCD_CONTROL
A
2
R151 AUX CAL Value need update LVDS_BKL_PWM 3 1 INT_LVDS_PWM {17}

Controlled by SB 1K_4 Q22
*FDV301N R149 *4.7K_4
{12} ALLOW_LDTSTOP
R156 0_4 NB_ALLOW_LDTSTOP +3V R272 10K_4 +NB_CORE_ON
352-(&7%8
R276 *2.2K_4 4XDQWD&RPSXWHU,QF
Northbridge Core Voltage
1 : 1.0V 0 : 1.1V (default) Custom 1B
RS780-SYSTEM/STRAPS I/F 3/5
1%
Date: Thursday, June 04, 2009 Sheet 10 of 32
5 4 3 2 1
5 4 3 2 1
RS740/RX780/RS780 POWER DIFFERENCE TABLE 11
AE14
PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780
AC3
AC4
M11
AA4
AB5
AB1
AB7
AE1
AE4
AB2
D11
E14
E15
K14
L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4
G8
D3
D5
H7
R7
N4
R1
R2
R4
U4
A2
B1
E4
P6
V7
V8
V6
Y6
L1
L2
L4
L7
J4
VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V
VSSAPCIE1 U18F
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VDDHTRX NC +1.1V +1.1V AVDD +3.3V NC +3.3V
D D
VDDHTTX +1.2V +1.2V +1.2V AVDDDI +1.8V NC +1.8V
VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

PART 6/6
GROUND VDDG18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V
VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V
VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V

VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDD_MEM +1.8V/1.5V NC +1.8V/1.5V VDDLTP18 +1.8V NC +1.8V
RS780M VDDG33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
IOPLLVDD18 +1.8V NC +1.8V VDDLT33 +3.3V NC NC
C C
+1.1V
+1.1V_VDD_PCIE +1.1V
L11 U18E
+1.1V_VDDHT
1.1V(0.6A) 1.1V(2.5A)
J17 VDDHT_1 VDDPCIE_1 A6
BLM21PG221SN1D_8 K16 PART 5/6 B6
C230 C226 C225 C231 VDDHT_2 VDDPCIE_2 C270 C272 C267 C288 C285
L16 VDDHT_3 VDDPCIE_3 C6
M16 VDDHT_4 VDDPCIE_4 D6
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 P16 E6 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4 1u/6.3V_4 4.7u/6.3V_6
VDDHT_5 VDDPCIE_5
R16 VDDHT_6 VDDPCIE_6 F6
T16 VDDHT_7 VDDPCIE_7 G7
L6 1.1V(0.7A) H8
+1.1V_VDDHTRX VDDPCIE_8
H18 VDDHTRX_1 VDDPCIE_9 J9
BLM21PG221SN1D_8 G19 K9
C191 C215 C190 C216 VDDHTRX_2 VDDPCIE_10
F20 VDDHTRX_3 VDDPCIE_11 M9
E21 VDDHTRX_4 VDDPCIE_12 L9
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 D22 P9
VDDHTRX_5 VDDPCIE_13
B23 VDDHTRX_6 VDDPCIE_14 R9
+1.2V A23 T9
L8 VDDHTRX_7 VDDPCIE_15
1.2V(0.4A) VDDPCIE_16 V9
+NB_CORE
+1.2V_VDDHTTX AE25 U9
BLM21PG221SN1D_8 VDDHTTX_1 VDDPCIE_17
C207
AD24 VDDHTTX_2 (7A)
C209 C214 C222 C194 AC23 K12 +NB_CORE
VDDHTTX_3 VDDC_1
AB22 VDDHTTX_4 VDDC_2 J14
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 AA21 U16 C251 C247 C252 C248 C228
VDDHTTX_5 VDDC_3
Y20 VDDHTTX_6 VDDC_4 J11
W19 K15 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/6.3V_8
POWER
VDDHTTX_7 VDDC_5
V18 VDDHTTX_8 VDDC_6 M12
U17 VDDHTTX_9 VDDC_7 L14
B B
T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 VDDHTTX_12 VDDC_10 M15
+1.8V M17 N12
L17 VDDHTTX_13 VDDC_11 C235 C241 C250 C227 C229
+1.8V_VDDA18PCIE
1.8V(0.7A) VDDC_12 N14
J10 VDDA18PCIE_1 VDDC_13 P11
BLM21PG221SN1D_8 P10 P13 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/6.3V_8 *10u/6.3V_8
C261 C263 C271 C258 C253 C260 VDDA18PCIE_2 VDDC_14
K10 VDDA18PCIE_3 VDDC_15 P14
M10 VDDA18PCIE_4 VDDC_16 R12
4.7u/6.3V_6 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 L10 R15
VDDA18PCIE_5 VDDC_17
W9 VDDA18PCIE_6 VDDC_18 T11
H9 VDDA18PCIE_7 VDDC_19 T15
T10 U12
+1.8V
R10
VDDA18PCIE_8
VDDA18PCIE_9
VDDC_20
VDDC_21 T14 C2A +1.8V
Y9 VDDA18PCIE_10 VDDC_22 J16 1.8V(70mA)
AA9 +1.8V_VDD_MEM R127 *0_6
R157 0_6 +1.8V_VDDG18_NB VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
AD9 AA11 C246 C244 C245 C243 C254 R128 MEM@0_6
C287 VDDA18PCIE_13 VDD_MEM2(NC)
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
U10 AD10 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *4.7u/6.3V_6
1u/6.3V_4 VDDA18PCIE_15 VDD_MEM4(NC)
1.8V(10mA) VDD_MEM5(NC) AB10
F9 VDDG18_1(VDD18_1) VDD_MEM6(NC) AC10
G9 +3V
+1.8V VDDG18_2(VDD18_2)
R226 *0_6
1.8V(25mA) AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 3.3V(60mA)
+1.8V_VDD18_MEM AD11 H12 +3V_VDDG33V R290 0_6
VDD18_MEM2(NC) VDDG33_2(NC)
R227 MEM@0_6 C403 RS780M C429 C430
A
*1u/6.3V_4 0.1u/10_4 0.1u/10_4 A
C2A
352-(&7%8
RS780 1%
Size
Custom
4XDQWD&RPSXWHU,QF
Document Number
RS780-POWER/GND 3/3
Rev
1B

5 4 3 2 1
5 4 3 2 1
SB710 {18,20,21,22,23} PLTRST#

C440 150p/50V_6
R304
R309
33_4
33_4 A_RST#_SB N2
U20A
SB710 P4
D3A
Add the series 33 ohm damping resistor for EMI.
PCI_CLK0_R
12
{10,14} A_RST# A_RST# PCICLK0 T72
Part 1 of 5 P3 PCI_CLK1_R
PCICLK1 T69
PCI CLKS
{9} PCIE_SB_NB_RX0P C448 0.1u/10V_4 A_RX0P_C V23 P1 PCI_CLK2_R R496 22_4 PCI_CLK2 {16}
C450 0.1u/10V_4 A_RX0N_C PCIE_TX0P PCICLK2 PCI_CLK3_R R497 22_4
{9} PCIE_SB_NB_RX0N V22 PCIE_TX0N PCICLK3 P2 PCI_CLK3 {16}
{9} PCIE_SB_NB_RX1P C447 0.1u/10V_4 A_RX1P_C V24 T4 PCI_CLK4_R R498 22_4 PCI_CLK4 {16}
C446 0.1u/10V_4 A_RX1N_C PCIE_TX1P PCICLK4 PCI_CLK5_R R499 22_4
{9} PCIE_SB_NB_RX1N V25 PCIE_TX1N PCICLK5/GPIO41 T3 PCI_CLK5 {16}
D C443 0.1u/10V_4 A_RX2P_C U25 D
{9} PCIE_SB_NB_RX2P PCIE_TX2P
{9} PCIE_SB_NB_RX2N C445 0.1u/10V_4 A_RX2N_C U24
C439 0.1u/10V_4 A_RX3P_C PCIE_TX2N
{9} PCIE_SB_NB_RX3P T23
C441 0.1u/10V_4 A_RX3N_C PCIE_TX3P PCIRST#_SB700 R302 33_4
{9} PCIE_SB_NB_RX3N T22 N1 PCIRST# {20}
PCIE_TX3N PCIRST#
PCI EXPRESS INTERFACE

U22 C438 150p/50V_4
{9} PCIE_NB_SB_TX0P PCIE_RX0P
{9} PCIE_NB_SB_TX0N U21 U2
PCIE_RX0N AD0
{9} PCIE_NB_SB_TX1P U19 P7
PCIE_RX1P AD1
{9} PCIE_NB_SB_TX1N V19 V4 +3V
PCIE_RX1N AD2
{9} PCIE_NB_SB_TX2P R20 T1
PCIE_RX2P AD3
{9} PCIE_NB_SB_TX2N R21 V3
PCIE_RX2N AD4
{9} PCIE_NB_SB_TX3P R18 U1
PCIE_RX3P AD5 REQ0# R188 *8.2K_4
{9} PCIE_NB_SB_TX3N R17 V1
PCIE_RX3N AD6
V2
R300 562/F_4 SB_PCIE_CALRP AD7 REQ1# R190 *8.2K_4
T25 T2
R298 2.05K/F_4 SB_PCIE_CALRN PCIE_CALRP AD8
+1.2V_PCIE_VDDR T24 W1
PCIE_CALRN AD9
T9
L20 BLM18PG221SN1D_6 +1.2V_PCIE_PVDD AD10
+1.2V P24 R6
PCIE_PVDD AD11
C329 C316
43mA AD12
R7
P25 R5
PCIE_PVSS AD13
U8
*10u/6.3V_6 2.2u/6.3V_6 AD14
U5
AD15
Y7
RTC XTAL
AD16
W8
AD17
V9
AD18
Y8
AD19
AA8
AD20
Y4
AD21
Y3
AD22 AD23
Y2 AD23 {16}
C AD23 AD24 C
AA2 AD24 {16}
RTC_X1 AD24 AD25
AB4 AD25 {16}
AD25 AD26
Y6 {3} SBSRC_CLKP N25 AA1 AD26 {16}
PCIE_RCLKP/NB_LNK_CLKP AD26 AD27
{3} SBSRC_CLKN N24 AB3 AD27 {16}
PCIE_RCLKN/NB_LNK_CLKN AD27 AD28
3 2 AB2 AD28 {16}
NB_DISP_CLKP AD28 AD29
T103 K23 AC1 AD29 {16}
PCI INTERFACE
NB_DISP_CLKN NB_DISP_CLKP AD29 AD30
T104 K22 AC2 AD30 {16}
NB_DISP_CLKN AD30 AD31
AD1 T110
RTC_X2 NB_HT_CLKP AD31
4 1 T99 M24
NB_HT_CLKP CBE0#
W2
R143 NB_HT_CLKN M25 100MHZ U7
T106 NB_HT_CLKN CBE1#
AA7
*20M_6 32.768KHZ CPU_HT_CLKP CBE2#
T73 P17 Y1
R145 20M_6 CPU_HT_CLKN CPU_HT_CLKP CBE3#
T68 M18 AA6
CPU_HT_CLKN FRAME#
W5
C279 C278 SLT_GFX_CLKP DEVSEL# GNT3# R337 *8.2K_4
T66 M23 AA5
SLT_GFX_CLKN SLT_GFX_CLKP IRDY#
T65 M22 Y5
18p/50V_4 18p/50V_4 SLT_GFX_CLKN TRDY#
U6
PAR
J19 W6
GPP_CLK0P STOP#
J18 W4
GPP_CLK0N PERR#
V7
SERR# REQ0#
L20 AC3
GPP_CLK1P REQ0# REQ1#
L19 AD4
GPP_CLK1N REQ1# REQ2#
AB7 T80
REQ2#
CLOCK GENERATOR
M19 AE6 REQ3#
GPP_CLK2P REQ3#/GPIO70 T117
M20 AB6 REQ4#
GPP_CLK2N REQ4#/GPIO71 T81
RTC
AD2
GNT0#
N22 GPP_CLK3P GNT1# AE4
P22 AD5 GNT2#
GPP_CLK3N GNT2# T112
AC6 GNT3#
GNT3#/GPIO72 T116
L18 AE5 GNT4#
B {3} EXT_SB_OSC 25M_48M_66M_OSC GNT4#/GPIO73 T120 B
AD6 CLKRUN#_EC
CLKRUN# CLKRUN#_EC {22}
LOCK# V5
SB700_25M_X1 J21
T60 25M_X1
+3VPCU 2 1 AD3 HDPINT {19}
D19 RB500 VCCRTC INTE#/GPIO33
(30mils) INTF#/GPIO34 AC4 HDPLOC {19}
AE2 T113
SB700_25M_X2 INTG#/GPIO35
T63 J20 25M_X2 INTH#/GPIO36 AE3 T119
+3VRTC R305 510/F_6
G22 LPCCLK0_R R239 22_4

LPCCLK0 PCLK_591 {16,22}
1
C444 G2 E22 LPCCLK1_R R237 22_4

LPCCLK1 PCLK_DEBUG {16,20}
RTC_X1 A3 H24
X1 LAD0 LAD0 {20,22}
RTC XTAL
1u/10V_4 H23
LAD1 LAD1 {20,22}
R310 *SHORT_ PAD1 J25 LAD2 {20,22}
2
LAD2
1K_4 LAD3 J24 LAD3 {20,22}
LPC
RTC_X2 B3 H25
X2 LFRAME# LFRAME# {20,22}
LDRQ0# H22 LDRQ0#_SB {20}
AB8 LDRQ1#_SB
LDRQ1#/GNT5#/GPIO68 T78
AD7 SB_GPIO65
BMREQ#/REQ5#/GPIO65 T111
V15 SERIRQ
+5VPCU SERIRQ SERIRQ {20,22}
(20mils) R285 R281

{10} ALLOW_LDTSTOP F23 ALLOW_LDTSTP
{6} CPU_PROCHOT#_SB F24 C3 RTC_CLK {16}
TERM12 TERM11 TERM15 PROCHOT# RTCCLK INTRUDER_ALERT#
1 3 {6} CPU_PWRGD F22 C2 T89
LDT_PG INTRUDER_ALERT#
CPU
RTC
{6,10} CPU_LDT_STOP# G25 LDT_STP# VBAT B2 VCCRTC
Q35 2K/F_4 2K/F_4 {6,10} CPU_LDT_RST# G24
MMBT3904 R279 LDT_RST# C295 C296
20MIL
2
6.8K/F_4 SB710 1u/10V_4 0.1u/10V_4
A C2A TERM14
(20mils) A
1
CN10
R283
AAA-BAT-046-K03
15K/F_6
352-(&7%8
2
4XDQWD&RPSXWHU,QF
Custom 1B
SB710-PCIE/PCI/CPU/LPC 1/4
1%
Date: Wednesday, July 01, 2009 Sheet 12 of 32
5 4 3 2 1
5 4 3 2 1
SB710 U20D
CLK_48M_USB R129
EMI
*10_4 C242 *10p/50V_4
13
SB710 Part 4 of 5 48MHz
T54 E1
RI# PCI_PME#/GEVENT4# CLK_48M_USB
T90 E2 C8 CLK_48M_USB {3}
SLP_S2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC
T61 H7
SLP_S2/GPM9# USB_RCOMP_SB R158 11.8K/F_6
{22} SUSB# F5
SLP_S3# USB_RCOMP
G8 Input
USB MISC
D
{22} SUSC# G1 D
SLP_S5#
H2
ACPI / WAKE UP EVENTS

{22} DNBSWON# PWR_BTN#
{16} SB_PWRGD_IN H1
SUS_STAT# PWR_GOOD
{10} SUS_STAT# K3
R255 *2.2K_4 SB_TEST2 SUS_STAT#
H5 E6
R259 *2.2K_4 SB_TEST1 TEST2 USB_FSD13P
+3V_S5 H4 E7
R258 *2.2K_4 SB_TEST0 TEST1 USB_FSD13N
H3
TEST0
Y15 F7
USB 1.1
{22} GATEA20 GA20IN/GEVENT0# USB_FSD12P
{22} RCIN# W15 E8
KBRST#/GEVENT1# USB_FSD12N
{22} SCI# K4
LPC_PME#/GEVENT3#
T100 K24 H11 USBP11+ {21}
+3V_S5 LPC_SMI#/EXTEVNT1# USB_HSD11P
SCL1/SDATA1 SCL2/SDATA2 is 3V_S5 tolerance T93 F1
S3_STATE/GEVENT5# USB_HSD11N
J10 USBP11- {21} 13.3" CARD Reader
AMD datasheet define it SYS_RST# J2
SYS_RESET#/GPM7#
{20,23} PCIE_WAKE# H6 E11 USBP10+ {17}
GPM6# WAKE#/GEVENT8# USB_HSD10P
R240 2.2K_4 SB_SCLK2
T91 F2
BLINK/GPM6# USB_HSD10N
F11 USBP10- {17} CCD
{6} CPU_THERMTRIP# J6
SMBALERT#/THRMTRIP#/GEVENT2#
{16} WD_PWRGD W14 A11 USBP9+ {21}
R241 2.2K_4 SB_SDATA2 NB_PWRGD USB_HSD9P
USB_HSD9N
B11 USBP9- {21} BLUETOOTH
{22} RSMRST# D3
R282 2.2K_4 SB_SMBCLK1 RSMRST#
C10 USBP8+ {20}
USB_HSD8P
R273 2.2K_4 SB_SMBDATA1 USB_HSD8N
D10 USBP8- {20} Min-Card(WLN)
BOARD_ID2 AE18 G11
{18} BOARD_ID2 SATA_IS0#/GPIO10 USB_HSD7P USBP7+ {20}
BOARD_ID1 AD18 H12 3G Min-Card
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBP7- {20}
R152 47K_4 CPUSB# BOARD_ID0 AA19
SMARTVOLT/SATA_IS2#/GPIO4
W17 E12
3G card detect
T79
T75 V17
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
USB_HSD6P
USB_HSD6N
E14
USBP6+
USBP6-
{20}
{20} 3G SIM-Card D3A
T76 W20
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 Move the 11.6" Card reader
{21} SPKR W21 C12 T122
SPKR/GPIO2 USB_HSD5P
USB 2.0
PCLK_SMB AA18 D12 11.6" CARD Reader
{3,8} PCLK_SMB SCL0/GPOC0# USB_HSD5N T123
PDAT_SMB W18
+3V {3,8} PDAT_SMB SDA0/GPOC1#
SCL0/SDATA0 is 3V tolerance SB_SMBCLK1 K1 B12
{20,23} SB_SMBCLK1 SCL1/GPOC2# USB_HSD4P USBP4+ {19}
AMD datasheet define it SB_SMBDATA1 K2 A12 ODD
C {20,23} SB_SMBDATA1 SDA1/GPOC3# USB_HSD4N USBP4- {19} C
GPIO
BOARD_ID3 AA20
R184 10K_4 DDC1_SCL/GPIO9
Y18 G12 USBP3+ {18}
R196 2.2K_4 PCLK_SMB CPUSB# DDC1_SDA/GPIO8 USB_HSD3P
{20} CPUSB# C1
LLB#/GPIO66 USB_HSD3N
G14 USBP3- {18} USB Connector(HDMI/USB BOARD)
T82 Y19
R201 2.2K_4 PDAT_SMB SHUTDOWN#/GPIO5
{19} HDPACT G5 H14 T57
DDR3_RST#/GEVENT7# USB_HSD2P
H15 T62
R172 4.7K_4 SUS_STAT# USB_HSD2N
A13 USBP1+ {21}
D14 USB_HSD1P
USB_HSD1N
B13 USBP1- {21} USB Connector (Audio Board)
{8} CPU_MEMHOT# 1 2
B14 USBP0+ {21}
CPU_MEMHOT#_IN USB_HSD0P
CH501H-40PT
USBOC5_GPM5
B9
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N
A14 USBP0- {21} USB Connector (Audio Board)
T39 B8
USBOC4_GPM4 USB_OC5#/IR_TX0/GPM5#
T44 A8 A18
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
USB OC
USBOC3_GPM3 A9 B18
G1 T49 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
USBOC2_GPM2 E5 F21
T59 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10
2 1 SYS_RST# F8 D21 SB_SCLK2
{18,22} USB_SLEEP_OC# USB_OC1#/GPM1# SCL2/IMC_GPIO11 SB_SCLK2 {20}
E4 F19 SB_SDATA2
{21,22} USBOC#0 USB_OC0#/GPM0# SDA2/IMC_GPIO12 SB_SDATA2 {20}
*SHORT_ PAD1 E20
SCL3_LV/IMC_GPIO13 SB_SCLK3 {6}
ACZ_BCLK M1 E21
AZ_BITCLK SDA3_LV/IMC_GPIO14 SB_SDATA3 {6}
ACZ_SDOUT M2 E19
AZ_SDOUT IMC_PWM1/IMC_GPIO15
{21} ACZ_SDIN0 J7 D19 SB_GPIO16 {16}
AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16
T64 J8
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17
E18 SB_GPIO17 {16} SPI/LPC define
HD AUDIO
T67 L8
AZ_SDIN2/GPIO44
T107 M3 G20
ACZ_SYNC AZ_SDIN3/GPIO46 IMC_GPIO18
L6 G21
ACZ_RST# AZ_SYNC IMC_GPIO19
{16} ACZ_RST# M4 D25
AZ_RST# IMC_GPIO20
L5 D24
INTEGRATED uC
AZ_DOCK_RST#/GPM8# IMC_GPIO21
C25
IMC_GPIO22
C24
IMC_GPIO23
B25
IMC_GPIO24
C23
B
IMC_GPIO25 B
B24
IMC_GPIO26
B23
IMC_GPIO27
A23
IMC_GPIO28
C22
HD Audio Interface
IMC_GPIO29
A22
IMC_GPIO30
B22
IMC_GPIO31
B21
IMC_GPIO32
A21
IMC_GPIO33
H19 D20
IMC_GPIO0 IMC_GPIO34
H20 C20
INTEGRATED uC
To Azalia H21
SPI_CS2#/IMC_GPIO2 IMC_GPIO36
A20
T56 F25 B20
IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37
B19
R299 BK1005HM121_4 ACZ_BCLK IMC_GPIO38
{21} BIT_CLK_AUDIO D22 A19
E24 D18
C437 22p/50V_4 R292 *10K_4 IMC_GPIO5 IMC_GPIO40
E25 C18
D23
IMC_GPIO7
SB710
R289 33_4 ACZ_SDOUT

{21} ACZ_SDOUT_AUDIO
MB ID Selection Table
C423 *10p/50V_4 R286 *10K_4
BOARD_ID BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3
MB ID +3V
W/ G-Sensor H
W/O G-Sensor L R189 *W/O@1K_4 BOARD_ID0 R193 GS@10K_4
A W/ 3G H A
W/O 3G L R197 *W/O@1K_4 BOARD_ID1 R194 3G@10K_4
R174 33_4 ACZ_SYNC
{21} ACZ_SYNC_AUDIO
W/ HDMI H
C330 *10p/50V_4 W/O HDMI L R198 *W/O@1K_4 BOARD_ID2 R199 HDM@10K_4
W/ SIDE-PORT MEMORY H
W/O SIDE-PORT MEMORY L R179 W/O@1K_4 BOARD_ID3 R185 *SPM@10K_4
352-(&7%8
R284 33_4 ACZ_RST#
4XDQWD&RPSXWHU,QF
{21} ACZ_RST#_AUDIO
Custom 1B
SB710-ACPI/GPIO/USB 2/4
1%
5 4 3 2 1
5 4 3 2 1
SB710 PLACE SATA AC COUPLING CAPS CLOSE TO SB700

U20B
14
C461 0.01u/16V_4 SATA_TXP0_C AD9
SB710 AA24
{19} SATA_TXP0 SATA_TX0P IDE_IORDY
C460 0.01u/16V_4 SATA_TXN0_C AE9 Part 2 of 5 AA25
D {19} SATA_TXN0 SATA_TX0N IDE_IRQ D
SATA HDD C459 0.01u/16V_4 SATA_RXN0_C AB10
IDE_A0 Y22
AB23
{19} SATA_RXN0 SATA_RX0N IDE_A1
C458 0.01u/16V_4 SATA_RXP0_C AC10 Y23
{19} SATA_RXP0 SATA_RX0P IDE_A2
IDE_DACK# AB24
T109 AE10 SATA_TX1P IDE_DRQ AD25
T115 AD10 SATA_TX1N IDE_IOR# AC25
IDE_IOW# AC24
T114 AD11 SATA_RX1N IDE_CS1# Y25
T118 AE11 SATA_RX1P IDE_CS3# Y24
T77 AB12 SATA_TX2P IDE_D0/GPIO15 AD24

T83 AC12 SATA_TX2N IDE_D1/GPIO16 AD23
IDE_D2/GPIO17 AE22
ATA 66/100/133
T84 AE12 SATA_RX2N IDE_D3/GPIO18 AC22
T108 AD12 SATA_RX2P IDE_D4/GPIO19 AD21
IDE_D5/GPIO20 AE20
C456 0.01u/16V_4 SATA_TXP3_C AD13 AB20
{19} SATA_TXP3 SATA_TX3P IDE_D6/GPIO21
SERIAL ATA
C457 0.01u/16V_4 SATA_TXN3_C
SATA ODD {19} SATA_TXN3 AE13 SATA_TX3N IDE_D7/GPIO22 AD19
AE19
C454 0.01u/16V_4 SATA_RXN3_C IDE_D8/GPIO23
{19} SATA_RXN3 AB14 SATA_RX3N IDE_D9/GPIO24 AC20
C455 0.01u/16V_4 SATA_RXP3_C AC14 AD20
{19} SATA_RXP3 SATA_RX3P IDE_D10/GPIO25
IDE_D11/GPIO26 AE21
AE14 SATA_TX4P IDE_D12/GPIO27 AB22
C AD14 SATA_TX4N IDE_D13/GPIO28 AD22 C
IDE_D14/GPIO29 AE23
AD15 SATA_RX4N IDE_D15/GPIO30 AC23
AE15
NOTE: SATA_RX4P
Support USB Mode 4 Function.
Resister IS 1K 1% FOR 25MHz AB16 SATA_TX5P
AC16 SATA_TX5N
XTAL, 4.99K 1% FOR 100MHz G6 USB_BUS_SW0
USB_BUS_SW0 {18}
SPI_DI/GPIO12 USB_BUS_SW1
INTERNAL CLOCK AE16 SATA_RX5N SPI_DO/GPIO11 D2 USB_BUS_SW1 {18}
AD16 SATA_RX5P SPI_CLK/GPIO47 D1 T51
F4 USB_BUS_SW2
SPI_HOLD#/GPIO31 USB_BUS_SW2 {18}
SPI ROM
R186 1K/F_4 SATA_RBIAS_PN V12 F3 USB_BUS_SW3
SATA_CAL SPI_CS#/GPIO32 USB_BUS_SW3 {18}
C349 27p/50V_4 SATA_X1 SATA_X1 Y12 U15 LAN_RST# R308 *0_4
SATA_X1 LAN_RST#/GPIO13 A_RST# {10,12}
J1 ROM_RST# T105
SATA_X2 ROM_RST#/GPIO14
AA12 SATA_X2
2
Y5 M8 SB_FANOUT0 T70
R195 FANOUT0/GPIO3 SB_FANOUT1
{21} SATA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5 T71
M7 SB_FANOUT2 T74
25MHZ 10M_6 FANOUT2/GPIO49
1
+1.2V_PLLVDD_SATA AA11 P5
SATA PWR
SATA_X2 PLLVDD_SATA FANIN0/GPIO50
FANIN1/GPIO51 P8
C354 27p/50V_4 +3V_XTLVDD_SATA W12 R8
XTLVDD_SATA FANIN2/GPIO52
B
TEMP_COMM C6 B
TEMPIN0/GPIO61 B6 T50
TEMPIN1/GPIO62 A6 T46
A5
HW MONITOR
TEMPIN2/GPIO63 T45
TEMPIN3/TALERT#/GPIO64 B5 PM_THERM# {6}
+1.2V 1.2V (93mA) +1.2V_PLLVDD_SATA
VIN0/GPIO53 A4
L22 B4
BLM18PG221SN1D_6 VIN1/GPIO54
VIN2/GPIO55 C4
C348 C345 D4 VIN3 0_4 R225
VIN3/GPIO56 CPU_PRESENT# {6}
D5 VIN4
VIN4/GPIO57 T58
2.2u/6.3V_6 *1u/10V_4 D6
VIN5/GPIO58
VIN6/GPIO59 A7
B7 +3V_S5
VIN7/GPIO60
3.3V (5mA)
1mA AVDD_HWM R147 0_6
AVDD F6
+3V 3.3V (6mA) +3V_XTLVDD_SATA
G7 C297 C294
L23 AVSS
BLM18PG221SN1D_6 0.1u/10V_4 *2.2u/6.3V_6
C350 SB710
A 1u/10V_4 A
Place near ball 352-(&7%8

4XDQWD&RPSXWHU,QF
B 1B
SB710-ACPI/GPIO/USB 2/4
1%
Date: Monday, June 01, 2009 Sheet 14 of 32
5 4 3 2 1
5 4 3 2 1
SB710 PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.
15
+3V +3.3V_SB_R U20C +1.2V_VCC_SB_R +1.2V
3.3V (131mA) SB710 1.2V (510mA) U20E
D R324 0_8 L9 L15 R187 0_8 D
VDDQ_1 VDD_1
M9
VDDQ_2 Part 3 of 5 VDD_2
M12
T15 M14 SB710
1
C337 C311 C328 C341 VDDQ_3 VDD_3 C315 C327 C314 C325 C338
U9 N13 A2
VDDQ_4 VDD_4 VSS_1
CORE S0
U16 P12 A25
VDDQ_5 VDD_5 VSS_2
PCI/GPIO I/O
22u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 U17 P14 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_8 B1
2
VDDQ_6 VDD_6 VSS_3
V8 R11 D7
VDDQ_7 VDD_7 VSS_4
W7 R15 T10 F20
VDDQ_8 VDD_8 AVSS_SATA_1 VSS_5
Y6 T16 U10 G19
VDDQ_9 VDD_9 AVSS_SATA_2 VSS_6
AA4 U11 H8
VDDQ_10 AVSS_SATA_3 VSS_7
AB5 U12 K9
VDDQ_11 +1.2V_CKVDD +1.2V AVSS_SATA_4 VSS_8
AB21 V11 K11
VDDQ_12 AVSS_SATA_5 VSS_9
1.2V (286mA) V14
AVSS_SATA_6 VSS_10
K16
R261 0_6 W9 L4
+3V +VDD33_18 AVSS_SATA_7 VSS_11
Y9 L7
AVSS_SATA_8 VSS_12
3.3V (71mA) Y11
AVSS_SATA_9 VSS_13
L10
R192 0_6 Y20 L21 C305 C306 C303 C416 Y14 L11
VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_10 VSS_14
AA21 L22 Y17 L12
IDE/FLSH I/O
CLKGEN I/O
VDD33_18--3.3V IDE I/O power AA22 L24 *0.1u/10V_4 *1u/6.3V_4 *1u/6.3V_4 *2.2u/6.3V_6 AA9 L14
C342 C336 C339 C347 VDD33_18_3 CKVDD_1.2V_3 AVSS_SATA_12 VSS_16
1.8V flash memory I/O power AE25 L25 AB9 L16
AB11 M6
4.7u/6.3V_6 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 AVSS_SATA_14 VSS_18
AB13 M10
AVSS_SATA_15 VSS_19
AB15 M11
AVSS_SATA_16 VSS_20
AB17 M13
+3.3VALW _R +3V_S5 AVSS_SATA_17 VSS_21
AC8 M15
AVSS_SATA_18 VSS_22
3.3V (32mA) AD8
AVSS_SATA_19 VSS_23
N4
R171 0_6 AE8 N12
+1.2V +1.2V_PCIE_VDDR
POWER AVSS_SATA_20 VSS_24
VSS_25
N14
P6
L21 C304 C307 C309 VSS_26
1.2V (600mA) VSS_27
P9
C P18 P10 C
BLM18PG221SN1D_6 PCIE_VDDR_1 *0.1u/10V_4 2.2u/6.3V_6 2.2u/6.3V_6 VSS_28
P19 A15 P11
PCIE_VDDR_2 AVSS_USB_1 VSS_29
P20 B15 P13
A-LINK I/O
C320 C313 C312 C332 C326 C333 PCIE_VDDR_3 AVSS_USB_2 VSS_30
P21 A17 C14 P15
PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_3 VSS_31
R22 A24 D8 R1
4.7u/6.3V_6 1u/6.3V_4 *1u/6.3V_4 *1u/10V_4 0.1u/10V_4 0.1u/10V_4 PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_4 VSS_32
R24 B17 D9 R2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_5 VSS_33
R25 J4 D11 R4
3.3V_S5 I/O
PCIE_VDDR_7 S5_3.3V_4 +1.2VALW _R +1.2V_S5 AVSS_USB_6 VSS_34
J5 D13 R9
S5_3.3V_5 AVSS_USB_7 VSS_35
1.2V (113mA)
GROUND
L1 D14 R10
S5_3.3V_6 R162 0_6 AVSS_USB_8 VSS_36
L2 D15 R12
+1.2V +1.2V_AVDD_SATA S5_3.3V_7 AVSS_USB_9 VSS_37
E15 R14
L38 C299 C301 AVSS_USB_10 VSS_38
1.2V (567mA) F12
AVSS_USB_11 VSS_39
T11
AA14 F14 T12
BLM18PG221SN1D_6 AVDD_SATA_1 1u/6.3V_4 1u/6.3V_4 AVSS_USB_12 VSS_40
AB18 G9 T14
AVDD_SATA_4 AVSS_USB_13 VSS_41
AA15 H9 U4
SATA I/O
C452 C453 C340 C343 C346 AVDD_SATA_2 AVSS_USB_14 VSS_42
AA17 G2 H17 U14
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_15 VSS_43
CORE S5
AC18 G4 J9 V6
22u/6.3V_8 1u/6.3V_4 1u/6.3V_4 0.1u/10V_4 0.1u/10V_4 AVDD_SATA_5 S5_1.2V_2 AVSS_USB_16 VSS_44
AD17 J11 Y21
AVDD_SATA_6 +1.2V_USB_PHY_R +1.2V_S5 AVSS_USB_17 VSS_45
AE17 J12 AB1
AVDD_SATA_7 AVSS_USB_18 VSS_46
1.2V (197mA) J14
AVSS_USB_19 VSS_47
AB19
A10 R234 0_6 J15 AB25
USB_PHY_1.2V_1 AVSS_USB_20 VSS_48
B10 K10 AE1
USB_PHY_1.2V_2 AVSS_USB_21 VSS_49
1
C407 C411 C405 K12 AE24
AVSS_USB_22 VSS_50
K14
0.1u/10V_4 0.1u/10V_4 10u/6.3V_8 AVSS_USB_23
K15
2
AVSS_USB_24
P23
+3V_S5 +3V_AVDD_USB PCIE_CK_VSS_9
PCIE_CK_VSS_10 R16
L15 3.3V (658mA) 5V (1mA) R19
+5V_VREF R200 1K/F_4 PCIE_CK_VSS_11
A16 AE7 +5V T17
BLM18PG221SN1D_6 AVDDTX_0 V5_VREF PCIE_CK_VSS_12
B16 U18
B AVDDTX_1 C344 PCIE_CK_VSS_13 B
C16 J16 +3V_AVDDCK H18 U20
1
C262 C406 C293 C298 C410 AVDDTX_2 AVDDCK_3.3V PCIE_CK_VSS_1 PCIE_CK_VSS_14

For support USB wakeup-->3V_S5 D16 AVDDTX_3 1 2 +3V J17 PCIE_CK_VSS_2 PCIE_CK_VSS_15 V18
D17 K17 +1.2V_AVDDCK 1u/10V_4 D15 J22 V20
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_3 PCIE_CK_VSS_16
PLL
10u/6.3V_8 10u/6.3V_8 1u/10V_4 1u/10V_4 *0.1u/10V_4 E17 CH501H-40PT K25 V21

2
AVDDTX_5 PCIE_CK_VSS_4 PCIE_CK_VSS_17

USB I/O
F15 AVDDRX_0 AVDDC E9 +3V_AVDDC M16 PCIE_CK_VSS_5 PCIE_CK_VSS_18 W19

F17 AVDDRX_1 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
F18 AVDDRX_2 M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
G15 P16 W25
AVDDRX_3 PCIE_CK_VSS_8 PCIE_CK_VSS_21
G17 AVDDRX_4
G18 F9 L17
AVDDRX_5 AVSSC AVSSCK
Part 5 of 5
SB710 SB710
3.3V (47mA) 1.2V (62mA) 3.3V (17mA)

+3V +3V_AVDDCK +1.2V +1.2V_AVDDCK +3V_S5 L13 +3V_AVDDC
L14 L19
BLM18PG221SN1D_6 BLM18PG221SN1D_6 BLM18PG221SN1D_6
C308 C310 C266 C256

A A
2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 0.1u/10V_4
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
SB710-PWR/DECOUPLING 4/4
1%
Date: Monday, May 18, 2009 Sheet 15 of 32
5 4 3 2 1
5 4 3 2 1
SB710 +3V +3V +3V +3V +3V_S5

It must ready refore RSMRST#
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 16
R313 R316 R322 R319 R236 R238 R248 R280 R244 R243
10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *2.2K_4 *2.2K_4
D {12} PCI_CLK2 {12,20} PCLK_DEBUG D
{12} PCI_CLK3 {12} RTC_CLK
{12} PCI_CLK4 {13} ACZ_RST#
{12} PCI_CLK5 {13} SB_GPIO17
LPC_CLK0 {12,22} PCLK_591 {13} SB_GPIO16
R312 R315 R321 R320 R235 R228 R252 R274 R245 R242
*10K_4 10K_4 *10K_4 *10K_4 10K_4 10K_4 *10K_4 10K_4 2.2K_4 *2.2K_4
GPIO17 GPIO16
NOTE: SB710 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK NOTE: SB710 HAS INTERNAL 15K PULL UP RESISTOR FOR SB_GPIO16,SB_GPIO17.
PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 RTC_CLK ACZ_RST# GP17 GP16
PULL
BOOTFAIL USE PULL CLKGEN INTERNAL ENABLE PCI ROM TYPE:
HIGH RESERVED RESERVED EC
TIMER DEBUG ENABLED RTC MEM BOOT
C
REQUIRED ENABLED STRAPS ENABLED
HIGH H, H = Reserved C
DEFAULT
STRAPS DEFAULT
H, L = SPI ROM
PULL BOOTFAIL IGNORE EC PULL CLKGEN EXT. RTC DISABLE PCI
L, H = LPC ROM DEFAULT
LOW TIMER DEBUG DISABLED LOW DISABLED MEM BOOT
(PD on X1,
DISABLED STRAPS
apply 32KHz
DEFAULT DEFAULT L, L = FWH ROM
DEFAULT DEFAULT to RTC_CLK)
DEBUG STRAPS NB/SB POWER GOOD CIRCUIT

+3V +3V_S5
SB710 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
{12} AD30 R144 R140

{12} AD29
{12} AD28
{12} AD27 10K_4 *10K_4
B
{12} AD26 D13 CH501H-40PT B
{12} AD25 {22} ECPWROK 1 2 SB_PWRGD_IN {13}

{12} AD24
{12} AD23 +1.8V
C283
R148 +1.8VSUS
*2.2u/6.3V_6
R336 R334 R330 R333 R328 R331 R329 R326 0_4
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 C240 0.1u/10V_4 R130
*300_4
+3V
5
R139 2
4 R133 33_4
NB_PWRGD_IN {10}
R137 *0_4 1
10K_4 U12 C469
3
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD29 PCI_AD30 NC7SZ08M5X_NL
R138 0_4 *0.1u/10V_4
{13} WD_PWRGD
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
REQUIRED PULL LONG PLL BCLK PLL PCIE STRAPS C265 C2A
HIGH RESET *0.1u/10V_4
STRAPS DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM

LOW SHORT PCI PLL ACPI PLL PCIE STRAPS RESERVED RESERVED
A
RESET BCLK A
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
SB710-STRAPS & PWRGD
1%
5 4 3 2 1
5 4 3 2 1
LCD Panel Module CCD

VIN
1A(65mils)
D3A
USBP10+_LCD
USBP10-_LCD
3
2
L24
3
2
*RFCM1632100M3_C
4
1
4
1
USBP10+
USBP10-
{13}
{13}
17
CN1 RP39 2 1 0X2 SMT Open issue change to 4P2R resistors
+ C361 C2 C3 1 4 3
1
2 2
10u/25V_1210 1000p/50V_4 0.1u/25V_6 LCDVCC 3
D LCDVCC 3 D
4 4
5
+3V
CCD_POWER 6
5
6 +5V R4 short_8 CCD_POWER 0.2A(20mils)
MIC_GND 7
{21} MIC_GND 7
INT_MIC_R 8 C15 4.7u/10V_8
{21} INT_MIC_R 8
9 9
10 C10 *1000p/50V_4
C12 C9 USBP10-_LCD 10
11 11
USBP10+_LCD 12 C8 *0.1u/10V_4
100p/50V_4 100p/50V_4 12
13 13
LCD_DDCCLK 14
{10} LCD_DDCCLK 14
LCD_DDCDAT 15
{10} LCD_DDCDAT 15
16 16
INT_TXLCLKOUT- 17
{10} INT_TXLCLKOUT-
{10} INT_TXLCLKOUT+
INT_TXLCLKOUT+ 18
19
17
18 HALL SENSOR&BACK LIGHT SWITCH
INT_TXLOUT2- 19
{10} INT_TXLOUT2- 20 20
INT_TXLOUT2+ 21
{10} INT_TXLOUT2+ 21
22 +3V
INT_TXLOUT1- 22
{10} INT_TXLOUT1- 23 23
INT_TXLOUT1+ 24
25 25
INT_TXLOUT0- 26 R206
{10} INT_TXLOUT0- 26
INT_TXLOUT0+ 27
28 1K_4
LVDS_VADJ 28
29 29 31 31
DISPON 30 32
30 32
DISPON {22}
GS13307-11230-7F
C +3V R2 4.7K_4 LCD_DDCDAT C
DISPON D16 BAS316
LID591# {21,22}
R3 4.7K_4 LCD_DDCCLK
+3V
C14
+3V
C16 *1000p/50V_4
R209
3
*1000p/50V_4
For EMI C6 10K_4
0.1u/10V_4 2 BLON
Q33
3
2N7002
1
Q31
{22} EC_FPBACK# 2 2 INT_LVDS_BLON {10}
DTC144EU
R5 *0_4 LVDS_VADJ Q32
{10} INT_LVDS_PWM
2N7002 R210 *100K_4
1
R6 short_4
{22} CONTRAST
C18 0.1u/10V_4
B B
LCD POWER SWITCH CRT +5V

CRT CON. co-lay
R208 4.7K_4 DDCCLK
R207 4.7K_4 DDCDAT

+15V
+3V
R7 +5V +3V
3
CN16
330K_6 1.8A(65mils) 1 1 2 2
Q2 3 4
+3VPCU LCDONG 2 LCDVCC 3 4 DDCDAT
5 5 6 6 DDCDAT {10}
AO3404 VSYNC 7 8 DDCCLK DDCCLK {10}
{10} VSYNC 7 8
HSYNC 9 10
{10} HSYNC 9 10
C21 L1 11 12 CRT_R
11 12 CRT_R {10}
R10 LCDVCC1 short_6 CRT_G 13 14
{10} CRT_G
1
13 14
3
0.01u/25V_4 15 16 CRT_B
15 16 CRT_B {10}
100K_4
R9 C7 C5 C11
2 Q4 88107-16001
22_8 0.1u/10V_4 0.01u/25V_4 10u/6.3V_8 D3A
ME2N7002E
3
LCDDISCHG Move the Co-lay Connector for Routing the smooth.

A Q5 A
1
+5V +3V
{10} INT_LVDS_DIGON 2
LCDON# 2 Q3
1
PDTC143TT C360 C358

ME2N7002E 0.1u/10V_4 0.1u/10V_4 352-(&7%8
4XDQWD&RPSXWHU,QF
1

Custom 1B
LCD/CCD/CRT
1%
Date: Tuesday, July 07, 2009 Sheet 17 of 32
5 4 3 2 1
5 4 3 2 1
+'0, C2A
D3A Move the 11.6" Card reader
86%6/((3&+$5*(
+3V_S5
18
CN11
T101 1 U14
T102 2
D USB_SW+ 1 10 C292 0.1u/10V_4 D
3 1D+ VCC
T121 4 USB_SW- USB_BUS_SW0
+3V 5 To SB 2 1D- S 9 USB_BUS_SW0 {14}
+5VPCU 6 USBP3+ 3 8 BUSBP3+
7 {13} USBP3+ 2D+ D+
+5VPCU 2A (80mils) 8
9 {13} USBP3-
USBP3- 4 2D- D- 7 BUSBP3-
D3A +5V 10
5 6 USB_BUS_SW1
GND
GND
GND
GND
BUSBP3- 11 GND OE USB_BUS_SW1 {14}
12 15 GND GND 14
BUSBP3+
13
Del the 0ohm for Routing the smooth.
13
12
11
16
14
{13,22} USB_SLEEP_OC# 15
{22} USB_SLEEP_EN# 16
{13} BOARD_ID2 17 S OE# Function
HDMI_CON_HP TS3USB221DRCR
HDMI_CON_DDCDATA 18
19 X H Disconnect
HDMI_CON_DDCCLK
20
21 L L D=1D
HDMICLKN
{9} HDMI_CLKN 22
HDMICLKP H L D=2D
{9} HDMI_CLKP 23 R154 *10K_4 USB_BUS_SW0
24 +3V_S5
HDMITX0N
{9} HDMI_DATA0N 25
HDMITX0P R155 10K_4 USB_BUS_SW1
{9} HDMI_DATA0P 26
HDMITX1N 27
{9} HDMI_DATA1N 28 Default Mount
HDMITX1P
{9} HDMI_DATA1P 29
C 30 C
HDMITX2N
{9} HDMI_DATA2N 31
HDMITX2P
{9} HDMI_DATA2P 32
HDM@88511-3201
+5V +5VPCU +5VPCU

+5VPCU
+5V
R327
R178 R164
1
HDM@4.7K_4 +3V +5VPCU U15 75K/F_4 43K_4

14 VCC GND 7
2 3 HDMI_CON_DDCCLK
{10} HDMI_DDC_CLK
Q38 *HDM@2SK3541T2L USB_SW+ 2 3
C428 C300 C302 C322 1A 1B
USB_SW- 5 6
R325 HDM@0_4 HDM@0.1u/10V_4 HDM@4.7u/10V_8 HDM@0.1u/10V_4 2A 2B
0.1u/10V_4
+5V 9 11
3A 4B
+5V 12 8 R168 100_4
R317 4A 3B R176 R170
USB_BUS_SW3 1 10 USB_BUS_SW2 51K_4 51K_4
{14} USB_BUS_SW3 1OE 3OE USB_BUS_SW2 {14}
1
B HDM@4.7K_4 B
4 2OE 4OE 13
2 3 HDMI_CON_DDCDATA +5V
{10} HDMI_DDC_DATA
Q37 *HDM@2SK3541T2L
SN74CBT3125CPWR
R323 HDM@0_4 C67
HDM@0.1u/10V_4
OE# Function OE# 1OE# 2OE# 3OE# 4OE#

H Disconnect Mode3 High High Low Low
L A port= B port Mode4 Low Low High High
+3V
3
R291 HDM@750_4 HDMITX2P
R297 HDM@750_4 HDMITX2N

Q34 2 R287 HDM@91K_4 HDMI_CON_HP
3
+5V R301 HDM@750_4 HDMITX1P

HDM@ME2N7002E Q36
R288 R303 HDM@750_4 HDMITX1N
HDM@200K_4 2
1
R277 HDM@0_4 R314 HDM@750_4 HDMITX0P

{10} HDMI_HPD
A A
HDM@FDV301N R318 HDM@750_4 HDMITX0N
R278
1
HDM@2.7K_4 R306 R307 HDM@750_4 HDMICLKP

1 2
HDM@100K_4
R311 HDM@750_4 HDMICLKN
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
HDMI Conn
1%
5 4 3 2 1
5 4 3 2 1
SATA ODD
G-sensor
CN7
GND
RXP
1
2 RN9 2
4
1 0X2
3
USBP4+
USBP4-
C2A
{13}
{13}
U8
+3V_HDP
+3V_HDP
C105
6
U4
Vdd Xout
Yout
2
3
ACCELX
ACCELY
ACCELZ
19
RXN 3 7 SLEEP# Zout 4
RN10 4 3 0X2 SATA_TXP3 {14} 1 4
{22,26,30} MAINON SHDN VO
4 2 1 SATA_TXN3 {14} C160 *GS@0.1u/10V_4 13 AXSTST
GND +5VPCU Self Test
2 GND
5 *GS@10u/6.3V_8
TXN SATA_RXN3 {14}
3 VIN SET 5
D
TXP 6 SATA_RXP3 {14} NC 1 D
C177 GS@G913C R46 *GS@0_4 10 8
g-select NC
GND 7 T4 9 0g-Detect NC 11
GS@0.1u/10V_4 12
R84 *1K_4 NC
DP 8 5 GND NC 14
9 *GS@MMA73XXL
+5V
+5V 10 1.6A(100mils)
+5V
FS (Full Scale) selection
*88513-1041 C391 C392 C393 C390 C382 + C379 0 1
FS
*0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *10u/6.3V_8 *100u/6.3V_3528 2g Full-Scale 6g Full-Scale
PD (Power Down) selection +3V_HDP

0.0015A(20mils) U6
0 1 +3V_HDP 2 3 ACCELX
Vdd Voutx ACCELY
PD 12 Vdd Vouty 5
Normal Mode Power-down mode 7 ACCELZ R55
C130 C138 Voutz *GS@10K_4
9 4 AXSTST
GS@10u/6.3V_8 GS@0.1u/10V_4 Reserve ST FS
10 Reserve FS 8
11 Reserve
MAIN SATA HDD HDPPD selection 6

13
PD
GND
NC
NC
14
15
R58
GS@0_4
0 1 1 GND NC 16
HDPPD
Normal Mode Power-down mode GS@TSH35TR
C
C2A CN19 C
GND23 23
GND1 1
2 SATA_TXP0 +3V_HDP
RXP SATA_TXP0 {14}
3 SATA_TXN0 SATA_TXN0 {14}
RXN
GND2 4
5 SATA_RXN0
TXN SATA_RXN0 {14}
6 SATA_RXP0
TXP SATA_RXP0 {14}
GND3 7
C151 C150 C108
3.3V 8 (20mils) +3.3VSATA1 R211 *0_8 +3V GS@1u/6.3V_4 GS@0.1u/10V_4 GS@0.1u/10V_4 0.013A(20mils) U5
9 +3V_HDP
3.3V KXP84_SCL
3.3V 10 +3V_HDP 16 VCC HDPSCL 1
11 C372 C366 7 20 KXP84_SDA
GND VCC HDPSDA
GND 12
13 *10u/6.3V_8 *0.1u/10V_4 Close to Pin 7 and Pin 16 ACCELY 18 3 G-RESET# R60 GS@4.7K_4
GND ACCELX ACCELX RESET R63 GS@4.7K_4
5V 14 17 ACCELY MODE 8
15 ACCELZ 15
5V AXSTST ACCELZ XIN_G R61 GS@4.7K_4
5V 16 2 AXSTST Reserved 4
17 6 XOUT_G R62 GS@4.7K_4
GND HDPACT Reserved
RSVD 18 {13} HDPACT 11 HDPACT Reserved 12
19 GND 10 13
GND R64 GS@1K_4 HD_PINT HDPPD Reserved
20 9
12V
12V 21 0.94A(80mils) +5V_HDD1 R11 short_8 +5V {12} HDPLOC
HDPLOC
{12} HDPINT
R49 *GS@0_4 HD_PLOC 14
HDPINT
HDPLOC Reserved 19
22 +3V_HDP 5
12V VSS
24 C24 C23 C364 + C363 Close Chipset GS@R5F211B4D34SP#W4(3B25H )
GND24 U7
13@C166AN-12205-L 0.1u/10V_4 0.1u/10V_4 10u/6.3V_8 *100u/6.3V_3528 3 HDPLOC HDPACT ADDRESS: 32H
Vcc G-RESET#
Reset# 1
GND 2
B B
*GS@G691L308T73UF R44 R45
GS@47K/F_6 GS@47K/F_6
11.6" SATA HDD

Close Chipset ACCELX
C2A ACCELY
CN5
1 ACCELZ
GND +3V_HDP
2 SATA_TXP0_R RN4 4 3 *11@0X2 SATA_TXP0 C107 C106 C109
RXP SATA_TXN0_R SATA_TXN0
2 1
3 GS@0.033u/10V_4 GS@0.033u/10V_4 GS@0.033u/10V_4
RXN
GND 4
R52 R66
5 SATA_RXN0_R RN3 4 3 *11@0X2 SATA_RXN0
TXN SATA_RXP0_R SATA_RXP0 GS@4.7K_4 GS@4.7K_4
2 1
2
TXP 6
XIN_G C158 *GS@22p/50V_4
7 3 1 KXP84_SDA
GND {22} 3ND_MBDATA
1
Y2
8 Q16 GS@ME2N7002E
DP *GS@8MHZ
9
2
+5V +3V_HDP XOUT_G C159 *GS@22p/50V_4
A A
+5V 10 +5V
2
*11@88513-1041
3 1 KXP84_SCL
{22} 3ND_MBCLK
Q18 GS@ME2N7002E 352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
HDD/ODD/G-SENSOR
1%
5 4 3 2 1
5 4 3 2 1
MINI Card Slot#1
20
+1.5V
(WiFi) +3V_WL_VDD +3V 1A(40mils)
C351 C264 C352 +1.5V R202 short_8 +3V_WL_VDD
0.01u/25V_4 0.1u/10V_4 10u/6.3V_8 C353 C357 C355 C356

0.5A(30mils) 10u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
CN23 +3V
R271 0_4 SERIRQ_DEBUG 51 52

{12,22} SERIRQ Reserved +3.3V
R270 0_4 LDRQ#0__DEBUG 49 50
{12} LDRQ0#_SB Reserved GND
R269 0_4 PLTRST#_DEBUG 47 48
{12} PCIRST#
2
4
R268 0_4 PCLK__DEBUG Debug(PCIRST#) +1.5V
{12,16} PCLK_DEBUG 45 46
Debug(PCICLK) LED_WPAN# RP38
43 44
D
R267 0_6 +3V_WL_VAUX GND LED_WLAN# D
+3V_WL_VDD 41 42
R266 *0_6 +3.3Vaux LED_WWAN# R134 *0_4
+3V_S5 39 40
+3.3Vaux GND 4.7KX2
37 38 USBP8+ {13}
2
GND USB_D+
35 36 USBP8- {13}
1
3
GND USB_D-
{9} PCIE_TXP2 33 34
PETp0 GND WL_SMDATA WL_SMDATA
{9} PCIE_TXN2 31 32 {13,23} SB_SMBDATA1 3 1
PETn0 SMB_DATA WL_SMCLK
29 30
GND SMB_CLK Q27 ME2N7002E
27 28
GND +1.5V
{9} PCIE_RXP2 25 26
PERp0 GND +3V_WL_VAUX R167 *0_4
{9} PCIE_RXN2 23 24
PERn0 +3.3Vaux PLTRST#
21 22
GND PERST# RF_EN
19 20 RF_EN {22}
Reserved W_DISABLE#
17 18
Reserved GND
15 16 LFRAME#_PCIE R180 0_4 +3V
GND Reserved LAD3_PCIE R183 0_4 LFRAME# {12,22}
13 14
D3A {3} CLK_PCIE_MINI
{3} CLK_PCIE_MINI# 11
REFCLK+
REFCLK-
Reserved
Reserved
12 LAD2_PCIE R182 0_4 LAD3 {12,22}
9 10 LAD1_PCIE R181 0_4 LAD2 {12,22}
GND Reserved LAD0_PCIE R175 0_4 LAD1 {12,22}
Change to Short Pad for Cost down. 7
CLKREQ# Reserved
8
2
WCS_CLK R265 *BT@short_4 WCS_CLKR 5 6 LAD0 {12,22}
{21} WCS_CLK Reserved +1.5V
To BT WCS_DAT R264 *BT@short_4 WCS_DATR 3 4
GND
GND
{21} WCS_DAT Reserved GND
WLAN_WAKE# 1 2 3 1 WL_SMCLK
WAKE# +3.3V {13,23} SB_SMBCLK1
Q26 ME2N7002E
53
54
80052-1021
PCIE_WAKE# 3 1 R166 *0_4
{13,23} PCIE_WAKE#
Q25 ME2N7002E
C2A
2
R165 10K_4
+3V_S5
C C
MINI Card Slot#2

(3G) +1.5V_3G +1.5V_3G +1.5V
D3A
+3V_S5 +3V_3G +3V_S5
+3V_3G C463 C465 C466 C464 R338 *0_8 AMD Platform not Support 3G Function and Remove materials on BOM.
*3G@0.1u/10V_4 *3G@0.1u/10V_4 *3G@0.1u/10V_4 *3G@10u/6.3V_8
2.75A(120mils)
C462 C451 C414 C415
1 3 *3G@0.1u/10V_4 *3G@0.1u/10V_4 *3G@0.1u/10V_4 *3G@10u/6.3V_8

R191
Q30 *3G@AO3413 *3G@4.7K_4
2
3
Q29
2 3G_P {22}
*3G@DTC144EUA +1.5V_3G +3V_3G
1
B B
2.75A(120mils) C2A
CN8
CN22
1 UIM_CLK
51 52
RESERVED +3.3V 2
49 50
RESERVED GND 3 UIM_DATA
47 48
RESERVED +1.5V 4
45 46
RESERVED LED_WPAN# 5 UIM_RST
43 44
GND LED_WLAN# 6 UIM_VPP UIM_PWR
41 42 3G_LED# {21}
+3.3V LED_WWAN# 7 UIM_PWR
39 40 CPUSB# {13}
+3.3V CPUSB# USBP7+_C R332 *0_4 8 C321
37 38 USBP7+ {13}
CPPE# USB_D+ USBP7-_C R335 *0_4 9
35 36 USBP7- {13} USBP6+ {13}
GND USB_D- 10 *3G@0.1u/10V_4
{9} PCIE_TXP3 33 34 USBP6- {13}
PETp0 GND 3G_SMDATA R340 *3G@0_4 1411
{9} PCIE_TXN3 31 32 SB_SDATA2 {13}
PETn0 SMB_DATA 3G_SMCLK R341 *3G@0_4 1312
29 30 SB_SCLK2 {13}
GND SMB_CLK
27 28
GND +1.5V *3G@88511-120N
{9} PCIE_RXP3 25 26
PERp0 GND
{9} PCIE_RXN3 23 24
RERn0 +3.3Vaux PLTRST#
21 22 PLTRST# {12,18,21,22,23}
GND RESET# 3G_EN
19 20 3G_EN {22}
UIM_C4 W_DISABLE#
17 18
UIM_C8 GND
15 16 UIM_VPP
GND UIM_VPP UIM_RST
{3} CLK_PCIE_MINI2 13 14
REFCLK+ UIM_RST UIM_CLK
{3} CLK_PCIE_MINI2# 11 12
REFCLK- UIM_CLK UIM_DATA
9 10
GND UIM_DATA UIM_PWR
7 8
CLKREQ# UIM_PWR
5 6
BT_CHCLK +1.5V
3 4
WLAN_WAKE# BT_DATA GND
1 2
WAKE# +3.3V UIM_CLK
*3G@80052-1021
C417
PCIE_WAKE# 3 1
*3G@100p/50V_4
A Q39 *3G@ME2N7002E A
2
+3V_3G R339 *3G@10K_4
352-(&7%8
4XDQWD&RPSXWHU,QF
C 1B
MINI CARD (Wi-Fi and 3G)
1%
5 4 3 2 1
5 4 3 2 1
INT KeyBoard LED / TP / Hall sensor board
MX0
MX1
+3VPCU
10
9
RP1
1 10KX8
2
MX7
MX6
MX5
CN3
36
1
K_LED_P
MY16
21
8 3 2 MY16 {22}
MX3 7 4 MX4
MX2 3 MY17 CN6
6 5 4 MY17 {22}
5 K_LED_P +3VPCU +3V +5V
6 18 18 +5V
MY2 17 +3VPCU
7 MY2 {22} 17
CP5 7 8 *220pX4 MX4 MY1 16
8 MY1 {22} 16 +3V
5 6 MX7 MY0 15
9 MY0 {22} 15 ACIN {22,24}
3 4 MX3 MY4 14 C317 C318 C319
D 10 MY4 {22} 14 PWRLED# {22} D
1 2 MX2 MY3 13 1000p/50V_4 1000p/50V_4 1000p/50V_4
11 MY3 {22} 13 SUSLED_EC {22}
MY5 12
12 MY5 {22} 12 BAT_SAT0 {22}
MY14 11
13 MY14 {22} 11 BAT_SAT1 {22}
MY6 10 SATA_LED#_C
14 MY6 {22} 10
CP1 7 8 *220pX4 MX0 MY7 9
15 MY7 {22} 9 RF_LED {22}
5 6 MX5 MY13 8
16 MY13 {22} 8 3G_LED# {20}
3 4 MX6 MY8 7 MMC_LED#
17 MY8 {22} 7
1 2 MX1 MY9 6 TPDATA TPDATA TPCLK
18 MY9 {22} 6 TPDATA {22}
MY10 5 TPCLK
19 MY10 {22} 5 TPCLK {22}
MY11 4
20 MY11 {22} 4 LID591# {17,22}
MY12 3 C175 C176
21 MY12 {22} 3
CP4 7 8 *220pX4 MY7 MY15 2
22 MY15 {22} 2
5 6 MY13 MX7 1 *10p/50V_4 *10p/50V_4
23 MX7 {22} 1
3 4 MY12 MX2
24 MX2 {22}
1 2 MY15 MX3
25 MX3 {22}
MX4 88511-180N
26 MX4 {22}
MX0
27 MX0 {22}
MX5
28 MX5 {22}
MX6
29 MX6 {22}
CP3 7 8 *220pX4 MY3 MX1
30 MX1 {22}
5 6 MY5 K_LED_P
MY14 31 CAPSLED +5V
3 4 32 CAPSLED {22}
1 2 MY6 FN_F10
33 FN_F10 {22}
NUMLED
34 NUMLED {22}
R173
CP2 7 8 *220pX4 MY2 *10K_4

MY1 35
5 6
3 4 MY0 91504-340N
1 2 MY4 SATA_LED#_C HDDLED# Q28 MMBT3906_NL
C20 *100p/50V_4 MY17

+3V R177 10K_4
SATA_LED# {14}
C C
C19 *100p/50V_4 MY16
(10mils)
R8 150_4 K_LED_P
+3V
Bluetooth
Power board D3A Audio + Card Reader +USB*2
Change LED Color to Green
+3VPCU
CN12
CN2
(10mils)
12
1 +3V CN9
{13} USBP9+ 2 +3VPCU 1 +5VPCU +5V
{13} USBP9- 3 {22} NBSWON# 2
PWR/B_LED#_Q C17
{20} WCS_CLK 4 3 37 USBP11- {13}
5 4 0.1u/10V_4 36 USBP11+ {13}
C449
{22} BT_RESET 6 35
0.1u/10V_4 88513-044N
{20} WCS_DAT 7 34 PLTRST# {12,18,20,22,23}
+3V MMC_LED#
8 33 C268 C335
{22} BT_EN 9 32 +5VPCU
C281 C331
11
10 31 10u/10V_8 10u/10V_8
88266-10001-06 PWR/B_LED#_Q 30 +5VPCU (1.5A 140mil) 0.1u/10V_4 0.1u/10V_4
0.18A(20mils) C470 29
28
100p/50V_4 R1 3
27
26
+5V +5V (1.008A 45mil)
0_4
B
D3A 25
24 +3V +3V (0.34A 20mil) AMD use +3.3V in pin24,INTEL use +1.5V. +3V
B
Add the 100P Capacitor For EMI PWR/B_LED# 2 Q1
{22} PWR/B_LED# 23
22 USB_EN#0_1 {22}
*ME2N7002E 21
20 USBP0- {13}
C323
USBP0+ {13}
1
19 C324
18 10u/6.3V_8
17 USBP1- {13} USB Port 0.1u/10V_4
16 USBP1+ {13}
15
14 USBOC#0 {13,22}
HOLE HOLE7 HOLE4 HOLE1 HOLE8 HOLE6 13 AMP_MUTE# {22}
12 SPKR {13}
HOLE5 HOLE3 HOLE2 7 6 7 6 7 6 8 7 *h-tc240bo236x433d87p2 PCBEEP
*H-C197D142P2 *H-C197D142P2 *H-C197D142P2 11
8 5 8 5 8 5 9 6 10 INT_MIC_R {17}
9 4 9 4 9 4 10 5 9 MIC_GND {17}
4 8 BIT_CLK_AUDIO {13}
1
2
3
1
2
3
1
2
3
7
ACZ_RST#_AUDIO {13}
1
6
1
1
2
3
5 ACZ_SYNC_AUDIO {13}
4
3 ACZ_SDOUT_AUDIO {13}
*hg-c276d98p2 *hg-c276d98p2 *hg-pc276bc236d98p2 ACZ_SDIN0 {13}
*HG-TC276BO433X236D98P2 2
C2A 1
88511-370N
EMI C2A C2A C2A
+SMDDR_VTERM VIN VIN VIN VIN +1.2V +1.2V +1.2V +1.2V +5V
C179 C161 C376 C4 C280 C80 C22 C399 C389 C442
*0.1u/10V_4 0.1u/25V_6 *0.1u/25V_6 *0.1u/25V_6 0.1u/25V_6 *0.1u/10V_4 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
A A
VIN VIN VIN VIN +1.8V +1.8V +1.8VSUS +1.8VSUS +1.8VSUS
C378 C362 C377 C334 C178 C239 C97 C234 C369

352-(&7%8
*0.1u/25V_6 0.1u/25V_6 *0.1u/25V_6 0.1u/25V_6 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 4XDQWD&RPSXWHU,QF
Custom 1B
KB/TP/PB/LED/MMB
1%
5 4 3 2 1
5 4 3 2 1
EC SM BUS PU
+3VPCU
0.01A(20mils)
R70 *0_6
+3V
C2A
22
L7 BLM18AG601SN1D_6 +A3VPCU +3V_VDD_EC D9 BD520WS +3VPCU
ICMNT
C192 C204 C164 C162 MBCLK R125 4.7K_4
MBDATA R122 4.7K_4
0.03A(30mils) 0.1u/10V_4 10u/6.3V_8 0.1u/10V_4 10u/6.3V_8 2ND_MBCLK R126 4.7K_4
C202 2ND_MBDATA R123 4.7K_4
*10u/25V_0805 3ND_MBCLK R87 4.7K_4
3ND_MBDATA R86 4.7K_4
C402 C163 C185 C182 C217 C220 8769AGND
115
102
D D
19
46
76
88
4
10u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 U9 88731ACSET
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
VDD
H=1.6mm R98 *100K/F_4
+3VPCU
C1 I/O Base Address
*10u/25V_0805
{12,20} LFRAME# 3 97 TEMP_MBAT {24}
LFRAME AD0/GPI90 ICMNT
{12,20} LAD0 126
LAD0 AD1/GPI91
98 ICMNT {24} I/O Address
127 99 88731ACSET
{12,20} LAD1 LAD1 AD2/GPI92 88731ACSET {24}
PCLK_591 128 A/D 100 BADDR1-0 Index Data
{12,20} LAD2 LAD2 AD3/GPI93 T25
{12,20} LAD3 1 108 CPU_PROCHOT#_EC {6}
LAD3 AD4/GPIO05
{12,16} PCLK_591 2
LCLK AD5/GPIO04
96 USB_SLEEP_OC# {13,18} 00 XOR TREE TEST MODE
95 NBSWON#
AD6/GPIO03 NBSWON# {21}
R74 8 94 01 CORE DEFINED
{12} CLKRUN#_EC CLKRUN/GPIO11 AD7/GPIO07 SUSB# {13}
*22_4 D18 BAS316 GATEA20_R 121 10 2Eh 2Fh
{13} GATEA20 GA20
101 T23
D17 BAS316 RCIN#_R DA0/GPI94
{13} RCIN# 122
KBRST DA1/GPI95
105 VFAN {6} 11 164Eh 164Fh
C165 D/A 106
DA2/GPI96 T17 SHBM=0: Enable shared memory with host BIOS
D11 BAS316 SCI#_uR 29 LPC 107
{13} SCI# ECSCI/GPIO54 DA3/GPI97 SUSLED_EC {21}
*10p/50V_4
{17} EC_FPBACK# 6
LDRQ/GPIO24 BAT_SAT0 BADDR0 R88 *10K_4
GPIO41(VBAT)
80 BAT_SAT0 {21} BADDR0
124
LPCPD/GPIO10 BT_EN R90 10K_4
GPIO GPIO42/TCK
17 RF_LED {21} BADDR1
{12,18,20,21,23} PLTRST# 7 20 AMP_MUTE# {21}
LRESET GPIO43/TMS RF_EN R112 10K_4
wake-up GPIO44/TDI
21 ID {24} SHBM
{21} USB_EN#0_1 123
PWUREQ/GPIO67
capability GPIO50/TDO
25 D/C# {24}
27 DISPON {17}
CIRTX2/GPIO52/RDY
{12,20} SERIRQ 125
SERIRQ
no wake-up GPO82/TRIS 110
BAT_SAT1 9 capability GPO84/BADDR0 112 BADDR0 Disabled ('1') if using FWH device on LPC.
{21} BAT_SAT1 SMI/GPIO65 Enabled ('0') if using SPI flash for both system BIOS and EC firmware
111 BT_EN
SOUT_CR/GPO83/BADDR1 BT_EN {21}
{21} MX0 54 113 USB_SLEEP_EN# {18}
KBSIN0 SIN_CR/CIRRX/GPIO87
{21} MX1 55
KBSIN1 SER GPIO06
93 LID591# {17,21} ID
{21} MX2 56
KBSIN2
C
{21} MX3 57 32 CONTRAST {17}
C
KBSIN3 A_PWM/GPIO15 +3VPCU
{21} MX4 58 118 T16
KBSIN4 B_PWM/GPIO21 U13
{21} MX5 59 62 USBOC#0 {13,21}
KBSIN5 C_PWM/GPIO13 2ND_MBCLK
60 65 6 1
{21}
{21}
MX6
MX7 61
KBSIN6
KBSIN7 PWM
D_PWM/GPIO32
E_PWM/GPIO45
22 SUSON {26,30}
2ND_MBDATA 5
SCL
SDA
A0
A1
2 0.003A(20mils)
16 MAINON {19,26,30} 3
F_PWM/GPIO40/CLKIN48 PWR/B_LED# A2
{21} MY0 53 81 PWR/B_LED# {21}
KBSOUT0/JENK G_PWM/GPIO66 PWRLED#
{21} MY1 52 66 PWRLED# {21} 7 8
KBSOUT1/TCK H_PWM/GPIO33 WP VCC
{21} MY2 51 4
KBSOUT2/TMS GND C236
{21} MY3 50
KBSOUT3/TDI AF24BC08-SI-TE1(DCEF)
{21} MY4 49
KBSOUT4/JEN0 KB TA1/GPIO56
31 3G_P {20}
48 63 0.1u/10V_4
{21} MY5 KBSOUT5/TDO TB1/GPIO14 FANSIG {6}
{21} MY6 47 117 +1.2V_ON {27,28,30}
KBSOUT6/RDY TA2/GPIO20
{21} MY7 43
KBSOUT7 TIMER TB2/GPIO01
64 ACIN {21,24} ADDRESS: A0H
{21} MY8 42 26 S5_ON {29,30}
KBSOUT8 TA3/GPIO51
{21} MY9 41 15 VRON {25}
KBSOUT9 TB3/GPIO36
{21} MY10 40
KBSOUT10
39
{21}
{21}
MY11
MY12 38
KBSOUT11
KBSOUT12/GPIO64 SPI_DI/GPIO77
84 BT_RESET {21}
SPI FLASH
37 SPI 83 RF_EN RF_EN {20}
{21} MY13 KBSOUT13/GPIO63 SPI_DO/GPO76/SHBM
{21} MY14 36 82 T28
KBSOUT14/GPIO62 SPI_SCK/GPIO75
{21} MY15 35 91 DNBSWON#_uR D12 BAS316
DNBSWON# {13}
KBSOUT15/GPIO61/XOR_OUT GPIO81
{21} MY16 34
KBSOUT16/GPIO60 RSMRST#
{21} MY17 33 75 RSMRST# {13}
KBSOUT17/GPIO57 IRRX1/GPIO72/SIN2 +3VPCU
FIR IRRX2_IRSL0/GPIO70
73 SUSC# {13}
74 MPWROK R106 0_4
{24} MBCLK 70
SCL1/GPIO17
IRTX/GPIO71/SOUT2
CIRRXM/GPIO46/TRST
23
ECPWROK {16}
U19 0.025A(20mils)
69 14 SPI_SDI_uR R229 33_4 SPI_SDI 2 8
{24} MBDATA SDA1/GPIO22 GPIO34/CIRRXL SO VDD
R231 *10K_4 3G_EN
{6} 2ND_MBCLK 67
SCL2/GPIO73 SMB CIR CIRTX1/GPIO16
114 NUMLED {21}
SPI_SDO_uR R232 33_4 SPI_SDO C404
{6} 2ND_MBDATA 68 109 CAPSLED {21} 5 7
SDA2/GPIO74 CIRTX2/GPIO30 SI HOLD
{19} 3ND_MBCLK 119
SCL3/GPIO23 SPI_SCK_uR R233 33_4 SPI_SCK 0.1u/10V_4
{19} 3ND_MBDATA 120 6 3
3G_EN SDA3/GPIO31 SPI_SDI_uR SCK WP
{20} 3G_EN 24 86
HWPG SCL4/GPO47 F_SDI/F_SDIO1 SPI_SDO_uR SPI_CS0#_uR
28 87 1 4
+5V SDA4/GPIO53 F_SDO/SDIO0 SPI_CS0#_uR CE VSS
FIU F_CS0
90
92 SPI_SCK_uR +3VPCU R230 10K_4 W25X80AVSSIG
R114 10K_4 TPCLK F_SCK
{21} TPCLK 72
R116 10K_4 TPDATA PSCLK1/GPIO37
{21} TPDATA 71
B PSDAT1/GPIO35 B
T9 10
PSCLK2/GPIO26
11
PSDAT2/GPIO27 PS/2 CLKOUT/GPIO55
30 LAN_ON {23}
{21} FN_F10 12
PSCLK3/GPIO25 VCC_POR# R113 4.7K_4
13 85 +3VPCU
PSDAT3/GPIO12 VCC_POR
8768_32KX1 VREF_uR R92 0_4 +A3VPCU
VCORF
77 104
32KX1/32KCLKIN VREF
AGND
GND1
GND2
GND3
GND4
GND5
GND6
R120 20M_6 8768_32KX2 79

32KX2
INTERNAL KEYBOARD STRIP SET
WPCE775CA0DG +3VPCU
5
18
45
78
89
116
103
44
R121 WPCE775L: AJ007750F00 (w/o CIR)

WPCE775C: AJ007750F01 (w/CIR) MY0 R91 10K_4
Y4 33K/F_4
VCORF_uR
1 4
2 3
L12 0_6
C238 32.768KHZ C237
C181
15p/50V_4 15p/50V_4 HWPG LED
1u/10V_6
8769AGND 8769AGND +3V
+3VPCU
R81
PWRLED# R101 10K_4
10K_4
R108 *10K_4
D10 BAS316 HWPG
{26} HWPG_1.8V
D8 BAS316
SMBUS Table {30} +1.5V_PG
D7 BAS316 BAT_SAT0 R111 10K_4
{30} HWPG_2.5V
SMBUS Devices Address BAT_SAT1 R72 10K_4
D6 BAS316
{29} HWPG_SYS
1 Battery
A D1 BAS316 A
{6,25} VRM_PWRGD
CPU Thermal Sensor1 98H
D5 BAS316
{27} HWPG_1.1V_NB
EC EEPROM A0H
2 DNBSWON#_uR C218 *0.47u/10V_4 D2 BAS316
{28} HWPG_1.2V
D4 BAS316
{30} HWPG_NB_1.1V
NBSWON# SW1 *SHORT_ PAD D3 BAS316
{21} NBSWON# {30} HWPG_1.2V_S5
3D Sensor 32H 352-(&7%8
3 4XDQWD&RPSXWHU,QF
Custom 1B
EC WPCE775L
1%
5 4 3 2 1
5 4 3 2 1
'HFRXSOLQJ&$3
Atheros Lan ȱȱȱ
DVDDL +2.5V_LAN AVDDL12
23
C53 C30 C33 C39 C62 C34 C45 C36 C43 C29
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
D D
$531 !$/
ȱȱŘŞǰȱřŘǰȱŚś ȱȱȱśǯŗşǯŘś ȱȱŗŜǰȱŘŘǰȱřŜǰȱřş
U3 (20mils)
C38 0.1u/10V_4 PCIE_RXN5_C 37 28 DVDDL C56 1u/6.3V_4 ȱȱȱ
{9} PCIE_RXN1
{9} PCIE_RXP1
C40 0.1u/10V_4 PCIE_RXP5_C 38
TX_N
TX_P
DVDDL
DVDDL
32 C76 22u/6.3V_8 0.262A(30mils)
44 45 Close to Pin45,46 L2 4.7uh_C LX/VDD18O
{9} PCIE_TXN1 RX_N DVDD_REG C68 1u/6.3V_4
43 46
{9} PCIE_TXP1 RX_P DVDD_REG C59 C71
{3} CLK_PCIE_LAN#
40
REFCLKN LX
1 LX/VDD18O C61 0.1u/10V_4 (60mils)
41 0.1u/10V_4 10u/6.3V_8
{3} CLK_PCIE_LAN REFCLKP
VDD33
2 LAN_VDD33 R43 0_6 +3V_S5
(30mils)
TWSI_SDA 30
TWSI_SCL TWSI_DATA/TEST_PAD AVDD_CEN
29 5
TWSI_CLK/3.3V VDD2.5V C51 1u/6.3V_4
SDATA_LAN 33 15 +2.5V_LAN
SCLK_LAN 31
SMDATA
SMCLK
VDDHO
AVDDH
19
+2.5V_LAN (15mils) C63
{12,18,20,21,22} PLTRST#
3/7567 3
PERSTn
$WKHURV AVDDH
25
11 AVDDL_LAN
0.1u/10V_4
PCIE_WAKE# AVDD_REG
{13,20} PCIE_WAKE# 4 8 AVDDL12
WAKEn VDD11_REG C60 0.1u/10V_4 C58 C57
16
R32 2.37K/F_4 RBIAS AVDDL
12 22
34
RBIAS
AR8132 AVDDL
AVDDL
36
39
C64 1u/6.3V_4
Close to Pin8
Close to Pin11 0.1u/10V_4 *1000p/50V_4
C
TESTMODE AVDDL LAN_AVDDL R31 0_6 C
35 42
NO CONN AVDDL C46 0.1u/10V_4
SENSITIVE PIN!
C66 33p/50V_4 XTLI 10 PER FAE SUGGESTION, 6 AVDD_CEN
XTLI RESERVE ONE BEAD FOR EMI. VDD17
XTLO 9 24
XTLO TRXN[3]
23
2
SEL_25MHz TRXP[3]
7 21
((3520
Y1 SEL_25MHz TRXN[2]
20
TRXP[2] TX1N
18
25MHz R39 TRXN[1] TX1P
49 17
1
GND1 TRXP[1] TX0N

14
*4.7K_4 TRXN[0] TX0P LAN_VDD33
13
C65 33p/50V_4 TRXP[0]
47 LAN_ACTLED R33 4.7K_4
4
2
LED_ACTn LAN_LINKLED#
48 T3
LED_LINK10/100n RP2
26
LED_LINK1000n R22 *4.7K_4
27
CLKREQn *4.7KX2 TWSI_SDA
Q9 TWSI_SCL
2
*ME2N7002E
3
1
C32 C31
3 1 SDATA_LAN
{13,20} SB_SMBDATA1
*0.1u/10V_4 *0.1u/10V_4
AR8132M-AL1E-R
R14 0_4
LAN_VDD33
Pin8 (Provide Overclocking use)
ȱȱȱȱřŖ
B Pin2 Output voltage +1.2V B
Input voltage +3V_S5 Pin45/46
ATHEROS Q8
Output voltage +1.2V (Provide Chip internal voltage use)
2
*ME2N7002E
AR8131M/AR8132M
Pin1 (Provide Transformer use) SCLK_LAN
Output voltage +1.7V {13,20} SB_SMBCLK1 3 1
Pin15 (Provide Chip internal voltage use) R15 0_4

Output voltage +2.5V
+3V_S5 LAN_VDD33
+3V_S5
PLACE NEAR LAN IC SIDE Q14 *AO3413 R48
1 3 *4.7K_4
LAN CONNECTOR
TX0N
TX1N
TX0P
TX1P
C96 C85
2
CN4
*0.01u/25V_4 *0.01u/25V_4
AVDD_CEN 7 R47 *3K_4
2
4
2
4
TX1P 1
RN2 RN1 TX1N 2
3
49.9X2 49.9X2 TX0P 4
1
3
1
3
A TX0N 5 A
3
6 Q15
8
88513-064N 2 LAN_ON {22}
C55 C41
0.1u/10V_4 0.1u/10V_4 *DTC144EUA
352-(&7%8
1
C2A 4XDQWD&RPSXWHU,QF
Custom 1B
Atheros Lan
1%
5 4 3 2 1
5 4 3 2 1
0.01_3720 PQ27 PQ18

VA PD11 PR111 AO4435 AP4435GM
PCN1 PF2
7A_1206
PDS1040S-13
1
R1 1 8
VIN
1 8
1 JACK 1 2 3 1 2 VA2 2 7 2 7 BAT-V
2 3 6 3 6
2 5 5
1
PC103 PR128 PC71 PC68 PR90
4
3 PD12 0.1u/50V_6 220K/F_6 0.1u/50V_6 2200p/50V_6
SMAJ20A 33K_6
4
2
D D
20288-044L 1 6 PR91
PD5 10K_6
1N4148WS PR110 2 5
220K/F_6
3 4
3
PQ29
IMD2AT108
CSIN_1 PR41 0_6 2
{22} D/C#
+3VPCU PQ30
CSIP_1 2N7002K
1
VIN
PR119
10K/F_6 PC73
1u/16V_6
PR100 PR98
ACIN 10/F_6 10/F_6
{21,22} ACIN
PR103
PC75 4.7_6 PC81
0.1u/50V_6 1u/16V_6
PC57 PC67
CSIP CSIN 0.1u/50V_6 10u/25V_1206
PD4 PC56
33
32
31
30
28
27
26
21
C C
1
PC101 +3VPCU RB500V 2200p/50V_6
5
6
7
8
0.1u/50V_6
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
PR99 PC72
2.7_6 0.1u/50V_6 4
{22} MBDATA 11 25 PQ19
VDDSMB BOOT AO4468
0.01_3720
{22} MBCLK 9 24 PR86
PU6 SDA UGATE PL2
CM1213-04SO PCMC063T-6R8MN
3
2
1
1 6 MBDATA 10 23 1 2 BAT-V
CH1 CH4 SCL PHASE
5
6
7
8
2 VN VP 5 +3VPCU
13 20 PR29
TEMP_MBAT_C3 MBCLK ACOK LGATE
CH2 CH3 4
PC76 4 *2.2/F_6 PC49
PR32 0.1u/50V_6 19 0.01u/50V_6
Add ESD diode base on EC FAE suggestion 49.9/F_6 PGND
DCIN 22 PQ21
DCIN PR109 AO4710 PC17
PR102 10/F_6 *2200p/50V_6 PC50
82.5K/F_6 18 CSOP CSOP_1 CSOP_1 2200p/50V_6
3
2
1
88731ACSET 88731ACSET CSOP PC3 PC2
{22} 88731ACSET 2 ACIN BAT-V 10u/25V_1206 10u/25V_1206
PC92
+3VPCU PR104 3 0.1u/50V_6
VREF
B
PC10 22K/F_6
CSON 17 CSON BAT-V
B
*10u/10V_8
PR11 PR10 4 PR113
*100K_4 ICOMP 10/F_6
10K_6 NC 16
24
PR118 0_4
5 NC
CN14
PF1 15 PR117 100_4 BAT-V
20A_1206 VBF
11 6 VCOMP
MBAT+ 1 2 BAT-V 29
9 GND
GND
8
ICM
ID
NC
NC
7 ID {22}
PU9
6 TEMP_MBAT_C
7
ISL88731A
14
12
5
4 +3VPCU PR114
3 2.21K/F_6
2 PC6
1 PC5
10 PR12 ICMNT {22}
47p/50V_6 100K/F_6 PC95
BTJ-09HT0B PR7 47p/50V_6 0.01u/50V_6
100_4
PD2
PR6
100_4 MBDATA {22}
TEMP_MBAT {22}
PC102
MBCLK MBCLK {22} PC82 PC85 PC88 10u/10V_8
*SW1010CPT *1u/16V_6 0.01u/50V_6 *0.01u/50V_6
1
A PR9 A
PD1 PD3
*100K/F_6 PC7 PR8
*ZD3.6V *ZD3.6V 0.01u/50V_6 0_4
2
2
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
CHAGRER (ISL88731)
1%
5 4 3 2 1
5 4 3 2 1
VIN D3A
Del the beads for Power Routing the smooth. 25
1
CPU_VID0 PC65 PC80 PC59 PC69 PC74
{6} CPU_VID0 VIN PQ24
2
5
CPU_VID1 AOL1448
{6} CPU_VID1
{6} CPU_VID2
CPU_VID2 +VCC_CORE=387.5mV TO 1.55V
D PR123 4 10u/25V_1206 *10u/25V_1206 2200P/50V_4 D
CPU_VID3 10u/25V_1206 .1U/25V_4
{6} CPU_VID3 10K/F_4
18A
1
2
3
CPU_VID4
{6} CPU_VID4
+VCC_CORE
CPU_VID5 PL5
{6} CPU_VID5
0.56U25A(PCMC104T-R56MN)
1
828+VIN
PR101
P_VDDA PC96
+5VPCU
20_6 1000P/50V_4
2
PQ28 PR36
1
AOL1718 PR130 1.82/F_4 PR37
PC77 PC79 *2.2_8 5.1/F_4 PC107 + + +
24
22
21
20
19
18
17
16
PU8 SGND5
5
1U/6.3V_4 .22U/25V_6 PR129 PC27 PC24 PC106
2
4 10K _6 _NTC
VID5
VID4
VID3
VID2
VID1
VID0
VDDA
NC
VIN
PR34
2
828Z3101
15 828HDR +5VPCU Z3105
PC70 HDR PR105 PC104 3.74K/F_4
1
2
3
1 2828SLEW 23 SLEW LX 14 828LX 2_6 PD6 *1500P/50V_4 .1U/25V_4 330U_2V_7343
13 828BST 1 2 1 2 PC20
0.018U/16V_4 BST 330U_2V_7343 *330U_2V_7343
VDDP 12 1 2
PR122 0_4 PSI_L 6 RB500V
{6} CPU_PSI# PSI_L PC84 .22U/25V_6
PR121 0_4 P_EN 7
OZ828 1U/6.3V_4
{22} VRON EN
GNDP 11
PR112 0_4 828PG8
{6,22} VRM_PWRGD PG 828LDR
COMPV
LDR 10
GNDA
GNDA
VREF
ILIM 1 828CSP
TSET
25
RSN
RSP
ILIM CSP 828CSN
Z3104
CSN 26
VRON PC100 PC78
OCP = 25A
2 1 22P/50V_4
29
9
828TSET 2
3
2COMPV 4
828RSN28
828RSP27
2
C 2 1 C
SGND5
1000P/50V_4 PR35 0_4
PR120
PR126
100K/F_4 1 2 SGND5
9.09K/F_4 +VCC_CORE
1
PC97 PC83
.01U/25V_4
1
2
PR127
35.7K/F_4 PC93 PC87 PR108
1000P/50V_4 10/F_4
1
1
828VREF
828VREF
PR125 PR106
SUPPORTED
1000P/50V_4 1000P/50V_4 828RSP VID CODES
CPU_VDD_RUN_FB_H {6}
10K/F_4 255/F_4
VID[5:0] Voltage(V) VID[5:0] Voltage(V)
1
PC91 000000b 1.5500 100000b 0.7625

PR124 PC99 PC98 1000P/50V_4 000001b 1.5250 100001b 0.7500
*90.9K/F_4 0.22U/6.3V_4 828RSN PR116 000010b 1.5000 100010b 0.7375
CPU_VDD_RUN_FB_L {6}
2
000011b 1.4750 100011b 0.7250

PR40 255/F_4
828VREFPR38 *9.09K/F_4 000100b 1.4500 100100b 0.7125
*0_4/S PR115 000101b 1.4250 100101b 0.7000
.01U/25V_4 PSI_L PR39 *25.5K/F_4 10/F_4 000110b 1.4000 100110b 0.6875
000111b 1.3750 100111b 0.6750
001000b 1.3500 101000b 0.6625
001001b 1.3250 101001b 0.6500
001010b 1.3000 101010b 0.6375
001011b 1.2750 101011b 0.6250
001100b 1.2500 101100b 0.6125
001101b 1.2250 101101b 0.6000
B 001110b 1.2000 101110b 0.5875 B
001111b 1.1750 101111b 0.5750
010000b 1.1500 110000b 0.5625
010001b 1.1250 110001b 0.5000
010010b 1.1000 110010b 0.5375
+1.8VSUS 010011b 1.0750 110011b 0.5250
010100b 1.0500 110100b 0.5125
010101b 1.0250 110101b 0.5000
010110b 1.0000 110110b 0.4875
PR97 PR96 PR95 PR94 PR93 PR92 010111b 0.9750 110111b 0.4750
*0_4 *0_4 *0_4 *0_4 *0_4 *0_4 011000b 0.9500 111000b 0.4625
011001b 0.9250 111001b 0.4500
011010b 0.9000 111010b 0.4375
011011b 0.8750 111011b 0.4250
011100b 0.8500 111100b 0.4125
CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 011101b 0.8250 111101b 0.4000
011110b 0.8000 111110b 0.3875
011111b 0.7750 111111b 0.3750
A A
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
CPU CORE (OZ828)
1%
5 4 3 2 1
5 4 3 2 1
PC12 Del the beads for Routing the smooth.

+SMDDR_VTERM 10u/10V_8
0.75A PR89 0_6
PC14 0.1u/50V_6 D3A VIN
1.8V_H
PC4 PC9
10u/10V_8 10u/10V_8 1.8V_LX PC63
5
6
7
8
D D
1.8V_L 10u/25V_1206
4
PQ25
AO4468 PC66 PC64
25
24
23
22
21
20
19
PR16 2200p/50V_6 10u/25V_1206
0_6
LL
DRVL
GND
VTT
VLDOIN
VBST
DRVH
PL6 OCP: 9.6A
1.5uH/18A_7X7X3
3
2
1
+1.8VSUS
5
6
7
8
1 VTTGND PGND 18
2 17 + +
{5} CPU_VTT_SENSE VTTSNS CS_GND PR30 4.32K/F_6 4
3 TPS51116REGR 16 PQ26
+SMDDR_VREF GND PU1 CS AO4710 PR107
DIS_MODE 4 15
MODE V5IN *2.2/F_6
C 5 VTTREF V5FILT 14 +5VPCU C
PC89 PC90 PC143
3
2
1
+5VPCU 6 13 PR27 5.1/F_6 220U/2.5V_3528 10u/10V_8 *220U/2.5V_3528
COMP PGOOD
1
VDDQSNS
VDDQSET
PC19 PC16
1u/6.3V_4 1u/6.3V_4 PC86
2
*2200p/50V_6
NC
NC
PC8
S3
S5
0.033u/50V_6 PR28 +3VPCU
100K/F_6
26
7
10
11
12
FOR DDR II HWPG_1.8V {22}
PR25 For RT8207 400KHZ

VIN
620K/F_4
PR13 S5_1.8V PR24 0_4
SUSON {22,30}
PR17 0_6
0_4 S3_1.8V PR22 0_4
C2A
+5VPCU
B AO4710 Rdson=11.7~14.2mOhm B
PR5 *0_6
{6} CPU_VDDIO_FB_H
OCP=7-0.5A
PR42 *0_6
Vout = (PR150/PR149) X 0.75 + 0.75 L(ripple current)
{6} CPU_VDDIO_FB_L +1.8VSUS
=(19-1.8)*1.8/(1.5u*400k*19)
~2.715A
PR19 PR18
*10K/F_4
*14.3K/F_4
14.2m*7.5=RILIM*10uA
RILIM=10.65K
1
2
5
6
MAIND PQ9
DIS_MODE S5_1.8V S3_1.8V {29,30} MAIND 3
FDC653N_NL
(10u*PR35)/Rdson+Delta_I/2=Iocp
PR14
*0_6
4
A A
+1.8VSUS PR15 0_4 PC13
*0.1u/50V_6
PC11
*0.1u/50V_6
+1.8V 352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
DDR 1.8V (TPS51116REGR)
1%
5 4 3 2 1
5 4 3 2 1
VIN
D3A
+5VPCU
PR136 D3A
Del the beads for Power Routing the smooth.
10_6 PD7
PR163 RB500V
D 0_6 D
5
6
7
8
PR45 PC26 OCP: 9A
1M_6
4.7u/6.3V_6 +NB_CORE
2
PR47 4 PC110 PC111
PR46 0_6 PQ34 0.1u/50V_6 10u/25V_1206 Fixed in 1V
AO4468
0_6 PC28
15 13 0.1u/50V_6
{22,28,30} +1.2V_ON EN/DEM BOOT +NB_CORE
+3V 16 12 UGATE-1.1V_NB PL9
3
2
1
TON UGATE 1.5uH/18A_7X7X3
1 11 PHASE-1.1V_NB
VOUT PHASE
2 10 PR48 6.65K/F_6
VDD OC
5
6
7
8
PR137 PU2
10K/F_6 3 UP6111AQDD 9 PC25 *0.1u/50V_6
FB VDDP PR49 + PR44 PC21 +
4 8 LGATE-1.1V_NB 4
{22} HWPG_1.1V_NB PGOOD LGATE PQ33 *2.2/F_6 PC144
6 7 AO4710 PC112
R1 *33p/50V_6
GND PGND 220u/2.5V_3528 3.48K/F_6
5 17
Rds*OCP=RILIM*20uA *220u/2.5V_3528
NC TPAD PC29
14 *2200p/50V_6
3
2
1
NC
1
C C
PC109 PC22 PC23 PC113 PR43
10u/10V_8 10K/F_6
R2
2
1u/16V_6 *1000p/50V_6 0.01u/50V_6

1.1V_NB_FB
VOUT=(1+R1/R2)*0.75
TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
1.1V_NB_FB
PR135
*35.7K/F_6
PR132
+5VPCU
HI --- 1.0V
LOW --- 1.1V
27
3
*10K/F_6
PR133
*10K/F_6
B Frequency=1/(0.0036767)=272K 2 B
1
PQ32
*DMN601K-7
PR131 PR134
2
*0_6
*100/F_6
AO4710 Rdson=11.8~14.2mOhm
PC108
OCP=7.2-0.8A
3
*0.022u/50V_6
L(ripple current)
=(19-1.5)*1.5/(1.0u*272k*19) 2 +NB_CORE_ON {10}
~3.38A PQ31
*DMN601K-7
14.2m*10=RILIM*20uA
1
RILIM=4.9K(4.87K)
A A
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
+NB_CORE (UP6111AQDD)
1%
5 4 3 2 1
5 4 3 2 1
D3A
VIN
+5VPCU
PR87
Del the beads for Power Routing the smooth.
10_6 PD10
5
6
7
8
D D
RB500V
PR164
0_6
1
PR77 PC62 4
1M_6 PQ22
4.7u/6.3V_6 AO4468
2
PR76 PC60 PC55
0_6 0.1u/50V_6 10u/25V_1206
PC51
3
2
1
PR78 0_4 15 13 0.1u/50V_6
OCP: 3.8A
{22,27,30} +1.2V_ON EN/DEM BOOT
+3V 16 12 UGATE-1.2V PL7
TON UGATE 2R2uH/8A_7X7X3
1.2V
1 11 PHASE-1.2V
VOUT PHASE +1.2V
2 10 PR82 6.04K/F_6
VDD OC
5
6
7
8
PR88 PU7
10K/F_6 3 UP6111AQDD 9 PC61 *0.1u/50V_6
FB VDDP PR33 + PR80 +
C C
4 8 LGATE-1.2V 4 PC54
{22} HWPG_1.2V PGOOD LGATE PQ23 *2.2/F_6 *33p/50V_6 PC145
6 7 AO4710 PC105
R1
GND PGND 220u/2.5V_3528 6.2K/F_6 *220u/2.5V_3528
5 17
Rds*OCP=RILIM*20uA
NC TPAD PC18
14 *2200p/50V_6
3
2
1
NC
1
PC58 PC53 PC52 PC94 PR75

10u/10V_8 10K/F_6
R2
2
1u/16V_6 *1000p/50V_6 0.01u/50V_6

1.2V_FB
VOUT=(1+R1/R2)*0.75
B B
AO4932 Rdson=15.8~19.6mOhm
TON=3.85p*RTON*Vout/(Vin-0.5)
OCP=7.2-0.8A
Frequency=Vout/(Vin*TON) L(ripple current)
=(19-1.05)*1.05/(3.3u*272k*19)
TON=3.85p*1M*1/(Vin-0.5) ~1.105A
Frequency=1/(0.0036767)=272K
19.6m*5=RILIM*20uA
RILIM=4.9K(4.87K) 28
A A
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
+1.2V (UP6111AQDD)
1%
5 4 3 2 1
5 4 3 2 1
VL
29
1
PR145 MAIND
39K/F_4 MAIND {26,30}
D3A Del the beads for Power Routing the smooth.
2
SUSD
VIN
D3A {6} SYS_SHDN#
PS1 0_6 SUSD {30}
VIN
D D
PS2 PS3 VL
0_6 0_6
2
Peak 6.9A,AVG 5.189A PD9
5V_EN
3V_EN
ZD5.6V PC139
Total capacitor : 680uF 4.7u/6.3V_6
1
ESR : 17mȍ
PR159 PR66 PR65
f : 400k Hz 0_4 PC137 0_4 *0_4 PC124 PC125 PC122
PC134 PC135 PC126 PR69 PC136 1u/16V_6 0.1u/50V_6 2200p/50V_6 10u/25V_1206
0.1u/50V_6 2200p/50V_6 10u/25V_1206 100K/F_4 0.1u/50V_6
2
2
2
PC140 (Peak 4.707A,AVG 3.508A)
1u/6.3V_4 PC138 Total capacitor : 730 uF
0.1u/50V_6 ESR : 17mȍ
1
REF 3V_DH f : 500k Hz
8
7
6
5
1
PR158 PR64 *0_6
OCP : 4.6A
4 200K/F_4
8
7
6
5
4
3
2
1
PQ38
AO4468 1 D1 G1 8 PL12 +3VPCU
LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
OCP: 8.1A 3.3uH/6A_7X7X3
2 D1 S1/D2 7 +3VPCU
+5VPCU PR155
+5VPCU
9 32 REFIN2 143K/F_6 3 G2 6
1
2
3
PL13 BYP REFIN2 PR161
10 OUT1 ILIM2 31 1 2
C 1.5uH/18A_7X7X3 11 FB1 OUT2 30 4 S2 5 *4.7_6 C
+5VPCU 1 2 12 PU11 29 SKIP
PR150 118K/F_6 DDPWRGD_R 13 ILIM1 ISL6237 SKIP# DDPWRGD_R
PGOOD1 PGOOD2 28
2
8
7
6
5 5V_EN 14 EN1 EN2 27 3V_EN PQ37 PR63 + +
PR153 PR162 5V_DH 15 26 AO4932 0_6
*0_4 5V_LX DH1 DH2 3V_LX PC141 PC132 PC133 PC146
16 LX1 LX2 25
*4.7_6 4 5V_DL 37 *680p/50V_6 0.1u/50V_6 150U/6.3_3528 *150U/6.3_3528
+ PAD
36
1
PAD
PGND
PVCC
PC129 PQ36
BST1
BST2
1 2
GND
PAD
PAD
PAD
DL1
DL2
AO4710 PC128 PC127 PR151 *0_4
NC
2
PC131 PC142 0.1u/50V_6 0.1u/50V_6

150U/6.3_3528 PR152 *680p/50V_6 PR146 1 2
35
34
33
17
18
19
20
21
22
23
24
0_4 PR147 1/F_6 PR154 0_4
1
2
3
1/F_6 1 2
1 2 3V_DL
1
PR68
PC130 0.1u/50V_6 *0_6
10u/25V_1206 PR144 VL PR156 SKIP PR157 *0_6 REF
PC120 *0_6 0_6
2 0.1u/50V_6 PR160 0_4
PC123 1 2
AO4710 Rdson=11.8~14.2mOhm 3 1u/16V_6
PC147 PD13
+ +5VPCU OCP:4A 400K 1 CHN217
AO4932 Rds=15.8~19.6mOhm
L(ripple current) PR55 0_6 +3VPCU OCP:4.6A 500K PR149 10K/F_6
*150U/6.3_3528 PC121 +3VPCU
=(19-5)*5/(2.2u*400k*19) 0.1u/50V_6 L(ripple current)
~4.18A =(19-3.3)*3.3/(3.3u*500k*19)
PC38 DDPWRGD_R 1 2
B 2 HWPG_SYS {22} B
Iocp=6.2-(4.18/2)~4.11A 0.1u/50V_6 ~1.653A
PR148 0_4
Vth=4.11A*14.2mOhm=58.362mV PR143 3
Iocp=4.5-(1.653/2)~3.6735A
R(Ilim)=(58.362mV*10)/5uA PD8
+15V 1 Vth=3.6735A*19.6mOhm=72mV
CHN217
~116.7K R(Ilim)=(72mV*10)/5uA
22_8 PC39
~143K
0.1u/50V_6
VIN +3V_S5 +15V +3VPCU
+5VPCU +3VPCU PR74 PR62 PR58

1M_6 22_8 1M_6
5
6
7
8
S5D 4
5
6
7
8
5
6
7
8
3
PQ11
MAIND 4 MAIND 4 2 AO4496
{22,30} S5_ON
2 2
3
2
1
PQ10 PQ12 PR67 PQ14 PQ13
1
AO4496 AO4496 PR72 PQ15 1M_6 DMN601K-7 DMN601K-7

A 100K/F_4 DTC144EU +3V_S5 A
1
1
3
2
1
3
2
1
0.752A
+5V +3V
352-(&7%8
4A 4XDQWD&RPSXWHU,QF
3.733A
Custom 1B
SYSTEM +5V/+3V (ISL6237)
1%
5 4 3 2 1
5 4 3 2 1
+3V_S5
30
PQ35
AOL1414
+1.2V
3 PR59
5 2 +5VPCU 100K_4
1
PC115 PC114 PC41 PU4
0.1u/50V_6 RT9025-25PSP
0.1u/50V_6 10u/6.3V_6 4 1
4
VPP PGOOD HW PG_1.2V_S5 {22}
9338DRV
3.5A PR73 0_4 2 6 +1.2V_S5
{22,29} S5_ON VEN VO
D D
PR138 3 0.233A
+1.1V +3VPCU VIN
8
ADJ
0_6 GND
9 GND NC 5
PR60
+1.1V {9,10,11}
17.4K/F_6 PC37
7
2
10u/10V_8
3 6 PC116
{22} HW PG_NB_1.1V PGD DRV 0.01u/16V_4 PR139 0.8V
1
PR141 *10K_6 Rg 12K/F_6
MAINON 9338EN 4 PC45 PC44 PC43
{19,22,26} MAINON EN + 10u/10V_8 0.1u/50V_6 *0.1u/50V_6
ADJ 5
PR61
GND
PR142 0_6 +5VPCU 1 Vout1 = (1+Rg/Rh)*0.5 34K/F_6
VCC PR140
{22,27,28} +1.2V_ON PC118 10K/F_6
2
PU10 Rh
0.1u/50V_6 G9338
Vout =0.8(1+R1/R2)
=1.2V
PC32 PC117
0.1u/50V_6 PC31 560u/2.5V_7343
PC119 10u/6.3V_6
*1u/16V_6
+3V_S5
+3VPCU
PR53
+5VPCU 100K_4
C PR70 C
+5VPCU 100K_4 PC33 PU3
0.1u/50V_6 RT9025-25PSP
PU5 4 1
VPP PGOOD HW PG_2.5V {22}
PC42 1u/16V_6 RT9025-25PSP
4 1 MAINON PR54 0_4 2 6
VPP PGOOD +1.5V_PG {22} VEN VO +2.5V
MAINON PR71 0_4 2 6 +1.5V +3VPCU 3 0.188A
VEN VO VIN
8
ADJ
GND
+1.8VSUS 3 VIN 0.75A 9 GND NC 5
PR51
8
ADJ
GND PC30
9 5 73.2K/F_6
7
GND NC PR56 10u/10V_8
PC40
R1 30K/F_4
7
10u/10V_8 0.8V
PC34 PC36 PC35
0.8V 10u/10V_8 0.1u/50V_6 *0.1u/50V_6
PC48 PC47 PC46 PR52
10u/10V_8 0.1u/50V_6 *0.1u/50V_6 34K/F_6
PR57
R2 34K/F_6
Vout =0.8(1+R1/R2)
Vout =0.8(1+R1/R2) VIN +1.8VSUS +15V
=2.5V
=1.506V
PR21 PR4 PR1
1M_6 *22_8 1M_6
B B
SUS_ON_G SUSD
SUSD
3
3
3
PR20
2 1M_6 2 2
{22,26} SUSON PC1
PQ4 PQ3 *2200p/50V_4
PQ5 *DMN601K-7 DMN601K-7
1
PR23 DTC144EU
1
100K/F_4
VIN +3V +5V +1.1V +NB_CORE +SMDDR_VTERM +1.2V +15V
PR81 PR26 PR3 PR2 PR50 PR83 PR85 PR31

1M_6 22_8 22_8 *22_8 *22_8 *22_8 *22_8 1M_6
MAINON_ON_G MAIND
MAIND {26,29}
3
A 3 A
3
PR79
2 1M_6 2 2 2 2 2 2 2
{19,22,26} MAINON PC15
PQ6 PQ2 PQ1 PQ8 PQ16 PQ20 PQ7 *2200p/50V_4
PQ17 DMN601K-7 DMN601K-7 *DMN601K-7 *DMN601K-7 *DMN601K-7 *DMN601K-7 DMN601K-7
1
PR84 DTC144EU
352-(&7%8
1
100K/F_4
4XDQWD&RPSXWHU,QF
Custom 1B
DISCHARGE/+1.5V/+1.2V_S5/+2.5V
1%
Date: W ednesday, June 03, 2009 Sheet 30 of 32
5 4 3 2 1
5 4 3 2 1
+VCC_CORE
Power Tree Table OZ828 VRON enable
PU4
P.28
+5VPCU +5V
AC System
AC/DC Insert enable AO4496 MAINON enable
Charger PQ12
ISL88731 P.29
DC PU2
P.24
D ISL6237 D
PU3
P.29 +3V
+3VPCU
AC/DC Insert enable MAINON enable
AO4496
PQ13
P.29
+3V_LAN
+3V_S5 AO3413 LAN_ON
AO4496 S5_ON enable Q64
PQ10 P.23
P.29
+1.2V_S5
S5_ON enable
RT9025-25PSP
PU9
P.30
+2.5V
RT9025-25PSP MAINON enable
PU11
P.30
C
NB CORE C
UP6111A +1.2V_ON enable
PU6
P.35
+1.8V
+1.8VSUS
FDC653N MAINON enable
SUSON enable PQ25
P.26
+SMDDR_VTERM
TPS51116
SUSON enable +1.5V
PU5 RT9025 MAINON enable
P.26
+SMDDR_VREF PU10
SUSON enable P.30
+1.2V +1.1V
UP6111A +1.2V_ON enable RT9025 MAINON enable
PU7 PU10
P.28 P.30
B B
Power Distribution List
Power Distribution
+VCC_CORE CPU
+5VPCU SB710, Audio/USB /B, HDMI/USB/ B, G-Sensor, Power /B
+3VPCU RTC, HALL SENSOR, KB, TP/LED /B, EC, ID, SPI Flash, CIR
+1.5V Mini Card
+1.8V_SUS CPU, DDR
+VDR_VREF CPU, DDR
+VDR_VTT DDR
+1.2V CPU, CLK, RS780M, SB710
+1.1V RS780M, FRAME BUFFER
+5V CPU FAN,SB710,CRT,CCD,HDMI,HDD,ODD,Audio/USB /B,LED /B
+3V CLK_CPU_FAN,DDR,RS780M,SB710,LCD,CRT,MINI CARD,BT /B,LED /B,Audio/USB /B,EC

A A
+3V_S5 RS780M,SB710,USB SLEEP CHARGE,MINI CARD,LAN

+1.8V CPU,FRAME BUFFER,RS780M
+2.5V CPU
352-(&7%8
4XDQWD&RPSXWHU,QF
Custom 1B
Power Tree Table
1%
5 4 3 2 1
5 4 3 2 1
Model
BU3A
REV
1A
DATE
20090408 First Release
Change List NOTE
31
1B 20090514 PAGE 20: Remove T43,T55. add net USBP5+ and USBP5- to CN11. USBP6+ and USBP6- connect to CN8 (SIM card).
PAGE 20: Add R338,C464,C463,C465,C466,Q39,R339,R340,R341.
PAGE 20: CN22,CN23 (Mini card) change footprint.
PAGE 3: Remove T47,T48. Add RP71. Add net CLK_PCIE_MINI2 and CLK_PCIE_MINI2# to CN22( 3G mini card).
D D
PAGE 9: Remove T38,T40,T101,T102. Add C468,C467. Add net PCIE_TXP3,PCIE_TXN3,PCIE_RXP3,PCIE_RXN3 to CN22 (3G mini card)
PAGE 18: RN5,RN6,RN7,RN8 change footprint.
PAGE 21: Remove CN13,C179. CN16 Change footprint, then modify pin define.
PAGE 13: CN10 change footprint.
PAGE 19: RN3,RN4 change footprint.
PAGE 10: R119 change footprint.
PAGE 21: CN9 modify pin define.
PAGE 11: Remove R153
2A 20090521 PAGE 22: Change D9 to BC000520Z20(BD520WS), Move the C162/C164 capacitors on the +3V side(Prevent the RC delay).
3A 20090701 PAGE 12: Add the series 33 ohm damping resistor for EMI.
PAGE 13: As for Battery life, Move the USB Port for 11.6" Card reader.
PAGE 17: SMT Open issue change 0ohm to 4P2R resistors.
PAGE 17: Move the Co-lay CRT Connector for Routing the smooth.
PAGE 18: Del the HDMI GFX(TX&RX) ohm for Routing the smooth.
PAGE 20: AMD Platform not Support 3G Function and Remove these materials on BOM.
PAGE 21: Reserve the 100p Capacitir on BT Enable pin.
C C
B B
A A
352-(&7%8
4XDQWD&RPSXWHU,QF
C 1B
Change List
1%
5 4 3 2 1

Bu3A System Diagram: AMD Congo

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1 2 3 4 5 6 7 8

CPU CORE OZ828

+1.2V(UP6111AQDD) Keyboard PAGE 21 PAGE 21

3 CLOCK GENERATOR_SLG8SP628 NBSWON#

4 K8G BGA HT I/F 1/4

18 HDMI IC VRM_PWRGD SMBCLK1

,&6/356 31$/356 Clock chip has internal serial terminations

CLK_PD# 51 64 CLK_48M_USB_R R150 33_4 To SB 48MHz

REFCLK_P 14M SE (1.8V) 14M SE (1.1V)

SLG8SP628 R4004/R4005 (value may change) REFCLK_N NC vref

NB_OSC GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*

CLK_48M_USB_R C275 *10p/50V_4

R249 1 66 MHz 3.3V single ended HTT clock

SEL_27 1 27MHz and 27M SS outputs EMI Cap placement close IC

AL4 VLDT_B4 VLDT_A4 F4

{9} HT_NB_CPU_CAD_H15 Y6 L0_CADIN_H15 L0_CADOUT_H15 Y9 HT_CPU_NB_CAD_H15 {9}

{9} HT_NB_CPU_CLK_H0 M3 L0_CLKIN_H0 L0_CLKOUT_H0 AD1 HT_CPU_NB_CLK_H0 {9}

{9} HT_NB_CPU_CTL_H1 P8 L0_CTLIN_H1 L0_CTLOUT_H1 AB8 HT_CPU_NB_CTL_H1 {9}

{9} HT_NB_CPU_CTL_H0 V2 L0_CTLIN_H0 L0_CTLOUT_H0 V4 HT_CPU_NB_CTL_H0 {9}

A9 B9 C9 D9 E9 F9 G9 H9 J9 K9 L9 M9 N9 P9 R9 T9 U9 V9 W9 Y9 AA9 AB9 AC9 AD9 AE9 AF9

A8 B8 C8 D8 E8 F8 H8 J8 K8 L8 M8 N8 P8 R8 T8 U8 V8 W8 AA8 AB8 AC8 AD8 AE8 AF8

A7 B7 C7 D7 E7 F7 H7 J7 K7 L7 M7 N7 P7 R7 T7 U7 V7 W7 AA7 AB7 AC7 AD7 AE7 AF7

A5 B5 C5 D5 E5 F5 G5 H5 J5 K5 L5 M5 N5 P5 R5 T5 U5 V5 W5 Y5 AA5 AB5 AC5 AD5 AE5 AF5

A4 B4 C4 D4 E4 F4 G4 H4 J4 K4 L4 M4 N4 P4 R4 T4 U4 V4 W4 Y4 AA4 AB4 AC4 AD4 AE4 AF4

C2 D2 E2 F2 G2 H2 J2 K2 L2 M2 N2 P2 R2 T2 U2 V2 W2 Y2 AA2 AB2 AC2 AD2 AE2

A1 C1 D1 E1 F1 G1 H1 J1 K1 L1 M1 N1 P1 R1 T1 U1 V1 W1 Y1 AA1 AB1 AC1 AD1

BGA638_50_26SQ_S1G2_OEM Size Document Number Rev

DDR II: CMD/CTRL/CLK

To SODIMM socket A (near)

To SODIMM socket B (Far)

MEM_MA_CLK7_P MEM_MB_CLK7_P H33 H30

1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4

Place close to socket 352-(&7%8

CPU CLK R219

CPU POWER-UP CPU_LDT_RST# R56 300_4 CPU H/W MONITOR

CPU_PWRGD R40 300_4 +3V

R54 {22} 2ND_MBCLK 3 1 R16 R17 R18 R25

Q7 LM86_SMC 8 1 H_THRMDA +3V

{22} 2ND_MBDATA 3 1 LM86_SMD 7 2 C48

PROCESSOR POWER AND GROUND

DECOUPLING BETWEEN PROCESSOR AND DIMMs

22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8 22/6.3V_8

C115 C100 C123 C118 C83 C90 C113 C128 C114

22/6.3V_8 22/6.3V_8 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 180p/50V_4 180p/50V_4 180p/50V_4

+1.8VSUS C95 C89 C142 C146

0.22u/6.3V_4 0.22u/6.3V_4 0.01u/16V_4 180p/50V_4

0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.1u/10V_4 0.1u/10V_4 0.01u/25V_4

+SMDDR_VTERM MEM_MA_BANK2 RP30 4 3 47_4P2R_4 MEM_MB_CKE0 RP27 4 3 47_4P2R_4

MEM_MA0_ODT1 119 MEM_MB0_ODT1 119

VSS7 VSS47 VSS7 VSS47 A2 MEMHOT_DIMM# R115 *0_4

GFX_TX4,TX5,TX6 and TX7

PCIE I/F GFX

RS780M *1K/F_4 *0.1u/10V_4 *1K/F_4 *0.1u/10V_4

{4} HT_CPU_NB_CAD_H5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_H5 {4} MEM_A4(NC) MEM_DQ4(NC)

Close to NB within 1" RS780M Close to NB within 1"

R119 0_6 +1.8V_AVDDDI_NB

R118 R117 R99 HSYNC A11 B16

North Bridge RESET STRAP DEBUG BUS GPIO LVDS BLON

R151 AUX CAL Value need update LVDS_BKL_PWM 3 1 INT_LVDS_PWM {17}

RS740/RX780/RS780 POWER DIFFERENCE TABLE 11

VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

GROUND VDDG18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V

VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V

,&6/356 31$/356 Clock chip has internal serial terminations

Place close to socket 352-(&7%8

RS780M 1K/F_4 0.1u/10V_4 1K/F_4 0.1u/10V_4

Place near ball 352-(&7%8

1 3 3G@0.1u/10V_4 3G@0.1u/10V_4 3G@0.1u/10V_4 3G@10u/6.3V_8

CP2 7 8 220pX4 MY2 10K_4