Beruflich Dokumente
Kultur Dokumente
Compal Confidential
Model Name : Bellemere_BE
Compal Project Name : B5W1E
File Name : LA-D121P
1 1
Compal Confidential
2 2
2015-04-16
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Tuesday, April 21, 2015 Sheet 1 of 33
A B C D E
A B C D E
Compal Confidential
Model Name : B5W1E
B5W1K
B5W1R
1 1
Display Port
Beema/
Kabini/
USB2.0
Port 1 Port 0
Port 8 Port 0 Port 2 Port 3 Port 5
Page 18 Page 18
ENE
DC/DC Interface CKT. KBC9022
Page 24
Page 14
Analog MIC
Power Circuit DC/DC
Page 16
Page 24~33
Universal Jack
Sub Board Page 16 Int. Speaker
Int.KBD Touch Pad Conn. Page 16
Page 20 Page 20
LS-B471P
Card Reader Discrete TPM
RTS5170 Page 20
4 2 in 1 (SD) 4
USB 2.0
conn x1 Security Classification Compal Secret Data Compal Electronics, Inc.
USB port 2 Issued Date 2014/03/27 Deciphered Date 2016/03/27 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BLOCK DIAGRAMS
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
P.21 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
B5W1E_LA-D121P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 16, 2015 Sheet 2 of 33
A B C D E
5 4 3 2 1
+1.5V VDD_MEM 8A
AMD APU FT3b Beema (15W)
+0.75VS VTT_MEM 2A
D D
BATT+
+1.5V
+1.5V VDDIO_MEM_S @ 3A
BATTERY PU501
RT8207PGQW +0.75VS +1.5VS
+1.5VS VDDIO_AZ_ALW @ 0.1A
HDMI
VDD_095_USB3_Dual @ 1A
+5VS +0.95VALW
C +5VS_DISP VDD_095_ALW @ 0.5A C
PU402
SY8286CRAC
USB2.0 x1 LCD panel +RTCCONN
USB3.0 x1 14" +RTC_APU
+19VB PU101 RTC
+USB3_VCCA +5VALW +INVPWR_B+ AP2138N-1.5TRG1 Bettary
+LCDVDD @ 1.4A +3VS
LAN/CR Combo
RTL8411B-CG HD Camera
+3VS_WLAN @ 2A
+3VALW +5VS_TS POWER MAP
+5VS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 3 of 33
5 4 3 2 1
A B C D E
2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTES LIST
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Tuesday, April 21, 2015 Sheet 4 of 33
A B C D E
5 4 3 2 1
UAPU1 UAPU1
@
UAPU1A
<10,11> DDRAB_SMA[15..0] DDRAB_SDQ[63..0] <10,11>
DDRAB_SMA0 AG38
DDRAB_SMA1 W35
M_ADD0
MEMORY
M_DATA0 B30
A32
DDRAB_SDQ0
DDRAB_SDQ1
KABINI
M_ADD1 M_DATA1
DDRAB_SMA2 W38 M_ADD2 M_DATA2 B35 DDRAB_SDQ2 EM2100CJ23HM 1G BGA769 EM2500BJ23HM 1.4G BGA
DDRAB_SMA3 W34 M_ADD3 M_DATA3
A36 DDRAB_SDQ3 E1_2100@ E1_2500@
DDRAB_SMA4 U38 B29 DDRAB_SDQ4 SA00006QX70 SA00006R670
M_ADD4 M_DATA4
DDRAB_SMA5 U37 M_ADD5 M_DATA5 A30 DDRAB_SDQ5
DDRAB_SMA6 U34 A34 DDRAB_SDQ6 UAPU1 UAPU1 UAPU1 UAPU1
D M_ADD6 M_DATA6 D
DDRAB_SMA7 R35 M_ADD7 M_DATA7 B34 DDRAB_SDQ7
DDRAB_SMA8 R38
M_ADD8
DDRAB_SMA9 N38 B37 DDRAB_SDQ8
DDRAB_SMA10 AG34
DDRAB_SMA11 R34
M_ADD9
M_ADD10
M_DATA8
M_DATA9 A38
D40
DDRAB_SDQ9
DDRAB_SDQ10
CZ-L
M_ADD11 M_DATA10
DDRAB_SMA12 N37 M_ADD12 M_DATA11 D41 DDRAB_SDQ11 AM7210ITJ44JB 1.8G BGA 769P AM7310ITJ44JB 2G FCBGA 769P AM7410ITJ44JB 2.2G FCBGA 769P EM7110ITJ44JB 1.8G FCBGA 769P
DDRAB_SMA13 AN34 M_ADD13 M_DATA12
B36 DDRAB_SDQ12 A4_7210@ A6_7310@ A8_7410@ E2_7110@
DDRAB_SMA14 L38 M_ADD14 M_DATA13
A37 DDRAB_SDQ13 SA00008R420 SA00008K930 SA00008K660 SA00008MA20
DDRAB_SMA15 L35 M_ADD15 M_DATA14 B41 DDRAB_SDQ14
C40 DDRAB_SDQ15 UAPU1 UAPU1 UAPU1 UAPU1 UAPU1
M_DATA15
AJ38 M_BANK0
<10,11> DDRAB_SBS0# AG35 F40
M_BANK1 M_DATA16 DDRAB_SDQ16
<10,11> DDRAB_SBS1# N34 F41
M_BANK2 M_DATA17 DDRAB_SDQ17
<10,11> DDRAB_SBS2#
K40 DDRAB_SDQ18
<10,11> DDRAB_SDM[7..0]
DDRAB_SDM0
DDRAB_SDM1
B32
B38
M_DM0
M_DATA18
M_DATA19
K41
E40
DDRAB_SDQ19
DDRAB_SDQ20
Beema EM6010IUJ23JB 1.35G BGA 769P EM6110ITJ44JB 1.5G BGA 769P AM6210ITJ44JB 1.8G BGA 769P AM6310ITJ44JB 1.8G BGA 769P AM6410ITJ44JB 2G BGA 769P
M_DM1 M_DATA20
DDRAB_SDM2 G40 E41 DDRAB_SDQ21 E1_6010@ E2_6110@ A4_6210@ A6_6310@ A8_6410@
M_DM2 M_DATA21
DDRAB_SDM3 N41 J40 DDRAB_SDQ22 SA00007RC20 SA00007RB20 SA00007RA20 SA00007R920 SA00007TQ80
M_DM3 M_DATA22
DDRAB_SDM4 AG40 M_DM4 M_DATA23 J41 DDRAB_SDQ23
DDRAB_SDM5 AN41
M_DM5
DDRAB_SDM6 AY40 M_DM6 M_DATA24 M41 DDRAB_SDQ24
DDRAB_SDM7 AY34 N40 DDRAB_SDQ25 @
M_DM7 M_DATA25
Y40 T41 DDRAB_SDQ26 UAPU1B
M_DM8 M_DATA26
M_DATA27 U40 DDRAB_SDQ27 PCIE
C C
B33 L40 DDRAB_SDQ28
<10,11> DDRAB_SDQS0 M_DQS_H0 M_DATA28
A33 M_DQS_L0 M_DATA29 M40 DDRAB_SDQ29
<10,11> DDRAB_SDQS0# B40 R40 R10 L2
M_DQS_H1 M_DATA30 DDRAB_SDQ30 P_GPP_RXP0 P_GPP_TXP0
<10,11> DDRAB_SDQS1 A40 T40 R8 L1
M_DQS_L1 M_DATA31 DDRAB_SDQ31 P_GPP_RXN0 P_GPP_TXN0
<10,11> DDRAB_SDQS1#
H41 M_DQS_H2
<10,11> DDRAB_SDQS2 H40 AF40 R5 K2
M_DQS_L2 M_DATA32 DDRAB_SDQ32 P_GPP_RXP1 P_GPP_TXP1 PCIE_ATX_DRX_P1 C19 1 2 .1U_0402_16V7K
<10,11> DDRAB_SDQS2# <15> PCIE_ARX_DTX_P1 PCIE_ATX_C_DRX_P1 <15>
P41 M_DQS_H3 M_DATA33 AF41 DDRAB_SDQ33 R4 P_GPP_RXN1 LAN P_GPP_TXN1 K1 PCIE_ATX_DRX_N1 C20 1 2 .1U_0402_16V7K
<10,11> DDRAB_SDQS3 P40 AK40 <15> PCIE_ARX_DTX_N1 PCIE_ATX_C_DRX_N1 <15>
M_DQS_L3 M_DATA34 DDRAB_SDQ34
<10,11> DDRAB_SDQS3# AH41 AK41 N5 J2
M_DQS_H4 M_DATA35 DDRAB_SDQ35 P_GPP_RXP2 PCIE_ATX_DRX_P2 C17 1 2 .1U_0402_16V7K
<10,11> DDRAB_SDQS4 <17> PCIE_ARX_DTX_P2 P_GPP_TXP2 PCIE_ATX_C_DRX_P2 <17>
AH40 M_DQS_L4 M_DATA36 AE40 DDRAB_SDQ36 N4 P_GPP_RXN2 WLAN J1 PCIE_ATX_DRX_N2 C18 1 2 .1U_0402_16V7K
<10,11> DDRAB_SDQS4# AP41 AE41 <17> PCIE_ARX_DTX_N2 P_GPP_TXN2 PCIE_ATX_C_DRX_N2 <17>
M_DQS_H5 M_DATA37 DDRAB_SDQ37
<10,11> DDRAB_SDQS5
AP40 M_DQS_L5 M_DATA38 AJ40 DDRAB_SDQ38 N10 P_GPP_RXP3 P_GPP_TXP3 H2
<10,11> DDRAB_SDQS5# BA40 AJ41 +0.95VS N8 H1 +0.95VS
M_DQS_H6 M_DATA39 DDRAB_SDQ39 P_GPP_RXN3 P_GPP_TXN3
<10,11> DDRAB_SDQS6 AY41
<10,11> DDRAB_SDQS6# M_DQS_L6
AY33 M_DQS_H7 M_DATA40 AM41 DDRAB_SDQ40 1 2 P_TX_ZVDD_095 W8 P_TX_ZVDD_095 W7 P_RX_ZVDD_095 2 1
<10,11> DDRAB_SDQS7 BA34 AN40 DDRAB_SDQ41 P_RX_ZVDD_095
M_DQS_L7 M_DATA41 R404 R73
<10,11> DDRAB_SDQS7#
AA40 M_DQS_H8 M_DATA42 AT41 DDRAB_SDQ42 1.69K_0402_1% 1K_0402_1%
Y41 AU40 DDRAB_SDQ43
M_DQS_L8 M_DATA43
AL40 DDRAB_SDQ44 L5 G2
M_DATA44 P_GFX_RXP0 P_GFX_TXP0
AC35 M_CLK_H0 M_DATA45 AM40 DDRAB_SDQ45 L4 P_GFX_RXN0 P_GFX_TXN0 G1
<10> DDRA_CLK0 AC34 AR40 DDRAB_SDQ46
<10> DDRA_CLK0# M_CLK_L0 M_DATA46
AA34 M_CLK_H1 M_DATA47 AT40 DDRAB_SDQ47 J5 P_GFX_RXP1 P_GFX_TXP1 F2
<10> DDRA_CLK1 AA32 J4 F1
<10> DDRA_CLK1# M_CLK_L1 P_GFX_RXN1 P_GFX_TXN1
B AE38 AV41 DDRAB_SDQ48 B
<11> DDRB_CLK0 M_CLK_H2 M_DATA48
AE37 AW40 DDRAB_SDQ49 G5 P_GFX_TXP2 E2
<11>
<11>
DDRB_CLK0#
DDRB_CLK1
AA37
AA38
M_CLK_L2
M_CLK_H3
M_DATA49
M_DATA50
BA38 DDRAB_SDQ50
AY37 DDRAB_SDQ51
G4
P_GFX_RXP2
P_GFX_RXN2 P_GFX_TXN2
E1 MEMORY VREF
<11> DDRB_CLK1# M_CLK_L3 M_DATA51
AU41 DDRAB_SDQ52 D7 D2
M_DATA52 P_GFX_RXP3 P_GFX_TXP3 +1.5V
G38 AV40 DDRAB_SDQ53 E7 D1
<10,11> MEM_MAB_RST# M_RESET_L M_DATA53 P_GFX_RXN3 P_GFX_TXN3
AE34 M_EVENT_L M_DATA54 AY39 DDRAB_SDQ54
<10,11> MEM_MAB_EVENT# AY38 DDRAB_SDQ55
M_DATA55
L34 M0_CKE0
<10> DDRA_CKE0
1
J38 BA36 DDRAB_SDQ56
<10> DDRA_CKE1 M0_CKE1 M_DATA56 +1.5V
J37 AY35 DDRAB_SDQ57 FT3_BGA_769P-T R75
<11> DDRB_CKE0 M1_CKE0 M_DATA57
J34 M1_CKE1 M_DATA58 BA32 DDRAB_SDQ58 Part Number = 1K_0402_1%
<11> DDRB_CKE1 AY31 +MEM_VREF
M_DATA59 DDRAB_SDQ59
AN38 M0_ODT0 M_DATA60 BA37 DDRAB_SDQ60
<10> DDRA_ODT0
2
AU38 AY36 DDRAB_SDQ61 2 1 MEM_MAB_EVENT#
<10> DDRA_ODT1 M0_ODT1 M_DATA61
AN37 BA33 DDRAB_SDQ62 R77
<11> DDRB_ODT0 M1_ODT0 M_DATA62
1
AR37 M1_ODT1 M_DATA63 AY32 DDRAB_SDQ63 1K_0402_1%
<11> DDRB_ODT1
R76 1 2
AJ34 M0_CS_L0 M_CHECK0 V41 1K_0402_1%
<10> DDRA_SCS0# AR38 W40
M0_CS_L1 M_CHECK1 C337 C163
<10> DDRA_SCS1# AL38 AB40
M1_CS_L0 M_CHECK2 1U_0402_6.3V6K .1U_0402_16V7K
<11> DDRB_SCS0#
2
AN35 AC40 2 1
<11> DDRB_SCS1# M1_CS_L1 M_CHECK3
U41
M_CHECK4
AJ37 M_RAS_L M_CHECK5 V40 M_ZVDDIO 1 2
<10,11> DDRAB_SRAS# AL34 AA41 +1.5V
A
M_CAS_L M_CHECK6 R74 A
<10,11> DDRAB_SCAS# AL35 AB41
M_WE_L M_CHECK7 39.2_0402_1%
<10,11> DDRAB_SWE#
AD40
+MEM_VREF
T33 APU_VREFDQ AC38
M_VREF
M_VREFDQ M_ZVDDIO_MEM_S AD41 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/27 Deciphered Date 2016/03/27 Title
FT3_BGA_769P-T
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P05-FT3 MEMORY INTERFACE/PCIE
Part Number = AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 5 of 33
5 4 3 2 1
A B C D E
@
UAPU1C
DISPLAY/SVI2/JTAG/TEST
A9 TDP1_TXP0 DP_150_ZVSS B16 DP_150_ZVSS R401 1 2 150_0402_1%
<13> APU_DP1_P0
B9 TDP1_TXN0 DP_2K_ZVSS A21 DP_2K_ZVSS R400 1 2 2K_0402_1%
<13> APU_DP1_N0 B17
DP_BLON ENBKL <14>
A10 TDP1_TXP1 DP_DIGON A17
<13> APU_DP1_P1 B10 TDP1_TXN1 A18 ENVDD <12>
DP_VARY_BL
<13> APU_DP1_N1 INVTPWM <12>
HDMI
A11 TDP1_TXP2
<13> APU_DP1_P2 B11 TDP1_TXN2 D17
TDP1_AUXP
1 <13> APU_DP1_N2 HDMI_CLK <13> 1
TDP1_AUXN E17
A12 TDP1_TXP3 HDMI_DATA <13>
<13> APU_DP1_P3 B12 TDP1_TXN3 H19
TDP1_HPD
<13> APU_DP1_N3 HDMI_HPD <13>
A4 LTDP0_TXP0 LTDP0_AUXP D15 A4W1E
<12> EDP_TXP0 EDP_AUXP <12>
B4 LTDP0_TXN0 LTDP0_AUXN E15 RP23
<12> EDP_TXN0 EDP_AUXN <12> 1 8
DAC_RED
A5 LTDP0_TXP1 LTDP0_HPD H17 DAC_GRN 2 7
<12> EDP_TXP1 EDP_HPD <12>
B5 LTDP0_TXN1 DAC_BLU 3 6
<12> EDP_TXN1 B14 4 5
DAC_RED DAC_RED
eDP A6 LTDP0_TXP2
B6 LTDP0_TXN2 DAC_GREEN A14 DAC_GRN A4W1E CRT 75_0804_8P4R_1%
FT3_BGA_769P-T 1K_0804_8P4R_5%
+3VS Part Number =
RP4
APU_ALERT# 1 8 APU_PWRGD 1 2 EMC@ RP8 +1.8VS
EC_SMB_DA2 2 7 Close To PU1000 C1272 33P_0402_50V8J 1 8
APU_PROCHOT# 3 6 APU_TRST# 2 7
EC_SMB_CK2 4 5 Close To APU's Pin APU_PWRGD 1 2 EMC@ APU_TEST19 3 6
C1270 33P_0402_50V8J APU_TEST18 4 5
1K_0804_8P4R_5% APU_RST# 1 2 EMC@
C1273 33P_0402_50V8J 1K_0804_8P4R_5%
APU_PROCHOT# 1 2 @EMC@
C1276 100P_0402_50V8J
PU +1.8VS @ +1.8VS
APU_ALERT#
C1277
1 2 @EMC@
100P_0402_50V8J
RP5
4 APU_SVT_R 1 8 4
APU_SVC_R 2 7
APU_SVD_R 3 6
4 5
Security Classification Compal Secret Data Compal Electronics, Inc.
1K_0804_8P4R_5% 2014/03/27 2016/03/27 Title
APU_RST# R80 1 2 300_0402_5%
Issued Date Deciphered Date
APU_PWRGD R82 1 2 300_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FT3 DISP/MISC/HDT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 6 of 33
A B C D E
A B C D E
1 2 @
C615 150P_0402_50V8J UAPU1D
ACPI/SD/AZ/GPIO/RTC/MISC
R602 1 2 33_0402_5% LPC_RST_A# AY4 LPC_RST_L SD_PW R_CTRL BA23
<14,20> LPC_RST# +3VALW
R907 1 2 33_0402_5% APU_PCIE_RST#_R AY9 PCIE_RST_L SD_CLK/GPIO73 AY22 A4W1E
<15,17> APU_PCIE_RST#
1 2 EC_RSMRST#_R AY5 RSMRST_L SD_CMD/GPIO74 AY23 APU_SCLK1 4.7K_0402_5% 2 1 R3943
C912 150P_0402_50V8J SD_CD/GPIO75 AY20 APU_SDATA14.7K_0402_5% 2 1 R3944
BA8 PW R_BTN_L SD_W P/GPIO76 BA20
<14> PBTN_OUT#
AM19 PW R_GOOD
<14> SYS_PW RGD_EC
T16 AY7 SYS_RESET_L/GEVENT19_L SD_DATA0/GPIO77 BA22 +3VS
APU_PCIE_W AKE# AW11 W AKE_L/GEVENT8_L SD_DATA1/GPIO78 AY21
<15> APU_PCIE_W AKE#
2
SD_DATA2/GPIO79 AY24
1 AY3 SLP_S3_L SD_DATA3/GPIO80 BA24 1
<14> SLP_S3#
BA5 SLP_S5_L CZL@ KBN@
<14> SLP_S5#
SD_LED/GPIO45 AY25 R694 R695
R40 1 2 15K_0402_5% APU_TEST0 AU13 TEST0 1K_0402_5% 1K_0402_5%
1
R41 1 2 15K_0402_5% APU_TEST1 AY10 TEST1/TMS SCL0/GPIO43 AU25 APU_SCLK0 APU_GPIO51
APU_SCLK0 <10,11,17>
R42 1 2 15K_0402_5% APU_TEST2 AY6 TEST2 SDA0/GPIO47 AV25 APU_SDATA0 APU_GPIO49
APU_SDATA0 <10,11,17>
AR23 KBRST_L SCL1/GPIO227 AY11 APU_SCLK1
<14> KBRST#
1
AR31 GA20IN/GEVENT0_L SDA1/GPIO228 BA11 APU_SDATA1
<14> GATEA20
AN5 LPC_PME_L/GEVENT3_L
<14> EC_SCI#
AL7 LPC_SMI_L/GEVENT23_L GPIO49 AP27 APU_GPIO49 R692 R691
<14> EC_SMI#
GPIO50 AY28 10K_0402_5% 10K_0402_5%
GPIO51 BA28 APU_GPIO51
2
AP15 AC_PRES/IR_RX0/GEVENT16_L GPIO55 AV23
DEVSLP0 <18>
AV13 IR_TX0/GEVENT21_L GPIO57 AP21
BA9 IR_TX1/GEVENT6_L GPIO58 BA26
BA10 IR_RX1/GEVENT20_L GPIO59 AV19
AV15 IR_LED_L/LLB_L/GPIO184 GPIO64 AY27 Platform identify GPIO51 GPIO49
SPKR/GPIO66 BA27
APU_SPKR <16>
AU29 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60 GPIO68 AU21 Beema 0 0 (DEFAULT)
LAN_CLKREQ# AW29 CLK_REQ1_L/GPIO61 GPIO69 AY26 Kabini 0 1
<15> LAN_CLKREQ#
W LAN_CLKREQ# AR27 CLK_REQ2_L/GPIO62 GPIO70 AV21 Carrizo_L (Reserve) 1 0
<17> W LAN_CLKREQ#
AV27 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63 GPIO71 AM21 APU_GPIO71 R661 1 @ 2 0_0402_5% NA (Reserve) 1 1
PROCHOT# <6,14,30>
T21 AY29 CLK_REQG_L/GPIO65/OSCIN GPIO174 BA3 APU_GPIO174 R686 1 2 10K_0402_5%
GEVENT4# 1 @ R687 2 10K_0402_5%
USB_OC0# AY8 USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L GEVENT2_L AV17 GEVENT2#
<19> USB_OC0#
USB_OC1# AW1 USB_OC1_L/TDI/GEVENT13_L GEVENT4_L BA4 GEVENT4# 1 R668 2 10K_0402_5% +3VALW
T19 AV1 USB_OC2_L/TCK/GEVENT14_L GEVENT7_L AR15 R689 1 2 10K_0402_5%
T20 AY1 USB_OC3_L/TDO/GEVENT15_L GEVENT10_L AP17
2 GEVENT11_L AP11 2
HDA_BITCLK AN2 AZ_BITCLK GEVENT17_L AN8 Project identify 14" 15"
HDA_SDOUT AN1 AZ_SDOUT BLINK/GEVENT18_L AU17 T17
HDA_SDIN0 AK2 AZ_SDIN0/GPIO167 GEVENT22_L BA6 GEVENT4# 0 1
<16> HDA_SDIN0 EC_LID_OUT# <14>
1 @ 2 HDA_SDIN1 AK1 AZ_SDIN1/GPIO168
R3939 1 @ 2 10K_0402_5% HDA_SDIN2 AM1 AZ_SDIN2/GPIO169 GENINT1_L/GPIO32 BA29 GENINT1_L
R3938 1 @ 2 10K_0402_5% HDA_SDIN3 AL2 AZ_SDIN3/GPIO170 GENINT2_L/GPIO33 AP23 GENINT2_L
R3937 10K_0402_5% HDA_SYNC AM2 AZ_SYNC
Checklist suggestion HDA_RST# AL1 AZ_RST_L FANOUT0/GPIO52 AV31
FANIN0/GPIO56 AU31 GENINT1_L 1 @ 2
TP_I2C_INT#_APU <20>
0_0402_5% R3920
32K_X1 AJ2 X32K_X1 GENINT2_L 1 RS@ 2
0_0402_5% R3923
FT3_BGA_769P-T
STRAPS OF APU
EMC@ Part Number =
RP13
1 8 HDA_RST#
LPC_FRAME# LPC_CLK0_EC LPC_CLK1 GEVENT2_L RTC_CLK
<16> HDA_RST#_AUDIO
2 7 HDA_SYNC
<16> HDA_SYNC_AUDIO
3 6 HDA_SDOUT SPI ROM BOOT FAIL TIMER CLKGEN 1.8V SPI ROM NORMAL POWR
<16>
<16>
HDA_SDOUT_AUDIO
HDA_BITCLK_AUDIO
4 5 HDA_BITCLK
33_0804_8P4R_5%
H (DEFAULT) ENABLED ENABLE
(DEFAULT)
UP/RESET TIMING
(DEFAULT)
+3VALW
3 3
+1.8VALW BOOT FAIL TIMER CLKGEN 3.3V SPI ROM FAST POWER
R901
R905
R906
1
1
1
@
@
2
2
2
100K_0402_5%
100K_0402_5%
100K_0402_5%
APU_PCIE_W AKE#
USB_OC0#
USB_OC1# A4W1E
L LPC ROM DISABLED
(DEFAULT)
DISABLED (DEFAULT) UP/RESET TIMING
FOR SIMULATION
2
+3VS +3VS
1
1
R676 1 2 2.2K_0402_5% APU_SCLK0 D3 R3946 1 2 10K_0402_5%
R677 1 2 2.2K_0402_5% APU_SDATA0 RB751V-40 SOD-323 @ @ @ @
R3947 1 @ 2 10K_0402_5% R902 R904 R925 R928 R949
RB751 Max Vf=0.37V 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
R684 1 @ 2 10K_0402_5% HDA_BITCLK SYS_PW RGD_EC R3948 1 2 10K_0402_5%
2
R688 1 @ 2 10K_0402_5% HDA_SDIN0
<8,14> LPC_FRAME#
<8,14> LPC_CLK0_EC
1 1 2 <8,20> LPC_CLK1
C209 C212 C948 GEVENT2#
32.768KMHz CRYSTAL 1U_0402_6.3V6K
2 2
1U_0402_6.3V6K
1
.1U_0402_16V7K
RTC_CLK
@EMC@
32K_X1
1
1
@ @ @
SJ100001K00 Y3 R903 R926 R927 R929 R950
4 32.768KHZ_12.5PF_CM31532768DZFT 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5% 2.2K_0402_5% 4
2
2
2 1 32K_X2
R914
20M_0402_5%
1 1
C686 C682 Security Classification Compal Secret Data Compal Electronics, Inc.
18P_0402_50V8J 18P_0402_50V8J 2014/03/27 2016/03/27 Title
2 2 Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FT3 GPIO/AZ/MISC/STRAPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 7 of 33
A B C D E
A B C D E
@
UAPU1E
CLK/SATA/USB/SPI/LPC
BA14 W4
<18> SATA_FTX_DRX_P0 SATA_TX0P USBCLK/14M_25M_48M_OSC
AY14 SATA_TX0N
<18> SATA_FTX_DRX_N0
USB_ZVSS AG4 USB_ZVSS R641 1 2 11.8K_0402_1%
HDD BA16 SATA_RX0N
<18> SATA_FRX_DTX_N0 AY16 AL4
<18> SATA_FRX_DTX_P0 SATA_RX0P USB_HSD0P USB20_P0 <19>
AL5 USB/B port 0
USB_HSD0N USB20_N0 <19>
AY19 SATA_TX1P
<18> SATA_FTX_DRX_P1 BA19 AJ4
1 <18> SATA_FTX_DRX_N1 SATA_TX1N USB_HSD1P USB20_P1 <19> 1
ODD USB_HSD1N AJ5 SUB/B USB2 Port 0-3 USB OHCI1 ( Dev 12 Func 0 )
AY17 USB20_N1 <19>
<18> SATA_FRX_DTX_N1 BA17
SATA_RX1N
AG7 EHCI1 ( Dev 12 Func 2 )
<18> SATA_FRX_DTX_P1 SATA_RX1P USB_HSD2P USB20_P2 <17>
USB_HSD2N AG8 WLAN/BT combo
2 1 1K_0402_1% SATA_ZVSS AR19 USB20_N2 <17>
R90 SATA_ZVSS
+0.95VS R96 2 1 1K_0402_1% SATA_ZVDD AP19 SATA_ZVDD_095 USB_HSD3P AG1
AG2 USB20_P3 <12>
USB_HSD3N USB20_N3 <12> CAMERA
3
3 4
4 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/27 Deciphered Date 2016/03/27 Title
1
C794 C795
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FT3 SATA/CLK/USB/SPI
6.8P_0402_50V8C 5.6P_0402_50V8D AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
2
SE07156AD80 B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 8 of 33
A B C D E
A B C D E
C179
C180
C181
C182
C183
C184
C186
C187
C188
C189
C190
1 1 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
2 2 2 2 2 2 2 2 2 2 2
1 1
C201
C202
C192
C191
C193
C194
C195
C197
C249
C257
C252
C253
+1.5V
1 1 1 1 1 1 1 1 1 1 1 1 1
3A
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
1U_0402_6.3V6K
180P_0402_50V8J
1U_0402_6.3V6K
1U_0402_6.3V6K
2 2 2 2 2 2 2 2 2 2 2 2 2 @ @ @
UAPU1F UAPU1G UAPU1H
POWER GND GND
J35 VDDIO_MEM_S_1 VDDCR_CPU_1 L21 +APU_CORE A8 VSS_1 VSS_63 J3 W29 VSS_125 VSS_187 AL39
L32 L23 A13 J7 W39 AL41
VDDIO_MEM_S_2 VDDCR_CPU_2 VSS_2 VSS_64 VSS_126 VSS_188
L37 L25 A23 J8 W41 AM11
VDDIO_MEM_S_3 VDDCR_CPU_3 VSS_3 VSS_65 VSS_127 VSS_189
N35 VDDIO_MEM_S_4 VDDCR_CPU_4 L27 A31 VSS_4 VSS_66 J39 Y1 VSS_128 VSS_190 AM27
2
R31 L29 A35 K11 Y2 AM31
VDDIO_MEM_S_5 VDDCR_CPU_5 VSS_5 VSS_67 VSS_129 VSS_191
R37 N21 R119 A39 K13 AA3 AN3
VDD_33 VDD_33_ALW U32
VDDIO_MEM_S_6 VDDCR_CPU_6
N23 0_0402_5% B8
VSS_6 VSS_68
K17 AA7
VSS_130 VSS_192
AN7
VDDIO_MEM_S_7 VDDCR_CPU_7 VSS_7 VSS_69 VSS_131 VSS_193
U35 N27 RS@ B13 K19 AA8 AN39
VDDIO_MEM_S_8 VDDCR_CPU_8 VSS_8 VSS_70 VSS_132 VSS_194
W31 VDDIO_MEM_S_9 VDDCR_CPU_9 R21 B23 VSS_9 VSS_71 K21 AA11 VSS_133 VSS_195 AP31
1
VDDIO_AZ_ALW W32 R23 B31 K23 AA15 AR3
+1.5V/+1.5VS OF APU (Could be S0 or S5 power rail) W37
AA31
VDDIO_MEM_S_10
VDDIO_MEM_S_11
VDDCR_CPU_10
VDDCR_CPU_11 R27
U21
B39
C1
VSS_10
VSS_11
VSS_72
VSS_73 K25
K27
AA19
AA25
VSS_134
VSS_135
VSS_196
VSS_197 AR13
AR17
VDDIO_MEM_S_12 VDDCR_CPU_12 VSS_12 VSS_74 VSS_136 VSS_198
PLANE SPLIT AA35 U23 C2 K29 AA29 AR21
+1.5V +1.5VS VDDIO_MEM_S_13 VDDCR_CPU_13 VSS_13 VSS_75 VSS_137 VSS_199
AC32 U27 C5 K31 AA39 AR25
2
VDDIO_MEM_S AC37
VDDIO_MEM_S_14 VDDCR_CPU_14
W21 C7
VSS_14 VSS_76
L3 AC3
VSS_138 VSS_200
AR29
2
VDDIO_MEM_S_15 VDDCR_CPU_15 VSS_15 VSS_77 VSS_139 VSS_201
AE31 VDDIO_MEM_S_16 VDDCR_CPU_16 W23 C9 VSS_16 VSS_78 L7 AC7 VSS_140 VSS_202 AR39
AE35 W27 C11 L8 AC11 AR41
VDDIO_MEM_S_17 VDDCR_CPU_17 VSS_17 VSS_79 VSS_141 VSS_203
C924
C925
C949
C923
C926
C927
C928
C929
C931
C930
C932
C211
C210
C208
C207
C230
C231
C258
C259
C161
C232
C254
C255
C256
AG32 AA21 C13 L10 AC15 AU1
VDDIO_MEM_S_18 VDDCR_CPU_18 VSS_18 VSS_80 VSS_142 VSS_204
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AG37 VDDIO_MEM_S_19 VDDCR_CPU_19 AA23 C15 VSS_19 VSS_81 L11 AC19 VSS_143 VSS_205 AU2
AJ35 AA27 C17 L15 AC25 AU3
VDDIO_MEM_S_20 VDDCR_CPU_20 VSS_20 VSS_82 VSS_144 VSS_206
AL32 VDDIO_MEM_S_21 VDDCR_CPU_21 AC21 C19 VSS_21 VSS_83 L19 AC29 VSS_145 VSS_207 AU15
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
.1U_0402_16V7K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
1U_0402_6.3V6K
.1U_0402_16V7K
1U_0402_6.3V6K
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
4.7U_0603_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
AL37 AC23 C21 L31 AC31 AU19
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VDDIO_MEM_S_22 VDDCR_CPU_22 VSS_22 VSS_84 VSS_146 VSS_208
AR35 AC27 C23 L39 AC39 AU23
VDDIO_MEM_S_23 VDDCR_CPU_23 VSS_23 VSS_85 VSS_147 VSS_209
VDDCR_CPU_24 AE21 C25 VSS_24 VSS_86 L41 AC41 VSS_148 VSS_210 AU27
AE23 C27 M1 AE3 AU39
VDDCR_CPU_25 VSS_25 VSS_87 VSS_149 VSS_211
VDDCR_CPU_26 AE27 C29 VSS_26 VSS_88 M2 AE7 VSS_150 VSS_212 AV9
C31 N3 AE25 AW3
VSS_27 VSS_89 VSS_151 VSS_213
VDDCR_NB_1 L13 C33 N7 AE29 AW7
+APU_CORE_NB VSS_28 VSS_90 VSS_152 VSS_214
VDDCR_NB_2 L17 C35 VSS_29 VSS_91 N15 AE32 VSS_153 VSS_215 AW13
VDDCR_NB_3 N11 C37 N19 AE39 AW15
VSS_30 VSS_92 VSS_154 VSS_216
@ @ @ @ @ VDDCR_NB_4 N13 C39 VSS_31 VSS_93 N25 AG3 VSS_155 VSS_217 AW17
VDDCR_NB_5 N17 C41 N29 AG5 AW19
VSS_32 VSS_94 VSS_156 VSS_218
VDDCR_NB_6 R11 D9 N31 AG10 AW21
VSS_33 VSS_95 VSS_157 VSS_219
VDDCR_NB_7 R13 D11 VSS_34 VSS_96 N39 AG11 VSS_158 VSS_220 AW23
VDDCR_NB_8 R17 D13 P1 AG13 AW25
VSS_35 VSS_97 VSS_159 VSS_221
U13 E3 P2 AG15 AW27
+0.95VALW/+0.95VS OF APU +1.8VALW/+1.8VS OF APU VDDCR_NB_9
VDDCR_NB_10
U17
W13
E4
E9
VSS_36
VSS_37
VSS_98
VSS_99
R3
R7
AG19
AG25
VSS_160
VSS_161
VSS_222
VSS_223
AW31
AW33
VDDCR_NB_11 VSS_38 VSS_100 VSS_162 VSS_224
W17 E11 R15 AG29 AW35
+0.95VS VDD_095 +1.8VS VDD_18 VDDCR_NB_12
AA13 E13
VSS_39 VSS_101
R19 AG31
VSS_163 VSS_225
AW37
VDDCR_NB_13 VSS_40 VSS_102 VSS_164 VSS_226
VDDCR_NB_14 AA17 E27 VSS_41 VSS_103 R25 AG39 VSS_165 VSS_227 AW39
AC13 E31 R29 AG41 AW41
VDDCR_NB_15 VSS_42 VSS_104 VSS_166 VSS_228
AC17 E35 R39 AH1 AY13
VDDCR_NB_16 VSS_43 VSS_105 VSS_167 VSS_229
C935
C934
C198
C199
C205
C204
C206
C260
C213
C933
C236
C237
C238
C239
C240
C233
VDDCR_NB_17 AE15 E38 VSS_44 VSS_106 R41 AH2 VSS_168 VSS_230 AY15
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 AE17 E39 U1 AJ3 AY18
VDDCR_NB_18 VSS_45 VSS_107 VSS_169 VSS_231
VDDCR_NB_19 AE19 G3 VSS_46 VSS_108 U2 AJ7 VSS_170 VSS_232 AY30
C946 C947 AG17 G7 U3 AJ15 BA2
VDDCR_NB_20 VSS_47 VSS_109 VSS_171 VSS_233
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
C938
C216
C214
C221
C218
C220
C219
C217
C222
C244
C250
C246
C248
C245
1 1 1 1 1 1 1 1 1 1 AL21
VDD_095_5
1 1 1 1 1 1 +0.95VALW AE11 VDD_095_ALW_1 VDD_095_6 AL23
AE13 AL27 FT3_BGA_769P-T FT3_BGA_769P-T
VDD_095_ALW_2 VDD_095_7
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
AJ13 AM25
2 2 2 2 2 2 VDD_095_ALW_4 VDD_095_9
VDD_095_GFX_1 U10
VDD_095_GFX_2 W10
+RTC_APU_R +RTC_APU_R AN4 VDDBT_RTC_G VDD_095_GFX_3 AA10
@ @ @ FT3_BGA_769P-T
Part Number =
VDD_095_USB3_DUAL
VDD_095_ALW
VDD_18_ALW
VDDBT_RTC_G
+RTC_APU
1
1
2
for Clear CMOS
SP@
CLRP2
SHORT PADS
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/27 Deciphered Date 2016/03/27 Title
A4W1E FT3 PWR/GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 9 of 33
A B C D E
A B C D E
.1U_0402_16V7K
1000P_0402_50V7K
DDRAB_SDQ0 5 VSS2 DQ4 6 DDRAB_SDQ5
2 1 DQ0 DQ5
DDRAB_SDQ1 7 8
C176
C142
9 DQ1 VSS3 10 DDRAB_SDQS0#
VSS4 DQS#0 DDRAB_SDQS0# <5,11>
DDRAB_SDM0 11 12 DDRAB_SDQS0
1 2 13 DM0 DQS0 14 DDRAB_SDQS0 <5,11>
DDRAB_SDQ2 15 VSS5 VSS6 16 DDRAB_SDQ6
DDRAB_SDQ3 17 DQ2 DQ6 18 DDRAB_SDQ7
19 DQ3 DQ7 20
DDRAB_SDQ8 21 VSS7 VSS8 22 DDRAB_SDQ12
DDRAB_SDQ9 23 DQ8 DQ12 24 DDRAB_SDQ13
1
DDRAB_SDQS1#
25
27
DQ9
VSS9
DQ13
VSS10
26
28 DDRAB_SDM1
+1.5V/+0.75VS OF DIMM1 1
<5,11> DDRAB_SDQS1# 29 DQS#1 DM1 30
DDRAB_SDQS1 MEM_MAB_RST#
<5,11> DDRAB_SDQS1 DQS1 RESET# MEM_MAB_RST# <5,11>
31 32 +1.5V +0.75VS
DDRAB_SDQ10 33 VSS11 VSS12 34 DDRAB_SDQ14
DDRAB_SDQ11 35 DQ10 DQ14 36 DDRAB_SDQ15
37 DQ11 DQ15 38
VSS13 VSS14
C114
C115
C116
C117
C118
C119
C120
C121
C122
C123
C129
C128
C126
C127
DDRAB_SDQ16 39 40 DDRAB_SDQ20
DQ16 DQ20
@EMC@
@EMC@
DDRAB_SDQ17 41 42 DDRAB_SDQ21 1 1 1 1 1 1 1 1 1 1 1 1 1 1
43 DQ17 DQ21 44
DDRAB_SDQS2# 45 VSS15 VSS16 46 DDRAB_SDM2
<5,11> DDRAB_SDQS2# DQS#2 DM2
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
4.7U_0603_6.3V6K
DDRAB_SDQS2 47 48
<5,11> DDRAB_SDQS2 49 DQS2 VSS17 50 2 2 2 2 2 2 2 2 2 2 2 2 2 2
DDRAB_SDQ22
DDRAB_SDQ18 51 VSS18 DQ22 52 DDRAB_SDQ23
DDRAB_SDQ19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDRAB_SDQ28
DDRAB_SDQ24 57 VSS20 DQ28 58 DDRAB_SDQ29
DDRAB_SDQ25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDRAB_SDQS3#
63 VSS22 DQS#3 64 DDRAB_SDQS3# <5,11>
DDRAB_SDM3 DDRAB_SDQS3 @ @ @ @ @ @
DM3 DQS3 DDRAB_SDQS3 <5,11>
65 66
DDRAB_SDQ26 67 VSS23 VSS24 68 DDRAB_SDQ30
DDRAB_SDQ27 69 DQ26 DQ30 70 DDRAB_SDQ31
71 DQ27 DQ31 72
VSS25 VSS26
DDRA_CKE0 73 74 DDRA_CKE1
<5> DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 <5>
75 76
77 VDD1 VDD2 78 DDRAB_SMA15
DDRAB_SBS2# 79 NC1 A15 80 DDRAB_SMA14
<5,11> DDRAB_SBS2# BA2 A14
81 82
DDRAB_SMA12 83 VDD3 VDD4 84 DDRAB_SMA11
DDRAB_SMA9 85 A12/BC# A11 86 DDRAB_SMA7
87 A9 A7 88
DDRAB_SMA8 89 VDD5 VDD6 90 DDRAB_SMA6
DDRAB_SMA5 91 A8 A6 92 DDRAB_SMA4
93 A5 A4 94
DDRAB_SMA3 95 VDD7 VDD8 96 DDRAB_SMA2
2
DDRAB_SMA1 97
99
A3
A1
A2
A0
98
100
DDRAB_SMA0 VREF for DIMM1,2 2
.1U_0402_16V7K
1000P_0402_50V7K
C167
DDRAB_SDQS4# 135 VSS29 VSS30 136 DDRAB_SDM4 MEM_MAB_RST# 1 2
<5,11> DDRAB_SDQS4# 137 DQS#4 DM4 138
DDRAB_SDQS4 C1274 @EMC@
<5,11> DDRAB_SDQS4 DQS4 VSS31 2 1
139 140 DDRAB_SDQ38 100P_0402_50V8J
DDRAB_SDQ34 141 VSS32 DQ38 142 DDRAB_SDQ39
DDRAB_SDQ35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDRAB_SDQ44
DDRAB_SDQ40 147 VSS34 DQ44 148 DDRAB_SDQ45
DDRAB_SDQ41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDRAB_SDQS5#
153 VSS36 DQS#5 154 DDRAB_SDQS5# <5,11>
DDRAB_SDM5 DDRAB_SDQS5
DM5 DQS5 DDRAB_SDQS5 <5,11>
155 156
DDRAB_SDQ42 157 VSS37 VSS38 158 DDRAB_SDQ46
DDRAB_SDQ43 159 DQ42 DQ46 160 DDRAB_SDQ47
161 DQ43 DQ47 162
DDRAB_SDQ48 163 VSS39 VSS40 164 DDRAB_SDQ52
DDRAB_SDQ49 165 DQ48 DQ52 166 DDRAB_SDQ53
167 DQ49 DQ53 168
DDRAB_SDQS6# 169 VSS41 VSS42 170 DDRAB_SDM6
3 <5,11> DDRAB_SDQS6# DQS#6 DM6 3
DDRAB_SDQS6 171 172
<5,11> DDRAB_SDQS6 173 DQS6 VSS43 174 DDRAB_SDQ54
DDRAB_SDQ50 175 VSS44 DQ54 176 DDRAB_SDQ55
DDRAB_SDQ51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDRAB_SDQ60
DDRAB_SDQ56 181 VSS46 DQ60 182 DDRAB_SDQ61
DDRAB_SDQ57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDRAB_SDQS7#
187 VSS48 DQS#7 188 DDRAB_SDQS7# <5,11>
DDRAB_SDM7 DDRAB_SDQS7
DM7 DQS7 DDRAB_SDQS7 <5,11>
189 190
DDRAB_SDQ58 191 VSS49 VSS50 192 DDRAB_SDQ62
DDRAB_SDQ59 193 DQ58 DQ62 194 DDRAB_SDQ63
195 DQ59 DQ63 196
197 VSS51 VSS52 198 MEM_MAB_EVENT#
<Address: 00> 199 SA0 EVENT# 200
MEM_MAB_EVENT# <5,11>
+3VS VDDSPD SDA APU_SDATA0 <7,11,17>
1 2 2 201 202
203 SA1 SCL 204 APU_SCLK0 <7,11,17>
VTT1 VTT2 +0.75VS
C136 C944 @EMC@ C945 @EMC@
.1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K 205 206
2 1 1 G1 G2
LCN_DAN06-K4406-0101
CONN@
SP07000PT00
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR3 SODIMM-I Socket
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 10 of 33
A B C D E
A B C D E
15mil JDIMM2
1 2
3 VREF_DQ VSS1 4 DDRAB_SDQ4 DDRAB_SDQ[0..63]
DDRAB_SDQ0 5 VSS2 DQ4 6 DDRAB_SDQ5 DDRAB_SDQ[0..63] <5,10>
.1U_0402_16V7K
1000P_0402_50V7K
DDRAB_SDQ1 7 DQ0 DQ5 8 DDRAB_SDM[0..7]
2 1 DQ1 VSS3 DDRAB_SDM[0..7] <5,10>
9 10 DDRAB_SDQS0#
C177
C143
VSS4 DQS#0 DDRAB_SDQS0# <5,10> DDRAB_SMA[0..15]
DDRAB_SDM0 11 12 DDRAB_SDQS0 DDRAB_SMA[0..15] <5,10>
13 DM0 DQS0 14 DDRAB_SDQS0 <5,10>
1 2 DDRAB_SDQ2 15 VSS5 VSS6 16 DDRAB_SDQ6
DDRAB_SDQ3 17 DQ2 DQ6 18 DDRAB_SDQ7
19 DQ3 DQ7 20
DDRAB_SDQ8 21 VSS7 VSS8 22 DDRAB_SDQ12
DDRAB_SDQ9 23 DQ8 DQ12 24 DDRAB_SDQ13
25 DQ9 DQ13 26
1
DDRAB_SDQS1# 27 VSS9 VSS10 28 DDRAB_SDM1 1
<5,10> DDRAB_SDQS1# 29 DQS#1 DM1 30
DDRAB_SDQS1 MEM_MAB_RST#
<5,10> DDRAB_SDQS1 DQS1 RESET# MEM_MAB_RST# <5,10>
31 32
DDRAB_SDQ10 33 VSS11
DQ10
VSS12
DQ14
34 DDRAB_SDQ14 +1.5V/+0.75VS OF DIMM2
DDRAB_SDQ11 35 36 DDRAB_SDQ15
37 DQ11 DQ15 38
DDRAB_SDQ16 39 VSS13 VSS14 40 DDRAB_SDQ20 +1.5V +0.75VS +1.5V
DDRAB_SDQ17 41 DQ16 DQ20 42 DDRAB_SDQ21 +1.5V
43 DQ17 DQ21 44
DDRAB_SDQS2# 45 VSS15 VSS16 46 DDRAB_SDM2
<5,10> DDRAB_SDQS2# DQS#2 DM2
C133
C155
C132
C162
C165
C168
C169
C170
C171
C172
C175
C158
C2700
C2701
C2703
C2702
DDRAB_SDQS2 47 48 @ 1
220U_6.3V_M
<5,10> DDRAB_SDQS2 49 DQS2 VSS17 50 DDRAB_SDQ22 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
DDRAB_SDQ18 51 VSS18 DQ22 52 DDRAB_SDQ23 +
C644
DDRAB_SDQ19 53 DQ18 DQ23 54
DQ19 VSS19
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
4.7U_0603_6.3V6K
.1U_0402_16V7K
4.7U_0603_6.3V6K
.1U_0402_16V7K
4.7U_0603_6.3V6K
55 56 DDRAB_SDQ28
DDRAB_SDQ24 57 VSS20 DQ28 58 DDRAB_SDQ29 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
DDRAB_SDQ25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDRAB_SDQS3#
63 VSS22 DQS#3 64 DDRAB_SDQS3# <5,10>
DDRAB_SDM3 DDRAB_SDQS3
DM3 DQS3 DDRAB_SDQS3 <5,10>
65 66
DDRAB_SDQ26 67 VSS23 VSS24 68 DDRAB_SDQ30
DDRAB_SDQ27 69 DQ26 DQ30 70 DDRAB_SDQ31
71 DQ27 DQ31 72 @ @ @ @
VSS25 VSS26
DDRB_CKE0 73 74 DDRB_CKE1
<5> DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 <5>
75 76 MEM_MAB_RST# 1 2
77 VDD1 VDD2 78 DDRAB_SMA15 C1275 @EMC@
DDRAB_SBS2# 79 NC1 A15 80 DDRAB_SMA14 100P_0402_50V8J
<5,10> DDRAB_SBS2# BA2 A14
81 82
DDRAB_SMA12 83 VDD3 VDD4 84 DDRAB_SMA11
DDRAB_SMA9 85 A12/BC# A11 86 DDRAB_SMA7
87 A9 A7 88
DDRAB_SMA8 89 VDD5 VDD6 90 DDRAB_SMA6
DDRAB_SMA5 91 A8 A6 92 DDRAB_SMA4
93 A5 A4 94
DDRAB_SMA3 95 VDD7 VDD8 96 DDRAB_SMA2
2 2
DDRAB_SMA1 97 A3 A2 98 DDRAB_SMA0
99 A1 A0 100
DDRB_CLK0 101 VDD9 VDD10 102 DDRB_CLK1
<5> DDRB_CLK0 103 CK0 CK1 104 DDRB_CLK1 <5>
DDRB_CLK0# DDRB_CLK1#
<5> DDRB_CLK0# CK0# CK1# DDRB_CLK1# <5>
105 106
DDRAB_SMA10 107 VDD11 VDD12 108 DDRAB_SBS1#
A10/AP BA1 DDRAB_SBS1# <5,10>
DDRAB_SBS0# 109 110 DDRAB_SRAS#
<5,10> DDRAB_SBS0# BA0 RAS# DDRAB_SRAS# <5,10>
111 112
DDRAB_SWE# 113 VDD13 VDD14 114 DDRB_SCS0#
<5,10> DDRAB_SWE# WE# S0# DDRB_SCS0# <5>
DDRAB_SCAS# 115 116 DDRB_ODT0
<5,10> DDRAB_SCAS# 117 CAS# ODT0 118 DDRB_ODT0 <5>
DDRAB_SMA13 119 VDD15 VDD16 120 DDRB_ODT1
A13 ODT1 DDRB_ODT1 <5>
DDRB_SCS1# 121 122 15mil
<5> DDRB_SCS1# 123 S1# NC2 124
125 VDD17 VDD18 126
NCTEST VREF_CA +VREF_CA
127 128
.1U_0402_16V7K
1000P_0402_50V7K
DDRAB_SDQ32 129 VSS27 VSS28 130 DDRAB_SDQ36
DQ32 DQ36 1 2
DDRAB_SDQ33 131 132 DDRAB_SDQ37
C139
C174
133 DQ33 DQ37 134
DDRAB_SDQS4# 135 VSS29 VSS30 136 DDRAB_SDM4
<5,10> DDRAB_SDQS4# 137 DQS#4 DM4 138 2 1
DDRAB_SDQS4
<5,10> DDRAB_SDQS4 DQS4 VSS31
139 140 DDRAB_SDQ38
DDRAB_SDQ34 141 VSS32 DQ38 142 DDRAB_SDQ39
DDRAB_SDQ35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDRAB_SDQ44
DDRAB_SDQ40 147 VSS34 DQ44 148 DDRAB_SDQ45
DDRAB_SDQ41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDRAB_SDQS5#
153 VSS36 DQS#5 154 DDRAB_SDQS5# <5,10>
DDRAB_SDM5 DDRAB_SDQS5
DM5 DQS5 DDRAB_SDQS5 <5,10>
155 156
DDRAB_SDQ42 157 VSS37 VSS38 158 DDRAB_SDQ46
DDRAB_SDQ43 159 DQ42 DQ46 160 DDRAB_SDQ47
161 DQ43 DQ47 162
DDRAB_SDQ48 163 VSS39 VSS40 164 DDRAB_SDQ52
DDRAB_SDQ49 165 DQ48 DQ52 166 DDRAB_SDQ53
167 DQ49 DQ53 168
DDRAB_SDQS6# 169 VSS41 VSS42 170 DDRAB_SDM6
3 <5,10> DDRAB_SDQS6# DQS#6 DM6 3
DDRAB_SDQS6 171 172
<5,10> DDRAB_SDQS6 173 DQS6 VSS43 174 DDRAB_SDQ54
DDRAB_SDQ50 175 VSS44 DQ54 176 DDRAB_SDQ55
DDRAB_SDQ51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDRAB_SDQ60
DDRAB_SDQ56 181 VSS46 DQ60 182 DDRAB_SDQ61
DDRAB_SDQ57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDRAB_SDQS7#
187 VSS48 DQS#7 188 DDRAB_SDQS7# <5,10>
DDRAB_SDM7 DDRAB_SDQS7
DM7 DQS7 DDRAB_SDQS7 <5,10>
189 190
DDRAB_SDQ58 191 VSS49 VSS50 192 DDRAB_SDQ62
DDRAB_SDQ59 193 DQ58 DQ62 194 DDRAB_SDQ63
195 DQ59 DQ63 196
1 2 DDRB_SA0 197 VSS51 VSS52 198 MEM_MAB_EVENT#
SA0 EVENT# MEM_MAB_EVENT# <5,10>
R690 10K_0402_5% 199 200
+3VS VDDSPD SDA APU_SDATA0 <7,10,17>
1 201 202
203 SA1 SCL 204 APU_SCLK0 <7,10,17>
C140 <Address: 01> VTT1 VTT2 +0.75VS
.1U_0402_16V7K 205 206
2 G1 G2
LCN_DAN06-K4406-0100
CONN@
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR3 SODIMM-II Socket
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 11 of 33
A B C D E
5 4 3 2 1
+3VS
LCD POWER CIRCUIT +LCDVDD
Place closed to JEDP1 LED PANEL Conn.
U8 +3VS +LCDVDD
1U_0402_6.3V6K W=60mils 3/13 Change Pin define to follow Z5W1M
C2656
5 1
IN OUT
1
2 1 1
GND JEDP1
4 3 C368
1 1 W=60mils 1
2 EN OC +INVPWR_B+ 1
D .1U_0402_16V7K C375 C419 2 41 D
SY6288C20AAC_SOT23-5 C367 2 2 .1U_0402_16V7K .1U_0402_16V7K 3 2 G1 42
@ 2 2 3 G2
4.7U_0603_10V6K @ 4 43
5 4 G3 44
<6> ENVDD 5 G4
INVTPWM 6 45
<6> INVTPWM 6 G5
BKOFF# 7 46
<14> BKOFF# 7 G6
EDP_HPD 8
<6> EDP_HPD 8
+3VS 1 @ 2 TS_EN +LCDVDD 9
+19VB +INVPWR_B+ R1540 10 9
L11 4.7K_0402_5% TS_EN 11 10
<14> TS_EN 11
W=60mils HCB2012KF-221T30_0805 W=60mils 12
1 2 13 12
EMC@ @EMC@ 14 13
14
C364
1000P_0402_50V7K
SM01000EJ00 3000ma @EMC@ 1 1 15
C365 16 15
220ohm@100mhz 16
68P_0402_50V8J 17
DCR 0.04 18 17
2 2 19 18
20 19
21 20
22 21
Change to R-Short when MP 22
23
C 24 23 C
C371 1 2 .1U_0402_16V7K EDP_TXP0_C +5VS +3VS +TS_PWR EDP_AUXN_C 25 24
<6> EDP_TXP0 25
C372 1 2 .1U_0402_16V7K EDP_TXN0_C EDP_AUXP_C 26
<6> EDP_TXN0 26
C373 1 2 .1U_0402_16V7K EDP_TXP1_C R3859 1 @ 2 0_0603_5% 27
<6> EDP_TXP1 27
C374 1 2 .1U_0402_16V7K EDP_TXN1_C EDP_TXP0_C 28
<6> EDP_TXN1 28
R3858 1 RS@ 2 EDP_TXN0_C 29
30 29
0_0603_5% EDP_TXP1_C 31 30
EDP_TXN1_C 32 31
33 32
34 33
+TS_PWR 34
<6> EDP_AUXP C370 1 2 .1U_0402_16V7K EDP_AUXP_C Touch Screen USB20_P5 35
<8> USB20_P5 35
<6> EDP_AUXN C369 1 2 .1U_0402_16V7K EDP_AUXN_C USB20_N5 36
+3VS +3VS_CMOS <8> USB20_N5 36
+3VS_CMOS 37
USB20_P3_CAMERA 38 37
R3925 1 RS@ 2 USB20_N3_CAMERA 39 38
For Camera 39
R427 1 RS@ 2 0_0402_5% 40
0_0603_5% 40
E-T_0871K-F40N-00L
USB20_N3 3 4 USB20_N3_CAMERA
<8> USB20_N3 3 4 SP010011Z00
B USB20_P3 2 1 B
<8> USB20_P3 2 1
USB20_P3_CAMERA
SP010011Z00
L27 @EMC@
A4W1E DVT DLW21HN900HQ2L_4P ENVDD R3924 1 2 100K_0402_5%
SM070003Y00
EDP_HPD R364 1 2 100K_0402_5%
R428 1 RS@ 2 0_0402_5%
INVTPWM R393 1 @ 2 100K_0402_5%
@EMC@
C549 1 2 220P_0402_50V7K
@EMC@
BKOFF# C528 1 2 220P_0402_50V7K
R280 1 @ 2 10K_0402_5%
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP/Camera/Touch Screen
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 12 of 33
5 4 3 2 1
5 4 3 2 1
RP15
C56 1 2 .1U_0402_16V7K HDMI_TX0- 1 8 HDMI_GND
<6> APU_DP1_N2 1 2 2 7 +5VS_DISP
C55 .1U_0402_16V7K HDMI_TX0+
<6> APU_DP1_P2
C52 1 2 .1U_0402_16V7K HDMI_TX2- 3 6 U73
<6> APU_DP1_N0 1 2 4 5
C51 .1U_0402_16V7K HDMI_TX2+ W=40mils
<6> APU_DP1_P0
6
D +5VS 3 D
499_0804_8P4R_1% 2
D
Q86B VOUT
1
G
+3VS
S DMN66D0LDW-7_SOT363-6 1 @
RP16 VIN C543
1
C53 1 2 .1U_0402_16V7K HDMI_TX1+ 1 8 2 .1U_0402_16V7K
<6> APU_DP1_P1 GND 2
C54 1 2 .1U_0402_16V7K HDMI_TX1- 2 7
<6> APU_DP1_N1 1 2 3 6
C57 .1U_0402_16V7K HDMI_CLK+
<6> APU_DP1_P3 1 2 4 5
C58 .1U_0402_16V7K HDMI_CLK- APL3517AI-TRG_SOT23-3
<6> APU_DP1_N3
SA00004ZB00
499_0804_8P4R_1% A4W1E
+3VS
1
R618 Q86A 1 2
5
1M_0402_5% DMN66D0LDW-7_SOT363-6
C942 EMC@
G
2
1 @ 2 4 3 HDMI_HPD_CONN .1U_0402_16V7K
<6> HDMI_HPD
D
R153
1
0_0402_5% 1 JHDMI1
EMC@ HDMI_HPD_CONN 19
R898 C59 18 HP_DET
C A4W1E DVT +5VS_DISP +5V C
100K_0402_5% 220P_0402_50V7K 17
2 HDMIDAT_R 16 DDC/CEC_GND
2
HDMICLK_R 15 SDA
14 SCL
Utility
2
+3VS 13
HDMI_R_CLK- 12 CEC
@EMC@ 11 CK-
D42 HDMI_R_CLK+ 10 CK_shield
CK+
1
C YSLC05CH_SOT23-3 HDMI_R_TX0- 9
2 1 2HDMI_HPD_CONN SCA00000U10 8 D0-
B R281 150K_0402_5% HDMI_R_TX0+ 7 D0_shield
E Q18 HDMI_R_TX1- 6 D0+
3
D1-
1
HDMI_HPD MMBT3904_NL_SOT23-3 5
1
R283 HDMI_R_TX1+ 4 D1_shield 20
D1+ GND
1
@ 365K_0402_1% HDMI_R_TX2- 3 21
2 D2- GND 22
R915 HDMI_R_TX2+ 1 D2_shield GND 23
2
100K_0402_5% D2+ GND
ACON_HMR2J-AK120C
2
CONN@
ACON_HMR2J-AK120C_19P-T
DC021201210
B
+3VS B
RP1
HDMI_R_CLK- 1 2 HDMI_CLK 1 8 +5VS_DISP
HDMI_CLK- R756 1 @EMC@2 0_0402_5% HDMI_R_CLK- @EMC@ C2694 10P_0402_50V8J HDMI_DATA 2 7
HDMI_R_CLK+ 1 2 HDMIDAT_R 3 6
@EMC@ C2695 10P_0402_50V8J HDMICLK_R 4 5
HDMI_CLK+ R765 1 @EMC@2 0_0402_5% HDMI_R_CLK+ HDMI_R_TX0- 1 2
@EMC@ C2692 10P_0402_50V8J 4.7K_0804_8P4R_5%
HDMI_R_TX0+ 1 2
HDMI_TX0- R769 1 @EMC@2 0_0402_5% HDMI_R_TX0- @EMC@ C2693 10P_0402_50V8J
HDMI_R_TX1- 1 2 +3VS
@EMC@ C2568 10P_0402_50V8J
HDMI_TX0+ R779 1 @EMC@2 0_0402_5% HDMI_R_TX0+ HDMI_R_TX1+ 1 2
@EMC@ C2569 10P_0402_50V8J
2
HDMI_R_TX2- 1 2
HDMI_TX1- R781 1 @EMC@2 0_0402_5% HDMI_R_TX1- @EMC@ C2570 10P_0402_50V8J
G
HDMI_R_TX2+ 1 2 <6> HDMI_CLK 1 6 HDMICLK_R
D
@EMC@ C2571 10P_0402_50V8J
HDMI_TX1+ R782 1 @EMC@2 0_0402_5% HDMI_R_TX1+ Q75A Q75B
5
EMI request 1pF. DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
G
HDMI_TX2- R783 1 @EMC@2 0_0402_5% HDMI_R_TX2- <6> HDMI_DATA 4 3 HDMIDAT_R
D
A HDMI_TX2+ R794 1 @EMC@2 0_0402_5% HDMI_R_TX2+ A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 13 of 33
5 4 3 2 1
5 4 3 2 1
+EC_VCC +EC_VCC
R3949
1
+3VLP +EC_VCC L44 +EC_VCCA
FBM-11-160808-601-T_0603
1 2 1 2 R1562 R3949
Ra 100K_0402_1% 100K_0402_1%
.1U_0402_16V7K
C1255
.1U_0402_16V7K
C1256
.1U_0402_16V7K
C1257
.1U_0402_16V7K
C1258
1000P_0402_50V7K
C1261
1000P_0402_50V7K
C1259
R1665 1 KBN@ 100K_0402_1%
2
0_0603_5% 1 1 1 1 1 1 CZL@
C1262 AD_BID A4W1E DVT PLT_ID
.1U_0402_16V7K R3950
1
@ @ 2
2 2 2 2 2 2 1
R1564
ECAGND Rb 240K_0402_1% C1269 @ R3950
111
125
SD000001B80 .1U_0402_16V7K 100K_0402_1%
22
33
96
67
9
U44 2 BMA@
B5W1E PVT
2
ID = 13 100K_0402_1%
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC
EC_VDD/AVCC
D D
CZL@
GATEA20 1 21 LAN_PWR_EN
<7> GATEA20 GATEA20/GPIO00 GPIO0F LAN_PWR_EN <15> +RTC_APU_R
KBRST# 2 23 EC_BEEP#
<7> KBRST# KBRST#/GPIO01 BEEP#/GPIO10 EC_BEEP# <16>
SERIRQ 3 26
<8> SERIRQ LPC_FRAME# 4 SERIRQ GPIO12 27 EC_RTCRST
<7,8> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
1
LPC_AD3 5
<8> LPC_AD3 7 LPC_AD3
LPC_AD2 PWM Output D Q91
<8> LPC_AD2 LPC_AD2
LPC_AD1 8 63 BATT_TEMP EC_RTCRST 2 2N7002K_SOT23-3
<8> LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <25>
1 2 1 2 LPC_CLK0_EC LPC_AD0 10 64
LPC_AD0LPC & MISC
G
<8> LPC_AD0 AD1/GPIO39 65 VCIN1_BATT_DROP <25>
C1263 @EMC@ R1560 @EMC@ ADP_I S
ADP_I/AD2/GPIO3A ADP_I <25,26>
2
22P_0402_50V8J 10_0402_5% LPC_CLK0_EC 12 AD Input 66 AD_BID
<7,8> LPC_CLK0_EC
3
LPC_RST# 13 CLK_PCI_EC AD3/GPIO3B 75 PLT_ID R209
1 9012@ 2 EC_RST# <7,20> LPC_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 100K_0402_5%
+EC_VCC <22> EC_RST# EC_RST# IMON/AD5/GPIO43
R818 47K_0402_5% EC_SCI# 20
1 2 <7> EC_SCI# 38 EC_SCII#/GPIO0E
1
C819 1000P_0402_50V7K <17> WLAN_ON GPIO1D
EMC@ 68
DAC_BRIG/GPIO3C 70 EN_DFAN KBL_EN <22> +3VS
<20> KSI[0..7] DA Output EN_DFAN1/GPIO3D EN_DFAN <22>
1 @ 2 LPC_RST# KSI0 55 71
56 KSI0/GPIO30 IREF/GPIO3E 72 TP_SENOFF# <20>
R207 100K_0402_5% KSI1
1 2 @EMC@ KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F ODD_EN <18> EC_MUTE# R1565 1 @ 2 10K_0402_5%
C1279 100P_0402_50V8J KSI3 58 KSI2/GPIO32 83 EC_I2C_TPCLK R124 1 RS@ 2 0_0402_5%
KSI3/GPIO33 EC_MUTE#/GPIO4A I2C_CLK <20,21>
KSI4 59 84 EC_I2C_TPDAT R125 1 RS@ 2 0_0402_5% EC_I2C_ALERT# R116 1 @ 2 1K_0402_5%
KSI4/GPIO34 USB_EN#/GPIO4B I2C_DAT <20,21>
KSI5 60 85 EC_MUTE#
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 EC_MUTE# <16>
KSI6 PS2 Interface USB_EN
KSI6/GPIO36 EAPD/GPIO4D USB_EN <19>
KSI7 62 87 TP_CLK confirm with EC +EC_VCC
<20> KSO[0..17] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_CLK <20>
KSO0 TP_DATA
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <20>
KSO1 40 EC_SMB_DA1 R1577 1 2 2.2K_0402_5%
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 ENBKL EC_SMB_CK1 R1574 1 2 2.2K_0402_5%
KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 ENBKL <6>
KSO4 43 98
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 0.95VS_PWR_EN# LID_SW# R344 1 2 47K_0402_5%
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 9022_PH1
0.95VS_PWR_EN# <23>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 9022_PH1 <25>
KSO7/GPIO27 SPI Device Interface
KSO8 47
KSO9 48 KSO8/GPIO28 119 +3VALW
C C
49 KSO9/GPIO29 SPIDI/GPIO5B 120 EC_SPI_MISO <8>
KSO10
KSO10/GPIO2A SPIDO/GPIO5C EC_SPI_MOSI <8>
KSO11 50 SPI Flash ROM 126 EC_SCI# R3928 1 @ 2 2.2K_0402_5%
KSO11/GPIO2B SPICLK/GPIO58 EC_SPI_CLK <8>
KSO12 51 128
52 KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS1# <8>
KSO13 EC_SMI# R3929 1 @ 2 2.2K_0402_5%
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
KSO16 81 KSO15/GPIO2F ENBKL/AD6/GPIO40 74 VGATE
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 VGATE <30>
KSO17 82 89 BATT_4S
KSO17/GPIO49 FSTCHG/GPIO50 90 BATT_4S <26>
BATT_BLUE_LED#
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
91 TP_3V_EN
BATT_BLUE_LED#
TP_3V_EN <20>
<20> For share ROM reserved
EC_SMB_CK1 77 GPIO 92 PWR_LED
<25,26> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_LED <20>
EC_SMB_DA1 78 93 BATT_AMB_LED# 0.95_1.8VALW_PWREN 1 @ 2
<25,26> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# <20>
EC_SMB_CK2 79 SM Bus 95 SYSON R1575 4.7K_0402_5%
<6> EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 SYSON <28>
EC_SMB_DA2 VR_ON
<6> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON <30>
127 0.95_1.8VALW_PWREN EC_RSMRST# 1 @ 2
PM_SLP_S4#/GPIO59 0.95_1.8VALW_PWREN <29>
R1576 4.7K_0402_5%
PBTN_OUT# 122
<7> PBTN_OUT# SLP_S5# 123 XCLKI/GPIO5D 124 V18R R16 1 9022@ 2 0_0603_5% 1 RS@ 2
GND/GND
GND/GND
GND/GND
GND/GND
R1690
1
C823 9012@ 0_0402_5%
4.7U_0603_6.3V6K D Q89 9012@
KB9012QF-A4_LQFP128_14X14 2 EC_THERM 2 2N7002K_SOT23-3
11
24
35
94
113
69
3
ECAGND
20mil
MAINPWON 1 2 3V_EN
3V_EN <27>
D2012 @
RB751V-40_SOD323-2
SPOK 1 2 EC_RSMRST#
D2013 @
RB751V-40_SOD323-2
close to EC
1 2 SYS_PWRGD_EC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9022
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 14 of 33
5 4 3 2 1
A B C D E
+3VALW +3V_LAN
JP24 JP@
( Should be place within 200 mils ) Close to Pin 3,8,22,30
1 JUMP_43X79
Close to U20 Pin23 Close to Pin 24 1uF reserved for Pin 22 Close to Pin 11,32 1
60mil U2610
60mil Change L2004 to SH00000RT00 W=60mils
5 1 +3V_LAN SWR mode
IN OUT +LAN_VDD +3V_LAN
W=60mils W=60mils
2 L2004
GND +REGOUT 1 2
4 3 2.2UH +-5% NLC252018T-2R2J-N
EN OC
C2709
1U_0402_6.3V6K
C2710
0.1U_0402_16V7K
C2711
0.1U_0402_16V7K
C2712
0.1U_0402_16V7K
C2713
0.1U_0402_16V7K
C2714
4.7U_0603_6.3V6K
C2715
4.7U_0603_6.3V6K
C2716
0.1U_0402_16V7K
C2717
0.1U_0402_16V7K
2 2
1
SY6288C20AAC_SOT23-5 IDC=1200mA 1 1 1 1 1 1
1
C2704 C2705 C2706
1U_0402_6.3V6K LAN_PWR_EN 4.7U_0603_6.3V6K 0.1U_0402_16V7K
LAN_PWR_EN <14>
2
1 1 C2707 C2708 @ @ @
2
4.7U_0603_6.3V6K 2 2 2 2 2 2
0.1U_0402_16V7K
close to pin 22
+3VS +3V_LAN
U2611
1
R3935 R3936
2 10K_0402_5% 10K_0402_5% 2
@ @
close to Pin 17, 18
LAN_MIDI0+ 1 17 PCIE_ARX_C_DTX_P1 C2718 1 2 0.1U_0402_16V7K
PCIE_ARX_DTX_P1 <5>
2
1
33
GND R3955
@ 10K_0402_5%
Consider VCC33 may be connected to Main
Power or chipset/bios's GPO, the pull-low
2
GPO 1 @ 2 resistor R14 can be NC only when Main Power
R3956 LAN_GPO <14>
or chipset/bios's GPO can ensure to drive the
RTL8111GS-CG_QFN32_4X4 0_0402_5%
Modify R02 ISOLATEB pin to a voltage level < 0.8V at the
SA00006ML00 system state S3~S5.
Use 8111GS symbol , pop 8111GUS part
LAN Connector +3VS
3 JRJ45 3
RJ45_MIDI0+ 1
PR1+
2
RJ45_MIDI0- 2
PR1- R3957
T2507 RJ45_MIDI1+ 3 1K_0402_5%
LAN_MIDI3- 1 24 RJ45_MIDI3- PR2+
TD1+ TX1+ RJ45_MIDI2+ 4
1
LAN_MIDI3+ 2 23 RJ45_MIDI3+ PR3+
TD1- TX1- RJ45_MIDI2- 5 ISOLATEB
LAN_TERMAL3 22 PR3-
TDCT1 TXCT1
1
RJ45_MIDI1- 6
4 21 PR2- R3958
TDCT2 TXCT2 RJ45_MIDI3+ 7 9 15K_0402_5%
LAN_MIDI2- 5 20 RJ45_MIDI2- PR4+ GND 10
TD2+ TX2+ RJ45_MIDI3- 8 GND
2
LAN_MIDI2+ 6 19 RJ45_MIDI2+ PR4-
TD2- TX2- SANTA_130456-291
LAN_MIDI1- 7 18 RJ45_MIDI1- CONN@
TD3+ TX3+
LAN_MIDI1+ 8 17 RJ45_MIDI1+ DC234008800 40mil
TD3- TX3- RJ45_GND 1 2 LANGND
9 16 C2722
TDCT3 TXCT3 10P_0402_50V8J
10 15
40mil
TDCT4 TXCT4 LANGND
1
LAN_MIDI0- 11 14 RJ45_MIDI0- @
TD4+ TX4+ JUMP_43X118
LAN_MIDI0+ 12 13 RJ45_MIDI0+ JP26 JP27
TD4- TX4- @EMC@
D2015 B88069X9231T203_4P5X3P2-2
Place close to TCT pin 1 TAIMA_IH-115-F MESC5V02BD03_SOT23-3
2
4 EMC@ 4
C2723
4
3
2
1
0.1U_0402_16V7K
1
2 RP10
75_0804_8P4R_1%
5
6
7
8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN_RTL8111GUS-CG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 15 of 33
A B C D E
A B C D E
1
10U_0603_6.3V6M
C2112
.1U_0402_16V7K
C2113
.1U_0402_16V7K
C2114
.1U_0402_16V7K
C2111
JUMP_43X118 4.75V SPKR- EMC@1 R2121 2 PBY160808T-121Y-N_2P SPK_R- 2
@ SPKL+ EMC@1 R2122 2 PBY160808T-121Y-N_2P SPK_L+ 3 2 5
SPKL- EMC@1 R2123 2 PBY160808T-121Y-N_2P SPK_L- 4 3 G1 6
(output = 300 mA)
2
2 2 @ +AVDD1_HDA 2 4 G2
3
@EMC@ 1000P_0402_50V7K 2 1 @EMC@ C2696 ACES_88266-04001
GND 1000P_0402_50V7K 2 1 @EMC@ C2697 CONN@ GND
GND GND 1000P_0402_50V7K 2 1 @EMC@ C2698 SP02000K200
Place near Pin46 1000P_0402_50V7K 2 1 @EMC@ C2699 D2004
1 GND 1
Place near Pin41 Reserved for ESD MESC5V02BD03_SOT23-3
D2003 @EMC@
20mil MESC5V02BD03_SOT23-3
@EMC@
C2133 1 2 10U_0603_6.3V6M R2119 1 RS@ 2
GND +VDDA
1
10U_0603_6.3V6M
C2117
1 1
1
.1U_0402_16V7K
C2115
.1U_0402_16V7K
C2116
Pin9 need to matching with SOC HDA C2120 1 2 .1U_0402_16V7K 0_0603_5%
interface. GND GND
+1.5VS R471 1 RS@ 2 +1.5VS_DVDDIO Place near Pin9
2
0_0402_5% 2 @ 2 @ +MICBIAS2
+3VS_DVDD Analog MIC(SMD)
2
20mil GNDA
+3VS R470 1 RS@ 2 0_0402_5% Place near Pin26 R544
2.2K_0402_5%
1 1 15mil 15mil
.1U_0402_16V7K
C2119
C2118 +1.5VS_VDDA R472 1 RS@ 2
+1.5VS AMIC1
1
1 0_0402_5% INT_MIC_R R3879 1 RS@ 2 INT_MIC_R_1 1
+
1
.1U_0402_16V7K
C2121
C2122
10U_0603_6.3V6M
10U_0603_6.3V6M
2 2 0_0603_5% 2
1 -
C550
2
2 @ @EMC@ GETTOP SOM4013SL-G423-RC-HS
GND GNDA 220P_0402_50V7K CONN@
U2609 2
Place near Pin1 CY000002V00
41
46
26
40
1
9
U2609 Place near Pin40 Omnidirectional
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
DVDD-IO
GNDA Follow EA52_BM(LA-B511P) footprint
ALC283-CG_MQFN48_6X6
283@ LINE1-L 22
SA000060500 LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
INT_MIC_R 2 1 INT_MIC C2691 1 2 LINE2_C_L LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
U2609 R176 1K_0402_5% 4.7U_0603_6.3V6K 24 SPK-OUT-L+
1
C2690 2 C223 1 2 LINE2_C_R 23 LINE2-L(PORT-E-L) 45 SPKR+
GNDA LINE2-R(PORT-E-R) SPK-OUT-R+
@EMC@ 1000P_0402_50V7K 4.7U_0603_6.3V6K 44 SPKR-
2 SPK-OUT-R- 2
40mil RING2 17
SLEEVE 18 MIC2-L(PORT-F-L) /RING2
Combo MIC MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT
ALC255-CG_MQFN48_6X6 +MICBIAS 31 HPOUT-L(PORT-I-L) 33 HP_RIGHT
+MICBIAS LINE1-VREFO-L HPOUT-R(PORT-I-R)
255@ +MICBIAS2 30
+MICBIAS2 LINE1-VREFO-R
SA000082700 10 HDA_SYNC_AUDIO
SYNC HDA_SYNC_AUDIO <7>
2 6 HDA_BITCLK_AUDIO
3 GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO <7>
R2129
GPIO1/DMIC-CLK 1 @EMC@2 1 2 C2123 @EMC@ GND
R2126 0_0402_5% 22P_0402_50V8J
PVT modify 12/31
EMI add C2143
EC_MUTE# 47
PDB
ALC233-VB2-CG SDATA-OUT
5 HDA_SDOUT_AUDIO
HDA_SDOUT_AUDIO <7>
EMC@ HDA_RST#_AUDIO 11 8 HDA_SDIN0_AUDIO 1 R2127 2
RESETB SDATA-IN HDA_SDIN0 <7>
C2143 1 2 100P_0402_50V8J 33_0402_5%
200K_0402_1% 48
233@ MONO_IN 12 SPDIF-OUT/GPIO2
SD034200380
10mil PCBEEP 16
Close codec MONO-OUT
HP_PLUG# R2129 2 283@ 1 39.2K_0402_1% SENSE_A 13
2 233@ 1 14 SENSE A +MIC2_VREFO
+3VS R2684 100K_0402_1%
SENSE B 29 10U_0603_6.3V6M 2 1 C2124
1 MIC2-VREFO GND
37
C2125 35 CBP 7 10U_0603_6.3V6M 2 1 C2126
CBN LDO3-CAP GNDA
2.2U_0402_6.3V6M 39
2 LDO2-CAP 27 10U_0603_6.3V6M 2 1 C2127 R526 Realtek add request
LDO1-CAP GNDA
36
+3VS_DVDD CPVDD 1 R2137 2
Pin20 28 CODEC_VREF 100K_0402_5%
10mil Headphone Out +MIC2_VREFO
ALC283 : NC R2131 1 233@ 2 0_0402_5% 20 VREF HPOUT_L_2
ALC255/256 : Power for combo jack depop +3VALW CPVREF 1 1 1
.1U_0402_16V7K
C2129
2.2U_0402_6.3V6M
C2130
15 20K_0402_1% 1 283@ 2 R2132 GNDA @ HPOUT_R_2
circuit at system shutdown mode JDREF
10U_0603_6.3V6M
C2131
10U_0603_6.3V6M 2 1 C2128 19 34 CPVEE
GNDA MIC-CAP CPVEE
2
Close codec
1
2 2 2
D9 @EMC@
MESC5V02BD03_SOT23-3
Pin4 1 @
ALC283 : DVSS R2683 2 283@ 1 0_0402_5% 4 R540 R539
ALC255/256 : DC DET (For Japen customer only) 49 DVSS 25 C2132 2.2K_0402_5%
Thermal PAD AVSS1 2.2K_0402_5%
38 2.2U_0402_6.3V6M
AVSS2 2
2
3 3
ALC233-VB2-CG_MQFN48_6X6 Place next pin27 RING2_L L76 1 2 EMC@ RING2
SA00007BF10 GND SLEEVE_L L77 1 2 EMC@ SLEEVE
3
GND 233@
MESC5V02BD03_SOT23-3
D10 EMC@
GNDA Pin15 GNDA
ALC283 : Ref. Resistor for Jack Detect
ALC255/256 : Jack Detect for SPDIF-OUT and SPK-OUT port
2 2
A4W1E DVT C2142 C2140
EMC@ EMC@ +MIC2_VREFO
680P_0402_50V7K 680P_0402_50V7K
1 1
1
R2138 C2144 C607 @EMC@
1
27K_0402_5% 1U_0402_6.3V6K 0.1U_0402_16V4Z
2 @ 1 BEEP#_R 1 2 MONO_IN GND GND
<14> EC_BEEP# 2
2
R2140
27K_0402_5% @EMC@
1
Headphone Out
100P_0402_50V8J
C2134
4.7K_0402_5%
R2141
2 1
<7> APU_SPKR +3VS +3VS +3VLP R238 JHP1
2 0_0603_5% 60.4_0603_1% RING2_L 3
1
@ RING2 HP_PLUG# 5
2
3
1
5 SLEEVE_L 4
D
G DMN63D8LDW_SOT363-6
S Q2003A 7
283@ LINE1-L 1 2 2 2
4
Wireless LAN
1 +3VS 60mil +3VS_WLAN 1
R212
1 2 0_0805_5%
NBYOC@ 1 1 1
C458 @
Default setting C459 C460
4.7U_0603_10V6K .1U_0402_16V7K
2 2 2
.1U_0402_16V7K
+3VS_WLAN
+3VALW
U2606 W=60mils 2 1
+3VS_WLAN +3VS_WLAN
1U_0402_6.3V6K
C2664
5 1 R3807 10K_0402_5%
IN OUT
1
2 R1680 1 RS@ 2
GND <14> WLAN_WAKE#
@ 0_0402_5%
4 3 JMINI1
2 EN OC R622 1
SY6288C20AAC_SOT23-5 1 @ 2 8.2K_0402_5% 3 1 2
2 +3VS 3 2 2
BYOC@ 5 4
7 5 4 6
<7> WLAN_CLKREQ# 9 7 6 8
<14> WLAN_ON 11 9 8 10
<8> CLK_PCIE_WLAN# 11 10
13 12
<8> CLK_PCIE_WLAN 15 13 12 14
15 14 16
16
17
19 17 18
21 19 18 20
23 21 20 22 WL_OFF# <14>
<5> PCIE_ARX_DTX_N2 25 23 22 24 APU_PCIE_RST# <7,15>
<5> PCIE_ARX_DTX_P2 25 24
27 26
29 27 26 28
31 29 28 30 MINI1_SMBCLK R138 1 @ 2 0_0402_5%
<5> PCIE_ATX_C_DRX_N2 31 30 APU_SCLK0 <7,10,11>
33 32 MINI1_SMBDATA R142 1 @ 2 0_0402_5%
<5> PCIE_ATX_C_DRX_P2 33 32 APU_SDATA0 <7,10,11>
35 34
37 35 34 36
39 37 36 38 USB20_N2 <8>
+3VS_WLAN 39 38 USB20_P2 <8>
41 40
43 41 40 42
45 43 42 44
3 3
47 45 44 46
R139 1 2 0_0402_5% 49 47 46 48
<14> EC_TX 49 48
R140 1 2 0_0402_5% 51 50
<14> EC_RX 51 50 52
53 52
Use RX for enable BT function GND1
1
54
GND2
R141 BELLW_80053-1021
100K_0402_5% CONN@
DC040009P00
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M.2 Key E (WLAN)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 17 of 33
A B C D E
A B C D E F G H
10U_0603_6.3V6M
.1U_0402_16V7K
0_0402_5% 12 R3930 1 1 ODD_MD 11 15
GND MD GND
C404
C407
13 0_0805_5% 12 16
1 2 +5VS_HDD 14 GND 1 2 T185 @ 13 GND GND 17
+5VS 5V GND GND
15 NBYOC@
R555 16 5V 2 2
0_0805_5% 17 5V SANTA_201302-1
18 GND 23 CONN@
Reserved GND1 Default setting
19 24
+5VS_HDD
20 GND
12V
GND2 DC021311120
21
2 22 12V 2
12V
100mils ALLTO_C166KH-122H9-L
CONN@
10U_0603_6.3V6M
C420
1
SP011310171
1
+5VS +5VS_ODD
C397
.1U_0402_16V7K U66
2
2 @ 5 1
IN OUT
2
GND
ODD_EN 4 3 ODD_OC# @ T187
<14> ODD_EN EN OC
SY6288C20AAC_SOT23-5
BYOC@
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 18 of 33
A B C D E F G H
5 4 3 2 1
+5VALW
+USB3_VCCA +USB3_VCCA
change L51 from SM070003Y00 to SM070003K00 C493 EMC@
.1U_0402_16V7K U26
1 2 5 1 W=80mils
IN OUT
1
220U_6.3V_M
L51 EMC@ 2 1
4 3 USB20_N8_R GND + EMC@
<8> USB20_N8 4 3
<14> USB_EN USB_EN 4 3 R467 1 RS@ 2 0_0402_5% C735
EN OC USB_OC0# <7>
C2 470P_0402_50V7K
1 2 USB20_P8_R SY6288C20AAC_SOT23-5 2 2
<8> USB20_P8 1 2 1
D D
DLW21HN900HQ2L_4P C2666
SM070003K00 .1U_0402_16V7K
2
@
D2010 EMC@
6 3 USB20_P8_R W=80mils
I/O4 I/O2
+USB3_VCCA +USB3_VCCA
L05ESDL5V0NA-4 SLP2510P8
USB2.0 Port0
change L29 from SM070003Y00 to SM070003K00
+USB3_VCCA
D2011 EMC@
6 3 USB20_P0_R 1 2
L29 EMC@ I/O4 I/O2
1 2 USB20_N0_R C2665 EMC@
<8> USB20_N0 1 2 JUSB3
.1U_0402_16V7K
A4W1E DVT +USB3_VCCA 5 2 1 5
4 3 USB20_P0_R VDD GND USB20_N0_R 2 VBUS G1 6
<8> USB20_P0 4 3 D- G2
USB20_P0_R 3 7
SM070003K00 4 D+ G3 8
DLW21HN900HQ2L_4P 4 1 USB20_N0_R GND G4
I/O3 I/O1 ACON_UARC9-4K1986
AZC099-04S.R7G_SOT23-6 CONN@
B DC23300AH00 B
ACON_UARC9-4K1986_4P
9 8
<8> USB20_N4 9
2 4 ON/OFFBTN# 10
<8> USB20_P4 10
11
12 11
<14> ON/OFFBTN#
5
6
13 12 15
+3VS 13 GND
14 16
14 GND
ACES_51524-0140N-001
A CONN@ A
R02 Modify
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB2.0 / USB3.0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 19 of 33
5 4 3 2 1
KB Conn. TP/B Conn. +TP_VCC +3VALW
U13
4.7U_0603_10V6K
1 5
OUT IN
1
C2563
2
+TP_VCC GND
KB_pitch 1.0 3 4
2 OC EN
+TP_VCC 2
JKB1 1 @ 2 +3VALW SY6288C20AAC_SOT23-5
R462 0_0402_5% C2562
KSO0 1 1 @ 2 TP_I2C_INT# 1 2 +3VS 1U_0402_6.3V6K
1 +3VS 1
KSO1 2 R463 0_0402_5% I2C_DAT R3919 1 2 10K_0402_5%
2 <14> TP_3V_EN
KSO2 3 I2C_CLK R3934 1 2 2.2K_0402_5%
KSO3 4 3 C663 @ TP_I2C_INT#_APU R3926 1 2 2.2K_0402_5%
KSO4 5 4 JTP1 .1U_0402_16V7K R3933 2.2K_0402_5%
5 TP_PWR_EN follow SYSON behavior
KSO5 6 1 1 2
KSO6 7 6 1 2 TP_CLK
KSO7 8 7 2 3 TP_DATA
KSO8 9 8 3 4 +TP_VCC
KSO9 10 9 4 5 I2C_DAT
10 5 6 I2C_DAT <14,21>
KSO10 11 I2C_CLK
11 6 7 I2C_CLK <14,21>
KSO11 12 TP_I2C_INT#
TP_I2C_INT# <14,21>
1
KSO12 13 12 7 8 TP_SENOFF#
13 8 9 TP_SENOFF# <14>
KSO13 14 R2507 R2509
KSO14 15 14 GND 10 4.7K_0402_5%
4.7K_0402_5%
KSO15 16 15 GND
KSO16 17 16 ACES_50578-0080N-001
2
KSO17 18 17 CONN@
KSI0 19 18
KSI1 20 19 SP010010M00 TP_I2C_INT# 1 2 TP_I2C_INT#_APU
TP_I2C_INT#_APU <7>
TP_CLK
TP_CLK <14>
KSI2 21 20 ECI2C@ TP_DATA
21 TP_DATA <14>
KSI3 22 D22
100P_0402_50V8J
22
C553
C551
KSI4 23 RB751V-40 SOD-323
100P_0402_50V8J
23 1 1
KSI5 24 0_0402_5% 2 @ 1 R3921
KSI6 25 24 27 @EMC@
KSI7 26 25 G1 28 @EMC@
26 G2 2 2
E-T_6905-E26N-01R
CONN@
SP01000IJ00
KSI[0..7]
Lid Switch
KSI[0..7] <14>
KSO[0..17]
KSO[0..17] <14>
(Hall Effect Switch)
+3VLP
U14
APX9132GAI-TRG_SOT23-3
2 3 LID_SW#
GND
VDD VOUT LID_SW# <14>
1
0.1U_0402_16V4Z C151
@EMC@
1 10P_0402_50V8J
2
.1U_0402_16V7K
C2601
10U_0603_6.3V6M
.1U_0402_16V7K
C2603
.1U_0402_16V7K
C2604
.1U_0402_16V7K
C2605
TPM@ 1 1 TPM@ 1 1 1 1
C2600
C2602
2 TPM@ 2 TPM@
near pin5 2 TPM@ 2 2
TPM@ 2
TPM@ TPM@
Dual Amber+Blue
1
BADD SELECTION D
2 A4W1E DVT Modify R10
0 EEh - EFh <14> PWR_LED
G LED1 +3VALW JP19@
1
1 7Eh - 7Fh S Q17 JUMP_43X39
* R3874 2N7002K_SOT23-3 <14> BATT_BLUE_LED# BATT_BLUE_LED# 1 2 1 2 1 2
3
U2600 100K_0402_5% B R231 150_0402_5% 1 2
5 +3VALW_TPM
1 VSB 10 avoid flash issue when BATT_AMB_LED# 3 4 1 2 JP20@
+3VS_TPM <14> BATT_AMB_LED#
2
+3VS_TPM NPCT650AA0WX_TSSOP28
(3.3-3.05)/100=5.0 mA
R min: 50 ohm GND GND
1 @ 2 CLKRUN# SA00007IO00 Need check CIS Symbol
10K_0402_5% R max:475 ohm
R2604 TPM@
CLKRUN# PH request by TPM chip DG 1/22 100 1% :SD034100080
150 1% :SD034150080
LPC_CLK1 R2603 1 2 33_0402_5% C2606 1 2 22P_0402_50V8J 301 1% :SD034301080 Security Classification Compal Secret Data Compal Electronics, Inc.
680 1% :SD034680080 Issued Date 2014/11/04 Deciphered Date 2016/11/04 Title
@EMC@ @EMC@
120 5% :SD028120080 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/TPM Connector/LED
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
560 5% :SD028560080 Custom 1.0
200 5% :SD028200080
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 20 of 33
5 4 3 2 1
+TPUSB_VCC @ 21
+3VALW
R151 0_0603_5%
2 TPUSB@1 +3VS
D R152 0_0603_5% D
+TPUSB_VCC
U69 TPUSB@ +VDDD +VBUS
1 24 +VDDD 2 RS@ 1
2 SCB_0/GPIO_6 VDDD 23 R137 0_0402_5%
3 SCB_5/GPIO_7 SCB_4/GPIO_5 22 TP_I2C_DAT
VSSD SCB_3/GPIO_4
.1U_0402_16V7K
C665 TPUSB@
4.7U_0603_10V6K
C828 TPUSB@
.1U_0402_16V7K
C666 TPUSB@
4.7U_0603_10V6K
C831 TPUSB@
TP_I2C_INT#_D 4 21 TP_I2C_CLK 2 2 2 2
5 GPIO_8 SCB_2/GPIO_3 20
A4W1E 6 GPIO_9 SCB_1/GPIO_2 19
R3922 1 @ 2 0_0402_5% 7 GPIO_10 GPIO_1 18
8 GPIO_11 GPIO_0 17 1 1 1 1
9 SUSPEND VSSA 16
10 WAKEUP VSSD 15 +VBUS 2 TPUSB@1
<8> USB20_P6 USBDP VBUS +TPUSB_VCC
11 14 R149
<8> USB20_N6 USBDM nXRES
12 13 0_0603_5%
VCCD VSSD 25
1 thermal pad
TPUSB@ C43 CY7C65211-24LTXI_QFN24_4X4
1U_0402_6.3V6K
2
C C
+TPUSB_VCC
+TPUSB_VCC
RP24
2
TP_I2C_DAT 1 8
TP_I2C_CLK 2 7 R3932 0_0402_5%
G
TP_I2C_INT#_D 3 6 TP_I2C_CLK 1 6 TP_I2C_CLK_R 1 2 I2C_CLK
D
4 5 Q2505B TPUSB@ @
DMN66D0LDW-7_SOT363-6
5
2.2K_0804_8P4R_5% Q2505A TPUSB@
DMN66D0LDW-7_SOT363-6 R3931 0_0402_5%
G
TPUSB@
TP_I2C_DAT 4 3 TP_I2C_DAT_R 1 2 I2C_DAT
+3VS
D
@
2
G
I2C_CLK
I2C_CLK <14,20>
TP_I2C_INT#_D 3 1 TP_I2C_INT# I2C_DAT
TP_I2C_INT# <14,20> I2C_DAT <14,20>
S
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB-I2C CY7C65211
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 21 of 33
5 4 3 2 1
5 4 3 2 1
1
+5VS C632
4.7U_0603_10V6K
D D
1 2
@ @ @ @ @ @
1
VSET GND
R515 1 NCT3942S SOP 8P
0_0402_5%
C626 @ @ @
.1U_0402_16V7K
2
@
H8 FD1 FD2
C627 H_3P0
4.7U_0603_10V6K
+3VS 1 2 @ @
1
1
@ C631 FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
1000P_0402_50V7K
R516 1 2 FD3 FD4
10K_0402_5% @
40mil
JFAN1 H9 @ @
2
1
+VCC_FAN1 1 H_3P2N
2 1 4 FIDUCIAL_C40M80 FIDUCIAL_C40M80
<14> FAN_SPEED 3 2 GND 5
3 GND
1
1
C C630 C
1000P_0402_50V7K ACES_88231-03041
@EMC@ CONN@
2 @
SP020020710
Reset Circuit
KB BackLight Conn. Reserve +3VLP
2
R2632 1 @ 2 0_0402_5%
MAINPWON <14,25,27>
R349
10K_0402_5%
R2631 1 RS@ 2
EC_RST# <14>
0_0402_5%
6
D
BI_GATE# 2 G
1
3
1
5
D
BI_GATE G
4
DMN66D0LDW-7_SOT363-6 2
+5VS JBL1
U10 1
5 1 +5VS_BL 2 1
IN OUT 3 2
2 4 3
GND 4
1 RS@ 2 4 3 5
<14> KBL_EN EN OC GND
1 6
R592 SY6288C20AAC_SOT23-5 @ GND
0_0402_5% BL@ C524 ACES_51524-0040N-001
.1U_0402_16V7K CONN@
2
SP010022M00
Reset Button
Del BI button Reset Button
SW2
1 2 BI_GATE
SKPMAME010_2P
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN/BATT RESET_DEGUB SW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 22 of 33
5 4 3 2 1
A B C D E
ON2
GND
CT2
10 1 2
1
+3VS
Load switch R1668
0_0402_5% 1
+3VALW
1 2
6
7 VIN2 VOUT2
9
8
C9
330P_0402_50V7K JP8 JP@
+3VS_LS
1 VIN2 VOUT2
@ @ C11 @ 2
C37 C38 1U_0402_6.3V6K 15 JUMP_43X118 @
.1U_0402_16V7K .1U_0402_16V7K GPAD C14
2 2 EM5209VF_DFN14_2X3 .1U_0402_16V7K
SA00007PM00 1
+5VALW
+1.5V TO +1.5VS 0_0402_5%
1 RS@ 2 1.5VS_ON 3
VBIAS
ON1
GND
CT1
12 1 2
+1.5VS
Load switch R1670
0_0402_5% 1
+1.5V
1 2
2
1 VIN1 VOUT1
13
14
C15
330P_0402_50V7K
+1.5VS_LS
JP10JP@
1 VIN1 VOUT1
@ @ C22 @ 2
C42 C41 1U_0402_6.3V6K EM5209VF_DFN14_2X3 JUMP_43X79 @
.1U_0402_16V7K .1U_0402_16V7K SA00007PM00 C25
2 2 .1U_0402_16V7K
1
+0.95VALW U4 +0.95VS
AO4304L_SO8
8 1
1 7 2
+0.95VS
4.7U_0603_6.3V6K
C939
1U_0402_6.3V6K
C46
C940 6 3 1 1
4.7U_0603_6.3V6K 5
2
3 3
1
2 @2
R1671 @
470_0603_5%
+5VALW
1 2
1 2 0.95VS_GATE
+0.95VALW to +0.95VS R1674
4.7K_0402_5%
1
C16 D Q83 @
1
.1U_0402_16V7K 0.95VS_PWR_EN# 2 2N7002K_SOT23-3
D G
2 2 S
<14> 0.95VS_PWR_EN#
G
3
S Q84
2N7002K_SOT23-3
3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P22-DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 23 of 33
A B C D E
A B C D
1 +19V_ADPIN +19V_VIN 1
1
GND EMC@ PC101 EMC@ PC102
100P_0603_50V8 1000P_0603_50V7K
2
@ PR101
2
0_0603_5% 2
1 2
+3VLP +CHGRTC
PD101
PR112 PR113 2 +CHGRTC
560_0603_5% 560_0603_5%
+RTCCONN 1 2 1 2 1
BAS40-04_SOT23-3
+RTC_APU +RTCVCC
Vo=1.5V
3
Vout 1
2 Vin
GND
1 1
PU101
3 PC103 PC104 3
- JBATT1 @ +
2 1 +RTCCONN
ML1220T13RE
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-XXXXP
Date: Thursday, April 16, 2015 Sheet 24 of 33
A B C D
A B C D
PR201 100_0402_1%
1 2
EC_SMB_DA1 <14,26>
PR202 100_0402_1%
1 2
EC_SMB_CK1 <14,26>
+3VLP
PR203
6.49K_0402_1%
1 2
@ PJP201 +3VLP
1
1 2
1
1 2
1
2 3 EC_SMB_DA1-1
BATT_TEMP <14> @ PC202
1
3 4
1
EC_SMB_CK1-1 PR204 1K_0402_1% 0.1U_0603_25V7K
2
4 5 BATT_TS
5 6 BATT_B/I @ PR205 @ PR206
6 7 10K_0402_1% 10K_0402_1%
7 8 <45,47>
2
8 9 +RTCVCC
GND 10
1
@ PU201
GND @ PR207 1 8
VCC TMSNS1
1
CVILU_CI9908M2HR0-NH 100K_0402_1%
PR208 2 7 2 1
GND RHYST1
100K_0402_5%
1
MAINPWON 3 6 @ PR209
<14,22,27> MAINPWON OT1 TMSNS2
1
D 47K_0402_1%
2
2 PQ201 4 5 @ PH201
<22> BI_GATE G BSS138LT1G_SOT23-3 OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
S G718TM1U_SOT23-8
2
+17.4V_BATT+ EMC@ PL201
HCB2012KF-121T50_0805
1 2
EMC@ PL202
HCB2012KF-121T50_0805 Update PH201 change to
1 2
+17.4V_BATT Common Part SL200002H00
1
1
EMC@ PC201 @EMC@ PC203
1000P_0603_50V7K 1000P_0603_50V7K
2
2 2
ADP_I=20*Iada*Rsense
1
PR210
Reserve for 2-cell design ADP_I=20*2.534*0.02=1.01 16.9K_0402_1% PR211
38.7W: 3.83K_0402_1%
2
<14> 9022_PH1
ADP_I=20*Iada*Rsense
+19VB_5V ADP_I=20*2.036*0.02=0.814
CP=45W*0.85=38.25W
9022_VCIN <14>
@9022@
1
PR213
1
80.6K_0402_1%
PH202
@9022@ PR214 For 65W adapter==>action 69.55W , Recovery 55.9W 100K_0402_1%_B25/50 4250K
B value:4250K±1%
<14>69.55W:
2
0_0402_5%
2
1 2 VCIN1_BATT_DROP
Iada= 0~3.661A (69.55W/19V=3.661A)
@
T1
ADP_I=20*Iada*Rsense
1
Update PH202 change to
ADP_I=20*3.661*0.02=1.464 Common Part SL200002H00
1
1
PR215
2
55.9W:
0_0402_5%
10K_0402_1%
PR217
@9022@ PC204 @9022@ PR216
0.1U_0402_25V6 10K_0402_1%
Iada= 0~2.942A (55.9W/19V=2.942A)
2
1
ADP_I=20*Iada*Rsense
@
2
2
4
ADP_I=20*2.942*0.02=1.177 4
CP=65W*0.85=55.25W ECAGND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-XXXXP
Date: Thursday, April 16, 2015 Sheet 25 of 33
A B C D
A B C D
1
PQ301 D
2
Vds = 60V +19VB 0.12W for 65W system
G Id = 250mA CSR rating: 1W
S 2N7002KW _SOT323-3
VACP-VACN spec < 80.64mV
3
PR303
PR302 Rds(on) typ=15.8mohm max
1 2 1 2 Rds(on) typ=15.8mohm max
Vgs=20V
1M_0402_5% 3M_0402_5% Vds=30V Vgs=20V
1
Need check the SOA for inrush ID= 10.5A (Ta=70C) Vds=30V 1
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
2 3
2200P_0402_50V7K
0.1U_0402_25V6
DCR: 27mohm
0.1U_0402_25V6
PQ304
4
@EMC@ PC306
1
1
PC303
PC304
EMC@ PC305
0_0402_5% PQ303 AON7506_DFN33-8-5
0.01U_0402_50V7K
PC301
@ PR301
4
1
1
AON7506_DFN33-8-5 +19V_VIN
PC302
PC307
2
2
2
VF = 0.5V
2
2
3
2
PD1
ACDRV_CHG_R BAS40CW _SOT323-3
0.1U_0402_25V6
BATDRV_CHG 1 2BATDRV_CHG_R
0.1U_0402_25V6
Rds(on) = 30mohm max
1
1
PC308
close to PQ303 PR305
PC310
Vgs = 20V
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K Vds = 30V
PR306
2
PC309 1 2 BST_CHG_R ID = 7A (Ta=70C)
0.1U_0402_25V6 VF = 0.37V
5
PQ305
2.2_0603_5%
PR307
PD2 MDV1528URH_PDFN33-8-5
2
RB751V-40_SOD323-2
7X7X3 Power loss: 0.32W for 3.5A
@ PR308
Isat: 3.8A CSR rating: 1W
VCC_CHG
2
UG_CHG 1 2UG_CHG_R 4
VSRP-VSRN spec < 81.28mV
4.12K_0603_1%
4.12K_0603_1%
2 2
0_0402_5%
1
REGN_CHG
PC312 +17.4V_BATT
BST_CHG
PR309
PR310
UG_CHG
1 2 PL302
LX_CHG
10UH_3.5A_20%_7X7X3_M PR311
3
2
1
1U_0603_25V6K 1 2 0.01_1206_1%
ACP_CHG
ACN_CHG
LX_CHG 1 2 1
LX_CHG_R 4
2
PC313
5
1U_0603_25V6K 2 3
20
19
18
17
16
SRP_CHG_R
PQ306
PU301
1SRN_CHG_R
MDV1527URH_POWERDFN33-8-5
680P_0402_50V7K 4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
21
0.1U_0402_25V6
0.1U_0402_25V6
PC314
PC315
1
1
1 15 LG_CHG 4
ACN LODRV
PC316
PC317
2
2
2 14
ACP GND PR313
3
2
1
2
1
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_1%
CMSRC_CHG 3 13 1
SRP_CHG 2 SRP_CHG_R
CMSRC SRP
1
PR314
2
6.8_0603_1%
ACDRV_CHG 4 12 1
SRN_CHG 2 SRN_CHG_R
2
ACDRV SRN PC318
0.1U_0603_16V7K
For 4S per cell 4.35V battery 1 2 5 11 BATDRV_CHG **Design Notes**
+3VLP ACOK BATDRV
PR315 100K_0402_1%
ACDET
#For 65 /90W system, 3S1P/3S2P battery
IOUT
SDA
SCL
ILIM
ACDET_CHG Maximum Charging current 3.5A
<14> ACIN
Maximum Battery discharge power 55W.
#Register Setting
6
10
+3VALW
1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI if add ISN choke
1
3 3
100K_0402_1%
316K_0402_1%
0.01U_0402_25V7K
ACDET_CHG
1
IOUT_CHG
PC320
PR318
Charge current 3.5A
2
1
PR319
422K_0402_1% Power loss : 1.82W
1
2
PR320
3. If use 4S per cell 4.35V battery, need additional circuit
2
0_0402_5%
for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors
with PR222 for ACDET setting)
1 2
66.5K_0402_1%
1 2 2
<14> BATT_4S EC_SMB_CK1 <14,25> 2. Charger timeout : No communication within 175s(default)
100P_0402_50V8J
1
PC321
1
PC322
PR322
EC_SMB_DA1 <14,25>
1
PQ308 D
6. BATLOWV : 2.5V
2
2 @ PR323
<14,23,28> SUSP#
2
@ PC323
100P_0402_50V8J
2
Close EC chip
4 4
Vin Dectector
Min. Typ Max.
L-->H 17.16V 17.63V 18.12V
H-->L 16.76V 17.22V 17.70V
Security Classification Compal Secret Data Compal Electronics, Inc.
VILIM = 20*ILIM*Rsr Issued Date 2014/10/20 Deciphered Date 2016/10/20 Title
ILIM = 3.3*100/(100+316)/20/0.01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
= 3.966 A AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-XXXXP
Date: Thursday, April 16, 2015 Sheet 26 of 33
A B C D
A B C D E
1 1
PR402
@ 499K_0402_1%
PR401 ENLDO_3V5V 1 2
+19VB EMC@ PL401 0_0603_5% +19VB
HCB2012KF-121T50_0805 PC403
1
150K_0402_1%
1 2 +19VB_3V BST_3V1 2 1 2
PR404
0.1U_0603_25V7K
2200P_0402_50V7K
1
Update PL401 change to
2
10U_0805_25V6K
@EMC@ PC401
EMC@ PC404
0.1U_0402_25V6
Common Part SM01000P200
BS
IN
IN
IN
IN
1
1
20141210
PC405
LX_3V 6 20
LX LX PL402
2
2
7 19 LX_3V 1 2
GND LX +3VALWP
@EMC@ PR405
8 PU401 18 1.5UH_PCMB053T-1R5MS_6A_20%
GND GND
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_1206_5%
1
9 17
PG SY8286BRAC_QFN20_3X3
LDO +3VLP
PC407
PC408
@ PC409
PC410
Update PL402 change
1
10 16
to Common Part
2
NC NC PC411
OUT
EN2
EN1
21 SH000016800 20141202
NC
4.7U_0603_6.3V6M
FF
2
GND
1 3V_SN 2
PR412
11
12
13
14
15
680P_0603_50V7K
100K_0402_5% 3.3V LDO 150mA~300mA
@EMC@ PC412
1 2
2 +3VALWP 2
ENLDO_3V5V
Vout is 3.234V~3.366V Ipeak=7A
Imax=4.9A
2
<14> SPOK Iocp=10A
Check pull up resistor of
SPOK at HW side @ PJ401
PC402 PR403 +3VALWP 1 2 +3VALW
1000P_0402_25V8J 1K_0402_5% 1 2
<14> 3V_EN 3V_FB 1 2 1 2 JUMP_43X118
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0603_25V7K
1
1
PC414
PC415
EMC@ PC417
@EMC@ PC418
BS
IN
IN
IN
IN
2
LX_5V 6 20
@ LX LX PL404
7 19 LX_5V 1 2 +5VALWP
GND LX
3 8 PU402 18 1.5UH_PCMB053T-1R5MS_6A_20% @ 3
GND GND
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
680P_0603_50V7K 4.7_1206_5%
PR408
PC419
1
@EMC@
SPOK 1 2 9 17 1 2
PG VCC
PC420
PC421
PC422
PC423
PC427
Update PL404 change
@ PR413 10 SY8286CRAC_QFN20_3X3 16
to Common Part
2
NC NC 4.7U_0603_6.3V6M
1 5V_SN
0_0402_5%
OUT
LDO
2
EN2
EN1
21 SH000016800 20141202
FF
GND
11
12
13
14
15
PC425
VL
@EMC@
2
Vout is 4.998V~5.202V
ENLDO_3V5V
5V LDO 150mA~300mA
3V5V_EN
PC424
4.7U_0603_6.3V6M
Ipeak=7A
Imax=4.9A
2
PR409
2.2K_0402_5% Iocp=10A
1 2
<14> EC_ON @ PR410
0_0402_5%
1 2
<14,22,25> MAINPWON
PC413 PR406
1000P_0402_25V8J 1K_0402_5%
3V5V_EN 5V_FB 1 2 1 2
1M_0402_1%
4.7U_0402_6.3V6M
1
1
PR411
PC426
4 4
2
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+3VALW/+5VALW
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-XXXXP
Date: Thursday, April 16, 2015 Sheet 27 of 33
A B C D E
5 4 3 2 1
D D
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
+1.5VP
1
1
@EMC@ PC501
EMC@ PC502
PC503
PC504
UG_1.5V +0.75VSP
0.1U_0603_25V7K
2
2
LX_1.5V
10U_0805_6.3V6K
10U_0805_6.3V6K
5
1
PC505
PC506
PC507
PQ501
16
17
18
19
20
2
C MDV1528URH_PDFN33-8-5 PU501 C
2
Update PL502 change
PHASE
VLDOIN
UGATE
BOOT
VTT
4 21
to Common Part PAD
SH000016700 20141202 LG_1.5V 15 1
LGATE VTTGND
1
2
3
14 2
PL502 PR502 PGND VTTSNS
1.5UH_PCMC063T-1R5MN_9A_20% 13.7K_0402_1%
1 2 1 2 CS_1.5V 13 3
+1.5VP PC508 CS RT8207MZQW _W QFN20_3X3 GND
1U_0603_10V6K
1
1 2 12 4 VTTREF_1.5V
VDDP VTTREF
5
PR504
330U_2.5V_M
1
Update Pc509 change @EMC@ PR503 PQ502 5.1_0603_5%
+ 4.7_1206_5% 1 2 VDD_1.5V 11 5
PC509
1
PGOOD
1 2
SF000006S00 20141227
2
PC516
TON
1
2 4 PR505 0.033U_0402_16V7K
FB
S5
S3
2
@EMC@ PC515 PC517 2.2_0603_5%
680P_0402_50V7K 1U_0603_10V6K
2
10
6
1
SI7716ADN-T1-GE3_POW ERPAK8-5
1
2
3
FB_1.5V
EN_0.75VSP
TON_1.5V
PR506
EN_1.5V
change PQ502 form 7506 10.2K_0402_1%
+5VALW PR507 1 2 +1.5VP
to 7716, 20150108 887K_0402_1%
B +19VB_1.5V 1 2 B
1
ton=3.85p*Rton*Vvddq/(Vin-0.5)
Mode Level +0.75VSP VTTREF_1.5V @ PR509
f=Vvddq/(Vin*ton) 0_0402_5% PR508 0.75*(1+10.2/10)=1.515
S5 L off off 10K_0402_1%
S3 L off on OCP=Ipeak*1.2=Ilimit+Delta I/2 1 2
<14> SYSON
2
S0 H on on Delta I=(Vin-Vddq)*ton/L
Rlimit=Ilimit*Rds(on)/10u
1
@ PC518
Note: S3 - sleep ; S5 - power off 0.1U_0402_10V7K
H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm
2
Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A
L/S AON7506 Rds(on) :typ:13mOhm, max:15.8mOhm
Idsm(TA=25)=12A, Idsm(TA=70)=10.5A 1 2 @ PJ501
<14,23,26> SUSP# 1 2
+1.5VP 1 2 +1.5V
@ PR510
1
Choke: 7x7x3 0_0402_5% JUMP_43X118
Rdc=8mohm(Typ), 11mohm(Max) @ PC519 @ PJ502
0.1U_0402_10V7K 1 2
2
1 2
Switching Frequency: 285kHz JUMP_43X118
Ipeak=9.2A
Iocp~11.4A @ PJ503
1 2
OVP: 110%~120% +0.75VSP 1 2 +0.75VS
A
VFB=0.75V, Vout=1.515V JUMP_43X39 A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.5VP/+0.75VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-XXXXP
Date: Thursday, April 16, 2015 Sheet 28 of 33
5 4 3 2 1
5 4 3 2 1
10U_0805_25V6K
0.1U_0603_25V7K 4.7_1206_5% 680P_0603_50V7K
2200P_0402_50V7K
0.1U_0402_25V6
D
3 1 BST_VDDP 1 2 1 2 1 2 SNB_VDDP1 2 D
IN BS
1
@EMC@ PC606
PC603
EMC@ PC605
4 6
IN LX
2
5 19 PL602
IN LX 0.68UH_PCMC063T-R68MN_15.5A_20%
7
GND LX
20 LX_VDDP 1 2
+0.95VALWP
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
8 14 FB_VDDP
@ PR601 GND FB
LDO_VDDP
1
330P_0402_50V7K
0_0402_5% 18 17 LDO_VDDP
GND VCC (R1)
PC609
PC610
PC611
PC612
PC621
PC622
1
1
<14> 0.95_1.8VALW_PWREN
PC608
1 2 11 10
2
EN NC
1
PC613 PR606
ILMT_VDDP 13 12 2.2U_0402_6.3V6M 36.5K_0402_1% @ @
2
@ PR605 ILMT NC
1
0_0402_5% 15 16
+3VALW
2
BYP NC
1
PR602 @ PC601
2
ILMT_VDDP 1M_0402_1% 21
PR606 part count reduce 0.22U_0402_10V6K
PAD
1
2
1
PC614 SY8288RAC_QFN20_3X3
2
1U_0402_6.3V6K
2
@ PR607 FB = 0.6V
0_0402_5%
2
1
PR608
Pin 7 BYP is for Conect Sandby. 62K_0402_1%
Common NB can delete +3VALW and PC614 (R2)
2
The current limit is set to 8A, 12A or 16A when this pin
is pull low, floating or pull high @ PJ601
+0.95VALWP 1 2 +0.95VALW
1 2
JUMP_43X118
C C
TDC 8A
VFB=0.6V
Vout1=0.6V* (1+R1/R2)=1.062V
Vout2=0.6V*(1+R1/(R2+R3))=0.96V
VDDP_ALW_VCTRL VDDPALW
@ PR614
0_0402_5%
1 1.062V
EN_1.8VALW_R 1 2 0.95_1.8VALW_PWREN
PC619
0.1U_0402_16V7K
FB=0.6V
1
0 0.96V
1
@ PR612
Note:Iload(max)=3.5A @ 1M_0402_5%
Note:Iload(max)=2.5A
2
PU602
B
9 B
1 PGND 8
FB SGND
@ PJ603 2 7
PG EN PL603
PJ602 @
+3VALW 1 2 IN_1.8VALW 3 6 LX_1.8VALW 1 2
1 2 IN LX 1UH_2.8A_30%_4X4X2_F +1.8VALWP +1.8VALWP 1 2
1 2 +1.8VALW
1
68P_0402_50V8J
4 5
JUMP_43X79 PC615 PGND NC
1
1
4.7_0603_5%
@EMC@ PR609
JUMP_43X79
1
22U_0603_6.3V6M
PC616
2
1
22U_0603_6.3V6M
22U_0603_6.3V6M
SY8003DFC_DFN8_2X2 PR610
Rup
PC617
PC618
20K_0402_1%
2
2
2
FB_1.8VALW
1
1
680P_0402_50V7K
@EMC@ PC620
FB=0.6V
Note:Iload(max)=3A PR613
10K_0402_1%
Rdown
2
Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage Vout=0.6V* (1+Rup/Rdown)
A A
2013/10/16 Modify
PQ801,PQ803 change to AON6552.
PQ802,PQ804,PQ805 change to AON6554.
<6> APU_VDD_RUN_FB_L APU_VDD_SEN <6>
1
PC1000 HCB2012KF-121T50_0805
0.01U_0402_50V7K 1 2
10_0402_5% 10_0402_5% RT8880A_V1A.mdd for IC portion PQ801 +19VB
5
1 2 1 2 MDU1516URH_POWERDFN56-8-5 1 EMC@ PL802
+APU_CORE
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
HCB2012KF-121T50_0805
@EMC@ PC831
EMC@ PC832
RT8880A_V1B.mdd for SW portion
68U_25V_M
1
D PR1001 PR1000 + D
1 2
PC830
1
1
PC802
PC803
PR802 0_0603_5%
2
UG1 1 2 4 2
2
PH1
PR803 PL803
1 2 2.2_0603_1% 0.36UH_PDME064T-R36MS_24A_20%
3
2
1
PR1006=80.6K BOOT11 2 1
BOOT1_R 2 1 4
@ PC1004
330P_0402_50V7K
LL=3.92m PC804 2 3
+APU_CORE
@EMC@ PR804
4.7_1206_5%
5
PR1005 PR1006 0.22U_0603_25V7K
1
10K_0402_1% 80.6K_0402_1% PR805
1 2 1 2 PR1007 PQ802 2.61K_0402_1%
+19VB_CPU
1 2 MDU1511RH_POWERDFN56-8-5 1 2 1 2
1 2
560P_0402_50V7K 68P_0402_50V8J SNB_APU .1U_0402_16V7K
1 2 1 2
@EMC@ PC806
680P_0603_50V7K
3
2
1
2
+5VS
@ PR1029
4.12K_0402_1%
1 2
TONSET
APU_core
COMP
FB
ISEN1N
ISEN1P
+5VS ISEN1P
TDC 20A
ISEN1N-1
PR1033 Peak Current 25A
910_0402_1% OCP current > 32.5A
13
12
11
10
1
PU1000 ISEN1N 1 2
Load line -4mV/A
2013/10/22 Modify
PWM3
BOOT2
UGATE2
VSEN
ISEN3N
ISEN1N
ISEN2N
TONSET
COMP
FB
ISEN3P
ISEN1P
ISEN2P
FSW=450kHz
0.1U_0402_25V6
1
PH801,PH802 change to common part. 53
@ PC807
GND +5VS DCR 1.4mohm +/-5%
14 52 @ PR1012
C
TYP MAX C
2
RGND PHASE2 0_0402_1%
IMON 15
IMON LGATE2
51 PVCC 1 2 H/S Rds(on) :6.7mohm , 8.5mohm
VREF 16 50 PVCC L/S Rds(on) :3mohm , 3.8mohm
V064 PVCC VCC 1 2
PC1011 IMONA 17 49 LG1
1U_0402_6.3V6K +1.5VS IMONA LGATE1 PR1013
2.2U_0603_10V7K
2.2U_0603_10V7K
1
1
1 2 VDDIO 18 48 PH1 10_0603_5%
PC1012
PC1013
VDDIO PHASE1
19 47 UG1
<6> APU_PWRGD APU_CORE_NB
2
PR1019 0_0402_5% PWROK UGATE1
<6> APU_SVC 1 2 20
SVC
RT8880CGQW_WQFN52_6X6
BOOT1
46 BOOT1 TDC 13A
PR1020 0_0402_5%
Colse to Control IC 1 2 21 45 LG_NB Peak Current 17 A
<6> APU_SVD SVD LGATEA1
PR1026
1
0_0402_5%
2 22 44
OCP current > 32.5A
PH_NB
<6> APU_SVT SVT PHASEA1 Load line -4mV/A
1
OFSA BOOTA1
TYP MAX
PR1015
SET1 25 41
0_0402_5%
+5VS
2
@ PR1017
0_0402_5%
5
@ SET2 26 40 1 2 +19VB_CPU MDU1516URH_POWERDFN56-8-5
L/S Rds(on) :3mohm , 3.8mohm
10U_0805_25V6K
10U_0805_25V6K
SET2 PGOODA TONSETA
ISENA2N
ISENA1N
ISENA2P
ISENA1P
PGOOD
COMPA
110K_0402_1%
PC823
PC824
VSENA
OCP_L
2
1
IBIAS
VCC
FBA
2
100K_0402_1%_B25/50 4250K
1 2 1 2
27
28
29
30
31
32
33
34
35
36
37
38
39
1
PR841 PL804
VGATE <14>
PR1024 2.2_0603_1% PC825 0.36UH_PDME064T-R36MS_24A_20%
ISENA1N
ISENA1P
PH1001
PH1000
3
2
1
COMPA
+APU_CORE_NB
VCC
22K_0402_1%
FBA
4.7_1206_5%
+3VS
2
1
VREF PR845
+5VS 100K_0402_5% 1 2 1 2
PR1028
VR_ON <14>
0.1U_0402_25V6
0.1U_0402_25V6
1
PC826
PC1021
PC1022
close to PL803
2
2
LG_NB 4 .1U_0402_16V7K
close to PL804 SNB_APU_NB
2
1
PQ804
680P_0603_50V7K
PC1024 MDU1511RH_POWERDFN56-8-5 @ PR1010
0.1U_0402_25V4K 0_0402_5%
2
3
2
1
2
PC1025 68P_0402_50V8J PC1026 1 2
1 2 1 2
ISENA1N_R
560P_0402_50V7K
PR1031
ISENA1P
1 2 1 2 PR1011
@ 910_0402_1%
PC1027
PR1030 10K_0402_1% ISENA1N 1 2
80.6K_0402_1% 1 2
0.1U_0402_25V6
1
PR1030=80.6K 330P_0402_50V7K
PC828
LL=3.92m
2
@
APU_VDD_RUN_FB_L
APU_VDDNB_SEN
<6>
PR1034
SET1
1 2
+APU_CORE_NB
PR1035 PR1036 PR1037
1
A A
Delete PR834.PR835.PR836.PR839.PR840.PR841,
follow vender FAE suggest.
2013/11/29 modify.
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/06/19 Deciphered Date 2012/07/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-XXXXP
Date: Thursday, April 16, 2015 Sheet 30 of 33
5 4 3 2 1
A
B
C
D
PC932
5
5
220U_D2 SX_2VY_R9M
2
1
+
@
PC929 PC901
0.22U_0402_16V7K 10U_0603_6.3V6M
+APU_CORE
2 1 2 1 2 1 2 1
1U_0402_6.3V6K 1U_0402_6.3V6K
PC930 PC918 PC908 PC905
180P_0402_50V8J 2 1 2 1 10U_0603_6.3V6M
+APU_CORE
2 1 2 1
1U_0402_6.3V6K 1U_0402_6.3V6K
2
1
+
PC933 PC919 PC909
220U_D2 SX_2VY_R9M 2 1 2 1 PC906
10U_0603_6.3V6M
1U_0402_6.3V6K 1U_0402_6.3V6K 2 1
PC920 PC910
2 1 2 1
@
PC937
1U_0402_6.3V6K 1U_0402_6.3V6K 22U_0603_6.3V6M
PC921 PC911 2 1
2 1 2 1
@
PC938
1U_0402_6.3V6K 1U_0402_6.3V6K 22U_0603_6.3V6M
PC922 PC912 2 1
2 1
@
PC939
1U_0402_6.3V6K 22U_0603_6.3V6M
PC923 2 1
4
4
+APU_CORE (36.4)
Issued Date
Security Classification
3
3
2014/10/20
PC935
220U_D2 SX_2VY_R9M
2
1
+
PC931 PC902
180P_0402_50V8J 10U_0603_6.3V6M
2 1 2 1 2 1 2 1
1U_0402_6.3V6K 1U_0402_6.3V6K PC903
PC924 PC913 10U_0603_6.3V6M
+APU_CORE_NB
2 1 2 1 2 1
1U_0402_6.3V6K 1U_0402_6.3V6K PC904
2
1
+
PC907
PC940
PC927 PC916 22U_0603_6.3V6M
2 1 2 1 2 1
1U_0402_6.3V6K 1U_0402_6.3V6K
@
PC941
@ PC928 PC917 22U_0603_6.3V6M
2
2
2 1
2016/10/20
@
PC942
22U_0603_6.3V6M
2 1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+APU_CORE_NB (36.5)
Size
Title
Date:
Custom
Document Number
B5W1E_LA-XXXXP
Sheet
31
+APU_CORE Cap
Compal Electronics, Inc.
of
33
Rev
1.0
A
B
C
D
5 4 3 2 1
05
06
07
C
08 C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR1
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-XXXXP
Date: Thursday, April 16, 2015 Sheet 32 of 33
5 4 3 2 1
5 4 3 2 1
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW-PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5W1E_LA-D121P
Date: Thursday, April 16, 2015 Sheet 33 of 33
5 4 3 2 1