Beruflich Dokumente
Kultur Dokumente
Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers
will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor
product management systems do not have the ability to manage part nomenclature that utilizes an underscore
(_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain
device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated
device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please
email any questions regarding the system integration to Fairchild_questions@onsemi.com.
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right
to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out
of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor
is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
FDD86102 N-Channel Shielded Gate PowerTrench® MOSFET
March 2015
FDD86102
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 36 A, 24 mΩ
Features General Description
Shielded Gate MOSFET Technology This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced PowerTrench® process that
Max rDS(on) = 24 mΩ at VGS = 10 V, ID = 8 A incorporates Shielded Gate technology. This process has been
Max rDS(on) = 38 mΩ at VGS = 6 V, ID = 6 A optimized for rDS(on), switching performance and ruggedness.
D
G
G
S
D
TO-P-2A52
K
(T O -252)
S
Thermal Characteristics
RθJC Thermal Resistance, Junction to Case 2.0
°C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 40
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
ΔBVDSS Breakdown Voltage Temperature
ID = 250 μA, referenced to 25 °C 67 mV/°C
ΔTJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V 1 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA
On Characteristics (Note 2)
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 2 3.1 4 V
ΔVGS(th) Gate to Source Threshold Voltage
ID = 250 μA, referenced to 25 °C -8.5 mV/°C
ΔTJ Temperature Coefficient
VGS = 10 V, ID = 8 A 19 24
rDS(on) Static Drain to Source On Resistance VGS = 6 V, ID = 6 A 26 38 mΩ
VGS = 10 V, ID = 8 A, TJ = 125 °C 33 44
gFS Forward Transconductance VDS = 10 V, ID = 8 A 21 S
Dynamic Characteristics
Ciss Input Capacitance 780 1035 pF
VDS = 50 V, VGS = 0 V,
Coss Output Capacitance 180 240 pF
f = 1 MHz
Crss Reverse Transfer Capacitance 15 25 pF
Rg Gate Resistance 0.4 Ω
Switching Characteristics
td(on) Turn-On Delay Time 7.6 15 ns
tr Rise Time VDD = 50 V, ID = 8 A, 3 10 ns
td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 Ω 13.4 24 ns
tf Fall Time 2.9 10 ns
Qg Total Gate Charge VGS = 0 V to 10 V 13.4 19 nC
Qg Total Gate Charge VGS = 0 V to 5 V VDD = 50 V, 7.6 11 nC
Qgs Gate to Source Gate Charge ID = 8 A 4.0 nC
Qgd Gate to Drain “Miller” Charge 3.7 nC
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS 121 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 9 A, VDD = 100 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 30 A.
4. Pulsed Drain current is tested at 300 μs with 2% duty cycle. For repetitive pulses, the pulse width is limited by the maximum junction temperature.
©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDD86102 Rev.1.9
FDD86102 N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
75 4
VGS = 8 V
NORMALIZED
45
VGS = 6 V 2
VGS = 7 V
30
1
15 VGS = 8 V VGS = 10 V
VGS = 5 V PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0 0
0 1 2 3 4 5 0 15 30 45 60 75
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
2.0 80
ID = 8 A PULSE DURATION = 80 μs
DRAIN TO SOURCE ON-RESISTANCE
ID = 8 A
1.6 60
rDS(on), DRAIN TO
NORMALIZED
1.4 50
1.2 40 TJ = 125 oC
1.0 30
TJ = 25 oC
0.8 20
0.6 10
-75 -50 -25 0 25 50 75 100 125 150 4 6 8 10
TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V)
75 100
PULSE DURATION = 80 μs VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VDS = 5 V
TJ = 150 oC
45 1
TJ = 25 oC
30 0.1
TJ = 150 oC TJ = -55 oC
15 0.01
TJ = 25 oC
TJ = -55 oC
0 0.001
2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
VDD = 25 V Ciss
8
CAPACITANCE (pF)
VDD = 50 V
Coss
6
VDD = 75 V
100
4
2
f = 1 MHz
VGS = 0 V Crss
0 10
0 3 6 9 12 15 0.1 1 10 100
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
50 40
IAS, AVALANCHE CURRENT (A)
TJ = 125 oC 10
o
RθJC = 2 C/W
1 0
0.001 0.01 0.1 1 10 30 25 50 75 100 125 150
tAV, TIME IN AVALANCHE (ms) o
Tc, CASE TEMPERATURE ( C)
100 10000
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJC = 2 oC/W
TC = 25 oC
ID, DRAIN CURRENT (A)
10 100 µs
1000
THIS AREA IS
LIMITED BY rDS(on)
1 SINGLE PULSE
TJ = MAX RATED 1 ms
RθJC = 2 oC/W
TC = 25 oC 10 ms 100
DC
0.1 50
1 10 100 200 10
-5
10
-4 -3
10
-2
10 10
-1
1 10
VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum
Operating Area Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
1
NORMALIZED THERMAL
D = 0.5
IMPEDANCE, ZθJC
0.2
0.1
0.05 PDM
0.02
0.1 0.01
t1
t2
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
o PEAK TJ = PDM x ZθJC x RθJC + TC
RθJC = 2 C/W
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
Authorized Distributor
ON Semiconductor:
FDD86102