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50μ
Stage II
Stage II
Stage I
Stage I
Output
Voltage
Input B. Output Voltage Regulation
V
Voltage Second full bridge plays an important role in the synthesis
of a sinusoidal waveform at the terminal of compensation
Transformer Voltage transformer. To minimize the harmonic distortion of the
VTR output voltage waveform, SPWM (Sinusoidal Pulse Width
Modulation) technique is generally used. Meanwhile, in this
Q1 Ton1 study the converter produces sinusoidal waveform by using a
Q2 Ton1 typical PWM (Pulse Width Modulation) technique since no
Q4
capacitor is used in the DC bus.
Q3 Ton2 Fig. 3 illustrates the voltage induced in the primary
winding of the compensation transformer changes depending
Q5
on the input voltage, switching frequency, and the duty ratio.
Q6
As the regulation frequency is equal to 20kHz, 200 cycles
Q8 occur in one half cycle of the main period (20ms).
Q7
t Vtr-p Vmax= √2.Vin
TS2 = 50µs BOOST MODE BUCK MODE TS1 = 50ms
Ts1 = 2
Fig. 2. Waveforms diagram of the power circuit d2.Ts2 Ts1 = 400.Ts2
Ts2 = /200
TABLE I
ON/OFF STATES OF EACH SWITCH AT BOOST MODE
Mode I - Boost
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 ………………..………
α
Stage
Positive On Off Off On On Off Off On
I
half
Stage
cycle On Off Off On Off On Off On
II
Stage α /200+α π ωt
Negative Off On On Off Off On On Off .
III /200 Ts2 +α
half Ts1/2
Stage
cycle Off On On Off Off On Off On
IV
Fig. 3. The voltage induced in the primary winding of the transformer
711
Assuming that all of the components are ideal, and the dead dynamic response. The main function of the microcontroller
time is zero, the input and output voltages relationship can be involves controlling the turn-off and turn-on of the main
obtained as, . switches and the triac by the help of the GAL16V8B
programmable logic integrated circuit depicted in Fig. 4.
. . (3) Zero crossing of the line voltage is detected with a LM393
comparator circuit where the output signal is directly applied
to input pins of GAL and microcontroller. Schematic of the
. √2. V . sin ωt . d ωt . (4) circuit can be seen in Fig. 5.
In order to obtain the required isolation between the power
. 200
√2. V . sin ωt . d ωt . (5) stage and the control stage HCNR200 IC is employed which
200 provides optic isolation between the external signal and the
microcontroller input pin as it is seen in Fig. 6. The circuit
.
operates linearly and monitors the input voltage.
.
. GAL-PIN2
GAL-PIN3
NOT GAL-PIN1
199. AND
. 200
199. √2. V . sin ωt . d ωt . (6)
GAL-PIN4
200 AND GAL-PIN1
EX-OR AND
NOT NOT
second full bridge. GAL-PIN1
AND
found as in (7).
EX-OR GAL-PIN1
AND AND
√ .V GAL-PIN7
. cos cos . . (7)
Fig. 4. Inside of the GAL16V8B programmable logic integrated circuit
The RMS value of the voltage at the secondary winding of 150K 820K
8
3 +
1
. . cos cos . . (8) GND2 2 -
LM393
AC-LINE1 GAL-PIN5
4
50K
The relationship between the input and output voltages can be 150K GND2
found as in (10).
1nF
1K
. (9)
GND2
Using (10) the output voltage value can be obtained in (11) +12V +12V1 +12V +12V +12V2 +5V
270R
2K2 +5V
0
GND1 GND2 CONTROL
Æ 3 +
LM358 BC327 10K SIGNAL
1
2 - 33pF
6K8
EX- 200K
0.5 Æ . 1 . . (11) CONTROL
SIGNAL
200K 100nF - 2
1
+ 3
33K LM358
HCNR200-B HCNR200-C
1.0 . 1
GND1
Æ
100nF 100nF
10K
-12V1 -12V2
HCNR200-A
C. Control Unit GND1 GND1 GND1 GND1 GND1 GND1 GND2 GND2 GND2 GND2
712
Fig. 7 shows the flowchart for the mainn algorithm of the III. EXPERIM
MENTAL RESULTS
proposed voltage regulator. Depending on the voltage The experimental results of the proposed converter were
difference between the reference and feeedback signals, the realized for a 220V, 50Hz, 5kVA single phase voltage
microcontroller decides the mode of the reggulator. regulator according to the toppology. Fig. 8 illustrates the
When the phase of the voltage is changed on the experimental layout of the systeem; the apparent power of the
transformer`s terminal, an instantaneous high current may compensation transformer was specified
s as 1.6kVA.
flow over the transformer. To proteect the switching
components, the edges of the transformerr should be short-
circuited to nullify the magnetization current. After that, the Transformer
phase of the voltage can be changed safely.. By the help of the
closed loop formed by sub-switches, the magnetization
current of the transformer can be decreasedd to zero. With this Cr
method, it is not required to wait for zero crossing of current
to change the transformer phase, as it is performed
p in other
regulators. This also improves the system response
significantly.
Yes No Switching
Calculate VD Swiitch
ON
N? components
Yes
VD = 0
No
No Yes Set VC = 1 Snubber
Set VC = 0 VD > 0
circuit
No No
Fig. 8. Layout of thhe power module.
VD = 0 VD = 0
Yes Yes The power value of the transfformer was defined depending
No Switch Switch No on the minimum input voltagee (170Vac) and the maximum
ON? ON? transformer current (32.4Aac) values as in the following
Yes Yes equations:
PWM = const. PW
WM = const.
Maximum apparent power in the output:
Yes
Yes Minimum allowable input volltage:
VD = 0 VD = 0
ON?
No
Vin_min = 170V
Vac
No
D= 0 D= 0
No ON? Yes Yes No Maximum current over the traansformer:
713
The operational conditions and the experimental results of
the regulator can be found in Table III. The system was tested D6 voltage
for both 110Vac (60Hz) and 220Vac (50Hz) AC voltages waveform D8 voltage
which can be arranged by a switch in case of requirement in waveform
the application.
TABLE III
EXPERIMENTAL PARAMETERS OF THE VOLTAGE REGULATOR
Electrical Specifications
Input Voltage 110Vac / 220Vac
Input Frequency 50Hz / 60Hz ±5%
Voltage Regulation -20% - +20% for 220Vac
-40% - +40% for 110Vac
Power Factor Lag or Lead 0.96 - 0.98
Turn Ratio and Apparent Np : Ns = 4.4 : 1
Power of the Transformer Str = 1600VA
Output current
Switching Frequency 20kHz
Output Filter 10µF
Output Voltage 110Vac / 220Vac
Load Power 5000VA
Fig. 10. D6, D8 voltages and load current waveforms at buck mode (Vin =
Voltage THD 3% (with linear load)
235Vac), (Ch1 = 100V/div, Ch2 = 100V/div, Ch4 = 50A/div).
Overload Capability 150% - 2 minutes
Dynamic Response 5ms (maximum) The voltage waveform of low side diodes of the first bridge
Efficiency 97% for the same operation mode (the input voltage is also the
same) can be seen in Fig. 11. As it is expected from the
Figs. 9 – 12 show the experimental waveforms of voltages design of the switching strategy, a high frequency switching
and currents of the system illustrating the steady state signal can be seen over the second bridge diodes while it is in
characteristics for a resistive load. line frequency in the first bridge diodes.
D6 voltage D4 voltage
waveform waveform D2 voltage
D8 voltage waveform
waveform
Fig. 9. D6, D8 voltages and load current waveforms at boost mode Fig. 11. D2, D3 voltages and load current waveforms at boost mode (Vin =
(Vin = 205Vac), (Ch1 = 100V/div, Ch2 = 100V/div, Ch4 = 50A/div).
205Vac), (Ch1 = 100V/div, Ch2 = 100V/div, Ch4 = 50A/div).
In Fig. 9, Ch1 and Ch2 show the voltage waveforms of the 180° phase shift of the current and the voltage waveforms
low side parallel diodes` in the second bridge while the can be followed in Fig. 12 for a high input voltage operation.
system is working in boost mode. And in the Fig. 10 the same Fig. 13 illustrates the common DC bus voltage and also one
diodes are seen while the system is working in buck mode. of the low side IGBTs gate signal in the second bridge. It is
clear from the figure that the voltage across the DC bus is the
DC rectified waveform of the sinusoidal line voltage.
714
1) A DC bus filter capacitor was not used.
Transformer primary voltage 2) A highly efficient regulator was designed (η = 97%).
3) Output filter size was reduced.
4) A simple control strategy and a simple controller
was used.
5) Switching stress during turn on time of the IGBTs
was reduced.
6) A fast dynamic response for AC regulation was
achieved.
7) The input power factor and the power quality were
improved.
Fig. 13. DC bus voltage and low side switching signal (Boost mode - Vin =
200Vac), (Ch1 = 100V/div, Ch2 = 10V/div).
IV. CONCLUSION
In this paper, a novel single-phase voltage regulator, which
has a common DC bus between the two full bridge
bidirectional converters has been presented. In addition, a
new switching strategy using a cost effective digital controller
was also presented. The theoretical analysis of the power
stage and the general scheme of the regulator including the
control stage have been presented. Operation of the control
circuit has been described and the validity of the proposed
system was verified through a 5kVA single phase
experimental setup. The results are as follows.
715