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OPERATIONAL AMPLIFIERS
Operational amplifiers are among the most widely used integrated circuits for analogue electronics.
They are very popular for amplification of small signals, both AC and DC. They are also used in circuits
performing a variety of other 'operations' such as analogue addition, differentiation and integration.
+E (+15 V)
V+ +
inputs A Vo
output
V- -
-E (-15 V)
In order to perform this amplification, the IC must, of course, be connected to a DC power supply (or
battery). Normally this DC is supplied as +E and -E volts as shown. Supply voltages in the range ±9 V
to ±15 V are common but lower values down to about ±3 V are possible with some sacrifice in
performance. Because the DC power supply (or battery) is absolutely essential to the operation of the
device, it is assumed to be there and is very seldom shown on circuit diagrams.
The gain of the chip, A, is usually about 2 x 105 (at least for DC) though variations of a factor of two or
more must be expected between individual chips of the same type number. The manufacturer's data sheet
supplies this information.
The small signal resistance between the input terminals is typically 1 - 2 M? , though it may be much higher
in certain devices. In most of our circuits, we will not need to allow for this input resistance; it will simply
be 'high'. However, at times we will need to know its approximate size to check what approximations will
be valid.
Note that the two input terminals are not quite identical. They differ only in terms of sign. When the '+'
input terminal (ie the voltage V+ ) is made (slightly) more positive, the output, Vo, will become more
positive but when the '-' input terminal (ie V-) is made (slightly) more positive the output voltage will
become slightly more negative, since Vo = A(V+ - V-). For this reason the '-' input is known as the
inverting input and the '+' input as the non-inverting input.
The output resistance is low, typically 100? or less, and can thus often be neglected. (Note, however,
that this low output resistance doesn't mean a typical op amp can drive large currents. Typically the
manufacturer has added extra circuitry which limits the output current to 25 mA. This is to prevent
possible destruction of the device by shorting the output. If you do not try to draw more than 25 mA from
the output this 'current limiting' circuitry has no effect.)
These operational amplifier IC's are seldom used without feedback because their gains are too large and
too variable (both with temperature and from one chip to the next) to be useful in practice. With
feedback, the op. amp. chip is the basic building block of many high performance circuits.
I1 R1
Ii V- -
Ri A
Vin
V+ +
Vo
We could, of course, solve the circuit completely, using Kirchhoff's Laws and the manufacturers values of
the gain, A, and internal impedance, Ri. (Indeed, you might like to try for yourself; it's not particularly
difficult.)
However, we will prefer to use approximations because this will be simpler, give us more insight, and allow
us to solve more readily a variety of different circuits which use the operational amplifier chip.
We will take A = 2 x 105 and Ri = 1 M? since these are very typical values. We will think of Rf = 100
k? , R1 = 10 k? , and Vin = 1 volt (DC or AC). (The above formula for the gain of the amplifier thus
R
predicts V0 = − f Vin = -10 volts.)
R1
We will now prove the above formula for the gain, Af.
Since Vo = A (V+ - V-) and V+ = 0 we have V- = -Vo/A. But A = 2 x 105, so that V- will normally be
very small compared with either Vo or Vi. In particular, in our example, we would have V- = -Vo/A =
10/(2 x 105) = 50 µV which certainly is small compared to Vin = 1 V and Vo = -10 V.
Thus V− ≈ 0 .
Vo
Thus the current through Rf = I f = −
Rf
Vin
and the current through R1 = I1 = .
R1
Now Ii , the current into the op amp chip, is very small indeed because
(V− − V+ ) V− 50 µV
Ii = = = = 50 pA . In comparison,
Ri Ri 1 MO
Vo −10 V
If =− = = 100 µ A and
R f 100 kO
Vin 1V
I1 = = = 100 µ A .
R1 10 kO
Thus, because Ii is negligible, we have I f = I 1 to a very good approximation. Hence (substituting the
expressions for If and I1 from above):
V V
− 0 = in which, when rearranged, gives
Rf R1
Vo R
Af = = − f for the voltage gain of the simple inverting op amp amplifier.
Vin R1
(1) V− ≈ 0 This is often expressed by saying the '-' (inverting) input terminal is a 'virtual ground'.
When V+ ? 0 this excellent approximation becomes V+ − V− ≈ 0
because V+ - V- = Vo/A and A is normally very large.
(2) I f ≈ I 1 Essentially all the current going through R1 (from the amplifier input) continues on through Rf .
(Only a tiny fraction of I1 goes into the chip itself.)
The Approximations:
Generally the approximations will be valid if, for the whole (inverting) amplifier, we have
Rf
«A
R1
ie the approximations, V- ˜ 0, and If = I1, will be valid provided our (inverting, feedback) amplifier is set
R
up to achieve a gain, f , which is much less than the gain, A, of the chip alone. (Obviously we can't
R1
expect more gain from our feedback amplifier than from the chip alone when the gain is negative as above.)
Ii V+
+
Vin Ri A
V- - V0
I1 R1 Rf
If
The first of our op amp principles above tells us that V+ - V- ˜ 0 (ie V+ - V- is very much less than Vin or
Vo) so that V- = V+ = Vin . Our second op amp principle gives If = I1 (since the current into the chip itself
is very tiny indeed).
Vo R1 + R f R
Af = = = 1+ f
Vin R1 R1
for the voltage gain of our non-inverting amplifier.
Input Resistance:
The current flowing into the non-inverting amplifier, Iin, is just the small current going into the chip itself.
This is given by
V − V− V AV
I in = + = o = f in
Ri ARi ARi
V R
where Af = o = 1 + f , the voltage gain of the non-inverting amplifier as above.
Vin R1
Vin A
Hence, we have Rin = = Ri for the input resistance of our non-inverting amplifier. This is normally
I in Af
rather high since Ri, the internal resistance of the chip itself, is at least 1 - 2 M? and usually we will have A
»Af.
Voltage Follower:
If we make Rf = 0 and R1 = 8 (by removing it) then we get the circuit below and, from above, we have
Iin V+
+
V
Af = o = 1 and Rin = Ri A .
Vin Ri A
Vin V- -
V0
This is called a voltage follower; it has a gain of one,
very high input impedance and very low output
impedance. It is very useful as a buffer between a high
Equivalent Circuit
V-
Ro
Ri
Ii A(V+ - V-) V0
V+
Vin
To find the output resistance we connect a test voltage (Vt) to the output and short the input to earth, so
the equivalent circuit becomes:
V-
a
Ro
Ri It
A(V+ - V-) +
Vt
V+ --
Adder:
Rf
If
I1 R
V1
I2 R V
- -
V2
I3 R
V3 +
V+ Vo
The virtual ground principle gives V- ˜ V+ = 0, so that the voltage across each of the three input resistors
(R) is V1, V2, and V3, and the voltage across the feedback resistor (Rf ) is -Vo.
Vo V1 V2 V3
Hence − = + +
Rf R R R
If Rf = R, then − Vo = V1 + V2 + V3 .
Two or more voltages can be added in this way without interfering with each other. This type of circuit is
used in digital to analogue converters but the input resistors would be R, 2R, 4R etc according the
significance of the bit providing the input voltage.
Integrator:
Rf
If C
I R1 V-
-
Vin
+ Vo
V+
If Rf is very large, we have I = If, and, since V- ˜ 0, the voltage across C is -Vo and the voltage across
R1 is Vin .
q
NowVo = − (where q is the charge on C)
C
1 1 v 1
R1C ∫
= − ∫ idt = − ∫ in dt ie Vo = − Vin dt ie the output voltage is the integral of the
C C R1
input voltage. E.g. a square wave in gives a saw-tooth (triangle) wave out.
In practice, a large resistance (say Rf ˜ 10 M? ) is usually needed across the capacitor for satisfactory DC
performance (see later).
Differentiator:
Rf
If
C
I V
- -
Vin +
V+ Vo
dq
Hence Vo = − R f I = − R f where q is the charge on C
dt
d q
= −R f (CVin ) since C =
dt Vin
dVin
and, since C is constant, Vo = − R f C . The output voltage is thus equal to a constant times the
dt
differential of the input voltage.
1 MΩ 1 MΩ
V-
- Vc2 +15 V
c c Output
amplifier
T1 T2 b V0
b in Gain = A' = -1000 out
V+ e e
+
-15 V
20µA(DC)
The trick is to join two transistors together at their emitters, letting the two 0.7 volts offset each other, and
then to put the (DC) signal between their bases. This is shown in the above schematic circuit diagram.
The manufacturer makes the two (npn) transistors (T1 and T2) as identical as possible; they are both grown
at the same time as part of the chip integrated circuit. In the circuit in the op amp they are fed by a 20 µA
constant current generator (made of other transistors) and when V+ = V- (˜ 0) we can expect the 20 µA
current to divide equally between the transistors, T1 and T2, so that the (emitter) current in each will be 10
µA and the base-emitter voltages (Vbe) will be equal (at about 0.7 V).
If the '+' and '-' inputs are connected together and their common voltage is varied by a few volts
about zero volts, there will be almost no change to the current through either T1 or T2 because (1) the
total current is constrained by the constant current generator to remain at 20 µA and (2) this current will
still split equally between the two identical transistors with their identical base voltages. Since the collector
currents do not change, the voltages across the 1 M? resistors do not change. This insensitivity of the
output voltage to the common voltage of the two inputs is called common-mode rejection.
However, if V+ is now made a little more positive (by a few millivolts) than V- , Vbe2 will be greater than
Vbe1 by this amount, and more current will flow in transistor T2 than in transistor T1. This, in turn will
increase the voltage across the 1 M? resistor attached to T2 and decrease the voltage across the 1 M?
attached to T1. A small voltage difference between the input terminals thus causes a large change
in the output voltage. The pair of transistors, T1 and T2, are forming a differential amplifier. This
particular arrangement with the emitters connected together and to a constant current source is sometimes
referred to as a 'long tailed pair'.
This input voltage, Vi =V+ - V- = Vbe2 - Vbe1, is a small signal voltage and thus the corresponding input
current, ib = ib2 = -ib1, can be calculated from the small signal equivalent circuits for the transistor inputs
(connected at the emitter) as shown. The input resistance of the op amp is thus 2hie where hie = hie1 = hie2
v
since the transistors are identical. Hence we have ib = i . (Note that it doesn't matter whether we use
2hie
Vi or v i for the input voltage because, at the input, the signal voltage is the total voltage; ie Vi = v i).
ib
b2
hie2
vi e1
e2
hie1
b1
The change in the collector current of T2 (or collector signal current) is given by ic2 = βib2 = βib.
Hence the voltage gain between the input (b2, b1) and the collector of T2 is
vc 2 βi x 1M Ω
=− b
vi ib 2 hie
For the op amp's input transistors β ˜ 200, and with a collector bias current of 10 µA, hie ˜ 0.5 M? , so
that the voltage gain of our (idealized) input stage is v c2/v i ˜ -200. This signal voltage, v c2, is then further
amplified by a factor of -1000 by the (DC coupled) transistors (not shown) in the rectangular box. This
gives a total gain of 200,000 which is the same as for many standard op amps such as the popular
LM741.
The actual circuit for an LM741 is discussed in Millman and Grabel (1987) and Sedra and Smith (1987).
The circuit shown above is somewhat simplified but does allow us to show the essential principles.
The effect of these input offset voltages on the simple inverting amplifier can be illustrated by considering
the circuit below. We will suppose that this particular chip has an input offset voltage of - 1.5 mV (ie it
needs V+ - V- = -1.5 mV to give zero volts out). With the switch in the position shown, it can readily be
seen that when Vin = 0, we will have Vo = 0 too because then V- = 0, and with the tiny 'battery' making V+
= -1.5 mV, we do indeed have V+ - V- = -1.5 mV, as required for Vo = 0.
If we now flick the switch to convert our circuit into a normal inverting amplifier, we see that we will
change the voltage at the '+' input by + 1.5 mV (from -1.5 to 0) in doing so. This will cause the output
voltage to change (from zero) by 1.5 mV x the gain of the non-inverting amplifier, since we are making the
1.5 mV change at the non-inverting ('+') input. Hence the output voltage will become
200 kΩ
Rf
Vin 1 kΩ _
R1 V0
+
1.5 mV _
+
200 k?
Vo = 1.5 mV x (1+ ) = 301.5 mV ˜ 0.3 V
1 k?
This is the output offset voltage of the simple inverting amplifier (with '+' grounded). Thus with this
typical chip in this simple inverting amplifier we will have to put up with the fact that when Vin = 0, Vo will
be about 300 mV, not zero as we would have liked.
Of course, there are elementary solutions for this. The first is that we simply remember that, for our
particular amplifier, 0.3 volts out means zero in and thus we can mentally correct for the problem (or use a
computer!!) but this is inconvenient (or extravagant). The second would involve using the little battery
above, or better obtaining the voltage needed from a resistor potential divider from the main power supply.
A more convenient version of this is found in certain op amp IC's (e.g. the popular LM301) which have an
extra pair of pins to which the user can attach a suitable potentiometer circuit and readily adjust the input
offset voltage to zero.
All of the above techniques will work and are used, but a different separate adjustment has to be made on
each op amp since they all have different input offset voltages. This is expensive for mass production.
By paying more money it is normally possible to choose an op amp which has a lower value of the
temperature coefficient for its input offset voltage (e.g. 1 µV/0C for the LM308A).
be supplied by whatever is connected to the '+' and '-' inputs. These bias currents must therefore flow
through the connections/components (resistors) which we connect to these inputs.
If we make no such suitable connections/components available for the input bias currents, then T1 and T2
will not turn on (preventing the not-quite-perfect 'constant current generator' from passing its 20 µA) and
the op amp chip will not work. Conversely, if the op amp is working (the only case we're interested in!)
the required input bias currents are flowing into the '+' and '-' inputs.
The effect of these inevitable bias currents on the DC performance shows up most markedly when we use
large resistors at an input. We will use the circuit below to illustrate the size of the effect. We will assume,
for the moment, that the manufacturer has succeeded in making the two input transistors identical so that
both have the same input bias current, Ib, as shown and there is no input offset voltage.
If virtually all of the required 50 nA flows through the 4 M? resistor, there will be a voltage drop across it
of 50 nA x 4 M? = 200 mV. This voltage drop will be maintained by Vo = +200 mV and V- ˜ 0
according to our virtual ground principle. Actually, since V+ = 0 (being grounded) we have V- = -Vo/A =
-200 mV/200,000 = -1 µV which is very small as expected. Further this means that the part of the bias
current in the 1 M? resistor is just (Vin - V-)/1 M? = 1 µV/1 M? = 1 pA which confirms our earlier
statement that most of the required 50 nA of bias current does indeed come from Vo and the 4 M?
resistor in this case where Vin = 0.
Thus the effect of the input bias currents in this amplifier is to give an unwanted 200 mV at the output
when the amplifier input (Vin ) is zero.
When Vo = 0 we must have V- = 0 too. Hence none of the input bias current will be supplied through the
4 M? resistor in this case. All of it must come through the 1 M? resistor driven by the voltage across it,
Vin - V- = Vin. Thus we will need Vin = 50 nA x 1 M? = 50 mV which might well be a lot bigger than
the signals (e.g. thermocouple voltages) which we are interested in.
Of course, one solution to this problem is to avoid the use of large resistors and indeed this is common
practice. However, the input resistance of the amplifier (which is just R1) may not then be high enough
V
for the application. To see that the amplifier input resistance, Rin is indeed R1, note that Rin = in where iin
iin
is the (DC) signal current flowing into the amplifier (ie through R1) when a (DC) signal voltage, Vin, is
V
applied. But the (DC) signal voltage across R1 is Vin - V- = Vin so that iin = in hence Rin = R1 .
R1
In the following circuit this extra resistor is shown as two resistors in parallel (equal to R1 and Rf) to clarify
the explanation but they would normally be combined into one resistor in practice. What we want is zero
volts in (Vin = 0) giving zero volts out (Vo = 0). Lets suppose we've achieved this and see if it is self-
consistent.
Each bias current will be able to flow from zero volts (Vin = 0, Vo = 0, and ground) either through a 1
M? or through a 4 M? resistor. Thus the voltage drop (between ground and input) will be the same in
both cases. Therefore V+ = V- , which is consistent with Vo = 0 ; so we have achieved what we want
(zero volts in gives zero out). To complete the picture, you might like to note 4 M? in parallel with 1 M?
is 0.8 M? so that V+ = V- = -0.8 M? x 50 nA = -40 mV.
4 MΩ
Rf
1 M Ω Ib _
Vin Vo
R1
Ib
+
1 MΩ
Rf
R1
4 MΩ
ie the circuit has adjusted the '+' and '-' inputs to be equal at 40 mV below zero, to allow the bias currents
to flow in through the resistors.
The above circuit thus corrects automatically for the input bias currents (to the extent they are equal) but
not for these so-called offset currents. The output of a given amplifier can, of course, be individually
adjusted to zero by finely adjusting the resistor between the '+' input and ground. Unfortunately individual
adjustment for mass production is expensive.
Some temperature control may thus be needed for the highest accuracy though first one should probably
pay a little more and buy a better chip - e.g. the LM308A which has typical input bias currents of only 0.8
nA and typical input offset currents of 0.05 nA with temperature coefficient of only 2 pA/0C.
The LM308A achieves these impressively low bias currents principally by using super β transistors (where
β ˜ 5000) at the input. These transistors are not available as discrete components because the high β is
achieved at the expense of very low breakdown voltages which would make them too sensitive to
destruction for normal use but, inside the IC, they are protected by special circuitry which ensures they
never have more than a volt or two across them.
Superposition of Offsets:
It is often convenient to work out the effects of the bias and offset currents separately from the effects of
the offset voltages. The superposition theorem then allows us to work out the result of all their effects
acting together just by adding the voltages from the individual effects. The superposition theorem
applies whenever the circuit is linear; ie where the (small) change in a current is directly proportional to
the (small) change in voltage which has produced it and vice-versa. (ie double the change in voltage gives
double the change in current.)
V+
R R R R
V0
A1 C A2 C A3 C A4 C A5
V-
Rf
The RC low pass filters have a gain of one at low frequencies (or DC) so that the overall gain is A1 x A2 x
A3 x A4 x A5 = A = 200,000 say. At low frequencies (and DC) the output, Vo, is in phase with the input,
V+, and 1800 out of phase with V- so that the feedback provided by Rf will be negative.
However, as the frequency is increased there will be increasing phase shifts (lags) in each of the RC filters
(shown as identical just for simplicity) and the phase of the output will thus increasingly lag behind the
phase of V+. At some high frequency the total additional phase shift inside the amplifier (due to the RC
1
filters) will be 1800. (For the particular 'op amp, above, this high frequency would be since this
2πRC
would give a phase shift of 450 in each RC filter.) At this frequency Vo will be in phase with V-, and the
feedback through Rf will be positive.
1
The gain of each filter at this frequency will be so that the overall gain between V- and Vo and back to
2
V- (called the loop gain) will be x 200,000 = 50,000. Hence, if a very small amount of a signal
1 4
2
at this frequency exists at the '-' input (which, down in the noise, it certainly will), such a signal will get
amplified by 50,000 and phase shifted by 1800 and applied to the '-' input again (in phase with the original
small amount of signal), whereupon it will get amplified by 50,000 and phase shifted by 1800 and applied
to the '-' input yet again (in phase with the original small amount of signal), whereupon ...
The result is that large oscillations will occur at this frequency where the phase shift within the amplifier is
1800. In fact, the amplifier would be so busy furiously oscillating at this frequency that it would not bother
with any other signals we presented to it. (The oscillations would be so large that it would spend most of
its time limiting against the power supply rails rather than amplifying - it would be driven right out of its
linear regime.) This problem makes the above circuit useless as an op amp; if an amplifier can oscillate at
some frequency, it surely will. There are two possible solutions. The first involves having few enough
transistors that there are no more than two such RC 'filters' so that an additional 1800 of shift will occur
only when the gain has fallen very low. This is a useful solution but strongly limits the number of gain stages
we can have (to one or two) and thus limits the overall gain.
The other solution is to deliberately increase one of the capacitors enormously. Now the maximum phase
shift which can occur from one capacitor is, of course 900, so that if the attenuation from this dominant
capacitor exceeds 200,000 at the frequency at which the other phase shifts total 900, there can be no
possibility of oscillation. This is because either the total gain (amplifier with all RC attenuations) is less than
unity or the total phase shift (from all RC's) is less than 1800 at all frequencies.
This is achieved in practice by the use of a capacitor, C, placed as illustrated below in our op amp
schematic diagram.
The voltage across the capacitor, C, will be Vi' - Vo and so the current through C will be jωC(V i' - Vo) =
jωC(V i' - A'V i') = jωC( 1- A')V i'. This is the same as the current which would flow if the input voltage
had been applied across a capacitor of magnitude C(1- A') ˜ 1000C (since A' = -1000). This increase in
capacitance is another example of the Miller Effect.
1 MΩ 1 MΩ
- C
V- c c Output
T2 V'i amplifier
T1 b Vo
b in Gain = A' = -1000 out
e e
+
V+
20 µA (DC)
The two terminal network to the left of the dashed line is converted to a Thevenin equivalent in the right-
hand panel. The voltage, Vc2, is the open circuit (AC) voltage out of the collector of T2, which we
calculated when we earlier discussed the operation of T1 and T2. (ie we would have Vc2 = Vi' if C were
removed.) The impedance of the AC Thevenin equivalent circuit between the collector of T2 and AC
ground is approximately 1 M? because hoe-1 ˜ 10 M? with Ic = 10 µA.
c2 C c2
v'i
1 MΩ 1 MΩ C(1-A')
βi b hoe
A' = -1000
vo
~ A' = -1000
vo
e2 vc 2
e1
βi b hoe
1 MΩ
c1
Typically the capacitor, C, is about 30 pF, hence the effective capacitance in the equivalent circuit is about
30,000 pF = 30 nF so that the upper cut-off frequency of the effective low pass filter [1 M? and C(1-A')
] is given by
1
f2 = ˜ 5 Hz .
2p x 1 M? x 30 nF
The frequency response (gain, attenuation) of the low pass filter is given by the usual equation
v i' 1
= so that the gain of the whole op amp
v c2 1 + f 2/f 22
vo 2x105
chip is given by = A= where f 2 = 5 Hz. This is often referred to as the 'open loop
vi f2
1+ 2
f2
gain' (meaning no feedback loop) and is plotted below on a log-log scale.
Gain
105
2
10
Af
10
1 Frequency (Hz)
2 3
1 10 10 10 104 105 10
6
The ('open loop') frequency response of the typical op amp given above may seem surprisingly poor at
first site. However, it does allow a large number of 'operations' (inverting and non-inverting stable
amplifiers, voltage followers, adders, integrators, differentiators etc) provided the frequency is not too high.
Some op amps like the LM741 (on which we've based our example) have the dominant frequency limiting
capacitor built in; they are virtually unconditionally stable under all likely feedback configurations (ie they
won't oscillate 'unexpectedly').
Other op amps like the LM301 (similar to but all-round slightly better than the LM741) have no such built-
in capacitor but two pins are supplied on the IC for the user to connect his own. This has the advantage
that an experienced user can use a smaller capacitance under certain feedback configurations (such as
when only a small part of the output voltage is fed back to the input) and have a higher frequency response.
The disadvantage is that the user must connect a suitable capacitor and if it is too small the circuit will
oscillate and not function as intended.
Faster op amps are available (for a little more money): e.g. the LM318 has a gain-bandwidth product of
15 MHz so that its 'open loop' gain (A) does not drop below one until the frequency is more than 15 MHz
as opposed to about 1 MHz for an LM741.
Op amps tend to be fairly good in this regard; e.g. with a power supply of ±15 V they will normally handle
an output 'swing' of about ±14 V without significant distortion. (If the supply were ±9 V the available
swing would be about ±8 V.)
The left panel in the following diagram is thus showing (about) the largest undistorted sine wave that can be
obtained at the output (with our ±15 V DC supply). If the input signal is increased further (say by 20 %)
the op amp will still correctly amplify those parts of the sine wave which require an output voltage of = ±14
V (according to the normal circuit gain) but 'flatten' the peaks to ±14 V as shown in the right-hand panel
below. This is called limiting. Sometimes it is useful but it creates distortion and is thus normally to be
avoided.
-14 -14
-15 -15
-15 -15
The dotted sine wave is what we expected but the triangle is what we get. Further, if we decrease the
amplitude of the input signal to say 0.1 V peak we find we get a perfect sine wave out of 1 V peak just as
we would have expected. Only for small signals does the amplifier work well at these only moderately high
frequencies. Something goes wrong for large signals at these frequencies. What can it be?
The answer lies in the (30 pF) capacitor, which is used in op amps to limit the frequency response and
ensure their stability under feedback. The maximum current which can be obtained out of the collector of
T2 to drive the following circuit (amplifier, A' , together with C ) is limited by the 20 µA constant current
generator.
The voltage across C is Vi' - Vo ˜ -Vo since Vi' = Vo/A' = -Vo / 1000. Thus the output voltage can change
at only the same rate as the voltage across C and this is, of course, controlled by the current flowing onto C
(since this current is the rate of change of charge on C). The current to make this change must come from
the collector of T2. Very little of the current from T2 will be needed for the amplifier, A' ; virtually all the
current available from the collector of T2 will be used to charge the (30 pF) capacitor, C.
Because Vi' = -Vo / 1000, and Vo is never more than 10 volts or so, Vi' (ie the voltage at the collector of
T2) never changes by more than a few millivolts. This means that the total voltage across the 1 M?
resistor changes only by small amounts and hence the current through this 1 M? is fairly constant at its
quiescent (rest) value of 10 µA. Since the constant current generator limits the total current to 20 µA, the
maximum current available for charging C is thus 10 µA (under which conditions the current through
T1 would be zero since the 20 µA is shared between T1 and T2).
q
Hence we have V0 = where q is the charge on the capacitor and Vo, as explained above, is the voltage
C
dV0 1 dq
across the capacitor. Differentiating with respect to time, we have = for the rate of change or
dt C dt
slew rate of the output voltage, Vo. The maximum slew rate occurs when the charging current has its
maximum value (10 µA) and is thus
dV0 1
= x 10 µ A = 0.33 V/µs = 0.33 x 106 V/s
dt max 30 pF
If the output is to be a sine wave, v = v p sin(ωt), then the maximum rate of change is given by
dv
= ωv p cos(ωt ) = ωv p when cos(ωt ) = 1 . Thus ωv p = 0.33 x 106 V/s if the output is to be undistorted
dt
for our op amp.
All op amps suffer from this slew rate limitation to a greater or lesser extent. Faster chips are readily
available: the LM318 has a maximum slew rate of 70 V/µs but it costs a little more than a LM741 and
does not have the excellent DC bias properties of an LM308A for example. The designer chooses an op
amp from manufacturers' data sheets to suit the application.
For a “real” OA, v o depends on v d = v + - v - and also on the common-mode signal v c = ½(v + + v - )
Ad
And the common-mode rejection ratio is: CMRR = ρ =
Ac
v
and so in terms of ρ: vo = Ad v d 1 + c (so want ρ as big as possible)
ρvd
[eg if ρ = 1000, v c = 1 mV, v d = 1 µV (so 1st term = 2nd term)
then a 1 µV difference between v + and v - gives the same output as a 1 mV (same parity) signal on v +/v -]
Op Amp Specifications
The following typical specifications were obtained from manufacturers' data sheets. (There are often wide
variations possible from the typical values; manufacturers usually try to indicate the extent of these in their data sheets
which should be consulted.)
LM741 LM301A LM308A LM318 OPA227 OPA277 LM6365 AD8009 OPA13 TS941
General High High Low 4 Micro
Purpose Precision Precision Distortio Audio Power
Low Noise n
Current
Feedback
Price /$ 0.2 2 7 6 3.7 3.2 16 8 5.2 2.4
Input Offset Voltage /mV 1 2 .3 4 .005 0.01 1 2 0.5 2
Input Offset Voltage tc /µVK -1 10 6 2 0.1 0.2 3 2 7
Input Bias Current /nA 80 70 1.5 150 2.5 0.5 2500 75000 0.005 0.001
Input Offset Current /nA 20 3 0.2 30 2.5 0.5 150 0.002 0.001
Input Offset Current tc /pAK-1 200 20 2 50 300
Input Impedance /? 2M 2 40 3 10 10 8 0.02 1.1x10 5 10 13 CMOS
Input Capacitance /pF 1.4 12 3 2.6 2
Output Impedance /? 75 0.01
Common Mode Rejection Ratio 90 90 110 100 140 102 52 100 85
/dB
Gain Bandwidth Product /MHz 1 3 30 8 1 725 1000 8 0.01
DC Voltage Gain /dB 106 104 110 106 160 140 80 120 100
Slew Rate /Vµs -1 0.5 10 70 2.3 0.8 300 5500 20 0.00045
THD /% 0.00005 0.002 0.00008
Noise /nV(√Hz)-1 3 1.9
Supply Current /mA 1.5 1.8 0.3 5 3.7 1 5 14 4 0.0012
tc = temperature coefficient
vo
"1" V+
0 vi - VR
"0" V-
We actually have a ‘digital’ output where V- ≡ “0” and V+ ≡ “1” – in fact a 1-bit ADC. For a real
comparator the ∆v o occurs with ∆v i ≈ 2mV, ie the input offset voltage, and it contributes an error of ~
1mV in the comparison of v i and VR (the offset may need to be balanced out).
0 vi - VR
vo
Vo "0" V-
Some OAs are specially designed for use as comparators – they are not
VR V1 intended for use with -ve feedback and so the frequency compensation
vi components can be omitted, giving a greater bandwidth; eg 710, 760, 111,
160
For these, ∆v i can be as small as 15µV, and switching speeds of 20ns.
-Vo A common use for a comparator is to convert a sine-wave into a ‘square-wave’ –
vo VR
vo
Vo vi
ie if we put VR = 0 then v o changes state every time v i goes through zero – a zero-
crossing detector.
V2 VR
vi Regenerative Comparator (Schmitt Trigger)
The gain of a comparator can be greatly increased by using +ve feedback:
-Vo
vi
vo vo
v1 R1
Vo
R2
V2 VR V1 VR
vi If the loop gain = -βAV = 1, then gain with feedback → ∞
R2
For the above circuit, β =
R1 + R2
-Vo
eg if R2 = 100Ω, R1 = 10kΩ, AV = -14000 then -βAV = -139
ie if the output increases by ∆v o then β∆v o is fed back to v 1 ⇒ v o will increase
further by βAV∆v o etc…
R2
if v i < v 1 then v o = Vo ∴ v1 = VR + (V − VR ) ≡ V1
R1 + R2 o
if v i is now increased, then v o remains constant at Vo, and v 1 = V1 = constant until v i = V1 – then the
output switches to –Vo and remains here as long as v i > V1, during which time we have
R2
v1 = VR − (V + V R ) ≡ V2
R1 + R2 o
If v i is now decreased, v o = -Vo until v i = V2, then the output switches to +Vo.
0
V2
Logarithmic Amplifier
By replacing the feedback resistor in a normal inverting amplifier with a diode, D, we will have the output
voltage proportional to the logarithm of the input voltage; ie we want vo = log vi
D
id
vd
R
_
vi vo
+
Improvements:
The parameter η depends on diode current, but it can be eliminated by using a ground-based transistor
instead (transistor has a wider range than diode (see lab).
ic
Q
R
vi
vo
This circuit can be further augmented with a second matched transistor which eliminates the saturation
current Is from the equation for v 0. (Is doubles for every 10o rise in temperature.)
ic1 i c2 VR
R2
Q1 Q2
R1
RE
vs _ +
v vo
_
+
R3 R4
v = vBE2 − v BE1
( ) (
= VT ln i c2 − ln I s − VT ln i c1 − ln I s )
ic1
= −VT ln
i c2
VR v
since i b2 << ic2 ⇒ i c2 = and ic1 = s
R2 R1 R3 + R4 vs R2
v o = −VT ln
v (R3 + R4 ) R3 R1VR
and also vo =
R3
This can be satisfied over a dynamic range of 4-5 decades eg 0.2mV to 20V
Exponential Amplifier
VR ic1 i c2 R1
R2
Q1 Q2
vs
v
R4
_ RE _
vo
R3 + +
VR vo R + R4 vo R2
ic1 = (constant) i c2 =
R2 R1 hence v s = −VT 3 ln
R3 R1VR
and as before −v s R3
R3 RV
R3 + R4
ic1 ie v o = 1 R e VT
v = −VT ln and v = v s R2
i c2 R3 + R4
Analog Multiplication
- combine a log and exp amplifiers:
vs2 log R
R
Square Root
v2 X
i2 k
R2
R1
vs _
i1
vo
+
vs
i1 =
R1
also i1 = −i 2 (opamp)
v
i2 = 2 kR2
R2 thus v o = v
R1 s
vo2
v2 =
k
R2 1
and if = then vo = vs
R1 k
ic C
- R3 R
v2 = VR vo
A1 -
Vz vo’(t)
v1 + A2
R1
Vz Vs +
R2
ic = constant current to charge C. The Zener diodes limit the output v 0 to ± (VZ + VD) where VD is the
forward voltage drop of the diodes. The waveform at the output of the integrator has the form:
v0’
Vmax
R + R2
VR 1
R2
Vmin
T1 T
T2 t
If we assume that v0 = −(VZ + VD ) = −V0 then the input to A2 is –ve and so v 0’(t) is an increasing ramp
voltage. Thus v 1 (input to A1) is
VR v 'R
v1 = − 0 2 + 0 1
R1 + R2 R1 + R2
When v 1 > VR, A1 changes state, v 0 = +V0 and v 0’(t) is a decreasing ramp voltage. Vmax occurs when v 1
= VR, ie
R + R2 R
v0 ' = Vmax = VR 1 + V0 2
R1 R1
R + R2 R
similarly, v0 ' = Vmin = VR 1 − V0 2
R1 R1
R R + R2
Thus the peak-to-peak swing is Vmax − Vmin = 2V0 2 and the average value = v0 = VR 1
R1 R1
dv dv '
If VS = 0 then ic = C c = −C 0 (v c = -v 0’ = capacitor voltage)
dt dt
V dv ' V
Now, for v 0 = -V0 ic = − 0 (VS = 0 ⇒ virtual earth) so 0 = 0 (positive sweep speed) and
R dt RC
Vmax − Vmin 2 R2 RC
T1 = =
V0 R1
RC
T 1
Since for a negative sweep v 0 = +V0, then T2 is the same. ie T2 = T1 = = or
2 2f
R1
f =
4 R2 RC
NOTE:
§ f is independent of V0 (ie VZ and VD)
§ f max is limited by the slew rate of A2 (or the maximum output current)
§ f min depends on the bias currents of the op-amps.
VCO
R1 VS
2
If VS ≠ 0 then f is given by: f = 1 − V thus VS is related to f ⇒ VCO.
2
4R RC 0
But f is a non-linear function of VS.
Linear VCO
+vm
ic C
- Q1
R3 vo vx
A1 -
Vz R vo ’(t)
+ Q2 A2
R1
Vz -vm +
R2
Let β = and note that
R1 + R2
§ sweep speed is controlled by v m
§ waveform amplitude is fixed by the comparator parameters
Ø Q1 is OFF and Q2 is ON
Ø v x = input to integrator = - v m
Ø v 0’(t) increases linearly with sweep speed = +
vm
RC
Vs −1 [ ]
R2
until v0 ' = βV0 = V0 ⇒ comparator changes state to v 0 = -V0 and then
R1 + R2
Ø Q1 is ON and Q2 is OFF
Ø vx = + vm
Ø v 0’(t) decreases linearly with sweep speed = −
vm
RC
[ ]
Vs −1
= βV0 − (− βV0 )
vm T
RC 2 R1 + R2 vm
Thus ie f = ie f ∝ v m
R2 4 RCR2 V0
=2 V0
R1 + R2
In practice the linearity extends over > 3 decades (eg from 2 mV to > 2 V)
GND 1 8 V+
Trigger 2 7 Discharge
Output 3 6 Threshold
Reset 4 555 5 Voltage Control
The 555 Timer is a highly versatile chip specifically designed for precision timing applications. It
can also be used in monostable, astable and Schmitt trigger applications. It can readily produce
accurate timing periods variable from microseconds to several hundred seconds via a single RC
network. Timing periods are virtually independent of supply voltage, have a temperature
coefficient of only 0.005%/oC, can be started with a 'Trigger' signal and aborted with a 'Reset'
signal.
Used as an astable, the frequency and duty cycle of the waveform are accurately controlled with
two external resistors and one capacitor. As a monostable, it produces output pulses with typical
rise and fall times of ns.
555 as a monostable
V cc 8 Reset 4
555
5k Output 3
Voltage Control 5
R1
5k
+ R
c1
Trigger 2 - S
5k
Threshold 6 +
c2 Discharge 7
-
555 as an oscillator
V cc 8 Reset 4
555
5k Output 3
Voltage Control 5
R1
5k
+ R
c1
Trigger 2 - S
5k
Threshold 6 +
c2 Discharge 7
-
Ac cos ωct
ωc - ωs ωc ωc + ωs
This is often called DSB suppressed carrier (DSBSC) modulation. The bandwidth of a DSB signal is
twice that of the signal alone. For Single Side Band (SSB) we simply remove one of the two side bands
(eg ωc - ωs) by filtering, which leaves a single frequency (or band)
Note: NO power is transmitted for SSB unless the signal frequency is present – very efficient.
AM
For AM the carrier is added back into the modulated carrier:
Amplitude
As cos ωs t Multiplier Adder Modulated Signal
Ac cos ωct
This waveform consists of three sinusoidal components – the carrier ωc, and the upper and lower side
bands ωc ± ωs. The spectrum is now
ωc - ωs ωc ωc + ωs
Demodulation
The simplest AM receiver consists of a diode detector followed by a LPF:
RF Amp Audio
R C
A better receiver uses synchronous multiplication of the signal and carrier (ωc in frequency & phase)
Signal
DSB or AM Multiplier LPF
Ac2 As cos ωst
Reference
Ac cos ωct
Frequency Modulation
In this case we modulate the frequency (ω) or phase of the carrier wave.
ie vPM = A cos[ω ct + k p vs ( t)]
or vFM = A cos[ω c + k f v s (t )]t
where
ωc = carrier frequency (88 – 108 MHz for FM broadcasting)
k f, k p = FM and PM constants
ωc
ie there are numerous side bands spaced at multiples of ωs.
FM is easily generated with a VCO – the input voltage in this case is just v s(t). Can use a phase-locked
loop circuit to demodulate FM.
References/Web Sites1
Millman, J. and A. Grabel Microelectronics, McGraw-Hill, 1987.
Analog Devices http://www.analog.com/
Philips Semiconductors http://www.semiconductors.philips.com/
Texas Instruments http://www.ti.com/