Beruflich Dokumente
Kultur Dokumente
---
; FILE: HVPSFB_VMC-ISR.ASM
;
; Description: Voltage mode control of a phase shifted full bridge
(ISR)
;
; Version: 1.0
;
; Target: TMS320F2802x(PiccoloA)
;
; Type: Device dependent
;
;-------------------------------------------------------------------------------
---
; Copyright Texas Instruments © 2004-2011
;-------------------------------------------------------------------------------
---
; Revision History:
;-------------------------------------------------------------------------------
---
; Date | Description
;-------------------------------------------------------------------------------
---
; 04 May 2011 - Voltage Mode Controlled Phase Shifted Full bridge (HN)
;-------------------------------------------------------------------------------
---
.include "ADCDRV_4ch.asm"
.include "PWMDRV_PSFB_VMC_SR.asm"
.include "CNTL_2P2Z.asm"
;===============================================================
;//===============================================================
;// Interrupt Framework options
;//---------------------------------------------------------------
EPWMn_DPL_ISR .set 1 ; for EPWM triggered ISR
ADC_DPL_ISR .set 0 ; for ADC triggered ISR
;*******************************************************************************
***
; Declare Public functions for External Reference
;*******************************************************************************
***
; label to DP initialisation function
.def _DPL_Init
; label to DP ISR Run function
.def _DPL_ISR
;*******************************************************************************
***
; Variable declaration
;*******************************************************************************
***
tsPtr .usect "Net_terminals",2
.text
;---------------------------------------------------------
; ISR Initialisation
;---------------------------------------------------------
_DPL_Init:
.if(INCR_BUILD = 1)
ADCDRV_4CH_INIT 1,2,3,4
PWMDRV_PSFB_VMC_SR_INIT 1,2,4 ; ePWMs 1,2 and
4
.endif ; INCR_BUILD = 1
;---------------------------------------------------------
;---------------------------------------------------------
.if(INCR_BUILD = 2)
ADCDRV_4CH_INIT 1,2,3,4
PWMDRV_PSFB_VMC_SR_INIT 1,2,4 ; ePWMs 1,2 and
4
CNTL_2P2Z_INIT 1
; Voltage Controller
.endif ; INCR_BUILD = 2
;---------------------------------------------------------
LRETR
.sect "ramfuncs"
;---------------------------------------------------------
; ISR Run
;---------------------------------------------------------
_DPL_ISR: ;CONTEXT_SAVE
; full context save - push any unprotected registers onto stack
PUSH AR1H:AR0H
PUSH XAR2
PUSH XAR3
PUSH XAR4
PUSH XAR5
PUSH XAR6
PUSH XAR7
PUSH XT
SPM 0 ; set C28 mode
CLRC AMODE
CLRC PAGE0,OVM
; CLRC INTM ; clear
interrupt mask - comment if ISR non-nestable
;-------------------------------------------------------------------------------
----------
.endif ; INCR_BUILD = 1
;---------------------------------------------------------
;---------------------------------------------------------
.if(INCR_BUILD = 2)
.ref _No_2p2z
MOVW DP, #(_No_2p2z)
MOV AL, @(_No_2p2z)
CMPB AL,#0x1
B SKIP_2P2Z, EQ ; If equal -
coefficients are being changed in the slower loop --> don't execute 2P2Z
CNTL_2P2Z 1 ;
Voltage Controller
SKIP_2P2Z:
PWMDRV_PSFB_VMC_SR 1,2,4 ; Run the PWM driver
.endif ; INCR_BUILD = 2
;---------------------------------------------------------
;===================================
EXIT_ISR:
ZAPA
;-------------------------------------------------------------------------------
----------
; Interrupt management before exit
.if(EPWMn_DPL_ISR=1)
.if(EPWM1)
MOVW DP,#_EPwm1Regs.ETCLR
MOV @_EPwm1Regs.ETCLR,#0x01 ; Clear EPWM1
Int flag
.endif ; EPWM1
.if(EPWM2)
MOVW DP,#_EPwm2Regs.ETCLR
MOV @_EPwm2Regs.ETCLR,#0x01 ; Clear EPWM2
Int flag
.endif ; EPWM2
.if(EPWM3)
MOVW DP,#_EPwm3Regs.ETCLR
MOV @_EPwm3Regs.ETCLR,#0x01 ; Clear EPWM3
Int flag
.endif ; EPWM3
.if(EPWM4)
MOVW DP,#_EPwm4Regs.ETCLR
MOV @_EPwm4Regs.ETCLR,#0x01 ; Clear EPWM4
Int flag
.endif ; EPWM4
.if(EPWM5)
MOVW DP,#_EPwm5Regs.ETCLR
MOV @_EPwm5Regs.ETCLR,#0x01 ; Clear EPWM5
Int flag
.endif ; EPWM5
.if(EPWM6)
MOVW DP,#_EPwm6Regs.ETCLR
MOV @_EPwm6Regs.ETCLR,#0x01 ; Clear EPWM6
Int flag
.endif ; EPWM6
.if(ADC_DPL_ISR=1)
; Case where ISR is triggered by ADC
MOVW DP,#ADCST>>6
MOV @ADCST,#0x010 ; Clear
INT SEQ1 Int flag
;-------------------------------------------------------------------------------
----------
; full context restore
; SETC INTM
; set INTM to protect context restore
POP XT
POP XAR7
POP XAR6
POP XAR5
POP XAR4
POP XAR3
POP XAR2
POP AR1H:AR0H
IRET
; return from interrupt
.end