Recent Works Abolfazl Elkholy Vasudeva Zhijianpan,C Seunghchan Pratap,Vijay Amir Arunkumar Maizan Vaithianatha

/ Parameters Zokaci (2018) Reddy 2017 huan qin lee ,Jinseok a 2015 2014 2014 n
(2019) 2017 Park 2016
2019
Technology 130nm 40nm 0.18µm 65nm 65nm 65nm 65nm 180nm 0.13µm 90nm
CMOS CMOS CMOS
1 Cascode, Differential Inductorless 2 stage Differential Differntial Differential Diff CG+Diff+C
CG-CS, 2 power phase differential differential PN-CG CG LNA SFB- D
Topology Differential differential splitter LNA cascade CG+Current
+transforme reuse
r
Noise 2,3 - Differntial - diff
Cancelling Positive F/B differential Sub-thershold - CG LNA -
Technique IDCS
BW (GHz) 3.6-6 26-33 0.4 0.1 – 4.3 30-34 2-7 0.8-5GHz 0.87 2.4 3.8- 4.85
Power Gain 13.5 12.5 19 21.2 20.8 18.3 13 19.5 17.4-27.4 15
(S21 in dB)
Noise Figure 3.5 3.3 - 4.3 4.1 2.8 – 4 3.7 2.25 3.3 3.8 - <1
(NF in dB)
S11 in dB < -10 < -10 < -16 - <-10 <-10 <-10 <-10 < -10 <-10
Output - - - - <-10
Matching (S22 < -12 < -25 < -14 - -
in dB)
S12 in dB < -40 < -39 - - - - - - - <-40

Linearity (IIP3 1.5 -21.6 -15 -7.7 -20.4 -3.76 13 -16.3 - -3

in dBm)

(Pdc in mW) 16 31.4 0.28 2 16.5 5.17 16.5 0.48 9 4

FoM 0.87 735MHz 0.67 24.65 - - - 14mW -