Minimizing Capacitor Bank Outage

Time Through Fault Location

Joseph Schaefer
Florida Power & Light Company

Satish Samineni, Casper Labuschagne, Steven Chase, and Dereje Jada Hawaz
Schweitzer Engineering Laboratories, Inc.

© 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained
for all other uses, in any current or future media, including reprinting/republishing this material
for advertising or promotional purposes, creating new collective works, for resale or
redistribution to servers or lists, or reuse of any copyrighted component of this work in other
works.

This paper was presented at the 67th Annual Conference for Protective Relay Engineers and can
be accessed at: http://dx.doi.org/10.1109/CPRE.2014.6798995.

For the complete history of this paper, refer to the next page.
 Presented at the
Southern African Power System Protection Conference
Johannesburg, South Africa
November 12–14, 2014

Previously presented at the

68th Annual Georgia Tech Protective Relaying Conference, April 2014,
and 67th Annual Conference for Protective Relay Engineers, March 2014

Previous revised edition released April 2014

Originally presented at the

40th Annual Western Protective Relay Conference, October 2013
 1

Minimizing Capacitor Bank Outage Time

Through Fault Location
Joseph Schaefer, Florida Power & Light Company
Satish Samineni, Casper Labuschagne, Steven Chase, and Dereje Jada Hawaz,
Schweitzer Engineering Laboratories, Inc.

Abstract—Capacitor banks are critical substation assets that

play a vital role in providing reactive power support, thereby
increasing the power system capacity. High-voltage capacitor
banks are constructed as single-wye, double-wye, or
H-bridge configurations and can be grounded or ungrounded.
Capacitor banks consist of a number of single-phase capacitor
units connected in series and parallel to achieve the desired
voltage and VAR rating. The capacitor units can be externally or
internally fused, fuseless, or unfused. When the unbalance
resulting from unit or element failures becomes too high, the
capacitor bank needs to be taken out of service by the protection
system before the resulting unit overvoltages lead to a cascading
failure and the faulty units must be replaced.
If the bank is externally fused, then the unit with the blown
fuse is usually the faulty unit, making identification obvious. If
the bank is internally fused, fuseless, or unfused, then fault
location is difficult because usually there is no visual indication of
the problem. The result of a prolonged inspection is an extended
outage of the capacitor bank. Although it might not be possible to
identify the faulty unit in an internally fused, fuseless, or unfused
bank, identifying the faulted phase and section narrows the
search area and helps minimize the outage time.
This paper analyzes various capacitor bank configurations
and proposes an economical method to help locate the faulty
elements or units for each configuration. The paper also provides
results that verify the proposed methods using a Real Time
Digital Simulator (RTDS®).
I. INTRODUCTION
Shunt capacitor banks are essential in electrical power
systems, playing a crucial part in providing reactive power
support [1]. They provide voltage support and an improved
system voltage profile at key points within the grid. In
addition, they provide increased system capacity through the
reduction of losses, and they provide a significant reduction
and postponement of investments in transmission and
generation capacity by relieving reactive power requirements.
Because capacitor banks are relatively inexpensive, are quick
to install, and can be deployed nearly anywhere on the grid,
they are an ideal choice for reactive power support when
compared with transmission or generation system upgrades.
A shunt capacitor bank, as shown in Fig. 1, consists of
single-phase capacitor units connected in series and parallel
combinations to achieve the desired voltage and VAR rating.
Similarly, each capacitor unit consists of individual capacitor
elements connected in series and parallel combinations. The
capacitor units can be externally fused, internally fused, or
fuseless.
Units in
Series
Units in Parallel Capacitor Element
Fig. 1. Capacitor Bank Configuration
Although modern capacitor units are more reliable than
earlier units, failures within the bank still occur, resulting in
an unbalance condition within the in-service bank. If the
unbalance is severe, a protective relay operates to take the
bank out of service. In many cases, the unbalance only
activates an alarm and does not trip the bank. If the bank
remains in service because the unbalance condition is not
severe enough to operate the relay protection, the remaining
capacitor units are subjected to increased voltages, which can
lead to cascading failures of the remaining units. When too
many capacitor banks within an area are unavailable for
service due to failures, the desired system benefits are not
achieved. It is prudent to repair capacitor banks in a timely
manner so that the proper system voltage profile can be
maintained.
Typical steps to replace faulty units and put the bank back
in service are as follows:
 Take the bank out of service.
 Isolate and ground the bank.
 Disconnect each unit.
 Identify the faulty unit by measuring the capacitance
across each unit in the bank.
 Obtain the capacitances of the spare unit.
 Enter the capacitances in a spreadsheet.
 Balance the capacitances in the spreadsheet.
 Replace the faulty unit.
 Move other units within the bank (if required).
 Energize the bank.

The identification of the faulted unit is obvious in an
externally fused bank (i.e., a blown fuse), but there is usually
no physical evidence that a unit has failed for internally fused
or fuseless banks. Modern banks are typically internally fused
or fuseless, and therefore, the majority of the outage time is
spent locating the faulty units.
Field operations personnel are faced with many challenges
in a modern business environment. Cost-effective operation
and maintenance programs are paramount to control
departmental costs. A capacitor bank that has an unbalance
alarm due to a unit or element failure may simply be left
unattended for an extended period of time because the bank is
still available for service. Whether a capacitor bank outage is
planned in advance for repair or occurs suddenly due to an
unbalance lockout event, the majority of the outage time is
spent locating the faulty unit. The result is an extended outage
of the capacitor bank while an electrical crew works to
identify the failed capacitor units.
Narrowing the search by identifying the phase and section
of the capacitor bank with the faulty unit or element
significantly reduces operating and maintenance costs for
utilities, allowing the bank to be returned to service quickly
and thereby improving system reliability.
II. FAULT LOCATION TECHNIQUE
Unbalance protection methods provide primary protection
against unit failures in capacitor banks. These methods detect
unbalances within the bank due to element or unit failures.
Unbalance protection asserts an alarm signal if the unbalance
is small but trips the bank if the unbalance is high enough to
cause a cascading failure.
There are four commonly used unbalance protection
methods, as follows [2] [3]:
 Phase voltage unbalance.
 Neutral voltage unbalance.
 Phase current unbalance.
 Neutral current unbalance.
The choice of protection method depends on various
factors such as bank configuration, availability of instrument
transformers, sensitivity, and security. The unbalance
protection methods use one or more of the measured quantities
such as bus voltages, bank currents, neutral voltage, and
neutral current to calculate the unbalance quantity.
The unbalance quantity is a phasor, and its magnitude
measures the unbalance within the bank. The magnitude of the
unbalance quantity directly indicates the number of failed
elements or units.
This paper proposes a fault location technique that uses the
phase angle of the unbalance quantity and compares it with a
reference quantity phase angle [4] [5]. The reference quantity
can be a phase voltage (bus), phase current (bank),
2
positive-sequence bus voltage, positive-sequence bank
current, and so on. If the bank is protected with the phase
voltage or phase current unbalance protection method, then
use phase voltage (bus) or phase current (bank) as the
reference quantity. If the bank is protected with the neutral
voltage or neutral current unbalance protection method, then
use positive-sequence bus voltage or positive-sequence bank
current as the reference quantity. The proposed fault location
technique helps in identifying the phase and section of the
bank that has the faulty element or unit. The fault location
information can be included as part of the event report and can
be used by the utility crew to perform planned maintenance.
For sensitivity, the fault location technique is supervised
with an alarm or trip condition from unbalance protection. For
security, a ±15-degree blinder is applied to exclude
unbalances not resulting from capacitor failures, such as
instrument transformer errors. The fault location technique is
embedded as part of the unbalance protection, and hence, it is
an economical solution.
The fault location technique is affected by the fusing
method of the bank (i.e., whether it is fused or fuseless).
Fig. 2, Fig. 3, and Fig. 4 illustrate an example that shows the
impedance and voltage and current distribution of a fused or
fuseless bank. Fig. 2, Fig. 3, and Fig. 4 show four series
groups of ten capacitors in parallel to demonstrate the three
stages of a fuse operation. A capacitor symbol represents
either one row of an internally fused unit or a complete unit in
an externally fused bank.
Fig. 2 shows the normal state. Fig. 3 shows the circuit just
after a short circuit occurs but before the fuse operates. Fig. 4
shows the final state of an externally or internally fused bank
after the fuse operation. Impedance increases after the fuse
operation. Fig. 3 represents the final state of a fuseless bank.
Impedance decreases after a short circuit. This impedance
variation affects the current and voltage distribution. Because
the fault location technique is based on phase angle
comparison, the current and voltage distribution affects the
fault location.
V  12 –90°
Element
or Unit
1 2 10
XC  – j10
VH XP  – j1
XP  – j1
V 12 –90°
I  3A
XT 4 –90°
XP  – j1
VH  3 • 1–90°  3–90° V
XT  – j4
Fig. 2. Healthy System
 3

V  12 –90° G1 T1
L1

VF
XC  0
Load

VH XP  – j1

V 12 –90°
XP  – j1 I  4A
XT 3 –90° Capacitor
Bank
VH  4 • 1–90°  4–90° V
XP  – j1
Fig. 5. Power System Modeled in RTDS
XT  – j3

Fig. 3. System With Short Circuit III. BANKS USING PHASE VOLTAGE UNBALANCE PROTECTION
V  12 –90° A. Single-Wye Bank With Tapped Potential Transformer:
Protection Theory and Fault Location Principle
VF
Phase voltage unbalance or phase voltage differential
protection is applied to a wye-connected capacitor bank with a
XC  – j1.11
potential transformer (PT) at the tap point, as shown in Fig. 6.
The tap point can be at the midpoint of the bank or at a
VH XP  – j1 V 12–90° low-voltage capacitor just above the wye connection. The
I   2.92 A
XT 4.11–90°
faulty element or unit can be in any of six locations in this
XP  – j1 bank—in any of the three phases and either above the tap
VH  2.92 • 1–90°  2.92–90° V
point (top section) or below the tap point (bottom section) of
VF  2.92 • 1.11–90°  3.24–90° V
XP  – j1 each phase.
Bus
XT  – j4.11 A
B
Fig. 4. System With Blown Fuse C

The fault location technique is not affected by the inherent Tap

unbalance as long as the unbalance protection compensates for VBUSp
it. Unbalance protective relays are often provided with a
manual command to reset the inherent unbalance. The VTAPp

inherent unbalance can be from the manufacturing

intolerances in the bank, temperature changes, and so on. A
bank with element or unit failures that cause acceptable
overvoltage can be left in operation for some time awaiting
scheduled or emergency maintenance. This can cause an
unbalance alarm that needs to be reset by the protective relay
so that subsequent failures are detected with maximum
sensitivity. The fault location information needs to be saved
before resetting the unbalance alarm. When a second failure
happens, which results in an alarm or trip, the fault location
technique is accurate for the second failure despite the
preexisting failure. When the bank is taken out of service,
personnel must search for two failures using the original and
subsequent fault location information.
The following sections explain this fault location technique
that can be used for various capacitor bank configurations,
depending on the type of unbalance protection method used.
The power system shown in Fig. 5 was modeled using a Real
Time Digital Simulator (RTDS®) and used to validate the fault
location technique for various capacitor bank configurations.
Fig. 6. Banks Using Tapped PT-Based Phase Voltage Unbalance Protection
The protection uses tapped voltage and bus voltage
measurements to calculate the unbalance quantity as shown in
(1).
DVp  VBUSp  Kp • VTAPp (1)
where:
VBUSp is the Phase p bus voltage phasor.
VTAPp is the Phase p tap voltage phasor.
Kp is the Phase p phasor setting based on relay
measurements that reset DVp.
p is A, B, or C.
The unbalance quantity is per phase and so is the unbalance
protection. The phase (A, B, or C) of the bank with the faulty
unit or element is the phase for which the protection has
operated (based on unbalance quantity magnitude).
Comparing the phase angle of the unbalance quantity with the
phase angle of the bus voltage allows the fault location to be
further narrowed down by identifying the section (top or
bottom from the tapped point) of the phase.
 4

Fig. 7 shows the fault location technique for banks using 88 kV Bus
Single Capacitor Unit
voltage inputs from the tap point to provide per-phase voltage
unbalance protection. The phase angle of the unbalance 12

quantity is referenced to the phase angle of the respective bus

voltage, and the referenced phase unbalance angle, DVpA, is
then checked to determine if it is in Sector 1 (0° ± 15°) or 4 Top

Sector 2 (180° ± 15°).

Tap
Switch at Position a if Bank Is Fuseless 3
ALARM Switch at Position b if Bank Is Fused
TRIP
a 4 Bottom
2
Enable b
1 Phase p
Top Section
–15°  Φ  15° 1

DVpA 165°  Φ  –165° 2 a

1
b 4
2 Phase p
Bottom Section
Fig. 7. Fault Location for Banks Using Phase Voltage Unbalance
For a fused bank, if DVpA is in Sector 1, then the faulty
unit or element is in Phase p and the top section from the tap
point. If DVpA is in Sector 2, then the faulty unit or element is
in Phase p and the bottom section from the tap point. If the
bank is fuseless, then the section identification is opposite
(i.e., if DVpA is in Sector 1, then the fault is in the bottom
section, and if DVpA is in Sector 2, then the fault is in the top
section).
This economical fault location technique reduces the
investigation time by 83.3 percent (one out of six possible
fault locations) for a wye-connected grounded or ungrounded
bank that uses phase voltage unbalance protection. Maximum
gains in the search time are possible if the tap is at the
midpoint. The worst-case reduction approaches 66 percent
(only a faulted phase) if the tap is very close to the neutral
Fig. 8. Capacitor Bank Model for Phase Voltage Unbalance Fault Location
Fig. 9 shows the bus voltages and tap point voltages
measured by the bus and tap point PTs. The secondary
voltages are fed to a relay model that provides the unbalance
protection. Fig. 9 also shows the Phase A voltage unbalance
magnitude and the Phase A voltage unbalance angle
referenced to the Phase A bus voltage from the relay model.
An internal fault is simulated in the healthy bank by shorting
four elements in a unit in Phase A and the top section of the
bank. The fault is cleared by blowing appropriate fuses for the
shorted elements, resulting in an unbalance voltage magnitude
of 0.3 V secondary and an unbalance angle close to 0 degrees.
The relay is set to assert an alarm above 0.2 V after a time
delay. Fig. 9 shows that the relay correctly asserts ALARM A,
PHASE A, and TOP A, indicating the faulty element or unit is
in Phase A and the top section.
VBUSA VBUSB VBUSC
100
V sec

point of the bank. 50

0
–50
B. Single-Wye Bank With Tapped PT: Simulation Capture –100
100 VTAPA VTAPB VTAPC
Using the RTDS
V sec

50
0
–50
An 88 kV, 27.43 MVAR capacitor bank was modeled in –100
0.91711 Unbalance Voltage Magnitude (Phase A)
the RTDS. The bank is a single-wye grounded configuration
V sec

0.61156
and has a tap point in each phase for phase unbalance 0.30601
0.00046
protection. The bank is internally fused and consists of 300 Unbalance Voltage Angle (Phase A)
200
96 capacitor units. Fig. 8 shows the per-phase representation
deg

100
0
of the bank. Each phase of the bank has eight parallel grouped –100
units connected in series (i.e., 32 units per phase). Each ALARM A
PHASE A
parallel group consists of four units. There are four parallel TOP A
BOTTOM A
groups in the top section and four in the bottom section, so the 0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
Time (seconds)
tap is at the midpoint of the bank. Each capacitor unit consists
of three parallel grouped elements, and each parallel group Fig. 9. Fault in Phase A and Top Section of a Bank Using Phase Voltage
consists of 12 elements. The capacitor unit is rated at 6.7 kV Unbalance Protection
and 318 kVAR.
 5

An internal fault is simulated in the healthy bank by The unbalance protection uses the neutral voltage and bus
shorting four elements and blowing the respective fuses in a voltage measurements to calculate the unbalance quantity as
unit in Phase A and the bottom section of the bank. The fault shown in (2).
results in an unbalance voltage magnitude of 0.3 V secondary DVG  VBUSA  VBUSB  VBUSC  3• VN 
(2)
and an angle close to 180 degrees. Fig. 10 shows the relay
correctly asserts ALARM A, PHASE A, and BOTTOM A,
 K1•  VBUSB  VN   K2 •  VBUSC  VN 
indicating the faulty element or unit is in Phase A and the where:
bottom section. VBUSp is the Phase p bus voltage phasor.
VBUSA VBUSB VBUSC VN is the neutral voltage phasor.
100
V sec

50
0
K1 and K2 are the scale factor settings based on the relay
–50 measurements that reset DVG.
–100
100 VTAPA VTAPB VTAPC
The unbalance quantity is not per phase, so the phase that
V sec

50
0
–50 has the faulty unit or element cannot be determined based on
–100
0.90644 Unbalance Voltage Magnitude (Phase A) the unbalance protection operation. However, by comparing
V sec

0.60445 the phase angle of the unbalance quantity with the phase angle
0.30246
0.00046 of the positive-sequence bus voltage, we can identify the
300 Unbalance Voltage Angle (Phase A)
200 phase that has the faulty unit or element.
deg

100
0 Fig. 12 shows the fault location technique for ungrounded
–100
ALARM A
banks using neutral voltage unbalance protection. The phase
PHASE A angle of the unbalance quantity is referenced to the phase
TOP A
BOTTOM A angle of the positive-sequence bus voltage. The referenced
0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
Time (seconds) phase unbalance angle, DVGA, is then checked to determine
if it is in Sector 1 (0° ± 15°), Sector 2 (180° ± 15°), Sector 3
Fig. 10. Fault in Phase A and Bottom Section of a Bank Using Phase
Voltage Unbalance Protection (–120° ± 15°), Sector 4 (60° ± 15°), Sector 5 (120° ± 15°), or
Sector 6 (–60° ± 15°). For a fuseless bank, if DVGA is in
IV. BANKS USING NEUTRAL VOLTAGE Sector 1, then the faulty unit or element is in Phase A. If
UNBALANCE PROTECTION DVGA is in Sector 3, then the faulty unit or element is in
Phase B. If DVGA is in Sector 5, then the faulty unit or
A. Single- or Double-Wye Banks With Neutral-to-Ground PT
element is in Phase C.
1) Protection Theory and Fault Location Principle For a fused bank, if DVGA is in Sector 2, then the faulty
Neutral voltage unbalance protection is applied to a unit or element is in Phase A. If DVGA is in Sector 4, then the
wye-connected capacitor bank with a neutral PT, as shown in faulty unit or element is in Phase B. If DVGA is in Sector 6,
Fig. 11. The bank can be single or double wye. The faulty then the faulty unit or element is in Phase C.
element or unit can be in any of three locations (three phases)
ALARM
for a single-wye bank and any of six locations (left or right TRIP
section of each of the three phases) for a double-wye- 1
connected bank. Enable Phase A
2
Bus –15°  Φ  15° 1
A
B DVGA 165°  Φ  –165° 2
C 3
Phase B
–135°  Φ  –105° 3 4
45°  Φ  75° 4
VBUSp N
105°  Φ  135° 5
5
VN –75°  Φ  –45° 6 Phase C
6

Fig. 12. Fault Location for Single-Wye Banks Using Neutral Voltage
Fig. 11. Ungrounded Bank Using Neutral Voltage Unbalance Protection Unbalance Protection
 6

This economical fault location technique reduces VBUSA VBUSB VBUSC

100

V sec
50
investigation time by 66.6 percent (one out of three possible –50
0
faulted phases) for a single-wye ungrounded bank that uses –100
VNG
0.4
neutral voltage unbalance protection.

V sec
0.2
0
This fault location technique can be applied to a double- –0.2
–0.4
Neutral Voltage Unbalance Magnitude
wye ungrounded bank with a common neutral and a single 1

V sec
0.66667
neutral PT for neutral unbalance protection. In this case, 0.33333
however, the fault location technique cannot identify the 0
200 Neutral Voltage Unbalance Angle
section of the bank that has the fault. It can still identify the 100

deg
0
phase of the bank, resulting in a 66.6 percent (two out of six –100
possible fault locations) reduction in investigation time. ALARM
PHASE A
PHASE B
2) Simulation Capture Using the RTDS PHASE C
0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
A 230 kV, 108.53 MVAR capacitor bank was modeled in
Time (seconds)
the RTDS. The bank is a single-wye ungrounded
configuration and has a neutral PT for neutral unbalance Fig. 14. Fault in Phase A of a Bank Using Neutral Voltage Unbalance
Protection
protection. The bank is fuseless and consists of 192 capacitor
units. Fig. 13 shows a representation of the bank. Each phase An internal fault is simulated by shorting two elements in a
of the bank has eight parallel strings with eight units unit in Phase C of the healthy bank. The fault results in an
connected in series, for a total of 64 units per phase. Each unbalance voltage magnitude of 0.24 V secondary and an
capacitor unit consists of a single string of eight elements in angle close to 120 degrees. Fig. 15 shows the relay correctly
series. The capacitor unit is rated at 17.8 kV and 650 kVAR. asserts ALARM and PHASE C, indicating the faulty element
230 kV Bus
or unit is in Phase C.
A
B VBUSA VBUSB VBUSC
100
V sec

C 50
0
Single Capacitor Unit –50
–100
0.4 VNG
1
V sec

0.2
0
–0.2
–0.4
Neutral Voltage Unbalance Magnitude
1
V sec

0.66667
0.33333
8 8 0
200 Neutral Voltage Unbalance Angle
100
deg

0
–100
–200
ALARM
PHASE A
N PHASE B
8 PHASE C
0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
Fig. 13. Capacitor Bank Model for Neutral Voltage Unbalance Fault Time (seconds)
Location
Fig. 15. Fault in Phase C of a Bank Using Neutral Voltage Unbalance
Fig. 14 shows the bus voltages and neutral voltage Protection
measured by the bus and neutral PTs. The secondary voltages B. Double-Wye Bank With PT Between Neutrals: Protection
are fed to a relay model that provides the unbalance Theory and Fault Location Principle
protection. Fig. 14 also shows the neutral voltage unbalance Neutral voltage unbalance protection is applied to a
magnitude and the unbalance angle referenced to double-wye-connected capacitor bank with a PT between the
positive-sequence bus voltage from the relay model. An neutrals, as shown in Fig. 16. The faulty element or unit can
internal fault is simulated by shorting two elements in a unit in be in any of six locations (three phases and the left or right
Phase A of the healthy bank, resulting in an unbalance voltage section of each phase from the neutral PT).
magnitude of 0.24 V secondary and an angle close to
Bus
0 degrees. The relay is set to assert an alarm above 0.2 V after A
B
a time delay. Fig. 14 shows the relay correctly asserts C
ALARM and PHASE A, indicating the faulty element or unit
is in Phase A. VBUSp
N n
VNn
Left Right

Fig. 16. Double-Wye Bank With a Neutral PT Using Neutral Voltage

Unbalance Protection
 7

The unbalance protection uses a neutral voltage (VNn) V. BANKS USING PHASE CURRENT UNBALANCE PROTECTION
measurement to calculate the unbalance quantity as shown in
A. H-Bridge Bank With Current Transformer (CT) in Each
(3). Phase
DVG  VNn  Kn • V1BUS (3)
where: 1) Protection Theory and Fault Location Principle
Phase current unbalance protection is applied to an
VNn is the neutral voltage phasor.
H-bridge-connected capacitor bank, as shown in Fig. 18. The
V1BUS is the positive-sequence bus voltage phasor.
faulty element or unit can be in any of 12 locations (any of the
Kn is the phasor setting based on relay measurements that three phases and the left, right, top, or bottom section of each
reset DVG. phase from the bridge CT).
Fig. 17 shows the fault location technique for double-wye
Bus
ungrounded banks with a PT between the neutrals and using A
B
neutral voltage unbalance protection. The phase angle of the C
unbalance quantity is referenced to the phase angle of the ICAPA ICAPB ICAPC
positive-sequence bus voltage, and the referenced phase
unbalance angle, DVGA, is then checked to determine if it is IHA IHB IHC
in Sector 1 (0° ± 15°), Sector 2 (180° ± 15°), Sector 3
(–120° ± 15°), Sector 4 (60° ± 15°), Sector 5 (120° ± 15°), or
Sector 6 (–60° ± 15°).
For a fuseless bank, if DVGA is in Sector 1, then the faulty
Fig. 18. H-Bridge Bank Using Phase Current Unbalance Protection
unit or element is in Phase A and the left section of the bank.
If DVGA is in Sector 2, then the faulty unit or element is in The protection uses balance or bridge current and bank
Phase A and the right section of the bank. Similar logic current measurements to calculate the unbalance quantity as
applies to Phase B and Phase C. shown in (4).
For a fused bank, if DVGA is in Sector 2, then the faulty 60 p  IHp  Kp • ICAPp (4)
unit or element is in Phase A and the left section of the bank. where:
If DVGA is in Sector 1, then the faulty unit or element is in ICAPp is the Phase p bank current phasor.
Phase A and the right section of the bank. Similar logic
IHp is the Phase p bridge current phasor.
applies to Phase B and Phase C.
Kp is the Phase p phasor setting based on the relay
Switch at Position a if Bank Is Fuseless measurements that reset 60p.
Switch at Position b if Bank Is Fused
a
The unbalance quantity is per phase and so is the unbalance
ALARM 1
TRIP b
protection. The phase of the bank with the faulty unit or
2 Phase A
Left Section element is the phase for which the protection has operated
Enable a
2 (based on unbalance quantity magnitude). By comparing the
b Phase A
1 phase angle of the unbalance quantity with the phase angle of
–15°  Φ  15° 1 Right Section
a the bank current, we can further narrow down the fault
DVGA 165°  Φ  –165° 2 3
b Phase B location by identifying the section.
–135°  Φ  –105° 3 4
a
Left Section Fig. 19 shows the fault location technique for H-bridge
45°  Φ  75° 4 4
b Phase B
banks with phase current unbalance protection. The phase
3
105°  Φ  135° 5 Right Section angle of the unbalance quantity is referenced to the phase
–75°  Φ  –45° 6 5
a angle of the respective bank current, and the referenced phase
b Phase C unbalance angle, 60pA, is then checked to determine if it is in
6
Left Section
6
a Sector 1 (0° ± 15°) or Sector 2 (180° ± 15°).
b Phase C
5 Switch at Position a if Bank Is Fuseless
Right Section ALARM Switch at Position b if Bank Is Fused
TRIP
Fig. 17. Fault Location for Double-Wye Banks Using Neutral Voltage a
1 Phase p
Unbalance Protection Enable b Top Left or
2
Bottom Right
This economical fault location technique reduces –15°  Φ  15° 1 Section
investigation time by 83.3 percent (one out of six possible
60pA 165°  Φ  –165° 2 a
fault locations) for a double-wye ungrounded bank with a PT 2 Phase p
b Top Right or
between the neutrals that uses neutral voltage unbalance 1
Bottom Left
protection. Section

Fig. 19. Fault Location for H-Bridge Banks Using Phase Current Unbalance
 8

For a fuseless bank, if 60pA is in Sector 1, then the faulty ICAPA ICAPB ICAPC
1

A sec
.033333
unit or element is in Phase p and either the top left or bottom –0.33333
right section. If 60pA is in Sector 2, then the faulty unit or –1
IHA IHB IHC
element is in Phase p and either the top right or bottom left 5

A sec
1.66667
section. If the bank is fused, then the section identification is –1.66667
the opposite. –5
Phase Current Unbalance Magnitude
3
This economical fault location technique reduces the

A sec
2
investigation time by 83.33 percent (2 out of 12 possible fault 1
0
locations) for an H-bridge-connected grounded or ungrounded 200
Phase Current Unbalance Angle
bank that uses phase current unbalance protection. 150

deg
100
50
2) Simulation Capture Using the RTDS 0
A 345 kV, 130.9 MVAR capacitor bank was modeled in 60ALARMA

the RTDS. The bank is fuseless and consists of 264 capacitor LTRBA
RTBLA
units. Fig. 20 shows the Phase A representation of the bank. 0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
Each phase of the bank has eight parallel strings with 11 units Time (seconds)

connected in series, for a total of 88 units per phase. Each Fig. 21. Fault in Phase A Top Left Section of an H-Bridge Bank Using
capacitor unit consists of a single string of six elements in Phase Current Unbalance Protection
series. The capacitor unit is rated at 9.96 kV and 600 kVAR. An internal fault is simulated by shorting five elements in a
345 kV Bus unit in Phase A and the bottom left section of the healthy
A
bank. The fault results in an unbalance current magnitude of
Single Capacitor Unit 2.2 A secondary and an angle close to 180 degrees. The relay
2 2 1 is set to assert an alarm above 20 mA and after a time delay.
Fig. 22 shows the relay correctly asserts 60ALARMA and
Top Top RTBLA, indicating the faulty element or unit is in Phase A in
11
Left Right the bottom left or top right section.
6 ICAPA ICAPB ICAPC
1
A sec

.033333
Bottom Bottom –0.33333
11
Left Right –1
IHA IHB IHC
5
A sec

1.66667
2 2 –1.66667
–5
Phase Current Unbalance Magnitude
3
Fig. 20. Capacitor Bank Model for Phase Current Unbalance Fault Location
A sec

2
1
Fig. 21 shows the bank currents and bridge currents 0
Phase Current Unbalance Angle
measured by the CTs. They are input to a relay model that 200
100
deg

provides the unbalance protection. Fig. 21 also shows Phase A 0

–100
current unbalance magnitude and Phase A current unbalance –200
angle referenced to Phase A bank current from the relay 60ALARMA
model. LTRBA
RTBLA
An internal fault is simulated by shorting five elements in a 0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
unit in Phase A and the top left section of the healthy bank. Time (seconds)
The fault results in an unbalance current magnitude of 2.2 A Fig. 22. Fault in Phase A Bottom Left Section of an H-Bridge Bank Using
secondary and an angle close to 0 degrees. The relay is set to Phase Current Unbalance Protection
assert an alarm above 20 mA and after a time delay. Fig. 21
shows the relay correctly asserts 60ALARMA and LTRBA,
indicating the faulty element or unit is in Phase A and in the
top left or bottom right section.
 9

B. H-Bridge Bank With CT in Each Phase and PT at Tap
Point
1) Protection Theory and Fault Location Principle
Modern protective relays can be configured to provide
multiple unbalance protection schemes that are operative at
the same time. This improves the reliability of the capacitor
bank protection. If the H-bridge bank is provided with a PT at
the tap point along with the bridge CTs, then both phase
voltage and phase current unbalance protection can be applied
at the same time. This scheme provides protection reliability,
but most importantly, it can detect all 12 fault locations.
magnitude, and the Phase A current unbalance angle
referenced to the Phase A bank current angle from the relay
model. An internal fault is simulated by shorting five elements
in a unit in Phase A and in the top left section of the bank. The
fault results in an unbalance voltage magnitude of 1.25 V
secondary and an angle close to 180 degrees. The relay is set
to assert an alarm above 0.25 V after a time delay. Fig. 24
shows the relay correctly asserts 60ALARMA, 87ALARMA,
LEFTA, and TOPA, indicating the faulty element or unit is in
Phase A and the top left section.
1.5 Phase Voltage Unbalance Magnitude

V sec
Fig. 23 shows the fault location technique for banks using 1
0.5
tapped voltage-based phase voltage unbalance and bridge 0
Phase Voltage Unbalance Angle
CT-based phase current unbalance protection. Recall that the 200
100

deg
phase current unbalance-based fault location can identify if the 0
–100
fault is in either the top left or bottom right sections and the –200
Phase Current Unbalance Magnitude
top right or bottom left sections. Also, the phase voltage 3

A sec
2
unbalance protection based on the voltage from the tap point 1
can identify if the fault is in the top or bottom sections. 0
200 Phase Current Unbalance Angle
Combining information from these two fault location 150

deg
100
techniques, we can identify any of the 12 fault locations in an 50
0
H-bridge bank. 60ALARMA
87ALARMA
Switch at Position a if Bank Is Fuseless LEFTA
RIGHTA
Switch at Position b if Bank Is Fused TOPA
a BOTTOMA 0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
ALARM 1
b Time (seconds)
TRIP 2
Phase p
a Top Left Fig. 24. Fault in Phase A Top Left Section of an H-Bridge Bank Using
4
Enable b Section Phase Current and Phase Voltage Unbalance Protection
3
–15°  Φ  15° 1 An internal fault is simulated by shorting five elements in a
a
1 unit in Phase A in the bottom right section of the healthy bank.
60pA 165°  Φ  –165° 2 b
2 Phase p The fault results in an unbalance voltage magnitude of 1.25 V
a Bottom
3 Right secondary and an angle close to 0 degrees. Fig. 25 shows the
b
4 Section relay correctly asserts 60ALARMA, 87ALARMA, RIGHTA,
a and BOTTOMA, indicating the faulty element or unit is in
2
b Phase A in the bottom right section.
1 Phase p
ALARM
a Top Phase Voltage Unbalance Magnitude
TRIP 4 1.5
Right
V sec

b 1
3 Section
Enable 0.5
a 0
2 100 Phase Voltage Unbalance Angle
–15°  Φ  15° 3
b 0
deg

1 Phase p
DVpA 165°  Φ  –165° 4 a Bottom –100
3 Left –200
b Phase Current Unbalance Magnitude
4 Section 3
A sec

2
Fig. 23. Fault Location for H-Bridge Banks Using Phase Current and Phase 1
Voltage Unbalance 0
150 Phase Current Unbalance Angle
100
deg

This economical fault location technique reduces 50

0
investigation time by 91.6 percent (1 out of 12 possible fault –50
–100
locations) for an H-bridge-connected grounded or ungrounded 60ALARMA
87ALARMA
LEFTA
bank that uses phase current and phase voltage unbalance RIGHTA
TOPA
protection. BOTTOMA 0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
Time (seconds)
2) Simulation Capture Using the RTDS
Fig. 24 shows the Phase A voltage unbalance magnitude Fig. 25. Fault in Phase A Bottom Right Section of an H-Bridge Bank Using
and the Phase A voltage unbalance angle referenced to the Phase Current and Phase Voltage Unbalance Protection
Phase A bus voltage angle, the Phase A current unbalance
 10

C. Double-Wye Bank With CT Measuring Each Phase The unbalance protection uses neutral current and bank
Unbalance: Protection Theory and Fault Location Principle current measurements to calculate the unbalance quantity as
Phase current unbalance protection is applied to a shown in (5).
wye-connected capacitor bank with a CT measuring the phase 60N  IN   K1• ICAPB  K2 • ICAPC  (5)
unbalance, as shown in Fig. 26. The faulty element or unit can where:
be in any of six locations (three phases and the left or right
ICAPp is the Phase p bank current phasor.
section of each phase CT).
IN is the neutral current phasor.
Bus
A K1 and K2 are the scale factor settings based on the relay
B
C measurements that reset 60N.
Fig. 29 shows the fault location technique for double-wye
ICA ICB ICC
ungrounded banks with a CT in the common neutral and using
neutral current unbalance protection. The phase angle of the
IPA IPB IPC
unbalance quantity is referenced to the phase angle of the
positive-sequence bank current (derived from ICAPp), and the
referenced phase unbalance angle, 60NA, is then checked to
Fig. 26. Double-Wye Bank Using Phase Current Unbalance Protection
determine if it is in Sector 1 (0° ± 15°), Sector 2 (180° ± 15°),
The unbalance protection and fault location technique are Sector 3 (–120° ± 15°), Sector 4 (60° ± 15°), Sector 5
the same as for the H-bridge bank, but there are no top or (120° ± 15°), or Sector 6 (–60° ± 15°). For sensitivity, the
bottom sections. Fig. 27 shows the fault location technique for fault location technique is supervised with an alarm or trip
this configuration. condition from the unbalance protection. For security, a
Switch at Position a if Bank Is Fuseless
±15-degree blinder is applied for unbalances not resulting
ALARM Switch at Position b if Bank Is Fused from capacitor failures.
TRIP
a
For a fuseless bank, if 60NA is in Sector 1, then the faulty
1
Enable b unit or element is in Phase A in the left section of the bank. If
2 Phase Φ
Left Section 60NA is in Sector 2, then the faulty unit or element is in
–15°  Φ  15° 1
a Phase A in the right section of the bank. Similar logic applies
2
60ΦA 165°  Φ  –165° 2 b for Phase B and Phase C.
1 Phase Φ
Right Section For a fused bank, if 60NA is in Sector 2, then the faulty
Fig. 27. Fault Location for Double-Wye Banks Using Phase Current unit or element is in Phase A in the left section of the bank. If
Unbalance 60NA is in Sector 1, then the faulty unit or element is in
Phase A in the right section of the bank. Similar logic applies
This economical fault location technique reduces
for Phase B and Phase C.
investigation time by 83.3 percent (one out of six possible
fault locations) for double-wye-connected grounded or Switch at Position a if Bank Is Fuseless
Switch at Position b if Bank Is Fused
ungrounded banks that use phase current unbalance protection.
ALARM a
1
TRIP b Phase A
VI. BANKS USING NEUTRAL CURRENT 2
Left Section
a
UNBALANCE PROTECTION Enable 2
b Phase A
1
A. Double-Wye Bank With a CT in the Common Neutral: –15°  Φ  15° 1 Right Section
Protection Theory and Fault Location Principle 60NA 165°  Φ  –165° 2 3
a
b Phase B
Neutral current unbalance protection is applied to an –135°  Φ  –105° 3 4
Left Section
double-wye-connected ungrounded capacitor bank with a CT a
45°  Φ  75° 4 4
in the common neutral, as shown in Fig. 28. The faulty b Phase B
3
105°  Φ  135° 5 Right Section
element or unit can be in any of six locations (three phases and
a
either the left or right section of each phase from the neutral –75°  Φ  –45° 6 5
b Phase C
CT). 6
Left Section
a
6
Bus b
A 5 Phase C
B Right Section
C
ICAPA ICAPB ICAPC Fig. 29. Fault Location for Double-Wye Banks Using Neutral Current
Unbalance Protection
IN This economical fault location technique reduces
Left Right investigation time by 83.3 percent (one out of six possible
fault locations) for a double-wye-connected ungrounded bank
Fig. 28. Double-Wye Bank Using Neutral Current Unbalance Protection
that uses neutral current unbalance protection.
 11

B. Double-Wye Bank With a CT in the Common Neutral: magnitude is reset before the internal fault. This demonstrates
Simulation Capture Using the RTDS that the fault location technique is not affected by the inherent
A 33 kV, 9.54 MVAR capacitor bank was modeled in the unbalance as long as it is compensated.
RTDS. The bank is a double-wye ungrounded configuration 0.4 ICAPA ICAPB ICAPC

A sec
and has a CT between the neutrals for neutral current 0.2
0
unbalance protection. The bank consists of 18 capacitor units –0.2
–0.4
and is internally fused. Fig. 30 shows the representation of the IN
0.33333

A sec
bank. Each capacitor unit consists of five series groups with 0
each series group consisting of 15 elements connected in –0.33333
Neutral Current Unbalance Magnitude
parallel. The capacitor unit is rated at 10.987 kV and 0.3

A sec
0.2
705 kVAR. 0.1
33 kV Bus 0
Neutral Current Unbalance Angle
A 200
B Single Capacitor Unit 100

deg
C 0
15 –100
–200
60ALARM
PHASE A
PHASE B
PHASE C
LEFT
RIGHT 0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
2 5 Time (seconds)

2 1
Left Right
Fig. 30. Capacitor Bank Model for Neutral Current Unbalance Fault
Location
Fig. 31 shows the bank and neutral currents measured by
the bank and neutral CTs. They are input to a relay model that
provides the unbalance protection. Fig. 31 also shows neutral
current unbalance magnitude and neutral current unbalance
Fig. 31. Fault in Phase B and Left Section of a Bank Using Neutral Current
Unbalance Protection
An internal fault is simulated by shorting two elements in a
unit in Phase C and the right section of the healthy bank. The
fault results in an unbalance current magnitude of 48 mA
secondary and an angle close to 120 degrees, as shown in
Fig. 32. Fig. 32 also shows the relay correctly asserts
60ALARM, PHASE C, and RIGHT, indicating the faulty
element or unit is in Phase C and the right section.
ICAPA ICAPB ICAPC
0.4
A sec

0.2
angle referenced to the positive-sequence bank current from 0
–0.2
the relay model. –0.4
IN
An internal fault is simulated by shorting two elements in a 0.33333
A sec

0
unit in Phase B and the left section of the healthy bank. The –0.33333
fault is cleared by blowing the appropriate fuses for the 0.3
Neutral Current Unbalance Magnitude
shorted elements, resulting in an unbalance current magnitude
A sec

0.2
of 24 mA secondary and an angle close to 60 degrees. The 0.1
0
relay is set to assert an alarm above 20 mA and after a time 200 Neutral Current Unbalance Angle
100
delay. Fig. 31 shows the relay correctly asserts 60ALARM,
deg

0
–100
PHASE B, and LEFT, indicating the faulty element or unit is –200
in Phase B in the left section. 60ALARM
PHASE A
Fig. 31 shows that the bank has some inherent unbalance PHASE B
PHASE C
LEFT
(there is neutral current before the internal fault), which was RIGHT 0 0.08333 0.16667 0.25 0.33333 0.41667 0.5
compensated by the unbalance protective relay with new K1 Time (seconds)
and K2 factors. That is why the neutral current unbalance
Fig. 32. Fault in Phase C and Right Section of a Bank Using Neutral Current
Unbalance Protection
 12

VII. CONCLUSION
Locating a faulty unit in a capacitor bank is a
time-consuming process. The fault location technique
proposed in this paper helps in identifying the phase and
section of the bank with the faulty unit, thereby reducing the
investigation time between 50 and 92 percent. The fault
location technique is embedded as part of the unbalance
protection, making it an economical solution. It can be applied
to banks with various configurations and different fusing
methods. The fault location technique is not affected by the
inherent unbalance as long as the unbalance protection
compensates it. The fault location technique helps in
providing advance alarms for planned maintenance. It can be
used to detect element failures in an externally fused bank
before the fuse operates and therefore provide fuse savings
and safety from case rupture. Using multiple unbalance
protection methods helps to improve the reliability of
protection and fault location.
VIII. REFERENCES
[1] R. Natarajan, Power System Capacitors. CRC Press, Boca Raton, FL,
2005.
[2] B. Kasztenny, J. Schaefer, and E. Clark, “Fundamentals of Adaptive
Protection of Large Capacitor Banks,” proceedings of the 60th Annual
Georgia Tech Protective Relaying Conference, Atlanta, GA, May 2006.
[3] IEEE Standard C37.99-2012, IEEE Guide for the Protection of Shunt
Capacitor Banks.
[4] S. Samineni, C. Labuschagne, and J. Pope, “Principles of Shunt
Capacitor Bank Application and Protection,” proceedings of the 36th
Annual Western Protective Relay Conference, Spokane, WA,
October 2009.
[5] S. Samineni and C. Labuschagne, “Apparatus and Method for
Identifying a Faulted Phase in a Shunt Capacitor Bank,” U.S.
Patent 8 575 941, November 5, 2013.
Casper Labuschagne earned his diploma (1981) and master’s diploma
(1991) in electrical engineering from Vaal University of Technology, South
Africa, and is registered as a Professional Technologist with ECSA, the
Engineering Council of South Africa. After gaining 20 years of experience
with the South African utility Eskom, where he served as senior advisor in the
protection design department, he began work at Schweitzer Engineering
Laboratories, Inc. in 1999 as a product engineer. He transferred in 2003 to the
research and development division, where he held the position of senior
power engineer. In 2009, he was promoted to transmission engineering
development manager. His responsibilities include the specification, design,
testing, and support of transmission protection and control devices. Casper
holds eight United States patents and has authored and coauthored several
technical papers in the areas of protection and control.
Steven Chase received his bachelor of science degree in electrical
engineering from Arizona State University in 2008 and his master of science
in electrical engineering degree in 2009. He worked for two years as a
substation design intern at Salt River Project, an Arizona water and power
utility. He joined Schweitzer Engineering Laboratories, Inc. in 2010, where he
works as a power engineer in the research and development division. He is
currently an Engineer in Training.
Dereje Jada Hawaz received his bachelor of science degree in electronics
engineering technology from DeVry University in 1999 and his master of
engineering in electrical engineering from the University of Idaho in 2013. He
joined Schweitzer Engineering Laboratories, Inc. in 1999 and has been
involved in designing, developing, and validating protective relays. He is
currently a power engineer in the research and development division. He is an
IEEE member.

IX. BIOGRAPHIES
Joseph Schaefer is a Principal Engineer at Florida Power & Light Company.
He is responsible for developing and testing protective relay systems related
to transmission, distribution, and distributed generation applications. Some of
his designs include relay protection for grounded and ungrounded
transmission capacitor banks up to 500 kV. Previously, Joe was employed as a
protection field engineer responsible for relay equipment from 480 V to
500 kV applications. Joe received his BSEE from the University of Florida
and joined Florida Power & Light Company in 1987. He is a member of
IEEE.

Satish Samineni received his bachelor of engineering degree in electrical and

electronics engineering from Andhra University, Visakhapatnam, India, in
2000. He received his master’s degree in electrical engineering from the
University of Idaho in 2003. Since 2003, he has been with Schweitzer
Engineering Laboratories, Inc. in Pullman, Washington, where he is a senior
power engineer in the research and development division. He has authored or
coauthored several technical papers and holds a United States patent. His
research interests include power electronics and drives, power system
protection, synchrophasor-based control applications, and power system
stability. He is a registered professional engineer in the state of Washington
and a senior member of IEEE.

Previously presented at the 2014 Texas A&M

Conference for Protective Relay Engineers.
© 2014 IEEE – All rights reserved.
20140304 • TP6614-01