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Development of enhanced bandwidth of front-end receiver amplifier for high

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Conference Paper · March 2018

DOI: 10.1109/ICOMET.2018.8346443

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 2018 International Conference on Computing, Mathematics and Engineering Technologies – iCoMET 2018
Development of Enhanced Bandwidth of Front-End
Receiver Amplifier for High Speed Communication
System
Bhagwan Das1
1
Department of Electronic Engineering, Quaid-e-Awam
University of Engineering, Science and Technology, Sindh,
Pakistan
Email: bhagwandas@ieee.org
Abstract— The high-speed optical system requires a huge
amount of bandwidth for long-haul telecommunication systems
that offer Gb/s data rates data transmission and reception. In the
high-speed optical communication systems, the signal strength is
determined at the receivers’ front-end. This degrades the overall
performance of optical systems. In this paper, a new
Transimpedance Amplifier (TA) configuration is designed and
developed that provides the bandwidth enhancement at front end
receiver at GHz frequency operation. The three configurations
are proposed for enhancing the receiver’s bandwidth i.e. Cascade
TA, Multiple-Stage Gain TA and TA using BJT transistor. It is
defined that TA using BJT Transistors has significantly high-
gain and bandwidth at GHz frequency operation than rest of.
The design of the developed TA using BJT Transistor is
numerically discoursed and verified using simulations via Micro-
Cap. The developed TA using BJT Transistor is validated by
fabricating the design on PCB as a prototype to demonstrate the
real-time implementation of the designed front end receiver
amplifier. It is determined that using real-time implementation
the gain of 27dB is achieved for the cut-off frequency of 1.189
GHz. The performance of the designed TA using BJT Transistor
is also compared with existing front end receiver. It is concluded
that the designed TA using BJT Transistor has considerably high
gain and bandwidth. The developed TA using BJT Transistor
can be used in the front end optical receiver to enhance the
bandwidth at the receiver end.
Keywords— Amplifiers; Bandwidth; Gain; Impedance; PCB
design; Receiver.
I. INTRODUCTION
Nowadays, the electrical transmission systems for data
communications are replaced by high-speed optical fiber
system [1]. The reliability of optical fiber systems in the data
communication systems has increased the demand for high
bandwidth. The inadequate configuration of an optical receiver
may degrade the signal quality due to noises. These signal
disturbances and noise can be evaluated at the front-end
receiver that has a weak signal. The quality of the weak signal
can be improved by adequate design technique of receiver [2].
The optimum receiver performance can be achieved by having
good sensitivity with high bandwidth using a photodiode with
978-1-5386-1370-2/18/$31.00 ©2018 IEEE
Mohammad Faiz Liew Bin Abdullah2, I. Shafinaz2
2
Faculty of Electrical and Electronic Engineering, Universiti
Tun Hussein Onn Malaysia, Parit Raja, Johor, Malaysia.
Rajesh Kumar3
3
Indus University, Karachi, Pakistan.
small area and aperture. However, in Free Space Optics, the
receiver requires a photodetector with a large area (to collect
the signal), aperture and a filter [3]. In consequences, a
photodetector with large area and aperture yields a high input
capacitance that shortens the bandwidth. Typically, a
photodetector (commercial detector) with large area
commercial has a capacitance of approximately 100-300pF
equated to 50pF for fiber link [3]. Therefore, the techniques are
required to reduce the capacitance of the effective detector, to
attain bandwidth a low noise for receiver design [4-5]. The
receiver performance can be enhanced using basic amplifiers
structures such as; low-impedance amplifier, high impedance
amplifier, a voltage amplifier, and Transimpedance Amplifier
and etc. [6]. These amplifiers structures can be developed using
Operational Amplifiers (Op-Amps), Bipolar Junction
Transistors (BJTs) or high electron mobility transistor for
example; Complementary Metal Oxide Semiconductor
(COMOS). All these amplifiers structures and configurations
are used to enhance the receiver’s performance depend on how
they are configured for particular front-end receiver. In the next
section, the brief overview of optical front-end receiver
configuration along with a description of existing receivers’
performance is also illustrated.
II. OVERVIEW OF OPTICAL FRONT- END
CONFIGURATIONS AND LITERATURE REVIEW
An optical communication system consists of a transmitter,
a receiver [6], and a channel to convey energy from the
transmitter to receiver. The transmitter combines the
information with a carrier signal (laser signal) and modulates
the signal to couple into an optical fiber [7-8]. At the end, the
receiver acquires the travelled signal and demodulates the
signal [8]. The received signal is optically processed and is
detected using photodetection that converts the optical signal in
electrical signal This recovered electrical signal has a low
quality and its quality is improved using signals. A front-end
receiver offers the determination of noise, to analyze the
receiver performance. The optical front-end receiver reacts to
an optical signal by producing a photocurrent using a
photodetector. This photocurrent is transformed in to the
voltage [9]. The desired information is extracted by processing
the recovered voltage using electronic signal processing. The
front-end receiver has the transfer function having dimensions
of volts/ohms. Consequently, the transfer functions of optical
receivers are transimpedance in nature virtually. The front-end
receiver is shown in Fig. 1. It has photodetector followed by
amplifier and electronic signal conditioning circuitry.
Fig. 1. Optical Receiver Front- End [10].
There are various techniques are introduced to enhance the
receiver’s bandwidth. However, here, the only most relevant
existing techniques are discussed to compare the performance
of the designed front-end receiver amplifier. The author Reza
Samadi [11] has designed the bandwidth enhancement for
multistage amplifiers using inductorless stages. The bandwidth
is expanded by using the active negative feedbacks and
intrinsic capacitance within transistors. The proposed method
developed using a six-stage amplifier that yield gain between
16 dB for 0.7 GHz bandwidth. The author Feng-Tso Chien [12]
suggested the enhancement in bandwidth using
Transimpedance amplifiers by a Capacitive-Peaking Design
instead of inductive peaking. A few reports are available for
peaking capacitance. However, different capacitance peaking
techniques have been proposed previously. This demonstrates
the analytical calculation for Butterworth-type TZ amplifier
that provides a linear gain of 0.95 for a small GHz by a C-
peaking. In this paper, a modified Transimpedance Amplifiers
configurations are designed, to enhance the bandwidth of front-
end receiver. These configurations are Cascade TA using
LMH6642 IC, Multi stage Gain TA using and TA using BJT
transistor via BFR540 IC. This front-end receiver is developed
numerically and verified using simulations. The designed front-
end receiver performance is validated by fabricating the
designed front-end receiver using PCB deisgn. The
performance of the designed system is also compared with
existing receivers’. In the next section, the design methodology
of the developed receiver amplifier is discussed.
III. METHODOLOGY
In the designed front end receiver amplifier for bandwidth
enhancement, three types of front end design are developed.
The three types of design front end receiver techniques are i.e.
Cascade Transimpedance Amplifier using LMH6642, Multiple
Stage Gain Transimpedance Amplifier using LMH6642 and
Transimpedance Amplifier using BJT transistor using BFR540.
In the next section, the each technique is discussed.
A. Cascade Transimpedance Amplifier Using LMH6642
The first type of the designed front end receiver is
developed by implementing the cascading technique for
Transimpedance Amplifier. In the designed Cascade
Transimpedance Amplifier, the circuit amplifier is arranged
with the negative (-ve) feedback at the -ve terminal of the
operational amplifier (op-amp). The gain of the op-amp is
attained using feedback resistor and a feedback capacitor. The
inverting input for Transimpedance Amplifier is virtual to the
ground that will produce null load impedance to the current
source. The designed cascade technique provides the advantage
of increment in the receiver gain. The designed Cascade
Transimpedance Amplifier using LMH6642 is shown in Fig. 2.
Fig. 2. Cascade Transimpedance Amplifier using LMH6642.
In this design, the non-inverting amplifier is cascaded
together. The gain can be controlled by varying the resistor
feedback value which is R1 and R2 as depicted in Fig. 2. The
total gain can be achieved using (1);
Total Gain = Gain U1 * Gain U2 = 5*5 =25
Total Gain (dB) = 20log(25) = 27.95 dB (1)
The total gain achieved using numerically for Cascade
Transimpedance Amplifier using LMH6642 is 27.95dB as
illustrated in (1). It is important to note that when the value of
resistor feedback is an increase, it will affect the cut off
frequency that will decrease the receiver bandwidth. In the
next sub-section, the second design of front-end receiver is
discussed.
B. Multiple Stage Gain Transimpedance Amplifier Using
LMH6642
The Multipe Satge Gain Transimpedance Amplifier using
LMH6642 is designed by connecting the number of op-amp
stages in series and the overall gain is attained is the product of
the individual stage gains. The Multipe Satge Gain
Transimpedance Amplifier using LMH6642 is presented in
Fig. 3 and Multipe Satge Gain Transimpedance Amplifier
using LMH6642 demonstrated using (2);

Fig. 3. Multiple Gain Stage Transimpedance Amplifiers using LMH6642
Total Gain =13 *(-12)* (-4) = 624
Total Gain (dB) = 20log(624) = 55.90 dB
This method enhances the gain in order to achieve high
gain for the amplifier circuit, but the disadvantage of this
method is when there are too many op-amps cascaded together.
C. Transimpedance Amplifier Using BJT Transistor
(BFR540)
This front end receiver amplifier design is implemented in a
cascaded arrangement for the transistor connection with the
output of one transistor driving the input of the next transistor.
The Transimpedance Amplifier Using BJT Transistor via
BRF540 IC is shown in Fig. 4.
Fig. 4. Transimpedance Amplifier using BJT transistor via BRF540
The mathematical analysis for Transimpedance Amplifier
Using BJT Transistor via BRF540 as illustrated in (3). Assume
resistor R20 ≥ 10% from R16 and Ic ≈ IE, R16 = 10kΩ so R20 =
1kΩ, and β = 100, IB1 can be computed using (3);
IB1= VCC – (VBE1+ VBE2) / R16 +(β+1 (R17 +R18+R10)
IV. HARDWARE FABRICATION & EXPERIMENTAL
SETUP PROCESS
The hardware fabrication process for the designed front-end
receiver circuit amplifier i.e. Transimpedance Amplifier using
BJT transistor is demonstrated using Protues Professional
software. The Protues Professional design combines the ISIS
schematic capture and ARES PCB layout programs to provide
for PCB design with features of schematic capture, highly
configurable design rules, interactive SPICE circuit simulator
and integrated 3D viewer. In the next sub-section, the
fabrication process of the designed Transimpedance Amplifier
using BJT transistor via BRF540 front end receiver amplifier is
discussed.
A. Fabrication Process
The schematic design of the designed Transimpedance
Amplifier using BJT transistor via BRF540for front end
receiver is achieved using the ISIS schematic capture as shown
in Fig. 5.
(2)
Fig. 5. PCB layout design of the front-end receiver circuit amplifier.
Afterward, the ISIS design is ready for PCB design. The
PCB layout design is developed by creating a netlist to ARES
PCB layout for the schematic of the designed Transimpedance
Amplifier using BJT transistor via BRF540 for front end
(3) receiver. After placing all the component on ARES workspace
and adding the footprints, the next steps is to route the track.
The routing track can be done using automatic routing or
manual routing. The routing process will be done until the
entire component is completely connected. After the circuit is
designed using the ‘ARES PCB layout’, the document can be
printed as shown in Fig. 5. The PCB board as shown in Fig. 6
is ready to place the entire component and soldered the
component using soldering iron.

Fig. 6. PCB design of the designed front-end receiver amplifier.
In the next, experimental setup is launched to verify the
performance of the designed system.
V. EXPERIMENTAL SETUP
The equipment required for the hardware testing procedure
are a signal generator, power supply, and oscilloscope. For this
experiment setup, signal generator of 9 kHz-6 GHz is used as
input source signal to the front-end receiver amplifier circuit.
While the output wave can be observed and voltage output
from the circuit can be measured using the oscilloscope. The
complete experimental setup is demonstrated in Fig. 7. The
input signal is being setup with voltage peak to peak around
50mVp-p and the hardware circuit must be connected with
power supply 12Vdc.This measurement is performed by
increasing the frequency of input signal at the signal generator
and the output voltage Vp-p is measured from the oscilloscope
at each frequency. The value gain in [dB] can be calculated by
using (4);
Gain = 20 log(Vout- Vin)
The bandwidth enhancement design for the front end
receiver amplifier is discussed mathematically for three front
end receiver configurations i.e. Cascade Transimpedance
Amplifier using LMH6642, Multi gain stage Transimpedance
Amplifier LMH6642, and the Transimpedance Amplifier using
BJT transistor using PRF540. It is determined that among these
configurations the Transimpedance Amplifier using BJT
transistor has achieved the high gain and high bandwidth for
GHz frequency operation. This high-gain, high-bandwidth
Transimpedance Amplifier using BJT transistor is selected for
the real-time implementation of the optical receiver. In the next
section, the results for the performance of the designed high-
gain, high-bandwidth Transimpedance Amplifier using BJT
transistor via BRF540.
Fig. 7. Setup for testing circuit.
In the next, the results attained from the designed system
are discussed. In detail.
VI. RESULTS AND DISCUSSION
The bandwidth enhancement for receiver amplifier is
demonstrated using three front receiver configuration. The
performance of the designed three front receiver configuration
is demonstrated using simulation via Micro-Cap software. It is
defined that Cascade Transimpedance Amplifier using
LMH6642 are designed by cascading the op-amp stages. The
theoretical receiver gain attained for this is configuration is
27.95dB. The simulation result for Cascade Transimpedance
Amplifier using LMH6642circuit is shown in Fig. 8.
It can be seen in Fig. 8 that green line defines the roll-off
rate for the Cascade Transimpedance Amplifier using
LMH6642. The transient response initialization for the
designed Cascade Transimpedance Amplifier usinge
LMH6642 is shown using black arrow. The 3-dB cut-off point
for the designed Cascade Transimpedance Amplifier using
LMH6642 is depicted using red arrow as shown in Fig. 8. The
(4) designed Cascade Transimpedance Amplifier using LMH6642
is tested for the GHz frequency range. The values for the
transient response and cut-off point is shown in Fig. 8.
Fig. 8. Frequency Response of Cascade Transimpedance Amplifier using
LMH6642
The simulation result for the Cascade Transimpedance
Amplifier using LMH6642 circuit illustrated that gain of
27.96dB is achieved using simulation at 4.568 MHz for the
cutoff frequency.
It is defined that for multi gain stage Transimpedance
Amplifier is designed by three op-amp stages. The theoretical
receiver gain attained for this is configuration is 55.90dB. The
simulation result for multi gain stage Transimpedance
Amplifier using LMH6642 circuit is shown in Fig. 9.

Fig. 9. Frequency Response of Multi gain stage Transimpedance Amplifier

LMH6642
Fig. 10. Frequency Response of Transimpedance Amplifier using BJT
transistor using PRF540.
It is defined that high gain of 56.262dB is achieved at cutoff
frequency is 4.4956MHz. The second stage amplifier shows
the output gain is 42.282dB and the output gain for the second
stage is 22.281dB, from there we can observe that when the
number of stages op-amp are connected in series they are a
product of the individual stage gains. The cut off frequency for
the first stage of the amplifier is 7.1477 MHz, for the second
stage is 4.7164 MHz and 4.4956 MHz is a cutoff frequency of
the third stage amplifier. It shows that when more op-amp is
connected in series the cutoff frequency will decrease. It is
demonstrated that for Transimpedance Amplifier circuit using
BJT transistor via BRF540, the theoretical receiver gain
attained for this is configuration is 27dB. The simulation result
for BJT Transimpedance Amplifier using BRF540 circuit is
depicted in Fig. 10.
The output analysis using micro-cap software for the total
output gain for BJT Transimpedance Amplifier using BRF540
circuit is 27dB at the value of the cutoff frequency of this
circuit is 1.189 GHz. This value is approximately with the
value of mathematical analysis for the total closed loop gain.
Therefore, it is concluded that for BJT Transimpedance
Amplifier using BRF540 circuit design has achieved the
objective of designing the front-end receiver amplifier
enhancement in bandwidth for GHz frequency range.
The simulation results for all three designed front end
receiver amplifier is demonstrated using micro-cap software.
It is illustrated that using Cascade Transimpedance Amplifier
using LMH66442 technique the gain of 27.960dB is achieved
at a cut-off frequency of 4.568 MHz.
The Multiple Stage Gain Transimpedance Amplifier usig
LMH6642 provides the 56.262dB gain at the cut-off frequency
of 4.4956 MHz. For the final configuration of front end
receiver amplifier that is for BJT Transimpedance Amplifier
using BRF540 technique, the gain of 27.002dB is attained at
1.189 GHz. It is determined from the simulation results that
for BJT Transimpedance Amplifier using BRF540 technique
gives a better performance of high gain and wide bandwidth.
The BJT Transimpedance Amplifier using BRF540 is chosen
to be fabricated for the prototype. In the next section, the
prototype for the BJT Transimpedance Amplifier using
BRF540 circuit is discussed. It is demonstrated
mathematically and via simulations that the designed for BJT
Transimpedance Amplifier using BRF540 offer the high-gain,
high-bandwidth for GHz frequency operation. In the section,
the performance of the designed for BJT Transimpedance
Amplifier using BRF540 is analysed that is realized using
hardware implementation. This section also discusses the
testing and measurement of the fabricated designed for BJT
Transimpedance Amplifier using BRF540 circuit. Finally, the
measured result will be compared with the simulation results.
The Result of a prototype for the designed Transimpedance
Amplifier using BJT transistor via BRF 540 is illustrated in
Table I.
TABLE I
RESULT OF PROTOTYPE FOR THE DESIGNED TRANSIMPEDANCE AMPLIFIER
USING BJT TRANSISTOR VIA BRF540.
Gain(dB) =20
Frequency(Hz)
Vin(mVp-p) Vout(mVp-p) log (Vout/Vin)
1 GHz
50 780 26.86
 (a)

(b)
Fig. 11. Output waveform of the designed Transimpedance Amplifier using
BJT transistor via BRF540 on the Oscilloscope (a) input wave diagram at
100kHz, (b) output wave diagram at 100kHz

Fig. 12. Gain versus frequency response.

The input signal from the signal generator 50mVp-p was
supplied as input to the receiver amplifier circuit. Then, the
output value of peak to peak voltage is measured on the digital
oscilloscope at difference frequency level. Table I shows the
output result measured from 10kHz until 500 MHz frequency.
The output gain is calculated using (28). The response of the
real-time hardware implementation of the designed
Transimpedance Amplifier using BJT transistor via BRF540 as
depicted in Fig. 11. The sample output waveform measured on
the oscilloscope. The performance of the designed
Transimpedance Amplifier using BJT transistor via BRF540 is
also evaluated using the graph Gain [dB] versus frequency. The
Gain versus frequency is plotted to measure the cutoff
frequency for this prototype circuit. The response of the Gain
versus frequency is demonstrated in Fig. 12. It shows that the
Gain for the circuit is 26.8dB at a cut-off frequency of
1.079GHz. The gain difference between the real-time and
simulation of the designed Transimpedance Amplifier using
BJT transistor via BRF540 is less. However, the cut-off
frequency is much high because of the prototype circuit.
There are several factors that cause the bandwidth of
simulation circuit is different with the prototype circuit. One of
the factors is causes from the copper trace. Copper traces have
a capacitive and an inductive component. With a four layer
PCB, the capacitance of copper trace is three times higher. The
single layer PCB or even single wires, on the other hand,
capacitance to ground cannot be estimated very well, because
stray capacitance to other copper traces and wires is heavily
increased and plays a much more important role. The
capacitance of copper traces can be estimated by the help of
specific formula. The other factors that cause the bandwidth for
prototype got a difference value with simulation are from stray
capacitance and a parasitic capacitance.
VII. CONCLUSION
This paper demonstrates the enhancement in the front end
bandwidth receiver amplifier using the designed
Transimpedance Amplifier using BJT transistor via BRF540.
There were three configurations designed in order to enhance
the front end bandwidth receiver amplifier i.e. Cascade
Transimpedance amplifier using LMH6640 technique,
Multiple Stage Gain Transimpedance Amplifier using
LMH6642 technique and Transimpedance Amplifier using BJT
transistor via BRF540. The numerical and simulation analysis
determines that the Transimpedance Amplifier using BJT
transistor via BRF540 yields the high gain and high bandwidth
at GHz frequency operation. For the realization (hardware
implementation) of the designed front end receiver, the
Transimpedance Amplifier using BJT transistor via BRF540 is
selected due to its high gain and high bandwidth feature. The
real-time implementation is achieved using PCB design of the
designed Trans-impedance Amplifier using BJT transistor via
BRF540. It is demonstrated that the Transimpedance Amplifier
using BJT transistor via BRF540has the ability of the high-gain
and high-bandwidth feature for the front end receiver amplifier.
It is also concluded that the designed Transimpedance
Amplifier using BJT transistor via BRF540 can be utilized for
the optical receiver for GHz frequency operation, in order to
enhance the bandwidth with large at front of optical receiver. In
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the future, the designed system can be upgraded in
minimization of stray capacitance to leads of electronic
components very short and grouping components in such a way
to eliminate capacitive coupling.
ACKNOWLEDGMENT
This work is supported in collaboration with Quiad-e-
Awam University of Engineering, Science and Technology,
Nawabshah, Pakistan and Universiti Tun Hussein Onn
Malaysia. The authors are thankful to both the institution for
the support and encouragement in carrying out this work.
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