Intel 80286

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Intel 80286

An Intel A80286-8 processor with a gray ceramic heat spreader

Produced From 1982 to 1991[1]
• Intel, IBM, AMD, Harris (Intersil), Siemens AG, Fujitsu
Common manufacturer(s)
Max. CPU clock rate 4 MHz to 25 MHz
Min. feature size 1.5 µm[2]
Instruction set x86-16 (with MMU)
Transistors 134,000
Data width 16 bits
Address width 24 bits
• PGA68
PLCC-68 (variant)
Socket(s)
LCC-68 (variant)

Predecessor 8086, 8088 (while 80186 was contemporary)

Successor Intel 80386
Co-processor Intel 80287
• 68-pin PLCC
68-pin LCC
Package(s) 100-pin PQFP (Engineering Sample Only)
68-pin PGA

The Intel 80286[3] (also marketed as the iAPX 286[4] and often called Intel 286) is a 16-bit
microprocessor that was introduced on February 1, 1982. It was the first 8086-based CPU with
separate, non-multiplexed address and data buses and also the first with memory management and
wide protection abilities. The 80286 used approximately 134,000 transistors in its original nMOS
(HMOS) incarnation and, just like the contemporary 80186,[5] it could correctly execute most
software written for the earlier Intel 8086 and 8088 processors.[6]
The 80286 was employed for the IBM PC/AT, introduced in 1984, and then widely used in most
PC/AT compatible computers until the early 1990s.

Contents
• 1 History and performance
• 2 Architecture
• 3 Features
• 3.1 Protected mode
• 3.2 OS support
• 4 See also
• 5 References
• 6 External links

History and performance

AMD 80286 (16 MHz version)

Intel's first 80286 chips were specified for a maximum clockrate of 4, 6 or 8 MHz and later releases
for 12.5 MHz. AMD and Harris later produced 16 MHz, 20 MHz and 25 MHz parts, respectively.
Intersil and Fujitsu also designed fully static CMOS versions of Intel's original depletion-load
nMOS implementation, largely aimed at battery-powered devices.
On average, the 80286 was reportedly measured to have a speed of about 0.21 instructions per clock
on "typical" programs,[7] although it could be significantly faster on optimized code and in tight
loops, as many instructions could execute in 2 clock cycles each. The 6 MHz, 10 MHz and 12 MHz
models were reportedly measured to operate at 0.9 MIPS, 1.5 MIPS and 2.66 MIPS respectively.[8]
The later E-stepping level of the 80286 was free of the several significant errata that caused
problems for programmers and operating-system writers in the earlier B-step and C-step CPUs
(common in the AT and AT clones).[9]