• MOSFET 

• Op Amps
• 741, 356
• Imperfections
• Op‐amp applications

Acknowledgements:
Ron Roscoe,
Neamen, Donald: Microelectronics Circuit Analysis and Design, 3rd Edition

6.101 Spring 2019 Lecture 7 1

6.101 Spring 2019 Lecture 7 2
 JFET Application Current Source
+15V
• Household application: battery 
charger (car, laptop, mp3 
players)
2N5459
• Differential amplifier current 
source
• Ramp waveform generator
iD
• High Speed DA converter using 
capacitors
• Simple circuit:  2N5459 
Nchannel JFET

IDSS = current with VGS=0

VP = pinchoff voltage

2
 vGS 
iD  I DSS 1  
 VP 
6.101 Spring 2019 3
 2017 Quiz Design Question

Design a circuit such that when a momentary

push button switch is closed, “switched 9v”
will be supplied to your design under test for
exactly two minutes.

You have available a 2N7000 (n-channel

MOSFET) and a ZVP2106A which is a p-channel
complement to the 2N7000.

You have a 100uf capacitor that is exactly 100uf

with negligible leakage current.

Based on measurements, your 2N7000 has a

VGS(th) 3.0 volts and the ZVP2106A has a
VGS(th) -3.0.

The 9V battery is a constant 9V during the test.

ln(.3333) = -1.0986
ln(.2222) = -1.5041
ln(.1111) = -2.1972 [one or more of these
constants may be required for your design]

6.101 Spring 2019 Lecture 7 4

 Op‐Amps
• Active device: V0 = a(V+-V-);
V+
note that it is the difference
V- V
of the input voltage! o

• a=open loop gain ~ 105 – 106

• Most applications use negative feedback.
• Comparator: no feedback
• Active device requires power. No shown for
simplicity.
• Classics op-amps: 741, 357 ~ $0.20; one, two or
four in a package.
• Newer op-amps operate at <3.3V (OPA369 1.8V)

6.101 Spring 2019 Lecture 7 5

 Op‐Amp Packaging
LM324

LF353

6.101 Spring 2019 Lecture 7 6

 356 JFET Input Op‐amp

6.101 Spring 2019 Lecture 7 7

 JFET Differential  Pair

Small Signal Model

6.101 Spring 2019 8

 741 Circuit

22 transistors,
11 resistors,
1 capacitor,
1 diode

6.101 Spring 2019 Lecture 7 9

 Discrete 741 

6.101 Spring 2019 Lecture 7 10

 Discrete 741

6.101 Spring 2019 Lecture 7 11

 Differential (Emitter Coupled) Pair

BJT Diff Pair

Small Signal Model

6.101 Spring 2019 12

 Differential Pair – Common Mode Voltage

Small Signal Model

6.101 Spring 2019 13

 Differential Pair – Differential Mode Voltage

6.101 Spring 2019 14

 MOSFET Differential  Pair

Small Signal Model

6.101 Spring 2019 15

 Virtual Node Analysis
a = gain
V2 + β = feedback or loop function
Vout = a(V2-V1)
a • If a>>1 and a>> β then v1 ~ v2

V1 - • Current into input terminals zero by

design

Vx +  • Typical values:
a~100,000 & a β >>1

V1  Vx  Vout
• ok for a=a(s) and β = β(s) as long as
a(s) β(s) >> 1
V1  Vx  aV2  aV1
V1 1  a   Vx  aV2 • β is the loop transfer function
(not to be confused of β of a BJT)
 1   a 
V1  Vx   V2  V2
 1 a   1 a   • a β is the loop gain

6.101 Spring 2019 16

Lecture 7
 Op Amps – Virtual Node

• With negative feedback, output will drive the input voltage difference to 
zero  => V+ = V‐
• Input current = 0
Benefits of Feedback
Stabilize gain against device  Reduce distortion by the 
variations, temperature, aging feedback factor [(1+aβ)]
Input and output impedances  Gain determined by passive 
adjusted by (1+aβ) components

Disadvantages of Feedback

Loss of gain; need more stages Greater tendency  for 

instability  (oscillations)

 1   a 
V1  Vx     V2  V2
 1  a   1  a 
6.101 Spring 2019 Lecture 7 17
 741 Op Amp Max Ratings
common mode voltage Need +Vcc, -Vee for operation
appears at both inputs

Idiot proof

6.101 Spring 2019 Lecture 7 18

 741 Electrical Characteristics
Almost zero

Lecture 7 19
6.101 Spring 2019
 LF356 

not rail to rail

6.101 Spring 2019 Lecture 7 20
 LM6132 – Rail to Rail Output

6.101 Spring 2019 Lecture 7 21

 Rail to Rail Input

6.101 Spring 2019 Lecture 7 22

 Decibel (dB)

 Vo   Po 
dB  20 log  dB  10 log 
 Vi   Pi 

log10(2)=.301 100 dB = 100,000 = 105

80 dB = 10,000 = 104

3 dB point = half power point 60 dB = 1,000 = 103

40 dB = 100 = 102

6.101 Spring 2019 Lecture 7 23

 741 Open Loop Frequency Gain

6.101 Spring 2019 Lecture 7 24

 Non‐Inverting Amplifer

Zero input current;

Rs
3
+15 therefore v  vin
+ 7
R1
A 6
v   vout but v  v
v+ 4
+
R 1 R 2
+
vin 2 -
_ -15 R1
v- vout so vin   vout ;
R1  R 2
R2
_ vout R1  R 2
R1 
vin R1
R2
or Av  1 
R1
β (not to be confused with β R1
of a BJT) 
R1  R2
for finite A vout A
 Av 
vin 1  A
6.101 Spring 2019 25
 741 Open Loop Frequency Gain
Rs
Examples at 1 Hz, 1000 Hz, and 10kHz
3
+15
+ 7
6
A
v+
+
Voltage gain Av=40dB = 100; R2= 100k,
-
4
+
vin
R1= 1k; [101 = 40.1dB!] β=0.01
2
_ -15
v- vout
R2
_
R1
At 1 Hz, Avol = 100 dB = 1 x 105 = 100,000.
A 105 10 5
Av     100  40dB
1  A 1  10 5.01 10 3

At 1000 Hz, Avol = 60 dB = 103 = 1000.

A 103 103 1000
Av      90.9  39.2 dB
1  A 1  10 .01 1  10
3
11

At 10 kHz, Avol = 42 dB = 1.26 x 102 = 126.

A 126 126 126
Av      55.8  34.9dB
1  A 1  126.01 1  1.26 2.26

β is the loop transfer function

aβ is the loop gain
6.101 Spring 2019 Lecture 7 26
 741 vs 356 Comparison
741 356
Input device BJT JFET
Input bias current 0.5uA 0.0001uA

Input resistance 0.3 MΩ 106 MΩ

Slew rate* 0.5 v/μs 7.5 v/μs
Gain Bandwidth product 1 Mhz 5 Mhz
Output short circuit duration continuous continuous

Identical pin out

* comparators have >50 v/μs slew rate

6.101 Spring 2019 Lecture 7 27

 So Why BJT in Op‐amps?

BJTs have higher transconductance (gain), better

consistency in spec between pieces, and in some
applications, lower noise than FETs.

Like most JFET op amps, the LF356 has a relatively

high offset voltage, and relatively high drifts. BJT
op-amps tend to have much lower offset voltage and
drifts.

6.101 Spring 2019 28

 Gain Bandwidth Product = Constant
(No free lunch)

Gain: 60dB = 103

Bandwidth = 5x103

Gain Bandwidth product = 5x106

6.101 Spring 2019 Lecture 7 29

 Op‐Amp Imperfections – Real World

• Input offset voltage
• Input Current Bias
• Input Offset Current
• Finite Output Voltage Swing
• Finite Current
• Finite Gain, gain bandwidth product
• Voltage Noise – Johnson Noise
• Phase Shifts
• Slew Rate

6.101 Spring 2019 Lecture 7 30

 Input Offset Voltage *

741: 6000μv
357: 10,000μv

Current technology:
10μv

* Analog Devices MT-037 Tutorial

6.101 Spring 2019 Lecture 7 31

 Offset Adjustments

6.101 Spring 2019 Lecture 7 32

 Input Bias Current *

The input offset current, IOS,

is the difference between
IB– and IB+, or IOS = IB+ − IB–.

741: 200na
357: 0.05na

Current technology:
3fA LTC6268

* Analog Devices MT-038 Tutorial

6.101 Spring 2019 Lecture 7 33

 Inverting Amplifier Bias Current Compensation
RF I IN  I B  I F  0
V OFF   R1 I B
IIN IF
IB +15 V IN  V OFF V  V OUT
-2  I B  OFF 0
RIN
7
R IN RF
A 6

IB 3
4 + but with no input signal, V IN and we want V OUT  0, so :
+
VIN + +
-15 VOUT
 1 1   1 1 
_
VOFF R1
_ - I B  V OFF    ; - I B   R1 I B   
_
 R IN RF   R IN RF 
 1 1   1 
thus :       as a condtion for no offset at V o
 R IN RF   R1 

 
V OUT   I B R F // R IN  I B R1 AVOL
+15
IB - V OUT  0 if R F // R IN  R1
RF//RIN VDIFF AVOL
+
+ VOUT
R1
IB -15

V OUT   I B R F // R IN  
I B R1 AVOL
_

V OUT  0 if R F // R IN  R1

6.101 Spring 2019 Lecture 7 34

 Common Mode Rejection Ratio CMRR

CMRR: ratio of the common-

mode gain to differential-mode
gain.

Example, if a differential input

change of Y volts produces a
change of 1 V at the output, and
a common-mode change of X
volts produces a similar change
of 1 V, then the CMRR is X/Y.

CMRR often expressed in dB:

AOL
CMRR  20 log
ACM

6.101 Spring 2019 Lecture 7 35

 Inverting Amplifer – Virtual Ground Analysis
Assumptions
Infinite input impedance: i  0; i  0
A  v  0 because v is grounded .
R
A  A  f
V R
in
Rf

iin if iin  i f  0
+15
- vin  0 0  vout
2
7
Rin A 6
 0
+
vin 3 +
4 + Rin Rf
_ -15 vout
_
vout  R f
  Av
vin Rin

6.101 Spring 2019 Lecture 7 36

 Schmitt Trigger
V-
Vin Vo • Schmitt trigger have
different triggers
V+ points for rising edge
R2 and falling edge.

• Can be used to
reduce false triggering
R1

• This is NOT a
negative feedback
circuit.

6.101 Spring 2019 Lecture 7 37

 2015 Quiz Question – Digital  Clock Using 60Hz
The 60 Hz waveform crosses the reference voltage multiple times
because of the 200mv noise.

Design a circuit with a Schmitt trigger (“Your design”) using a

LM6132 with the thresholds greater than 200mv to fix the problem.
A LM7805 voltage regulator IC is used to provide a 5V output to
power the digital clock circuit (modeled as a resistor) as well as to
supply +5V for the LM6132 in “Your design”.

6.101 Spring 2019 Lecture 7 38

 Schmitt Trigger + RC Feedback =  Oscillator
• 741 op‐amp. 
R3 10K

• R1=10k, R2=4.7k,  R3=10K, 
C=.33uf
V-
• Display V‐ and Vout on the 
-
Vout scope. Set R3=4.7k. Predict 
0.33uf + what happens to the 
R1 10K frequency.

R2 4.7K

6.101 Spring 2019 Lecture 7 39

 High Pass Filter HPF
AV (dB)

C 0
-3dB
V1 R V2 slope = 6 dB / octave
slope = 20 dB / decade

log f
fLO or f-3dB
V2 R j CR s CR
Av     Degrees
V1 R  1 j CR  1 s CR  1
j C

90o PHASE LEAD

45o

0o

-45o

log f
fLO or f-3dB

6.101 Spring 2019 Lecture 7 40

 Differentiator Insights
AV (dB)

0
-3dB
slope = 6 dB / octave
slope = 20 dB / decade

log f
fLO or f-3dB

Degrees

90o PHASE LEAD

 R2  sCR2
Av   ; s  j ; 45o
1 sCR1  1
R1 
sC 0o

-45o
at low frequency sCR1  1
log f
 sCR2 fLO or f-3dB
Av 
1

multiplying by s equals differentiation differentiation works only at f << flo

6.101 Spring 2019 Lecture 7 41

 Low Pass Filter LPF
AV (dB)

R 0
V1 C V2 -3dB

slope = -6 dB / octave
slope = -20 dB / decade

log f
1 fHI or f-3dB

V2 j XC j C 1
Av     Degrees
V1 R  j X C 1 j  RC 1
R
j C
PHASE LAG
1 0o
Av 
sRC 1 -45o

-90o

log f
fHI or f-3dB

6.101 Spring 2019 Lecture 7 42

 Integrator Insights
AV (dB)

0
-3dB

slope = -6 dB / octave
slope = -20 dB / decade

log f
fHI or f-3dB

Degrees

PHASE LAG
0o

-45o
R2
R1 -90o
Av   ; s  j ;
1  sCR2
log f
at high frequency sCR2  1 fHI or f-3dB

R2
R1 1
Av    
sCR2 sCR1 integration works only at f >> fHI sCR2  1

dividing by s equals integration

6.101 Spring 2019 Lecture 7 43

 Why R2?

Without R2, any DC bias

current will saturate Vout
since the DC gain is the open
loop gain

6.101 Spring 2019 Lecture 7 44

 Frequency Domain Insight

• Integration and differentiation easy

to understand in time domain

• In frequency domain, difference

between square wave and triangle
wave is amplitude and phase –
same harmonics.

• Integrator (LPF) rolls off

harmonics and phase shift to
create a triangle wave

• Differentiator (HPF) amplifies

harmonics and phase shift to
create a square wave.

6.101 Spring 2019 Lecture 7 45

 Basic OpAmp Circuits
Voltage Follower (buffer) Non-inverting
vin 
vin + 
vout
vout R2
-
R1
vout  vin vout  R1  R2
R1 vin
Differential Input
Integrator
R1 R2
vin1
vout R C
vin 2 vin
vout
R1
R2

v  vin1 
t

vout  R2
R1 in 2
vout   1
RC 

vin dt
46
 Crossover Distortion (hole)

10k

+15
+15
10k
10k 2N3904
+15 2N3904
+15
10k 0.1F
0.1F
2
- 7 vout
LF356 6
2
- 7 vout
6
LF356
4
3 + RL 4

vin
0.1F 3 +
?k -15 vin 0.1F RL
?k -15
2N3906
2N3906
[a] -15 [b]
-15

Why is [b] better?

Lecture 7
6.101 Spring 2019 47
 Diode Biasing
+12 V
+12 V

RB1

2N2219 1N4001

RE=5.6
1/2 watt

D1 IN914

RE=5.6 +
D2 1N914 1/2 watt
+12
-
2
7
C vout RL
6
?opamp 2N2905
+ 3 +
4

vin [From -12 _

RB2
Preamplifier]
_ 1N4001

-12 V
-12 V
RF

Lecture 7
6.101 Spring 2019 48
6.101 Spring 2019 49