PES Institute of Technology & Management

Dept. of Electronics &communication Engineering

Analog Electronics circuits Lab Manual

III Semester (Session Aug 07 – Dec 07)

Faculty: Shwetha.B
INSTRUCTIONS BEFORE STARTING THE EXPERIMENT

1. Study the circuit, theory and procedures, expected output before doing the experiment.
2. Get familiarize with the equipments in the lab, Ex: Signal generators, CROs, multimeters etc.
3. Adjustment of signal generator: - Before connecting the signal generator to the circuit check the
followings
a. Set the shape of the waveform (sinusoidal),
b. Set the frequency using coarse and fine adjustments.
c. Set the offset adjustments. Set the CRO in DC mode and ensure the waveform is
symmetry in both positive and negative cycle. If not , adjust it using the DC offsetting
potentiometer
d. Set the voltage magnitude using Vcoarse settings and Vfine adjustments.
4. Adjustment of CRO:
a. Select the right voltage and time scale to get the proper waveform
b. For clipper and clamper circuits, observe the waveform in DC mode only
c. Set the input waveform mainly for offset setting in DC mode only.
d. Before measurement, ensure X & Y are in calibrated mode (if provided externally)
e. Ensure that Channel selection and trigger mode are properly set.
f. In case of two channels do not mix the signal and ground terminals.
5. Multimeter adjustments:-
a. Set the right mode before taking the readings. Wrong mode settings may damage the
instrument.
b. For current reading, connect the multimeter in mA (or A) mode to the circuit before
switching on the supply. Do not remove the current meter when the supply is on. Check
for ac and dc modes as required.
i. For voltage reading ensure that proper ac or dc setting.
c. Use the proper leads for the measurement. Wrong cables damage the instrument.

6. After adjusting the input voltage, check the circuit connections before turning the power on.
7. The ground connections are made properly & ensure that the circuit has one ground.
8. Connect the ground terminal of signal generator and the oscilloscope to the same point.
Do not mix the ground point and signal of the two instruments to get the proper
readings.
9. Don’t pull out the connections with the power supply on.
10. Use only stripper to remove insulation.
11. Don’t short the terminals while checking the output at pin terminals.
12. Don’t switch on supply to the circuit unless the staff has checked the circuit
connections

13. OTHER INSTRUCTIONS:-

a. Bring the observation book with details of the experiment t o be done and the
record book with the completed previous experiment
b. Don’t get crowded at the issue counter.
c. Don’t shift the batches.
d. Don’t shift the power supply and signal generators from one table to another
table.
e. Get the staff signature in the observation & record.
EXPERIMENT 1: RC COUPLED AMPLIFIER
AIM:

Design RC Coupled single stage BJT/FET amplifier and determine the gain, Frequency response, input
and output impedance.

COMPONENTS REQUIRED:

Sl. Apparatus and

Range Quantity
No components

01 Bread board 1

02 Transistor BC 107B 1

03 Resistors

04 Capacitors

05 VRPS 0-30Vdc 3A

06 Signal generator 10Hz to 1Mhz 1

07 CRO 1

08 Probes, wires

09 POT 10k,100k 1

CIRCUIT DIAGRAM
DESIGN PROCEDURE:

Select transistor BC107b having the following specifications,

Ie=Ic= 2mA; ß=215; Vce=5v; Vcc=2Vce =>10v
To find Re:
Choose Ve =Vcc/10=10/10 =1 v
Ve = Ie*Re =>Re=Ve / Ie
Re = 1 / Ie =1 / 2mA = 0.5K Ω
Select Re = 560 Ω

To find Rc:
Choose Vce = Vcc / 2 =10/2=5 v
Apply KVL in CE loop:
Vcc- (IcRc) - Vce - Vre=0
10v-(2mA* Rc) – 5v –1v=0
Rc = (10v-5v-1v) / 2mA
Rc = 2K Ω
Select Rc= 2.2K Ω

To find R1 & R2
Vb = Vbe + Ve => 0.7v + 1v = 1.7v
Vb =(Vcc*R2) / ( R1 + R2 )
1.7v = (10v*R2) / ( R1 + R2 ) => R2/(R1+ R2)=1.7v/10v
10 R2 = 1.7 R1 +1.7 R2
R1= 4.8* R2
Select R2 =4.7K Ω
R1 = 4.8 * 4.7K Ω => R1 = 22.56K Ω
Select R1 = 27K Ω

To find Bypass capacitor Ce:

Let Xce = Re / 10, at f = 100 Hz; 1/(2π*f*Ce) = Re / 10

Therefore Ce=10 / (2π*100 Hz *560 Ω) =31.8 micro farad
Choose Ce=50 micro F (electrolytic)

To find Cc1 and CC2:

Assume CC1 & CC2 = 0.47 micro F (ceramic)
To design: Xcc1 = (Hie||Rb)/10, Xcc1 =1/ (2π*f*Cc1), Cc1=?
Xcc2 = (Rc||Rl)/10, Xcc2 =1/ (2π*f*Cc2), Cc2=?
PROCEDURE:
1. Connect the circuit as shown above.
2. Feed a sine wave signal of amplitude 20 mV from signal generator.
3. Keep the frequency of the signal generator in mid band range i.e., around 2 KHz. Increase
amplitude of the input signal till the output signal is undistorted.(CRO at output).
4. Measure vi amplitude =__________V for corresponding maximum undistorted output.
5. Measure Vo amplitude =__________V
6. The ratio of (Vo/Vi) max gives the maximum undistorted gain of the amplifier.
7. Now vary the input sine wave frequency from 10 Hz to 1 MHz in suitable steps. Measure output
voltage amplitude at each step using CRO.(See that amplitude of Vi remains constant throughout
the frequency range.)
8. Tabulate the results in the tabular column shown below.
9. Plot the frequency i.e., frequency versus Gain in dB, determine Bandwidth and G.B.W product.

TABULAR COLUMN
Take the readings for 100 Hz to 1Khz in 100Hz steps, 1Khz to 10Khz in 1Kz steps, 10khz to100khz in
10khz steps, 100khz to 1mHz in 100kHz steps (total 37 readings) Note down Vi (P-P)……

Frequency Output Voltage Voltage Gain

Gain =20 log (Vo / Vi)
(Hz) (P-P) (Volts) Vo / Vi

10

1M

FREQUENCY RESPONSE:

f1 is Lower Cut-Off Frequency

f2 is Higher Cut-Off Frequency
AV is the Voltage Gain = 20log10(V0/Vi)
AVmid is the Voltage Gain at mid-band
F2-F1 is the Band width of the amplifier
3dB = 20log10(0.707)
TO MEASURE Zin

PROCEDURE TO FIND Zin

1. Connect the circuit as shown in above figure
2. Set the following
 DRB to 0Ω
 Input sine wave amplitude to say 40 mV
 Input sine wave frequency to any mid frequency say 10 KHz.
3. Measure amplitude of Vop-p. Let Vo=Va say
4. Increase DRB (keeping Vi constant) till Vo=Va/2.The corresponding DRB gives the input
impedance Zin in RC coupled amplifier

TO MEASURE Zo :

PROCEDURE TO FIND Zo
1. Connect the circuit as shown in the above figure
2. Set the following
 DRB to its maximum resistance value.
 Input sine wave amplitude to about 40 mV
 Input sine wave frequency to 10 KHz.
3. Measure Vop-p. Let Vo=Vb
4. Decrease DRB from its maximum value till Vo=Vb/2.The corresponding DRB gives the output
impedance Zo.
RESULT: Thus the RC Coupled Amplifier was designed and studied.
Gain =
Bandwidth =
Gain-Bandwidth product =
Input Resistance =
Output Resistance =
EXPERIMENT 2: DARLINGTON EMMITER FOLLOWER
AIM

Design of a BJT Darlington emitter follower and determine the gain, input and output impedances.

COMPONENTS & APPARATUS

Sl. No Apparatus and Range Quantity

components
01 Bread board 1
02 Transistor BC107B 2
03 Resistors
04 Capacitors
05 VRPS 0-30Vdc 3A 1
06 Signal generator 10Hz to 1Mhz 1
07 CRO 1
08 Probes, wires
09 DRB 0 to1Mohm 1

CIRCUIT DIAGRAM
Note: - R1 & R2 junction is not directly connected to CC1 and Q1 base.

DESIGN OF BIAS CIRCUIT

Let Vce = 6V, Ieq=10mA (Q point of transistor Q2)

Then Vcc = 2Vce=2 x 6 =12 V
Ie = Ic = 10 mA
VR3 = Vcc - Vce= 12 – 6 = 6V
Re= VR3 / Ie = 6V / (10 mA) = 0.6K =560Ω (Choose)
VR2 -Vbe1 - Vbe2 – VR3 = 0 and VR2 = Vbe1 + Vbe2 + VR3
= 0.6 + 0.6 + (Ie.Re) = 1.2 + (10x0.6) = 7.2V
Vcc = Vr1 + Vr2
VR1= Vcc – VR2 = 12 – 7.2 = 4.8 V
Ie1= Ib2 = Ic / hfe = 10 mA / 100 = 0.1mA
Ib1=Ie1 / hfe = 0.1mA / 100 = 1 μA
R1 = VR1/ (10 (Ib1)) = 4.8 / (10 x 1 μA) = 480 KΩ
R2= VR2 / (9 Ib) = 7.2 / (9 x 1 μA = 800kΩ
To find Cc

XcC  0.2 Ri (Ri = R1|| R2 || hie = hie)

Choose Ri = 1.5 K and f = 1KHz.

1  2  f CE x 0.1 R i

Cc  1 / 2  f x 0.1 Ri = 1 / (2 x 3.14 x 1000 x 0.2 x 1500) = 0.53 F

So, Cc = 0.47 F is selected.

Procedure:-

1. To find Q-point: Connect the ckt without Ac supply .Set Vcc=12V.Measure the DC voltage (using
CRO/multimeter) at the (VB2), Collector (VC2) emitter (VE2) w.r.t ground. Then determine VCE2=
VC2 – VE2, IC2=IE2=VE2 / RE
2. Q point = (Vce2, Ic2)
3. Connect the signal generator and apply a sine wave of peak-to-peak amplitude 1V , 1kHz from the
signal generator and note down the output wave form.
4. Gradually increases the input signal until the output signal get distorted. When this happens slightly
reduce the input signal amplitude such that output is maximum undistorted signal. Then measure the
magnitude of the input and output waveform. Calculate the Voltage gain.
5. Find the input and output impedance as explained below
6. Connect the bootstrap circuit Rb and Cb between the emitter and base as shown in the circuit. Repeat
the steps 3 to 5

Avm = Vi/Vo

TO MEASURE Zin AND Zo

1. To measure Zin (Input Impedance)

Procedure to find Zin

1. Connect the circuit as shown in figure.

2. Set the DRB to minimum resistance (0Ω), I/P sine wave amplitude to 1V p-p, I/P sine wave
frequency to 10 KHz.
3. Measure Vo (p-p). Let Vo=Va
4. Increase DRB till Vo=Va/2.the corresponding DRB value gives Zin.

2. To measure Zo (Output Impedance)

PROCEDURE

1. Connect the circuit as shown in figure. Set the DRB to its maximum resistance value, I/P sine wave
Frequency to 10 KHz.
2. Measure Vo p-p, let Vo = Vb
3. Decrease DRB till Vo =Vb/2.
The corresponding DRB value gives Zo.

To find the current gain

Ai=Io/Ii= (Vo/Zo)/(Vi/Zin) = (Vo/Vi) * (Zin/Zo)

Current gain Ai ≈ Zin / Zo, since (Vo/Vi) = 1
Result:- Thus the Darlington’s Emitter follower was designed and studied

Parameters Avm =Vo/Vi Zi Zo Ai

Without Bootstrap

With bootstrap
 EXPERIMENT 4: RC PHASE SHIFT OSCILLATOR

AIM
Wiring and testing for the performance of BJT- RC phase shift oscillator for fo ≤ 10KHZ

COMPONENTS/APPARATUS REQUIRED

Sl. Apparatus and

Range Quantity
No components

01 Bread board 1

02 Transistor BC 107B 1

03 Resistors

04 Capacitors

05 VRPS 0-30Vdc 3A

06 Signal generator 10Hz to 1Mhz 1

07 CRO 1

08 Probes, wires

09 POT 10k,100k 1

BRIEF THEORY:
RC phase shift Oscillator basically consists of an amplifier and feed back network consisting of resistors
and capacitors in ladder fashion. The basic RC circuit is as shown below

The current I is in phase with Vo, whereas the capacitor voltage Vc lags the current I by φ
(90®→Ideal value).OR the output voltage Vo leads the I/P voltage Vi by angle φ is adjusted in practice,
equal to 60®.RC network is used in feedback path. In Oscillator, feedback network must introduce a
phase shift of 180® to obtain total phase shift around a loop as 360®.Thus three Rc network each
provide 60® phase shift is cascaded, so that it produces total 180® phase shift. The Oscillator circuit
consisting amplifier and Rc feedback network is as shown below
CIRCUIT DIAGRAM

DESIGN PROCEDURE
Select transistor BC107b having the following specifications,
Ie=Ic= 2mA; ß=215; Vce=5v; Vcc=2Vce =>10v
To find Re:
Choose Ve =Vcc/10=10/10 =1 v
Ve = Ie*Re =>Re=Ve / Ie
Re = 1 / Ie =1 / 2mA = 0.5K Ω
Select Re = 560 Ω

To find Rc:
Choose Vce = Vcc / 2 =10/2=5 v
Apply KVL in CE loop:
Vcc- (IcRc) - Vce - Vre=0
10v-(2mA* Rc) – 5v –1v=0
Rc = (10v-5v-1v) / 2mA
Rc = 2K Ω
Select Rc= 2.2K Ω
To find R1 & R2

Vb = Vbe + Ve => 0.7v + 1v = 1.7v

Vb =(Vcc*R2) / ( R1 + R2 )
1.7v = (10v*R2) / ( R1 + R2 ) => R2/(R1+ R2)=1.7v/10v
10 R2 = 1.7 R1 +1.7 R2
R1= 4.8* R2
Select R2 =4.7K Ω
R1 = 4.8 * 4.7K Ω => R1 = 22.56K Ω
Select R1 = 27K Ω

To find Bypass capacitor Ce:

Let Xce = Re / 10, at f = 100 Hz; 1/(2π*f*Ce) = Re / 10

Therefore Ce=10 / (2π*100 Hz *560 Ω) =31.8 micro farad
Choose Ce=50 micro F (electrolytic)

To find Cc1 and CC2:

Assume CC1 & CC2 = 0.47 micro F (ceramic)
To design: Xcc1 = (Hie||Rb)/10, Xcc1 =1/ (2π*f*Cc1), Cc1=?
Xcc2 = (Rc||Rl)/10, Xcc2 =1/ (2π*f*Cc2), Cc2=?

Design of phase shifting network

The frequency of oscillator is determined by phase shifting network. The oscillating frequency for the
above circuit is given by
f = 1/ (2ΠRC√ (6+4K))
Where K = Rc/R which is usually less than 1.
Let f = 10K HZ and R = 10KΩ => k = (2.2K Ω/10K Ω) = 0.22
f = 1/ (2ΠRC√ (6+4K))
10K = 1/ (2Π*10K*C√ (6+4(0.22)))
=> C = 0.006 μ F [choose C = 0.0047 μ F]

NOTE
The last resistor in the phase shifting network is chosen to be a 10K POT. This is done to get an overall
phase shift of 180º at frequency of oscillations.
The minimum hfe required for the transistor to oscillate is
 hfe min = 23 + 29(R/Rc) + 4(Rc/R)
Where Rc = 1K Ω and R = 2.2K Ω (Phase shifting network)
Therefore hfe (min) = 23 + 29(2.2K/1K) +4 = (1K/2.2K) = 89.
The transistor should be chosen to have a value hfe of greater than 89

PROCEDURE
1. Make the circuit connection as shown in fig. a
2. The output Vo is obtained on CRO.
3. The 10K POT is adjusted to get a stable out on the screen of CRO.
4. The frequency of oscillations is measured using CRO is then compared with theoretical values.
5. We can see the phase shift at each point being 60º, 120º & 180º

RESULT
Theoretical frequency =
Practical frequency =
EXPERIMENT 5: HARTLEY AND COLPITTS OSCILLATOR

AIM
To test the performance of BJT Hartley and colpitts oscillator for RE range fo ≥ 100K Hz

COMPONENTS REQUIRED

Sl.No Apparatus / components required Range Quantity

1 Transistor BC107B 1
2 Resistor
3 Inductor 1
4 Capacitor 1
5 Potentiometer 10K 1
6 CRO 1
7 Probes & Wires

CIRCUIT DIAGRAM

DESIGN PROCEDURE

Select BF194 BJT having the following specifications

Vce = 10V, Ic = 1mA, hfe = 115, hie = 1.85K
Ce = 36.17μF hence choose Ce = 47μF
Selecting coupling capacitance Cc1 and Cc2
Choose Cc1 = Cc2 = 0.047 μF

Design of tank circuit

1
fo = where Leq=L1 + L2
2  LeqC
fo = 100K Hz choose C = 0.001 μF
1
(fo) 2 =
4  LeqC
2

1
Leq 
( fo ) 4 2 C
2

PROCEDURE

1. Rig up the circuit as shown in Fig (a).

2. Adjust 10K POT to obtain proper sinusoidal output waveform.
3. Measure the frequency of oscillations and compare with designed value.

RESULT
Theoretical frequency = Practical frequency =
EXPERIMENT 6: CRYSTALL OSCILLATOR
AIM

Testing for the performance of BJT-Crystal oscillator for fo > 100K Hz.

COMPONENTS/APPARATUS REQUIRED

SL.NO Apparatus/Components Range Quantity

Required
1 BJT BF-194 1
2 Resistor 1 each
3 Crystal 1
4 Inductance box 1
5 Potentiometer
6 Capacitor
7 CRO 1
8 Probes & wires
9 VRPS 1

DESIGN PROCEDURE

Select BF 194 BJT having the following specifications

Vce = 10V; Ic = 1mA; hfe = 115; hie = 1.85 K
Selection of RE
VCC = 2VCE = 20V
VE = VCC /10 = 2V
V=

EXPERIMENT 7: CLIPPING CIRCUITS

AIM
To design and test the diode clipping (single or double ended) circuits for the peak clipping and peak
detection.

COMPONENTS/APPARATUS

SL.NO Apparatus / components Range Quantity

1 Diode IN4007B 2
2 Resistor 3.3K 1
3 VRPS 30V 1
4 AFO 1
5 CRO 1
6 Probes, wires
CIRCUIT DIAGRAM

1. Diode shunt clipping above VR or Positive peak clipping

1 (b) Input & output waveforms

1 (c) Transfer characteristics

2. Diode shunt clipping below VR or Negative peak clipping

 Fig 2 (a)

2 (b) Input & output waveforms

2 (c) Transfer characteristics

3. Diode series clipping above VR or Positive peak clipping

 Fig 3 (a)

3 (b) Input & output waveforms

3 (c) Transfer characteristics

4. Diode series clipping below VR or Negative peak clipping

Fig 4 (a)
 4 (b) Input & output waveforms

4 (c) Transfer characteristics

5. Clipping at two independent levels or slicer circuits

Fig 5 (a)

5 (b) Input & output waveforms

 5 (c) Transfer characteristics

6. Double ended clipper to generate a symmetrical square wave or squarer.

Fig 6(a)

6 (b) Input & output waveforms

6 (c) Transfer characteristics

 7. Clipping circuits to clip the center portion and transmit the extremities of sinusoidal
signal.

Fig 7 (a)

7 (b) Input & output waveforms

7 (c) Transfer characteristics

DESIGN PROCEDURE
1. Diode shunt clipping above Vr or positive peak clipping

Refer to the circuit diagram 1(a)

Let the output voltage be clipped to say +2v
Vo(max) = +2V
Vo(max)=Vr+VR
Where Vr = 0.6 for silicon diode, is cut in voltage
VR = Vo(max) – Vr
VR = 2v-0.6v = 1.4v
The value of resistor is chosen to be R = √ (RfRr)
Where Rf = diode forward resistance = 10 Ω
 Rr = diode reverse resistance = 10M Ω
R = √ (RfRr) = √ (10*10M) = 10K Ω [Assume R to be 3.3K Ω]

2. Diode shunt clipping below Vr or Negative peak clipping

Refer to the circuit diagram 2(a)

Let the negative voltage be clipped to say -2v
Vo(min) = -2v
Vo(min)=Vr-VR => VR = -1.4v and R =10K Ω

3. Diode series clipping above Vr or positive peak clipping

Refer to the circuit diagram 3(a)

Let the output voltage be clipped to say +2v
Vo(max) = VR= +2V and R =10K Ω

4. Diode series clipping below Vr or negative peak clipping

Refer to the circuit diagram 4(a)

Let the output voltage be clipped to say -2v
Vo(max) = VR= -2v and R =10K Ω

5. Clipping at two independent levels or slicer circuit

Refer to the circuit diagram 5(a)

To obtain a slice of input voltage between 2v and 4v levels at its output
Let VR1 > VR2, V0(max) = 4v = VR1 + Vr
VR1 = 4v - 0.6v = 3.4v
Also V0 (min) =2v = VR2 – Vr
VR2 = 2v + 0.6v and R =10K Ω

6. Double ended clipper to generate a symmetrical square wave or squarer

Refer to the circuit diagram 6(a)

To generate a symmetrical square wave of ± VR volts when Vi = Vm sin ωt
Vo (max) = 2v = VR1 + Vr
VR1 = 2v – 0.6v = 1.4v and
Vo ( min ) = VR2 – Vr
VR2 = Vo ( min ) + Vr = -2v + 0.6v = -1.4v and R = 10K Ω

7. Clipping circuits to clip the center position and transmit the extremities of sinusoidal signal

Refer to the circuit diagram 7(a)

To clip a sinusoidal wave between +2v and -3v level
Vo = VR1 + 0.6v
 VR1 = 2v – 0.6v = 1.4v
Similarly Vo = -3v = VR2 – 0.6v
VR2 = - 3v + 0.6v = -2.4v and R = 10K Ω

PROCEDURE

1. Place the components on bread board and connect them as per the circuit diagram 1(a).
Use the wires for connection as required.
2. Switch on the signal generator and set voltage to 10V P-P and frequency to 100Hz,
3. Using CRO measure the out put wave form and sees that it matches with required wave
form. Vary the DC voltage and tabulate the level of clipping.
4. Connect the input and output wave form to the two channels of the CRO and using XY
mode observe and note down the transfer characteristic.
5. Note down input & output wave form and draw it on graph.
6. Repeat this for other clipping circuits.

RESULT
All types of clipper circuits are tested and output wave form matches with the expected waveform and
level clipping vary with the Vdc level.
EXPERIMENT 9: CLASS – B PUSH PULL POWER AMPLIFIER
AIM
To test class-B transformer less push pull amplifier for crossover distortion and find its conversion
efficiency.

COMPONENTS/APPARATUS REQUIRED

Apparatus and Range Quantity

01 Bread board
components 1
02 NPN & PNP transistors SL100 One each
03 Resistors AR
04 Capacitors AR
05 VRPS 0-30Vdc 3A 2
06 Signal generator 10Hz to 1Mhz 1
Sl.07No CRO
08 Probes, wires
09 Multimeter 1

CIRCUIT DIAGRAM:
PROCEDURE
1. Rig up the circuit as shown in figure.
2. Keep increasing the input signal, from 0, until crossover distortion is observed. Note down the
waveform and peak values of input and output voltage.
3. Calculate the conversion efficiency using the formula
%efficiency =  VL(Peak) / (4Vcc)

OUTPUT WAVEFORM

RESULT
Conversion Efficiency =