Anjali Varghese C et al.

/ International Journal of Engineering and Technology (IJET)

Analysis of Leakage Current and DC

Injection in Transformerless PV Inverter
Topologies
Anjali Varghese C #1, Karpagam M *2, Alwarsamy T #3
#
Research Scholar, Anna University, Chennai
#
Liaison Officer, DOTE, Chennai
India
1
anjuvicy@gmail.com
3
talwarsamy@gmail.com
*
Assosciate Professor, Hindusthan College of Engineering and Technology
Coimbatore,India
2
karpagam.sathish@gmail.com

Abstract—Considering low efficiencies of solar panels, the reliability and efficiency of power electronic
interface has to be ensured. Transformerless PV inverters increases the efficiency by nearly 2% and
decreases cost by 25%. With no galvanic isolation comes the problem of dc injection and ground leakage
current which pauses serious problems to core saturation of distribution transformers, cable corrosion,
Power quality and EMI problems and has to be limited as per IEEE standards. This paper gives an
analysis of leakage current flowing through the parasitic capacitance and also the DC injection in the
output of the inverter. Analysis is done for various values of parasitic capacitance. Five different H-
Bridge derived topologies and PWM techniques are evaluated on the basis of leakage current and DC
injection.
Keyword-DC injection, Common Mode Voltage, Differential Mode Voltage, Parasitic Capacitance,
Leakage current.

I. INTRODUCTION
Avoiding transformers while connecting PV inverters to grid has gained much popularity due to its increased
efficiency (nearly by 2%) and decreased cost (nearly by 25%). Transformers used for isolation could either be
line frequency transformers which increase the bulkiness of the system while high frequency transformers
require more than one power stage and increase system complexity.
However, transformerless inverters have a serious drawback of ground leakage current which flows between
the PV array and the ground through the parasitic capacitance that exists between PV cell and its frame. When
the frame is grounded the parasitic capacitance exists between the PV array and ground. The common mode
voltage fluctuations across this capacitance cause ground leakage current flow which initiates problems of EMI,
personnel safety, power quality issues and system losses. Large ground leakage currents are formed when
parasitic capacitance AC side filter inductors and grid form a resonant circuit.
To minimize the leakage current, the maintenance of constant common mode voltage is primarily required.
Common mode voltage largely depends on topology of the inverter and PWM techniques.
Full bridge configuration with bipolar PWM has constant common mode voltage but with a reduced
efficiency and large output current ripple. Full bridge with unipolar PWM has many advantages of increased
efficiency and three level output. There are other full bridge derived structures like H5 and HERIC topologies
which use additional switches for DC and AC decoupling respectively. Decoupling switches enable the
disconnection of PV panel from the grid during freewheeling modes. This helps in limiting the DC link voltage
ripple.
The galvanic connection between the PV system and the utility also causes DC current injection from PV
system to the utility. This DC injection, according to Blewitt et al can be classified as common mode and
differential mode DC current injection. Common mode DC injection is established due to the parasitic
capacitance that is formed between the PV array and ground. This in turn produces ground leakage current
between inverter output and DC stage. A finite DC component is thereby injected to the inverter output through
this connection. Ground leakage current can be prevented by maintaining the common mode voltage constant.
This can also be prevented by using various topologies and pulse width modulation (PWM) techniques.
Differential mode DC injection is produced due to the asymmetrical operation of inverter switches and also due
to offset errors produced by sensors and transducers. Also a differential mode voltage component is generated

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within coommon modee component which w is discuussed in section II and cann be avoided uusing equal value filter
inductorss. DC injectioon can be elimminated by usiing series cappacitors, DC liink sensors annd particular topologies
t
using DCC decoupling during
d freewhheeling modess in inverter opperation[1]-[7].
The orrganisation off the paper is as
a follows: Seection II contaains modellingg of common mode voltagee . Section
III gives the analysis of the five diifferent H-Briidge derived topologies. Seection IV givves the compaarison and
experimeental analysis and Section V summarizes the conclusio on obtained froom the experimments.

II. COMMON N MODE VOLT TAGE MODEL

The gaalvanic conneection betweeen PV inverterr and the grid d pauses the problem
p of leeakage currennt and DC
injection. This sectionn models the equivalent coommon modee voltage considering bothh differential mode m and
common mode voltagee.
Figg. 1 shows thhe model of siingle phase innverter conneccted to the ou utput of PV arrray through a DC link
capacitorr. LR and LY are
a line inducttors respectiveely and Lg is thet inductor on the grid sidee. Parasitic caapacitance
can existt between PV V panel and frame,
f represeented as CPV, between line and groundd, as CLG and d between
transform
mer windings, CW.
Groound leakage current flow ws from the ooutput of PV V through CPV V to the grou und. Since grid is also
groundedd, leakage currrent flows to o the grid. Foor PV inverterrs with galvan nic isolation , the stray caapacitance
between transformer windings offeer impedancee to DC curreent and thereefore the DC injection is not much
influenceed by topologgy or PWM technique usedd in inverterss. But in tran nsformerless innverters sincee winding
capacitannce is absent the
t topology as a well as moddulation strateegies can be effectively
e moodified to elim
minate DC
injection.
The ccommon modee voltage exissting betweenn R and Y terminals of the line is obtainned where VCM C _RY and
VDM_RY aare the comm mon mode and differential m mode voltage between
b lines R and Y resppectively. VRNN and VYN
are the ouutput voltagess of the invertter with respeect to the negaative terminal N of the DC bus referencee. VCM_RY
and VDM_RY are definned as

V RNN  VYN
C _ RY 
VCM (1)
2

D _ RY  V RN
VDM N  VYN (2)

Fig 1. Com
mmon Mode Volltage Model

VCCM_EFF is the combination of common mode voltage between lin nes and the ccommon mod de voltage
producedd by the differrential mode voltage
v whichh is influenced by the filterr inductance iimbalances deepicted as
Vry.
Effectiive common mode
m voltage can be defineed as

VCM _ EFF  VCM _ RY  Vry (3)

VDM _ RY LY  LR
Vry  (4)
2 LY  LR

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Thhis voltage cann be made zerro if LR=LY. TThe inverter has

h been desig gned with equual output ind ductors. In
this papeer, the DC injeection measureed and shownn is the total DC injection in
n the output off the inverter[8
8]-[11].

Fig 2. Modeel of Effective Co

ommon Mode

III. ANA
ALYSIS OF TOP
POLOGIES

This ssection gives ana analysis off leakage currrent flowing through
t the paarasitic capaciitance and alsso the DC
injection in the outpuut of the inverter. Five difffferent H-Briddge derived to
opologies andd PWM techn niques are
evaluatedd on the basiss of leakage current
c and D
DC injection. Transformerleess inverters bbased on H-B Bridge are
chosen foor their less coomplexity in analysis
a and m
modelling [12]]-[14].

Bridge with Bipolar Pulse Width

i) H-B W Modulattion (PWM)
ii)H-B
Bridge with Unnipolar Pulse Width
W Modulaation
iii)H-B
Bridge with Hybrid
H Pulse Width
W Modulat
ation
iv)H-BBridge Topoloogy with DC Bypass
B (one S
Switch)
v)H-BBridge Topologgy with DC Bypass(two
B swwitches)

i) H-Bridge withh Bipolar Pulsse Width Moddulation

Fig 3. H--Bridge inverter Topology

T

S1 andd S3 are sw witched by commparing sinussoidal signal with triangulaar carrier signnal and S2 an nd S4 are
switchedd complementaarily. There iss no zero outpuut voltage statte in this conffiguration. Thee filtering req
quirements
are high iin bipolar PWWM. The outpu ut voltage is bbipolar in natu
ure, (+VDC to -V
- DC to +VDC)), and so core losses are
high. Effficiency is low
w due to reactive power trannsfer between LR, LY with CPV.
ii) H-Bridge withh Unipolar PW WM
Two leegs are switchhed by comparing high freqquency with siinusoidal and mirrored sinuusoidal referen nces. Two
zero outpput voltage sttates are possible when S11, S3 = ON and a S2, S4 = ON. Since thhe switching ripple r has
double thhe switching frequency, the t filtering rrequirements are lowered. The output voltage is un nipolar in

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nature.(00 to +VDC to 0 to –VDC to 0). 0 Losses aree reduced duriing zero voltaage states andd therefore effficiency is
higher thhan bipolar.
iii) H-Bridge with Hybrid
H PWM
One leeg is switchedd at low grid frequency andd the other leeg is switchedd at high PWM M frequency. Two zero
output vooltage states are possible: S1, S2 = ON N and S3, S4 = ON. Effficiency is higgh as in unip polar. The
switchingg ripple in thee current follow
ws switching frequency andd hence filtering requiremennts are higherr.
iv) H-Bridge withh DC Bypass (one Switch)

Fig 4. H-Bridgge with DC Bypaass (one Switch)

The H – bridge swiitches in this topology

t folloow a unipolar switching pattern. Switch S5 is turned off
o during
the freewwheeling modee of the inverrter. Two zeroo output voltage states are possible:
p S1, S2 = ON and d S3, S4 =
ON. Efficciency is highh as in unipolaar. The switchhing ripple in the
t current folllows switchinng frequency and
a hence
filtering rrequirements are higher. Thhis modulationn can be used only for two quadrant operration.

v) H-Bridge withh DC Bypass (Two Switchees)

Fig 5. H-Bridgee with DC Bypasss (Two Switches)

The H
H-Bridge switcches in this top
pology follow
w a unipolar sw
witching patteern. S5 and S66 (DC Bypass switches)
are turneed off during zero output voltage statees. The efficieency is lowerr than unipollar has higherr filtering
requirem
ments.

IV. COMMPARISON OF RESULTS

To anaalyze and com
mpare the leak kage current off output for th
he various topologies, simul
ulations were performed
p
in MATL LAB/Simulinkk. Two filter inductors
i are placed in the line and neuttral of the outpput as shown. Analysis
is done bby varying thee parasitic cap
pacitance CPVV over a rang ge of 1µF to 10µF
1 and studdying the FFTT analysis
and funddamental valuue of leakagee current. Annalysis of the inverter outp put current wwith varying values of

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parasitic capacitance has

h been donee. Also the annalysis of effeect of output inductor imbaalance on DC C injection
has beenn observed. Further
F the efffect of seriess capacitance connected in
n the output oof inverter on
n the DC
injection values has alsso been investtigated.

Fig 6. Leakagge Current Vs Parrasitic capacitance

Fig 6 shows the efffect of varying parasitic caapacitance on the leakage current
c for diffferent topologies. This
chapter eevaluates 5 topologies on th he basis of leeakage currentt and shows that hybrid sw witched inverter has the
highest lleakage curreent and the topologies wiith DC bypasss has lesser leakage currrent values. In I all the
topologiees, the leakagee current increeases with incrreased with in
ncreasing valu
ues of parasiticc capacitance..

Fig 7. Comparison
C of DC
C Injection valuees for various topo
ologies with vary
ying parasitic cappacitance

Fig 7 sshows the effeect of various topologies onn DC injection

n with varying
g parasitic cappacitance. It caan be seen
that the vvalue of DC does
d not much depend on the value of parasitic
p capaacitance but itt rather depennds on the
PWM tecchnique and circuit
c topology. As can bbe seen, the DCD injection value
v is maximmum for hyb brid PWM
topologyy and least for bipolar topo ology. The U Unipolar topollogy has more DC injectioon than H-Brridge with
witch DC Bypaass and H-Bridge with doubble switch DC
single sw C Bypass topologies.

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Fig 8. Coomparison of DC
C Injection values for various topollogies with varyin
ng output inducto
tor values.

Anothher interesting feature can be b seen in fig 8. The effect of varying the output indu ductors can bee observed
for the 5 topologies. When
W there is no imbalancee that is when n LY = LR, thee DC injectionn values are lesser. But
when theere is imbalannce in the outp put inductor vvalues, the DC injection haas substantialllly increased for
f all the
topologiees. So it can be clearly stateed that DC injeection dependds on the commmon mode efffective voltagee.

Fig 9. Com
mparison of DC Innjection values for various topologgies with varying output inductor values and outpuut series capacitan
nce.

When series capaciitance is addeed to the diffeerent topologies, as seen in

n fig 9 the DC
C injection vaalues have
consideraably dropped.. It can be observed that DC injection n values does not much deepend on thee value of
parasitic capacitance .The value off injected DC C definitely depends
d on the effective ccommon mod de voltage
which caan be adjusted by the balancce of output innductors.
TABLE I
Com
mparison of Topologies

Topology Parameters
P
Leakage DC Common Effective C
Common
Cu
urrent Injection Mode voltagee Mode Volltage
VCM VCM_EFF
LY=LR LY=0
H-Bridge wiith w
Low Low VDC/2 VDC/2 0,VDC/2
Bipolar PWM M
H-Bridge wiith gh
Hig High 0,VDC/2 0,VDC/2 0,VDC
Unipolar PW
WM
H-Bridge wiith Hig
ghest Highest 0,VDC/2 0,VDC/2 0,VDC/2
Hybrid PWM M , VDC
H-Bridge wiith DC Low
w Low VDC/2 VDC/2 0,VDC/2
Bypass (onee Switch) , VDC
H-Bridge wiith DC west
Low Lowest VDC/2 VDC/2 0,VDC/2
Bypass (twoo , VDC
Switches)

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V. CONCLUSION
This work evaluates five different transformerless topologies on the basis of leakage current and DC injection.
It can be seen from the analysis that DC decoupling of the inverter during freewheeling tends to reduce the
leakage current as well as DC injection. Moreover DC injection can be reduced by using equal values of output
inductors which indicates the dependence of DC component on the common mode voltage values. Among the
H-Bridge derived transformerless topologies, DC decoupling is suggested for use in grid connected PV systems.
Table I summarizes the result of analysis and shows that variation in common mode voltage accounts for high
leakage current values and also imbalance in output inductors causes wide variations in effective common mode
voltage.

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