A DIFFERENTIAL DUAL INTEGRATED CIRCUIT VIDEO IF

WITH BUILT-IN AGC FOR COLOR TELEVISION

Lawrence G. Augus tine

Motorola Semiconductor Division
Phoenix, Arizona

Abstract several of the serious drawbacks of dis-

crete transistors.' The feedback capac-
This paper explains a new video IF itance of the integrated circuit was
amplifier for color television incorpo- negligible, affording unilateralized
rating a high performance integrated operation. The AGC admittance variations
circuit and a discrete output transis- were greatly reduced, minimizing pole
tor. The integrated circuit (XC1352P) shift due to AGC. However, it still had
functions in two capacities: first as a some drawbacks, and the unit was not
unilateralized 50db gain IF amplifier generally accepted by the consumer indus-
with 65db usable AGC range; and second try.
as a gated keyer and AGC amplifier with
delayed AGC output for the tuner. The This year Motorola introduces a second
discrete transistor (MPS6544) with low generation integrated circuit which is so
Cre functions as an un-neutralized out- much better than several discrete tran-
put stage driving the detectors. Over- sistors, that it will surely revolution-
all sensitivity is 250V rms at 44MHz ize video IF amplifier designs in the
for 3V detected output (70db power gain). very near future.2 The operation, char-
Admittance variations with AGC are neg- acteristics, and use of this new dual
ligible, leaving the in-channel pass function integrated circuit (XC1352P -
band and adjacent channel rejection in- both an AGC IF amplifier and a gated AGC
dependent of AGC. The above character- amplifier) are the topics of this paper.
istics indicate that video IF amplifiers This paper stresses the qualitative as-
superior to those used today can be made pects of the IF portion of the integrated
by incorporating both the XC1352P and circuit. The exact details of the con-
MPS6544. Encapsulation of the dual necting interstages are left to each
function integrated circuit in a single manufacturer as each has his own idea as
14 pin dual in-line plastic package will to the final shape of the response,
bring the overall cost of these func- amount of adjacent channel rejection, and
tions down to competitive prices. configuration of traps. Sufficient quan-
titative data on the integrated circuit
Introduction is given for design work, and a working
model and pictures of the response are
Since the advent of color television, given to substantiate the claims made
more and more stringent requirements about it.
have been placed on Video IF Amplifiers
to improve the quality of the picture XC1352P
and reduce interference. In recent years
TV manufacturers have begun offering The XC1352P can best be analyzed by
solid state video IF amplifiers because considering its dual functions separately:
of reduced price, size, increased reli- Figure 1 is the AGC IF amplifier; Figure
ability, lower power requirements, and 2 is the keyed AGC amplif ier.
recent improvements in bipolar transis-
tor technology. Seldom have these solid AGC Video IF Amplifier of the XC1352P
state IF amplifiers had the performance (XCl350P)
quality of tube models because the feed-
back capacitance is typically higher and For convenience of analysis, the four
the AGC admittance variations are typi- functional sections have been indicated by
cally more serious and detrimental for dotted lines. Section A is the differ-
transistors than for tubes. ential input which drives Section B, the
AGC network. The differential output
Last year Motorola introduced a first voltage from the collector resistors in
generation integrated circuit (a cascode turn drive Section C, the differential
amplifier MC1550) which greatly reduced output of the IF portion of the integrated

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 OUTPUT SECTION C
+12 V
Q0I

Figure 1-IF Amplifier Portion of the XC1352P.

GATIN G SECTI ON IF AGC AMPLIFIER RF AGC AMPLIFIER ANIIDDELAY SECTION

PIN 3 NO CONNECTION

Figure 2-AGC Amplifier Portion of the XC1352P.

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circuit. Section D merely biases the used for this purpose, but the small out-
other sections. A qualitative explana- put admittance variation will be further
tion of each follows. minimized if a separate 15V DC supply is
used.
The input (pins 1 and 2) is to a dif-
ferential pair of transistors (Q14 and The middle section of the IF amplifier
Q15) used as the first stages of two supplies constant bias voltage to the in-
parallel cascode amplifiers. The biasing put and AGC sections, and constant bias
current is 8ma, yielding emitter resis- current for the output section.
tances of 3 ohms. A virtual A-C ground
exists at the center of their 30 ohm con- The overall transconductance of the IF
necting resistor when they operate dif- amplifier is 600mmhos and is flat out to
ferentially. Each junction therefore a break frequency of 10OMHz; the phase
sees only one eleventh (1/11) of the angle is linear from -55° at 40MHz to
total input voltage. This extends the -65° at 46MHz. Stable power gain of 50db
signal handling capability of the inte- at 44MHz with a 6MHz bandwidth is readily
grated circuit by a full order of magni- obtained since the internal feedback of
tude over that of a non-gain controlled the integrated circuit is typically <5fF
discrete transistor. The differential (0.005pf) and because the differential
input admittance (typically 1 + J2.2 output mode minimizes the effect of ex-
mmhos) is independent of AGC since the ternal feedback and ground loops.
emitter currents are constant. The dif-
ference between operating the input In summary, the video IF portion of
differentially or with one side grounded XC1352P provides the following character-.
is insignificant, and for simplicity the istics essential for a good 2 stage video
latter is chosen. IF: almost unilaterilized operation;
negligible admittance variations with AGC;
The AGC output stages of the cascode constant output current with AGC; 50db
amplifiers consist of two transistors stable power gain; minimum sync pulse
(Q17 and Q18) which shunt current away distortion for the usable 65db AGC range;
from the output transistors (Q16 and Ql9) minimum biasing and bypassing components;
under AGC conditions. AGC action occurs minimum phase shift across the pass band;
when VAGC is increased to within proxim- and minimum external AC currents and
ity of the base voltage common to Q16 and voltages in the biasing power supplies
Ql9, and reaches a maximum when it is and ground loops.
about lOOmV greater than this base volt-
age. The portion of the AC current sup- Keyed AGC Amplifier of the XC1352P
plied from Q14 and Ql9 to Q16 and Q1g is
proportional to the DC current flowing The Keyed AGC Amplifier of the XC1352P
thru Ql6 and Ql9 When properly gain consists of three sections: the gated
controlled, the differential voltage keyer; the IF AGC amplifier; and the de-
developed across the load resistors is layed RF AGC Amplifier.
constant, independent of the input volt-
age. Although 75db AGC is possible, us- The gating circuit requires the stand-
able AGC is usually limited to 65db be- ard three signals (gating pulse, refer-
cause of maximum input level without ence level, and video signal), and in-
overloading. cludes an option for positive or negative
going sync. The negative going gating
The emitter followers of the output pulse (O to -5V) is connected to pin 5
section (Q25 and Q28) are driven by the (Dl provides avalanche protection for the
differential output from the AGC section E-B junction of Ql for large gating
(Q9t and Ql9); they in turn drive the
di erentia output transistors (Q26 and
pulses). The first option is for a posi-
tive going video sync pulse: the DC
Q27) and are used to prevent loading of reference voltage (1 to 4V) is connected
the AGC section. The Darlington con- to pin 6 while the positive going sync is
figuration of Q23 and Q24 maintains a connected to pin 10. When either no gat-
constant current in the output transis- ing pulse exists, or when the detected
tors Q26 and Q97, minimizing output ad- video sync pulse level is below the ref-
mittance variation and maintaining cons- erence level, lma flows through the com-
tant forward transconductance. Differ- mon collector resistor of either Q3 or
ential output admittance is typically Q4. This reverse biases diode D2 con-
60 + J5004mhos. The collector biasing nected to both the shunt capacitor (84f
of the output stages is supplied through at pin 9) and the input to the differen-
a center tapped tuning coil to pins 7 and tial IF AGC amplifier (Q) until the
8 from a 12 to 15V DC supply. The B+ capacitor discharges through Q5 suffi-
(12V at pin 11) for the XC1352P can be ciently that diode D2 is again forward

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biased. This discharge time determines Use of the XC1352P in an Actual Video
the rate at which the AGC reduces to a IF Amplifier
lower level.
Now that the dual functions of the
However, when there is both a proper XC1352P have been explained, a two stage
gating pulse and simultaneous positive working model is shown (Figure 3) and
going sync pulse of amplitude greater the results obtained from it are stated.
than the reference voltage, Ql turns on
while Q3 and Q4 turn off, pulse charging Conventional video IF amplifiers use
the capacitor through D2 in series with several stagger-tuned single pole inter-
the 7.5Kohm load resistor. This RC time stages for adequate adjacent channel re-
constant determines the rate at which AGC jection, with further rejection gained
is increased. A stable operating point by the use of traps. These poles are
is reached when the sync pulse level usually not isolated from each other,
maintains proper currents through Ql, Q3 however, because of the reverse trans-
and Q4 such that the charge pulsed conductance of the active devices; the
through D2 equals the charge drained by alignment of one affects the alignment
Q5. of the others. Further complicating
this problem is the fact that several
The second option is for a negative stages must be gain controlled, intro-
going video sync with a positive DC bias: ducing admittance variations and conse-
the DC reference voltage (1 to 4V DC) is quently skewing of the frequency re-
connected to pin 10 while the negative sponse with AGC. This latter effect is
going sync is connected to pin 6. The minimized by mismatching low at the ex-
DC bias superimposed on the video sync is pense of reduced gain and increased
set equal to the reference voltage plus bandwidth.
the desired sync pulse amplitude. Gated
keyer operation is analogous to that of These shortcomings are minimized in
the first option. this proposed model. The reverse trans-
conductance of the XC1352P is so low
The IF AGC amplifier is a differential (ltmho), that the stage can be consid-
amplifier (Q5 and Q6) and provides a high ered nearly unilateralized. Also, its
gain for good sensitivity. The output of admittance variations with AGC are neg-
Q6 is connected to both the AGC point ligible. Combining mismatch tech-
(pin 14) of the IF amplifier by a series niques for stability of the MPS6544 with
4Kohm resistor, and to the input of the its low reverse transconductance
RF AGC differential amplifier and delay (<150Qmhos), the interaction of poles
circuit. across this device is also low. The use
of three critically coupled, high Q,
The delayed RF AGC amplifier operates double tuned interstages is therefore
when the IF AGC voltage reaches the ref- possible without both the normally
erence bias level set at pin 13. When Qg serious alignment problems and AGC vari-
is off, Qll is on and both Ql2 and Q13 ation problems. Q is made equal to 10
are off, producing a zero RF IGC voltage or 12 while the KQ factor is made equal
at pin 12. When Qg is on QllA Q1 and to 1 or 2 depending upon whether a
Qli3 are on producing a maximum +77 RF AGC gaussian or trapazoidal frequency re-
voltage at pin 12. A small voltage sponse is desired.
change switches Qq from off to on, ensur-
ing that maximum AGC action of the tuner The first interstage is designed as a
occurs during a very small change in AGC capacitively, critically coupled, double
of the IF amplifier. The reference volt- tuned, 6MHz band-pass filter with a KQ=l.
age at pin 13 allows flexibility in Two or three traps are included in the
chosing the optimum AGC delay. secondary to improve adjacent lower
channel sound carrier (47.25MHz) and
It is to be noted that a minimum of upper channel PIX carrier (39.75MHz) re-
external connections are needed for the jection. An additional trap for upper
entire AGC amplifier: three capacitors channel sound carrier (35.25MHz) can be
to ground, two reference voltages, a gat- added if needed. The 39.75MHz and
ing pulse, a video signal, and an RF AGC 35.25MHz traps are designed with both a
line to the tuner. Overall flexibility zero and a higher pole to minimize suck-
is increased by the two options for ing out at the edge of the pass band.
either negative or positive going sync. This interstage then gives maximum re-
Two additional benefits gained are isola- jection of channel interference signals
tion of the gating pulse from the video prior to the input of the XC1352P. A
circuits and minimum loading of the de- 100 ohm resistor shunting the input of
tector. the XC1352P is recommended; the exact

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 Figure 3-Block Diagram of a Two Stage Video IF Amplifier

0.001 5 F49p

10052 ~~XC1352P
2 ~~~~~~~~~~~~~~~~~~~~~120 p

0.0015Iz(fj4( ~ ~ ~ ~ 2 0001 )

412Mz 39.75 MHz 3OPTION LHz

(OPIO
C3 p
TUNER DELAYED RF AGC

DELAY DC BIAS 6.0OV

=
DC BIAS FOR VIDEO AMPLITUDE
VIDEO SIGNAL
GATE PULSE

Figure 4-XC1352P Coupling Networks.

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details for the rest of the network are 3V detected output. Photos 1 thru 4 in-
omitted as the specific design is greatly dicate negligible pole movement over a
dependent upon the tuner and traps. Em- 70db AGC range. Photos 5 thru 8 indi-
phasis on des'ign of this interstage is cate negligible sync pulse extension
important since it determines much of the over the useful AGC range of 65db.
overall quality of the IF amplifier. Upper adjacent channel rejection was
good (>45db minimum). The in-channel
The design of the second interstage is sound carrier rejection at 41.25MHz
much simpler. The center tapped primary (using a bilfilar T prior to the XC1352P)
tuning coil (12 turns) is shunted by a was 65db minimum. But lower adjacent
10K ohm resistor in parallel with a 5pf channel rejection was inadequate ranging
capacitor, to minimize the effect of from 30db to 55db due to the excessively
admittance variations between different wide bandwidth of the third IF. Improved
units and maintain the primary Qp = 12. RF design of the third interstage gave
A symmetrically placed half-turn link narrower bandwidth with slightly more
couples the primary to the secondary for coupling, and combined with the use of
a KQ ' 2. A capacitive tap of 49pf in the double tuned interstage between the
series and 120pf in parallel links the mixer and the XCl352P, gave excellent
secondary coil (4 turns) to the base of adjacent channel rejection.
the MPS6544. This network can be modi-
fied to accomodate a reactive series- A later model proved to be inter-
parallel shunt trap for additional in- changeable with conventional IF ampli-
channel sound rejection at 41.25MHz prior fiers. The first two stages of the
to the discrete output if needed. The video IF amplifier of Motorola's Quasar
admittance looking into the MPS6544 is Color TV set were replaced by the
about (15 + JIO) mmhos for IE = 12ma. XCl352P. A .0015 capacitor was used to
couple the input traps to the XCl352P,
The third interstage (between the while the second interstage used a
MPS6544 and the detector) is designed capacitive tap of 56pf in series and
inductively coupled, double tuned, with SOpf in parallel for coupling the sec-
KQ A 1, and with Q = 12 for a 6MHz band- ondary of the 2nd interstage to the 3rd
width. Sufficient mismatch of the MPS- IF. Overall sensitivity at the antenna
6544 is used to gain stability. The terminals was lOV rms for about l.7V
sound IF is capacitively coupled to the detected output. Trapping (measured at
collector. A broad deep trap at the the base of the mixer) at 35.25MHz,
sound carrier (41.25MHz), with a pole at 41.25MHz, and 47.25MHz was in excess of
42MHz, is used in the secondary to elim- 75db, while attenuation at 51.75MHz was
inate mixing of the sound carrier with 67db. No 920KHz interference was evi-
both the chromanance s'ignal and video dent on the color picture. Choice of
carrier in the video detector. Exact proper ground connections minimized the
details of this interstage are left to overall loop feedback so that there was
individual designers. negligible frequency response shifts
with AGC, even with the use of un-
The important point about all three shielded tuning coils.
interstages is that they should be de-
signed as double tuned networks with Conclusion
KQ A 1.5 and Q = 10 to 12 to ensure maxi-
mum adjacent channel rejection. The salient features of the XC1352P
combined with a discrete IF output tran-
A simplified model (Figure 4) was sistor (such as the MPS6544) provide a
built to concentrate attention on the 2 stage video IF amplifier with superior
salient features of the XC1352P: uni- characteristics. A minimum of external
lateralized operation, high power gain, connections and components and no other
large signal handling capability, and discrete devices are required for both
non-variance of admittances with AGC. the differential AGC IF amplifiers and
The first interstage was omitted except the keyed AGC amplifier with delayed
for two traps. The second interstage action for the RF tuner. Un-neutralized
network used is described in this paper. power gain is 70db. Useable AGC range
The third IF stage used is described in is 65db with negligible sync distortion.
Motorola Application Note AN-287. The Q Alignment is simplified; and there is no
of the output stage, however, was lower variance of frequency response with AGC.
than desired, reducing the amount of Encapsulation of the XC1352P in a 14 pin
adjacent channel rejection. dual in line plastic package reduces the
overall price of its dual functions to
The overall sensitivity at the input competitive levels. The XCl352P is
to the XC1350P was 250QV rms at 444Hz for compatible with conventional circuit

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 IF Frequency Response vs. AGC* Simulated Sync Pulse Response vs. AGC**

Photo 1 0db AGC Photo 5 0db AGC

Photo 2 lOdb AGC Photo 6 50db AGC

Photo 3 40db AGC Photo 7 60db AGC

Photo 4 70db AGC Photo 8 65db AGC

* Vertical Scale = lVDC/CM ** Vertical Scale = lVDC/CM

Horizontal Scale = LMHz/CM
Markers: 41.25, 41.67, 42.17,
42.67, 45.75, & 47.25MHz

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techniques and conventional IF ampli-
fiers; but redesign of the interstage
coupling networks yields superior adja-
cent channel rejection. All in all, the
use of the XC1352P should revolutionize
IF strip design for color TV, including
the function of the keyed AGC amplifier
with delayed AGC for the RF tuner.

References

1. Welling, Brent, "An IC Color Video IF

Facilitates Alignment and Improves
AGC", IEEE Transactions on Broadcast
and Television Receivers, Volume BTR-
13, pp. 24-33, July, 1967.
2. Davis, Richard and Solomon, Jim,
"
A High Performance Mono-
lithic IF Amplifier Incorporating
Electronic Gain Control", 1968 Inter-
national Solid State Circuits Con-
ference, p. 118 and 119, Feb. 16,'68.

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