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ABSTRACT

This project is used to monitor the multiple remote petroleum oilfield banks status by
using wireless communication based on embedded technology. In our project designed for to
provide the wireless security for remote multiple petroleum banks by using compact embedded
security sensors. Here we have to use multiple sensors to monitor the petroleum bank status
like wireless oil well shutdown alarm, oil well power failure alarm, oil well running, oil theft
and some wireless night patrol point are used to provide the security of this each petroleum
bank.

This project split into two sections to provide the automation of wireless security
system. One is that wireless remote transmitter section and another one is that wireless central
monitoring system. This transmitter section was placed on each remote petrol bank and the
receiver central unit was placed on central monitoring area. This wireless transmitter section
was contain wireless oil well shutdown alarm, oil well power failure alarm, oil well running,
and oil theft checking alarm and wireless night patrol point also. The core of a wireless
transmitter and some launchers adopt advanced embedded technology. This central unit was
containing a wireless receiver and a wireless alarm controller in the system. The core of a
wireless receiver and some launchers adopt advanced embedded technology. This can
improve the level of oilfield security, enhance it’s the security checking, strengthen the
management of it’s the digitalization and informatization. It has the important significance
and social and economic benefits for the dependability and the controllability of remote
communication
TABLE OF CONTENTS

LIST OF FIGURES

LIST OF TABLES

CHAPTER -1

1 INTRODUCTION

1.1 Function of oil well shutdown alarm


1.2 Function of oil well running alarm

1.3 Function of power failure alarm

1.4 Function of guard against theft oil alarm

1.5 Function of the night patrol alarm

CHAPTER- 2

2 AIM AND SCOPE OF PRESENT INVESTIGATION

2.1 AIM OF THE PROJECT


2.2 SCOPE OF PRESENT INVESTIGATION

2.3 BLOCK DIAGRAM

2.3.1 RF Transmitter

2.3.2 RF Receiver

CHAPTER -3

3 EXPERIMENTAL OR MATERIAL AND METHOD;

3.1 PORTABLE HARDWARE EQUIPMENT LAYOUT


3.1.1 NODE 1(TRANSMITTING SECTION)

3.1.1.1 IR Transmitter and IR Receiver

3.1.1.2 Power Detecting Circuit


3.1.1.3 Relay Circuit
3.1.1.4 Battery
3.1.1.5 RF Transmitter

3.1.2 NODE 2(TRANSMITTING SECTION)


3.1.2.1 Power Supply Circuit

3.1.3 RECEIVING SECTION


3.1.3.1 RF Receiver
3.1.3.2 AT89S52 Microcontroller
3.1.3.2.1 Description
3.1.3.2.2 Features
3.1.3.2.2 Pin Diagram
3.1.3.2.3 Block Diagram
3.1.3.2.4 Pin Description

3.1.3.3 APR 9600 Circuit


3.1.3.3.1 Features
3.1.3.3.2 General Description
3.1.3.3.3 Pin out Diagram
3.1.3.3.4 Pin Description
3.1.3.3.5 Circuit Diagram

3.1.3.4 Keypad
3.1.3.5 GSM Modem

CHAPTER -4

4 RS232 SERIAL COMMUNICATION

4.1 INTRODUCTION

4.2 RS-232 BASICS

4.3 RS-232 LEVEL CONVERTERS


4.4 MAX232 INTERFACING WITH MICROCONTROLLERS

CHAPTER-5

5 LIQUID CRYSTAL DISPLAY

5.1 INTERFACE PIN FUNCTION


5.2 FUNCTION DESCRIPTION
5.3 PRECAUTIONS IN USE OF LCD MODULES
5.4 GENERAL SPECIFICATION
5.5 ABSOLUTE MAXIMUM RATINGS

5.6 ELECTRICAL CHARACTERISTICS

CHAPTER-6

6 PCB FABRICATION

CHAPTER-7

7 SOFTWARE DETAILS

7.1 C PROGRAMMING FOR 8051 USING KEIL IDE

7.2 PROJECT CODING

CHAPTER-8
8 ADVANTAGES AND APPLICATIONS

CONCLUSION

REFERENCES
CHAPTER -1

INTRODUCTION

Using wireless and embedded technologies, a security managing system is designed, which
can be used for both areas of guard against theft and night patrol. This project contain two
level scheme, the first level is consist of a some remote controllers, which include wireless oil
well shutdown alarm, oil well power failure alarm, oil well running and oil theft alarm and
some wireless night patrol point. It can send message by the wireless transmitter.

The second level is consisting of a wireless receiver and a wireless alarm controller in the
system. The function of a wireless receiver can receive the information of some front-end
remote transmitters.

The system designed in this article employ wireless system in the front-end of data
acquisition, which consists of oil well shutdown alarm, oil well running alarm, power failure
alarm, oil stealing alarm, night patrol alarm.

1.1 Function of oil well shutdown alarm:

Wireless transmitter is installed on starter of the power distribution box. When the oil
well is shutdown and the belt of pumping is fracture, it send a wireless information. And then
passing through wireless receiver, the information is sent to duty room and is received and is
taken by the operator on duty in real-time, so as to reduce the time of oil well shutdown.

1.2 Function of oil well running alarm:

After solve problems of fault, we need to make oil well running. So, transmitter will
send a message when the oil well is restarted. The green lamp will be lighted, the buzzer will
send out monotone alarm sound when the receiver receives a message with running alarm,
which suggested that the oil well could go normal.

1.3 Function of power failure alarm:

Wireless transmitter is installed on the power. The wireless transmitter is


automatically converted into working state of dc battery of the internal when the power stops,
meanwhile, the wireless transmitter send a message with power failure alarm, which is
received by the receiver and the operator on duty is suggested that a warning signal. Because
the first step of criminals will stop the power when the electrical circuitry equipment is
destroyed. So, this function can widely used in many situations, such as prevent the
transmission line from being stolen, prevent the transformer from being stolen and so on.

1.4 Function of guard against theft oil alarm:

The criminals must rotate the handle on the well location when they steal oil.
Because the remote control as protection is installed on the handle, it will sent a wireless
signal to the launcher when the emergency of theft is happened, then through secondary
emission of the launcher, the message will be received by the receiver in the control center of
several kilometers away, the message to sound and to light will notice the duty human. This
will lead to the failure of criminals’ attaining their purpose.

1.5 Function of the night patrol alarm:

In order to ensure safe operation of the oil production, the oil workers must be go
everywhere and check the equipment on time every day, it is because the well location is not
only widely distributed in oil, but also the oil production adopt working state without watch.
After the oil production workers arrive at the oil well around several meters of the distribution
box, to click the button on the remote controller, and the remote controller sent a message to
the launcher, and then send it to the host receiver in the control center to record the number of
the well location, the number of workers and the time immediately.
CHAPTER -2

AIM AND SCOPE OF PRESENT INVESTIGATION

2.1 Aim of the project


This project is to monitor the oil well shutdown, oil well power failure, oil well good running
and oil theft. If any instruction is detected, the message sends to the authority person using
GSM technology and finally inform to voice alarm.

2.2 Scope of present investigation


This project is designed with Microcontroller, RF Transmitter, Receiver, limit switch,
IR Transmitter, Receiver, power detection circuit ,GSM Modem, Voice Processing Unit.

2.3 BLOCK DIAGRAM

2.3.1 RF Transmitter:

Node 1:

IR Transmitter IR Receiver Encoder RF Transmitter

Transformer Power Detecting

Oil Well Running

Node 2:

Oil Theft (or) Limit Switch Encoder RF Transmitter

Key
2.3.2 RF Receiver:

LCD Display

RF Decoder RS232 GSM Modem


Receiver
Micro
Controller

Voice Bank
CHAPTER -3

EXPERIMENTAL METHOD USED

3.1 PORTABLE HARDWARE EQUIPMENT LAYOUT

3.1.1 NODE 1(TRANSMITTING SECTION)


3.1.1.1 IR TRANSMITTER AND IR RECEIVER

Overview

This sensor can be used for most indoor applications where no important ambient light is
present. For simplicity, this sensor doesn't provide ambient light immunity, but a more
complicated, ambient light ignoring sensor should be discussed in a coming article. However,
this sensor can be used to measure the speed of object moving at a very high speed, like in
industry or in tachometers. In such applications, ambient light ignoring sensor, which rely on
sending 40 kHz pulsed signals cannot be used because there are time gaps between the pulses
where the sensor is 'blind'...
The solution proposed doesn't contain any special components, like photo-diodes, photo-
transistors, or IR receiver ics, only a couple if IR led’s, an op amp, a transistor and a couple of
resistors. In need, as the title says, a standard IR led is used for the purpose of detection. Due
to that fact, the circuit is extremely simple, and any novice electronics hobbyist can easily
understand and build it.
Object detection using IR light

It is the same principle in all infra-red proximity sensors. The basic idea is to send infra red
light through IR-led’s, which is then reflected by any object in front of the sensor.
Then all you have to do is to pick-up the
reflected IR light. For detecting the reflected
IR light, we are going to use a very original
technique: we are going to use another IR-
led, to detect the IR light that was emitted
from another led of the exact same type!
This is an electrical property of light
emitting diodes (led’s) which is the fact that
a led produce a voltage difference across its
leads when it is subjected to light. As if it
was a photo-cell, but with much lower
output current. In other words, the voltage
generated by the led’s can't be - in any way -
used to generate electrical power from light,
it can barely be detected. That's why as you
will notice in the
Schematic, we are going to use a op-amp (operational amplifier) to accurately detect very
small voltage changes.

Components positioning:

The correct positioning of the sender led, the receiver led with regard to each other and to the
op-amp can also increase the performance of the sensor. First, we need to adjust the position
of the sender led with respect to the receiver led, in such a way they are as near as possible to
each others , while preventing any IR light to be picked up by the receiver led before it hit and
object and returns back. The easiest way to do that is to put the sender(s) led(s) from one side
of the PCB, and the receiver led from the other side, as shown in the 3d model below.
This 3d model shows the position of the led’s.
The green plate is the PCB holding the
electronic components of the sensor. You can
notice that the receiver led is positioned under
the PCB, this way, there won’t be ambient
light falling directly on it, as ambient light
usually comes from the top.

It is also clear that this way of positioning the


led’s preventing the emitted IR light to be
detected before hitting an eventual obstacle.

Another important issue about components positioning, is the distance between the receiver
led and the op-amp. This should be as small as possible. Generally speaking, the length of
wires or PCB tracks before an amplifier should be reduced; otherwise, the amplifier will
amplify - along with the original signal - a lot of noise picked up from the electromagnetic
waves traveling the surrounding.
Here is an example PCB where the distance between the led and the op-amp is shown. Sure
this distance is not as critical as you may think; it can be up to 35mm without causing serious
problems, but trying to reduce this distance will always give you better results.

Actually, when I design the PCB, I start by placing the receiver led and the op-amp, as near to
each others as possible, and then continue the rest of the design.

3.1.1.2 POWER DETECTING CIRCUIT


3.1.1.3 RELAY CIRCUIT

A relay is an electrically operated switch. Many relays use an electromagnet to operate a


switching mechanism mechanically, but other operating principles are also used. Relays are
used where it is necessary to control a circuit by a low-power signal (with complete electrical
isolation between control and controlled circuits), or where several circuits must be controlled
by one signal. The first relays were used in long distance telegraph circuits, repeating the
signal coming in from one circuit and re-transmitting it to another. Relays were used
extensively in telephone exchanges and early computers to perform logical operations.

A type of relay that can handle the high power required to directly drive an electric motor is
called a contactor. Solid-state relays control power circuits with no moving parts, instead
using a semiconductor device to perform switching. Relays with calibrated operating
characteristics and sometimes multiple operating coils are used to protect electrical circuits
from overload or faults; in modern electric power systems these functions are performed by
digital instruments still called "protective relays".

Basic design and operation:


Simple electromechanical relay

Small relay as used in electronics

A simple electromagnetic relay consists of a coil of wire surrounding a soft iron core, an iron
yoke which provides a low reluctance path for magnetic flux, a movable iron armature, and
one or more sets of contacts (there are two in the relay pictured). The armature is hinged to
the yoke and mechanically linked to one or more sets of moving contacts. It is held in place
by a spring so that when the relay is de-energized there is an air gap in the magnetic circuit. In
this condition, one of the two sets of contacts in the relay pictured is closed, and the other set
is open. Other relays may have more or fewer sets of contacts depending on their function.
The relay in the picture also has a wire connecting the armature to the yoke. This ensures
continuity of the circuit between the moving contacts on the armature, and the circuit track on
the printed circuit board (PCB) via the yoke, which is soldered to the PCB.

When an electric current is passed through the coil it generates a magnetic field that attracts
the armature and the consequent movement of the movable contact either makes or breaks
(depending upon construction) a connection with a fixed contact. If the set of contacts was
closed when the relay was de-energized, then the movement opens the contacts and breaks the
connection, and vice versa if the contacts were open. When the current to the coil is switched
off, the armature is returned by a force, approximately half as strong as the magnetic force, to
its relaxed position. Usually this force is provided by a spring, but gravity is also used
commonly in industrial motor starters. Most relays are manufactured to operate quickly. In a
low-voltage application this reduces noise; in a high voltage or current application it reduces
arcing.

When the coil is energized with direct current, a diode is often placed across the coil to
dissipate the energy from the collapsing magnetic field at deactivation, which would
otherwise generate a voltage spike dangerous to semiconductor circuit components. Some
automotive relays include a diode inside the relay case. Alternatively, a contact protection
network consisting of a capacitor and resistor in series (snubbed circuit) may absorb the surge.
If the coil is designed to be energized with alternating current (ac), a small copper "shading
ring" can be crimped to the end of the solenoid, creating a small out-of-phase current which
increases the minimum pull on the armature during the ac cycle.

A solid-state relay uses a thyristor or other solid-state switching device, activated by the
control signal, to switch the controlled load, instead of a solenoid. An opto coupler (a light-
emitting diode (led) coupled with a photo transistor) can be used to isolate control and
controlled circuits.

3.1.1.4 BATTERY
A nine-volt battery, also called a pp3 battery, is shaped as a rounded rectangular prism and
has a nominal output of nine volts. Its nominal dimensions are 48 mm × 25 mm × 15 mm.

9v batteries are commonly used in pocket transistor radios, smoke detectors, carbon monoxide
alarms, guitar effect units, and radio-controlled vehicle controllers. They are also used as
backup power to keep the time in digital clocks and alarm clocks.

Nine-volt batteries are often constructed of 6 individual 1.5v aaaa batteries enclosed in a
wrapper.

Technical specifications

The battery has both the positive and negative terminals on one end. The negative terminal is
fashioned into a snap fitting which mechanically and electrically connects to a mating
terminal on the power connector. The power connector has a similar snap fitting on its
positive terminal which mates to the battery. This makes battery polarization obvious since
mechanical connection is only possible in one configuration. The clips on the 9-volt battery
can be used to connect several 9-volt batteries in series. One problem with this style of
connection is that it is very easy to connect two batteries together in a short circuit, which
quickly discharges batteries, generating heat and possibly a fire. Multiple 9 volt batteries can
be snapped together in series to create higher voltage.

Inside a pp3 there are six cells, either cylindrical alkaline or flat carbon-zinc type, connected
in series. Some brands use welded tabs internally to attach to the cells, others press foil strips
against the ends of the cells.

Rechargeable nicd and NiMH batteries have various numbers of 1.2 volt cells. Lithium
versions use three 3.2 v cells - there is a rechargeable lithium polymer version. There is also a
hybrid NiMH version that has a very low self- discharge rate (85% of capacity after 1 year of
storage).

Formerly, mercury batteries were made in this size. They had higher capacity than carbon-
zinc types, a nominal voltage of 8.4 volts, and very stable voltage output. Once used in
photographic and measuring instruments or long-life applications, they are now unavailable
due to environmental restrictions.
3.1.1.5 RF TRANSMITTER

HT640 RF TRANSMITTER

Features:
 Operating voltage: 2.4v~12v
 Low power and high noise immunity cmos technology
 Low standby current
 Three words transmission
 Built-in oscillator needs only 5% resistor
 Easy interface with an rf or infrared transmission media
 Minimal external components

Applications:
 Burglar alarm system
 Smoke and fire alarm system
 Garage door controllers
 Car door controllers
 Car alarm system
 Security system
 Cordless telephones
 Other remote control systems

General description:
The 318 encoders are a series of cmos lsis for remote control system applications. They are
capable of encoding 18 bits of information which consists of n address bits and 18_n data bits.
Each address/data input is externally
Trinary programmable if bonded out. It is otherwise set floating internally. Various packages
of the 318 encoders offer flexible combinations of programmable address/data to meet various
application needs. The programmable address/
Data is transmitted together with the header bits via an RF or an infrared transmission
medium upon receipt of a trigger signal.
The capability to select a te trigger type or a data trigger type further enhances the application
flexibility of the 318 series of encoders.

Block diagram:

Pin diagram:
Pin description:
Functional description:

Operation
The 318 series of encoders begins a three-word transmission cycle upon receipt of a
transmission enable (te for the ht600/ht640/ht680 or d12~d17 for the ht6187/ht6207/ht6247,
active high).
This cycle will repeat itself as long as the transmission enable (te or d12~d17) is held high.
Once the transmission enable falls low, the encoder output completes its final cycle and then
stops as shown below.

Information word
An information word consists of 4 periods as shown:

Address/data waveform
Each programmable address/data pin can be externally set to one of the following three logic
states:
The _open_ state data input is interpreted as logic low by the decoders since the decoder
output only have two states.
Address/data programming (preset)
The status of each address/data pin can be individually preset to logic _high_, _low_, or
_floating_. If a transmission enable signal is applied, the encoder scans and transmits the
status of the 18 bits of address/data serially in the order a0 to ad17 for the ht600/ht640/ht680
and a0 to d17 for the ht6187/ht6207/ht6247.
There are some packaging limitations. The 18-pin dip ht680, for example, offers four external
data bits and eight external address bits. The remaining unpackaged bits or dummy codes are
treated as floating for a0~ad17 or as pull-low for d12~d17. During an information
transmission these bits are still located in their original position. But if the trigger signal is not
applied, the chip only consumes a
Stand by current which is less than 1_a. The address pins are usually preset to transmit data
codes with particular security codes by the dip switches or pcb wiring, while the data is
selected using push buttons or electronic switches.
Circuit diagram:
3.1.2 NODE 2, (TRANSMITTING SECTION)
3.1.2.1 POWER SUPPLY CIRCUIT

Block diagram:

The ac voltage, typically 220v rms, is connected to a transformer, which steps that ac
voltage down to the level of the desired dc output. A diode rectifier then provides a full-wave
rectified voltage that is initially filtered by a simple capacitor filter to produce a dc voltage.
This resulting dc voltage usually has some ripple or ac voltage variation.

A regulator circuit removes the ripples and also remains the same dc value even if the
input dc voltage varies, or the load connected to the output dc voltage changes. This voltage
regulation is usually obtained using one of the popular voltage regulator IC units.

FILTER IC REGULATOR
TRANSFORMER RECTIFIER LOAD
Figure2.5: block diagram (power supply)

Working principle:

Transformer:

The potential transformer will step down the power supply voltage (0-230v) to (0-6v)
level. Then the secondary of the potential transformer will be connected to the precision
rectifier, which is constructed with the help of op–amp. The advantages of using precision
rectifier are it will give peak voltage output as dc, rest of the circuits will give only rms
output.

Bridge rectifier:
When four diodes are connected as shown in figure, the circuit is called as bridge
rectifier. The input to the circuit is applied to the diagonally opposite corners of the network,
and the output is taken from the remaining two corners.

Let us assume that the transformer is working properly and there is a positive
potential, at point a and a negative potential at point b. The positive potential at point a will
forward bias d3 and reverse bias d4.

The negative potential at point b will forward bias d1 and reverse d2. At this time d3
and d1 are forward biased and will allow current flow to pass through them; d4 and d2 are
reverse biased and will block current flow.

The path for current flow is from point b through d1, up through rl, through d3,
through the secondary of the transformer back to point b. This path is indicated by the solid
arrows. Waveforms (1) and (2) can be observed across d1 and d3.

One-half cycle later the polarity across the secondary of the transformer reverse,
forward biasing d2 and d4 and reverse biasing d1 and d3. Current flow will now be from point
a through d4, up through rl, through d2, through the secondary of t1, and back to point a. This
path is indicated by the broken arrows. Waveforms (3) and (4) can be observed across d2 and
d4. The current flow through rl is always in the same direction. In flowing through rl this
current develops a voltage corresponding to that shown waveform (5). Since current flows
through the load (rl) during both half cycles of the applied voltage, this bridge rectifier is a
full-wave rectifier.

One advantage of a bridge rectifier over a conventional full-wave rectifier is that with
a given transformer the bridge rectifier produces a voltage output that is nearly twice that of
the conventional full-wave circuit.
This may be shown by assigning values to some of the components shown in views a
and b. Assume that the same transformer is used in both circuits. The peak voltage developed
between points x and y is 1000 volts in both circuits. In the conventional full-wave circuit
shown—in view a, the peak voltage from the center tap to either x or y is 500 volts. Since
only one diode can conduct at any instant, the maximum voltage that can be rectified at any
instant is 500 volts.
The maximum voltage that appears across the load resistor is nearly-but never
exceeds-500 v0lts, as result of the small voltage drop across the diode. In the bridge rectifier
shown in view b, the maximum voltage that can be rectified is the full secondary voltage,
which is 1000 volts. Therefore, the peak output voltage across the load resistor is nearly 1000
volts. With both circuits using the same transformer, the bridge rectifier circuit produces a
higher output voltage than the conventional full-wave rectifier circuit.

IC voltage regulators:

Voltage regulators comprise a class of widely used ics. Regulator ic units


contain the circuitry for reference source, comparator amplifier, control device, and overload
protection all in a single ic. Ic units provide regulation of either a fixed positive voltage, a
fixed negative voltage, or an adjustably set voltage. The regulators can be selected for
operation with load currents from hundreds of mille amperes to tens of amperes,
corresponding to power ratings from mille watts to tens of watts.

A fixed three-terminal voltage regulator has an unregulated dc input voltage,


vi, applied to one input terminal, a regulated dc output voltage, vo, from a second terminal,
with the third terminal connected to ground.

The series 78 regulators provide fixed positive regulated voltages from 5 to 24 volts.
Similarly, the series 79 regulators provide fixed negative regulated voltages from 5 to 24
volts.

 For ics, microcontroller, lcd --------- 5 volts


 For alarm circuit, op-amp, relay circuits ---------- 12 volts
3.1.3 RECEIVING SECTION
3.1.3.1 RF RECEIVER

HT648 RF RECEIVER

Features:
· operating voltage: 2.4v~12v
· Low power and high noise immunity cmos technology
· Low standby current
· Capable of decoding 18 bits of information
· Pairs with holtek’s 318 series of encoders
· 8~18 address pins
· 0~8 data pins
· Trinary address setting
· Two times of receiving check
· Built-in oscillator needs only a 5% resistor
· Valid transmission indictor
· Easily interface with an RF or an infrared transmission medium
· Minimal external components
Applications:
· Burglar alarm system
· Smoke and fire alarm system
· Garage door controllers
· Car door controllers
· Car alarm system
· Security system
· Cordless telephones
· Other remote control systems

General description:
The 318 decoders are a series of cmos lsis for remote control system applications. They are
paired with the 318 series of encoders. For proper operation a pair of encoder/decoder pair
with the same number of address and data format should be selected (refer to the
encoder/decoder cross reference tables).
The 318 series of decoders receives serial address and data from that series of encoders that
are transmitted by a carrier using an RF or an RF transmission medium. It then compares the
serial input data twice continuously with its local address. If no errors or unmatched codes are
encountered, the input data codes are decoded and then transferred to the output pins.
The VT pin also goes high to indicate a valid transmission.
The 318 decoders are capable of decoding 18 bits of information that consists of n bits of
address and 18–n bits of data. To meet various applications they are arranged to provide a
number of data pins whose range is from 0 to 8 and an address pin whose range is from 8 to
18. In addition, the 318 decoders provide various combinations of address/data number in
different packages.
Block diagram:

Pin diagram:
Pin description:

Functional description:
Operation
The 318 series of decoders provides various combinations of address and data pins in
different packages. It is paired with the 318 series of encoders. The decoders receive data
transmitted by the encoders and interpret the first n bits of the code period as address and the
last 18–n bits as data (where n is the address code
Number). A signal on the din pin then activates the oscillator which in turns decodes the
incoming address and data. The decoders will check the received address twice continuously.
If all the received address codes match the contents
Of the decoder’s local address, the 18–n bits of data are decoded to activate the output pins,
and the VT pin is set high to indicate a valid transmission. That will last until the address code
is incorrect or no signal has been received.
The output of the VT pin is high only when the transmission is valid. Otherwise it is low
always.
Output type
There are 2 types of output to select from:
· Momentary type the data outputs follow the encoder during a valid transmission and then
reset.
· latch type the data outputs follow the encoder during a valid transmission, and are then
latched in this state until the next valid transmission occurs.
Circuit diagram:

3.1.3.2 AT89S52 MICROCONTROLLER


3.1.3.2.1 Description:

The at89s52 is a low-power, high-performance cmos 8-bit microcontroller with 8k


bytes of in-system programmable flash memory. The device is manufactured using Atmel’s
high-density nonvolatile memory technology and is compatible with the Indus-try-standard
80c51 instruction set and pinot. The on-chip flash allows the program memory to be
reprogrammed in-system or by a conventional nonvolatile memory pro-grammar. By
combining a versatile 8-bit cpu with in-system programmable flash on a monolithic chip, the
Atmel at89s52 is a powerful microcontroller which provides a highly-flexible and cost-
effective solution to many embedded control applications. The at89s52 provides the following
standard features: 8k bytes of flash, 256 bytes of ram, 32 i/o lines, watchdog timer, two data
pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full
duplex serial port, on-chip oscillator, and clock circuitry. In addition, the at89s52 is designed
with static logic for operation down to zero frequency and supports two software selectable
power saving modes. The idle mode stops the cpu while allowing the ram, timer/counters,
serial port, and interrupt system to continue functioning. The power-down mode saves the ram
con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or
hardware reset.

3.1.2.3.2 Features:

• Compatible with mcs®-51 products


• 8k bytes of in-system programmable (isp) flash memory – endurance: 10,000 write/erase
cycles

• 4.0v to 5.5v operating range

• Fully static operation: 0 Hz to 33 MHz

• Three-level program memory lock

• 256 x 8-bit internal ram

• 32 programmable I/O lines

• Three 16-bit timer/counters

• Eight interrupt sources

• Full duplex uart serial channel

• Low-power idle and power-down modes

• interrupt recovery from power-down mode

• Watchdog timer

• Dual data pointer

• power-off flag

• Fast programming time

• Flexible isp programming (byte and page mode)

• Green (pb/halide-free) packaging option

3.1.3.2.3 Pin Diagram:


3.1.3.2.4 Block diagram:
3.1.3.2.5 Pin description:

Vcc
Supply voltage.

Gnd

Ground.

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight
title inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.
Port 0 can also be configured to be the multiplexed low-order address/data bus during
accesses to external program and data memory. In this mode, p0 has internal pull-ups. Port 0
also receives the code bytes during flash programming and outputs the code bytes during
program verification. External pull-ups are required during program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The port 1 output buffers can
sink/source four title inputs. When 1s are written to port 1 pins, they are pulled high by the
inter-nal pull-ups and can be used as inputs. As inputs, port 1 pins that are externally being
pulled low will source current (ill) because of the internal pull-ups. In addition, p1.0 and p1.1
can be configured to be the timer/counter 2 external count input (p1.0/t2) and the
timer/counter 2 trigger input (p1.1/t2ex), respectively, as shown in the follow-ing table. Port 1
also receives the low-order address bytes during flash programming and verification.

Port 2

Port 2 is an 8-bit bidirectional i/o port with internal pull-ups. The port 2 output buffers can
sink/source four title inputs. When 1s are written to port 2 pins, they are pulled high by the
inter-nal pull-ups and can be used as inputs. As inputs, port 2 pins that are externally being
pulled low will source current (ill) because of the internal pull-ups. Port 2 emits the high-
order address byte during fetches from external program memory and during accesses to
external data memory that uses 16-bit addresses (movx @ dptr). In this application, port 2
uses strong internal pull-ups when emitting 1s. During accesses to external data memory that
uses 8-bit addresses (movx @ ri), port 2 emits the contents of the p2 special function register.
Port 2 also receives the high-order address bits and some control signals during flash
program-Ming and verification.
Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The port 3 output buffers can
sink/source four title inputs. When 1s are written to port 3 pins, they are pulled high by the
inter-nal pull-ups and can be used as inputs. As inputs, port 3 pins that are externally being
pulled low will source current (iil) because of the pull-ups. Port 3 receives some control
signals for flash programming and verification. Port 3 also serves the functions of various
special features of the at89s52, as shown in the fol-lowing table.

Rst

Reset input. A high on this pin for two machine cycles while the oscillator is running resets
the device. This pin drives high for 98 oscillator periods after the watchdog times out. The
disrto bit in sfr auxr (address 8eh) can be used to disable this feature. In the default state of bit
disrto, the reset high out feature is enabled.

ALE/PROG

Address latch enable (ale) is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (prog) during flash
programming. In normal operation, ale is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however, that one
ale pulse is skipped during each access to external data memory. If desired, ale operation can
be disabled by setting bit 0 of sfr location 8eh. With the bit set, ale is active only during a
movx or movc instruction. Otherwise, the pin is weakly pulled high. Setting the ale-disable bit
has no effect if the microcontroller is in external execution mode.

PSEN

Program store enable (psen) is the read strobe to external program memory. When the at89s52
is executing code from external program memory, psen is activated twice each machine cycle,
except that two psen activations are skipped during each access to external data memory.

EA/VPP

External accesses enable. Ea must be strapped to gnd in order to enable the device to fetch
code from external program memory locations starting at 0000h up to ffffh. Note, however,
that if lock bit 1 is programmed, ea will be internally latched on reset. Ea should be strapped
to vcc for internal program executions. This pin also receives the 12-volt programming enable
voltage (vpp) during flash programming.

Xtal1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

Xtal2

Output from the inverting oscillator amplifier.

Special function registers

A map of the on-chip memory area called the special function register (sfr) space is shown in
table 5-1.

Note that not all of the addresses are occupied, and unoccupied addresses may not be
implemented on the chip. Read accesses to these addresses will in general return random data,
and write accesses will have an indeterminate effect.

User software should not write 1s to these unlisted locations, since they may be used in future
products to invoke new features. In that case, the reset or inactive values of the new bits will
always be 0.

Timer 2 registers: control and status bits are contained in registers t2con (shown in table 5- 2)
and t2mod (shown in table 10-2) for timer 2. The register pair (rcap2h, rcap2l) are the
capture/reload registers for timer 2 in 16-bit capture mode or 16-bit auto-reload mode.

Interrupt registers: the individual interrupt enable bits are in the ie register. Two priorities can
be set for each of the six interrupt sources in the ip register.
Dual data pointer registers: to facilitate accessing both internal and external data memory, two
banks of 16-bit data pointer registers are provided: dp0 at sfr address locations 82h-83h and
dp1 at 84h-85h. Bit dps = 0 in sfr auxr1 selects dp0 and dps = 1 selects dp1. The user should
always initialize the dps bit to the appropriate value before accessing the respective data
pointer register.

Power off flag: the power off flag (pof) is located at bit 4 (pcon.4) in the pcon sfr. Pof is set to
“1” during power up. It can be set and rest under software control and is not affected by reset.
Memory organization

Mcs-51 devices have a separate address space for program and data memory. Up to 64k bytes
each of external program and data memory can be addressed.

Program memory

If the ea pin is connected to gnd, all program fetches are directed to external memory. On the
at89s52, if ea is connected to vcc, program fetches to addresses 0000h through 1fffh are
directed to internal memory and fetches to addresses 2000h through ffffh are to external
memory.

Data memory

The at89s52 implements 256 bytes of on-chip ram. The upper 128 bytes occupy a parallel
address space to the special function registers. This means that the upper 128 bytes have the
same addresses as the sfr space but are physically separate from sfr space. When an
instruction accesses an internal location above address 7fh, the address mode used in the
instruction specifies whether the cpu accesses the upper 128 bytes of ram or the sfr space.
Instructions which use direct addressing access the sfr space. For example, the following
direct addressing instruction accesses the sfr at location 0a0h (which is p2). Mov 0a0h, #data
instructions that use indirect addressing access the upper 128 bytes of ram. For example, the
following indirect addressing instruction, where r0 contains 0a0h, accesses the data byte at
address 0a0h, rather than p2 (whose address is 0a0h). Mov @r0, #data note that stack
operations are examples of indirect addressing, so the upper 128 bytes of data ram are
available as stack space.

Watchdog timer (one-time enabled with reset-out)


The wdt is intended as a recovery method in situations where the cpu may be subjected to
software upsets. The wdt consists of a 14-bit counter and the watchdog timer reset (wdtrst)
sfr. The wdt is defaulted to disable from exiting reset. To enable the wdt, a user must write
01eh and 0e1h in sequence to the wdtrst register (sfr location 0a6h). When the wdt is enabled,
it will increment every machine cycle while the oscillator is running. The wdt timeout period
is dependent on the external clock frequency. There is no way to disable the wdt except
through reset (either hardware reset or wdt overflow reset). When wdt over-flows, it will drive
an output reset high pulse at the rst pin.

Using the wdt

To enable the wdt, a user must write 01eh and 0e1h in sequence to the wdtrst register (sfr
location 0a6h). When the wdt is enabled, the user needs to service it by writing 01eh and 0e1h
to wdtrst to avoid a wdt overflow. The 14-bit counter overflows when it reaches 16383
(3fffh), and this will reset the device. When the wdt is enabled, it will increment every
machine cycle while the oscillator is running. This means the user must reset the wdt at least
every 16383 machine cycles. To reset the wdt the user must write 01eh and 0e1h to wdtrst.
Wdtrst is a write-only register. The wdt counter cannot be read or written. When wdt
overflows, it will generate an output reset pulse at the rst pin. The reset pulse duration is
98xtosc, where tosc = 1/fosc. To make the best use of the wdt, it should be serviced in those
sections of code that will periodically be executed within the time required to prevent a wdt
reset.

Wdt during power-down and idle

In power-down mode the oscillator stops, which means the wdt also stops. While in power-
down mode, the user does not need to service the wdt. There are two methods of exiting
power-down mode: by a hardware reset or via a level-activated external interrupt which is
enabled prior to entering power-down mode. When power-down is exited with hardware
reset, servicing the wdt should occur as it normally does whenever the at89s52 is reset.
Exiting power-down with an interrupt is significantly different. The interrupt is held low long
enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is
serviced. To prevent the wdt from resetting the device while the interrupt pin is held low, the
wdt is not started until the interrupt is pulled high. It is suggested that the wdt be reset during
the interrupt service for the interrupt used to exit power-down mode. To ensure that the wdt
does not overflow within a few states of exiting power-down, it is best to reset the wdt just
before entering power-down mode. Before going into the idle mode, the wdidle bit in sfr auxr
is used to determine whether the wdt continues to count if enabled. The wdt keeps counting
during idle (wdidle bit = 0) as the default state. To prevent the wdt from resetting the at89s52
while in idle mode, the user should always set up a timer that will periodically exit idle,
service the wdt, and reenter idle mode. With wdidle bit enabled, the wdt will stop to count in
idle mode and resumes the count upon exit from idle.

Uart

The uart in the at89s52 operates the same way as the uart in the at89c51 and at89c52. For
further information on the uart operation, please click on the document link below:

Timer 0 and 1

Timer 0 and timer 1 in the at89s52 operate the same way as timer 0 and timer 1 in the at89c51
and at89c52. For further information on the timers’ operation, please click on the document
link below:

Timer 2

Timer 2 is a 16-bit timer/counter that can operate as either a timer or an event counter. The
type of operation is selected by bit c/t2 in the sfr t2con (shown in table 5-2). Timer 2 has three
operating modes: capture, auto-reload (up or down counting), and baud rate generator. The
modes are selected by bits in t2con, as shown in table 10-1. Timer 2 consists of two 8-bit
registers, th2 and tl2. In the timer function, the tl2 register is incremented every machine
cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the
oscil-lator frequency.
In the counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, t2. In this function, the external input is sampled during
s5p2 of every machine cycle. When the samples show a high in one cycle and a low in the
next cycle, the count is incremented. The new count value appears in the register during s3p1
of the cycle following the one in which the transition was detected. Since two machine cycles
(24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is
1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it
changes, the level should be held for at least one full machine cycle.

Capture mode

In the capture mode, two options are selected by bit exen2 in t2con. If exen2 = 0, timer 2 is a
16-bit timer or counter which upon overflow sets bit tf2 in t2con. This bit can then be used to
generate an interrupt. If exen2 = 1, timer 2 performs the same operation, but a 1-to-0
transition at external input t2ex also causes the current value in th2 and tl2 to be captured into
rcap2h and rcap2l, respectively. In addition, the transition at t2ex causes bit exf2 in t2con to
be set. The exf2 bit, like tf2, can generate an interrupt. The capture mode is illus-traded in
figure 10-1.

Auto-reload (up or down counter)

Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload
mode. This feature is invoked by the dcen (down counter enable) bit located in the sfr t2mod
(see table 10-2). Upon reset, the dcen bit is set to 0 so that timer 2 will default to count up.
When dcen is set, timer 2 can count up or down, depending on the value of the t2ex pin.

Baud rate generator

Timer 2 is selected as the baud rate generator by setting tclk and/or rclk in t2con (table 5-2).
Note that the baud rates for transmit and receive can be different if timer 2 is used for the
receiver or transmitter and timer 1 is used for the other function. Setting rclk and/or tclk puts
timer 2 into its baud rate generator mode, as shown in figure 11-1.

The baud rate generator mode is similar to the auto-reload mode, in that a rollover in th2
causes the timer 2 registers to be reloaded with the 16-bit value in registers rcap2h and rcap2l,
which are preset by software.

The baud rates in modes 1 and 3 are determined by timer 2’s overflow rate according to the
fol-lowing equation.

The timer can be configured for either timer or counter operation. In most applications, it is
con-figured for timer operation (cp/t2 = 0). The timer operation is different for timer 2 when it
is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at
1/12 the oscillator frequency). As a baud rate generator, however, it increments every state
time (at 1/2 the oscillator frequency). The baud rate formula is given below.

Where (rcap2h, rcap2l) is the content of rcap2h and rcap2l taken as a 16-bit unsigned integer.

Timer 2 as a baud rate generator is shown in figure 11-1. This figure is valid only if rclk or
tclk = 1 in t2con. Note that a rollover in th2 does not set tf2 and will not generate an interrupt.
Note too, that if exen2 is set, a 1-to-0 transition in t2ex will set exf2 but will not cause a
reload from (rcap2h, rcap2l) to (th2, tl2). Thus, when timer 2 is in use as a baud rate
generator, t2ex can be used as an extra external interrupt.

Note that when timer 2 is running (tr2 = 1) as a timer in the baud rate generator mode, th2 or
tl2 should not be read from or written to. Under these conditions, the timer is incremented
every state time, and the results of a read or write may not be accurate. The rcap2 registers
may be read but should not be written to, because a write might overlap a reload and cause
write and/or reload errors. The timer should be turned off (clear tr2) before accessing the
timer 2 or rcap2 registers.

Programmable clock out


A 50% duty cycle clock can be programmed to come out on p1.0, as shown in figure 12-1.
This pin, besides being a regular i/o pin, has two alternate functions. It can be programmed to
input the external clock for timer/counter 2 or to output a 50% duty cycle clock ranging from
61 hz to 4 mhz (for a 16-mhz operating frequency). To configure the timer/counter 2 as a
clock generator, bit c/t2 (t2con.1) must be cleared and bit t2oe (t2mod.1) must be set. Bit tr2
(t2con.2) starts and stops the timer. The clock-out frequency depends on the oscillator
frequency and the reload value of timer 2 capture registers (rcap2h, rcap2l), as shown in the
following equation.

In the clock-out mode, timer 2 roll-overs will not generate an interrupt. This behavior is
similar to when timer 2 is used as a baud-rate generator. It is possible to use timer 2 as a baud-
rate generator and a clock generator simultaneously. Note, however, that the baud-rate and
clock-out frequencies cannot be determined independently from one another since they both
use rcap2h and rcap2l.

Interrupts

The at89s52 has a total of six interrupt vectors: two external interrupts (int0 and int1), three
timer interrupts (timers 0, 1, and 2), and the serial port interrupt. These interrupts are all
shown in figure 13-1. Each of these interrupt sources can be individually enabled or disabled
by setting or clearing a bit in special function register i.e. I.e. also contains a global disable
bit, ea, which disables all interrupts at once. Note that table 13-1 shows that bit position ie.6 is
unimplemented. User software should not write a 1 to this bit position, since it may be used in
future at89 products. Timer 2 interrupt is generated by the logical or of bits tf2 and exf2 in
register t2con. Neither of these flags is cleared by hardware when the service routine is
vectored to. In fact, the service routine may have to determine whether it was tf2 or exf2 that
generated the interrupt, and that bit will have to be cleared in software. The timer 0 and timer
1 flags, tf0 and tf1, are set at s5p2 of the cycle in which the timers overflow. The values are
then polled by the circuitry in the next cycle. However, the timer 2 flag, tf2, is set at s2p2 and
is polled in the same cycle in which the timer overflows.
Oscillator characteristics

Xtal1 and xtal2 are the input and output, respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator, as shown in figure 16-1. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an external clock source, xtal2
should be left unconnected while xtal1 is driven, as shown in figure 16-2. There are no
requirements on the duty cycle of the external clock signal, since the input to the internal
clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage
high and low time specifications must be observed.

Idle mode

In idle mode, the cpu puts itself to sleep while all the on-chip peripherals remain active. The
mode is invoked by software. The content of the on-chip ram and all the special functions
registers remain unchanged during this mode. The idle mode can be terminated by any
enabled interrupt or by a hardware reset. Note that when idle mode is terminated by a
hardware reset, the device normally resumes pro-gram execution from where it left off, up to
two machine cycles before the internal reset algorithm takes control. On-chip hardware
inhibits access to internal ram in this event, but access to the port pins is not inhibited. To
eliminate the possibility of an unexpected write to a port pin when idle mode is terminated by
a reset, the instruction following the one that invokes idle mode should not write to a port pin
or to external memory.

Power-down mode
In the power-down mode, the oscillator is stopped, and the instruction that invokes power-
down is the last instruction executed. The on-chip ram and special function registers retain
their values until the power-down mode is terminated. Exit from power-down mode can be
initiated either by a hardware reset or by an enabled external interrupt. Reset redefines the sfrs
but does not change the on-chip ram. The reset should not be activated before vcc is restored
to its normal operating level and must be held active long enough to allow the oscillator to
restart and stabilize.

Figure 16-1. Oscillator connections

Program memory lock bits

The at89s52 has three lock bits that can be left unprogrammed (u) or can be programmed (p)
to obtain the additional features listed in

When lock bit 1 is programmed, the logic level at the ea pin is sampled and latched during
reset. If the device is powered up without a reset, the latch initializes to a random value and
holds that value until reset is activated. The latched value of ea must agree with the current
logic level at that pin in order for the device to function properly.
Programming the flash – parallel mode

The at89s52 is shipped with the on-chip flash memory array ready to be programmed. The
programming interface needs a high-voltage (12-volt) program enable signal and is
compatible with conventional third-party flash or eprom programmers. The at89s52 code
memory array is programmed byte-by-byte.

Programming algorithm: before programming the at89s52, the address, data, and control
signals should be set up according to the “flash programming modes” (table 22-1) and figure
22-1 and figure 22-2. To program the at89s52, take the following steps: 1. Input the desired
memory location on the address lines. 2. Input the appropriate data byte on the data lines. 3.
Activate the correct combination of control signals. 4. Raise ea/vpp to 12v. 5. Pulse ale/prog
once to program a byte in the flash array or the lock bits. The byte-write cycle is self-timed
and typically takes no more than 50 μs. Repeat steps 1 through 5, changing the address and
data for the entire array or until the end of the object file is reached.

Data polling: the at89s52 features data polling to indicate the end of a byte write cycle.
During a write cycle, an attempted read of the last byte written will result in the complement
of the written data on p0.7. Once the write cycle has been completed, true data is valid on all
outputs, and the next cycle may begin. Data polling may begin any time after a write cycle has
been initiated.

Ready/busy: the progress of byte programming can also be monitored by the rdy/bsy output
signal. P3.0 is pulled low after ale goes high during programming to indicate busy. P3.0 is
pulled high again when programming is done to indicate ready.
Program verify: if lock bits lb1 and lb2 have not been programmed, the programmed code
data can be read back via the address and data lines for verification.

The status of the individual lock bits can be verified directly by reading them back. Reading
the signature bytes: the signature bytes are read by the same procedure as a nor-mal
verification of locations 000h, 100h, and 200h, except that p3.6 and p3.7 must be pulled to a
logic low. The values returned are as follows. (000h) = 1eh indicates manufactured by atmel
(100h) = 52h indicates at89s52 (200h) = 06h chip erase: in the parallel programming mode, a
chip erase operation is initiated by using the proper combination of control signals and by
pulsing ale/prog low for a duration of 200 ns - 500 ns. In the serial programming mode, a chip
erase operation is initiated by issuing the chip erase instruction. In this mode, chip erase is
self-timed and takes about 500 ms. During chip erase, a serial read from any address location
will return 00h at the data output.

Programming the flash – serial mode

The code memory array can be programmed using the serial isp interface while rst is pulled to
vcc. The serial interface consists of pins sck, mosi (input) and miso (output). After rst is set
high, the programming enable instruction needs to be executed first before other operations
can be executed. Before a reprogramming sequence can occur, a chip erase operation is
required.

The chip erase operation turns the content of every memory location in the code array into ffh.

Either an external system clock can be supplied at pin xtal1 or a crystal needs to be connected
across pins xtal1 and xtal2. The maximum serial clock (sck) frequency should be less than
1/16 of the crystal frequency. With a 33 mhz oscillator clock, the maximum sck frequency is
2 mhz

Serial programming algorithm

To program and verify the at89s52 in the serial programming mode, the following sequence is
recommended:

1. Power-up sequence:

A. Apply power between vcc and gnd pins.


B. Set rst pin to “h”. If a crystal is not connected across pins xtal1 and xtal2, apply a 3
mhz to 33 mhz clock to xtal1 pin and wait for at least 10 milliseconds.

2. Enable serial programming by sending the programming enable serial instruction to pin
mosi/p1.5. The frequency of the shift clock supplied at pin sck/p1.7 needs to be less than the
cpu clock at xtal1 divided by 16.

3. The code array is programmed one byte at a time in either the byte or page mode. The write
cycle is self-timed and typically takes less than 0.5 ms at 5v.

4. Any memory location can be verified by using the read instruction which returns the
content at the selected address at serial output miso/p1.6.

5. At the end of a programming session, rst can be set low to commence normal device
operation.

Power-off sequence (if needed):

1. Set xtal1 to “l” (if a crystal is not used).

2. Set rst to “l”.

3. Turn vcc power off.

Data polling: the data polling feature is also available in the serial mode. In this mode, during
a write cycle an attempted read of the last byte written will result in the complement of the
msb of the serial output byte on miso.

3.1.3.3 APR9600 CIRCUIT

Voice processor

Single-chip voice recording & playback device


60-second duration

3.1.3.3.1 Features:
• single-chip, high-quality voice recording & playback solution
- no external ics required
- minimum external components
• non-volatile flash memory technology
- no battery backup required
• user-selectable messaging options
- random access of multiple fixed-duration messages
- sequential access of multiple variable-duration messages
• user-friendly, easy-to-use operation
- programming & development systems not required
- level-activated recording & edge-activated play back switches
• low power consumption
- operating current: 25 ma typical
- standby current: 1 ua typical
- automatic power-down
• chip enable pin for simple message expansion

3.1.3.3.2 General description:

The apr9600 device offers true single-chip voice recording, non-volatile storage, and playback
capability for 40 to 60 seconds. The device supports both random and sequential access of
multiple messages. Sample rates are user-selectable, allowing designers to customize their
design for unique quality and storage time needs. Integrated output amplifier, microphone
amplifier, and agc circuits greatly
Simplify system design. The device is ideal for use in portable voice recorders, toys, and
many other consumer and industrial applications. Aplus integrated achieves these high levels
of storage capability by using its proprietary analog/multilevel storage technology
implemented in an advanced flash non-volatile memory process, where each memory cell can
store 256 voltage levels. This technology enables the apr9600 device to reproduce voice
signals in their natural form. It eliminates the need for encoding and compression, which often
introduce distortion.
3.1.3.3.3 Pin out diagram:
3.1.3.3.4 Pin Description:
3.1.3.3.5 Circuit diagram:

3.1.3.4 KEYPAD

A keypad is a set of buttons arranged in a block or "pad" which usually bear digits and other
symbols and usually a complete set of alphabetical letters. If it mostly contains numbers then
it can also be called a numeric keypad. Keypads are found on many alphanumeric keyboards
and on other devices such as calculators, push-button telephones, combination locks, and
digital door locks, which require mainly numeric input.

3.1.3.5 GSM MODEM

GSM KIT

MISC

Features of SIm300 Module – Designed for global market, SIM300 is a Tri-band


GSM/GPRS engine

 Works on frequencies EGSM 900 MHz, DCS 1800 MHz and PCS 1900 MHz.
 SIM300 features GPRS multi-slot class 10/ class 8 (optional) and supports the GPRS
coding schemes
 CS-1, CS-2, CS-3 and CS-4.With a tiny configuration of 40mm x 33mm x 2.85mm ,
 SIM300 can fit almost all the space requirements in your applications,
 such as smart phone, PDA phone and other mobile devices

Features of GSM Kit

 This GSM modem is a highly flexible plug and play quad band GSM modem
 for direct and asy integration to RS232.
 Supports features like Voice, Data/Fax, SMS,GPRS and integrated TCP/IP stack.
 Control via AT commands(GSM 07.07,07.05 and enhanced AT commands)
 Use AC – DC Power Adaptor with following ratings · DC Voltage : 12V /1A
 Current Consumption in normal operation 250mA, can rise up to 1Amp while
transmission.

Interfaces

 RS-232 through D-TYPE 9 pin connector,


 Serial port baud rate adjustable 1200 to115200 bps (9600 default)
 BRK connector for MIC & SPK, SIM card holder
 Power supply through DC socket
 SMA antenna connector and Murata Antenna ( optional)
 LED status of GSM / GPRS module

Package Contents

 GSM Modem With Rs232 , - O


 Antenna Single stand Wire Antenna - SMA Connecter and Stud Antenna - 200/- extra(
Gain will be same For Both Antenna)
 12V DC / 1Amps Adapter
CHAPTER -4

RS232 SERIAL COMMUNICATION

In telecommunications, rs-232 (recommended standard 232) is a


standard for serial binary single-ended data and control signals connecting between a dte (data
terminal equipment) and a dce (data circuit-terminating equipment). It is commonly used in
computer serial ports. The standard defines the electrical characteristics and timing of signals,
the meaning of signals, and the physical size and pin out of connectors.

Scope of the standard

The electronics industries association (eia) standard rs-232-c[1] as of 1969 defines:

 Electrical signal characteristics such as voltage levels, signaling rate, timing and slew-
rate of signals, voltage withstand level, short-circuit behavior, and maximum load
capacitance.
 Interface mechanical characteristics, pluggable connectors and pin identification.
 Functions of each circuit in the interface connector.
 Standard subsets of interface circuits for selected telecom applications.

The standard does not define such elements as

 Character encoding (for example, ascii, bardot code or ebcdic)


 The framing of characters in the data stream (bits per character, start/stop bits, parity)
 Protocols for error detection or algorithms for data compression
 Bit rates for transmission, although the standard says it is intended for bit rates lower
than 20,000 bits per second. Many modern devices support speeds of 115,200 bit/s and
above
 Power supply to external devices.

Details of character format and transmission bit rate are controlled by the serial port hardware,
often a single integrated circuit called a uart that converts data from parallel to asynchronous
start-stop serial form. Details of voltage levels, slew rate, and short-circuit behavior are
typically controlled by a line-driver that converts from the uart's logic levels to rs-232
compatible signal levels, and a receiver that converts from rs-232 compatible signal levels to
the uart's logic levels.

4.1 INTRODUCTION

uart (universal asynchronous receiver transmitter) or usart (universal synchronous


asynchronous receiver transmitter) are one of the basic interfaces which you will find in
almost all the controllers available in the market till date. This interface provides a cost
effective simple and reliable communication between one controller to another controller or
between a controller and pc.

4.2 RS-232 BASICS

rs-232 (recommended standard 232) is a standard for serial binary data signals connecting
between a dte (data terminal equipment) and a dce (data circuit-terminating equipment).
Voltage levels:
the rs-232 standard defines the voltage levels that correspond to logical one and logical zero
levels. Valid signals are plus or minus 3 to 25 volts. The range near zero volts is not a valid
rs-232 level; logic one is defined as a negative voltage, the signal condition is called marking,
and has the functional significance of off. Logic zero is positive; the signal condition is
spacing, and has the function on.
So a logic zero represented as +3v to +25v and logic one represented as -3v to -25v.
4.3 RS-232 LEVEL CONVERTERS

usually all the digital ics works on ttl or cmos voltage levels which cannot be used to
communicate over rs-232 protocol. So a voltage or level converter is needed which can
convert ttl to rs232 and rs232 to ttl voltage levels.
The most commonly used rs-232 level converter is max232. This ic includes charge pump
which can generate rs232 voltage levels (-10v and +10v) from 5v power supply. It also
includes two receiver and two transmitters and is capable of full-duplex uart/usart
communication.

Fig A. - Max232 Pin Description


Fig B. - Max232 Typical Connection Circuit

4.4 MAX232 INTERFACING WITH MICROCONTROLLERS

to communicate over uart or usart, we just need three basic signals which are namely, rxd
(receive), txd (transmit), gnd (common ground). So to interface max232 with any
microcontroller (avr, arm, 8051, pic etc..) We just need the basic signals. A simple schematic
diagram of connections between a microcontroller and max232 is shown below
CHAPTER-5

LIQUID CRYSTAL DISPAAY

A liquid crystal display (lcd) is a thin, flat panel used for electronically displaying
information such as text, images, and moving pictures. Its uses include monitors for
computers, televisions, instrument panels, and other devices ranging from aircraft cockpit
displays, to every-day consumer devices such as video players, gaming devices, clocks,
watches, calculators, and telephones. Among its major features are its lightweight
construction, its portability, and its ability to be produced in much larger screen sizes than are
practical for the construction of cathode ray tube (crt) display technology. Its low electrical
power consumption enables it to be used in battery-powered electronic equipment. It is an
electronically-modulated optical device made up of any number of pixels filled with liquid
crystals and arrayed in front of a light source (backlight) or reflector to produce images in
color or monochrome. The earliest discovery leading to the development of lcd technology,
the discovery of liquid crystals, dates from 1888. By 2008, worldwide sales of televisions
with lcd screens had surpassed the sale of crt units.

Each pixel of an lcd typically consists of a layer of molecules aligned between two
transparent electrodes, and two polarizing filters, the axes of transmission of which are (in
most of the cases) perpendicular to each other. With no actual liquid crystal between the
polarizing filters, light passing through the first filter would be blocked by the second
(crossed) polarizer.

The surfaces of the electrodes that are in contact with the liquid crystal material are
treated so as to align the liquid crystal molecules in a particular direction. This treatment
typically consists of a thin polymer layer that is unidirectional rubbed using, for example, a
cloth. The direction of the liquid crystal alignment is then defined by the direction of rubbing.
Electrodes are made of a transparent conductor called indium tin oxide (ito).

5.1 INTERFACE PIN FUNCTION


5.2 FUNCTION DESCRIPTION

The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an
instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address
information for display data RAM (DDRAM) and character generator (CGRAM). The IR can
only be written from the MPU. The DR temporarily stores data to be written or read from
DDRAM or CGRAM. When address information is written into the IR, then data is stored
into the DR from DDRAM or CGRAM.

By the register selector (RS) signal, these two registers can be selected.
Busy Flag (BF)
When the busy flag is 1, the controller LSI is in the internal operation mode, and the next
instruction will not be accepted. When RS=0 and R/W=1, the busy flag is output to DB7. The
next instruction must be written after ensuring that the busy flag is 0.

Address Counter (AC)


The address counter (AC) assigns addresses to both DDRAM and CGRAM

Display Data RAM (DDRAM)


This DDRAM is used to store the display data represented in 8-bit character codes. Its
extended
capacity is 80×8 bits or 80 characters. Below figure are the relationships between DDRAM
addresses and positions on the liquid crystal display.
Character Generator ROM (CGROM)
The CGROM generate 5×8 dot or 5×10 dot character patterns from 8-bit character codes. See
Table 2.
Character Generator RAM (CGRAM)
In CGRAM, the user can rewrite character by program. For 5×8 dots, eight character patterns
can be written, and for 5×10 dots, four character patterns can be written.
Write into DDRAM the character code at the addresses shown as the left column of table 1.
To show the character patterns stored in CGRAM.

5.3 PRECAUTIONS IN USE OF LCD MODULES

(1)Avoid applying excessive shocks to the module or making any alterations or modifications
to it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the
components of LCD module.

(3)Don’t disassemble the LCM.


(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.
(8). Winstar have the right to change the passive components
(9). Winstar have the right to change the PCB Rev.

5.4 GENERAL SPECIFICATION


5.5 ABSOLUTE MAXIMUM RATINGS

5.6 ELECTRICAL CHARACTERISTICS


5.7 OPTICAL CHARACTERISTICS

CHAPTER-6

PCB FABRICATION
The materials required for the preparation of printed circuit board are:

1. Copper gladded sheet


2. Tracing paper, Indian ink pen, carbon sheet etc.,
3. Paint and nail polish (or) even pcb ink and a small painting brush.
4. Tray, ferrichloride solution, few drops of dilute hydrochloric acid (or) sulphuric acid.
5. Thinner solution (petrol, kerosene (or) turpentine)
6. Small cotton piece
7. Flat bottom disc, enameled inside
8. Hacksaw with blade and file.

Procedure of making PCB

Preparation of drawing:

By using a tracing paper draw the layout diagram and with a sketch pen mark the
connection is such a way that all the connection wire shown is equal to the actual circuit
diagram.

Printing of PCB:

The tracing so prepared has to be imposed over the copper clad sheet keeping in view that
the component would be mounted from the non-gladded side of the board. Take a copper
clad sheet lamination sheet and cut a piece of required size by using a hacksaw. File the
edges place the open side so as to draw the circuit diagram. Rub away the dust, grease and
the oxide if any with the sand paper. Over it put the drawing with its marked side facing
the carbon paper and the other side on the top; since the tracing paper is transparent you
can now reproduce a carbon print over the surface by using a ball pen or a hard pencil.

When the carbon print has been obtained over the copper gladded board, drill holes in the
board using a hand drill. The holes may be drilled with 1/32” drill bit for components
leads and with 1/8” drill bit width for fostering screws etc., no portion of the carbon
should be erased or wiped by mistake. Pain the connecting lines with the help of an
ordinary paint.

Dry it open observe the drawing carefully, any excess paint should be scratched off with
the aid of eraser or blade.

Etching of PCB:

Take fresh water and mix a few teaspoons of fecl3. Add new drops of hci acid to it. (as
it speeds up the etching process) and shake well. Immerse the pcb in the solution for about 20
minutes occasionally steer the solution by giving a see saw motion to the disc. Streaking
reduces the etching time. Observe the change in the color of the naked copped surface. Take
out the pcb only when the naked portion of the copper surface is completely dissolved in the
solution and wash the pcb with water after the pcb has been thoroughly washed, remove the
paint by a piece of cloth dipper in thinner core turpentine. Now the pcb is ready for use.

CHAPTER-7

SOFTWARE DETAILS

7.1 C PROGRAMMING FOR 8051 USING KEIL IDE

7.2 PROJECT CODING

7.1 C PROGRAMMING FOR 8051 USING KEIL IDE

If not simpler, the version of the c programming language used for the microcontroller
environment is not very different than standard c when working on mathematical operations,
or organizing your code. The main difference is all about the limitations of the processor of
the 89s52 microcontroller as compared to modern computers.

Even if you're not very familiar with the c language, this tutorial will introduce all the basic
programming techniques that will be used along this tutorial. It will also show you how to use
the keil ide.

7.2 PROGRAM CODING:

#include <regx52.h>

#include <lcd_atmel.h>

#include <i2c_atmel.h>

Sbit sen1=p0^0;

Sbit sen2=p0^1;

Sbit sen3=p0^2;

Sbit sen4=p0^3;

Sbit sen5=p0^4;

Sbit swtch=p0^5;

Sbit voice1=p2^4;

Sbit voice2=p2^5;

Sbit voice3=p2^6;
Sbit voice4=p2^7;

Sbit inc=p2^0;

Sbit dec=p2^1;

Sbit cur=p2^2;

Sbit ent=p2^3;

Void ser_init(void);

Void ser_out(unsigned char);

Void ser_conout(const unsigned char*,unsigned char );

Void msg_send(void);

Void mobile_number(void);

Void display(unsigned char);

Unsigned char a=0,k,cu=0xc0,aa,num[15],j,in1,in2,in3,in4,in5;

Unsigned char sec,fifty_msec;

Void timer0_isr(void) interrupt 1

Fifty_msec++;

If(fifty_msec>=20)

Fifty_msec=0;
Sec--;

Th0=0x4b;tl0=0xfd;

Void main(void)

Main:

Sen1=sen2=sen3=sen4=sen5=1;

Voice1=voice2=voice3=voice4=1;

Lcd_init();

Command(0x80);

Lcd_dis("-- oil wel --",16);

Eeprom_init();

Ser_init();

Ser_out('a');

Ser_out('t');

Ser_out(0x0d);

Ser_out(0x0a);

Del();

Ser_conout("at+cpms=\"sm\"",12);

Ser_out(0x0d);
Ser_out(0x0a);

Del();

//rtc_init();

While(1)

If(sen1==0 && in1==0)

Jump1:

In1=1;

Command(0xc0);

Lcd_dis("oil well shotdwn",16);

Msg_send();

Voice1=0;

Del();del();

Voice1=1;

Tr0=1;

Else if(sen1==1 && in1==1)

In1=0;

If(sen2==0 && in2==0)

{
Jump2:

In2=1;

Command(0xc0);

Lcd_dis("oil well pwrfail",16);

Msg_send();

Voice2=0;

Del();del();

Voice2=1;

Tr0=1;

Else if(sen2==1 && in2==1)

In2=0;

If(sen3==0&& in3==0)

Jump3:

In3=1;

Command(0xc0);

Lcd_dis("oil well running",16);

Msg_send();

Voice3=0;

Del();del();
Voice3=1;

Tr0=1;

Else if(sen3==1 && in3==1)

In3=0;

If(sen4==0 && in4==0)

Jump4:

In4=1;

Command(0xc0);

Lcd_dis(" oil theft ",16);

Msg_send();

Voice4=0;

Del();del();

Voice4=1;

Tr0=1;

Else if(sen4==1 && in4==1)

In4=0;

}
If(!Swtch)

If(sen5==0&& in5==0)

Jump:

Command(0xc0);

Lcd_dis("- night : 60 -",16);

Fifty_msec=0;sec=60;

Tr0=1;

In5=1;

While(sec)

Command(0xcb);

Display(sec);

If(sec==10)

Tr0=0;

In5=1;

Msg_send();

Command(0xc0);

Lcd_dis("- night : 60 -",16);

Fifty_msec=0;sec=60;
In5=0;

Tr0=1;

If(!Sen5){goto jump;}

If(!Sen1){goto jump1;}

If(!Sen2){goto jump2;}

If(!Sen3){goto jump3;}

If(!Sen4){goto jump4;}

If(swtch){goto main;}

If(!Ent){delay(20000);mobile_number();}

Void msg_send(void)

Unsigned char z=0;


Aa=0x20;

For(k=0;k<10;k++) { num[k]=i2c_read(aa); delay(1000); aa++;}

Ser_conout("at+cmgf=1",9);

Ser_out(0x0d);

Ser_out(0x0a);

Del();del();

Command(0xc0);

Lcd_dis("msg. Sending....",16);

Ser_conout("at+cmgs=",8);

Ser_out('"');

Ser_out(num[0]+0x30);

Ser_out(num[1]+0x30);

Ser_out(num[2]+0x30);

Ser_out(num[3]+0x30);

Ser_out(num[4]+0x30);

Ser_out(num[5]+0x30);

Ser_out(num[6]+0x30);

Ser_out(num[7]+0x30);

Ser_out(num[8]+0x30);

Ser_out(num[9]+0x30);

Ser_out('"');

Ser_out(0x0d);
Ser_out(0x0a);

Del();del();

If(in1)ser_conout("oil well shotdwn",16);

If(in2) ser_conout("oil well pwrfail",16);

If(in3) ser_conout("oil well running",16);

If(in4) ser_conout("oil theft",9);

If(in5) ser_conout("night petrol alert",18);

Ser_out(0x1a);

Del();del();

Command(0xc0);

Lcd_dis(" ",16);

Void ser_init(void)

Tmod=0x21;scon=0x50;

Th0=0x4b;tl0=0xfd;

Th1=0xfd;scon=0x50;

Et0=ea=1;

Tr1=tr0=1;

}
Void ser_out(unsigned char rr)

Sbuf=rr;

While(!Ti);

Ti=0;

Void ser_conout(const unsigned char*dat,unsigned char l)

Unsigned char i;

For(i=0;i<l;i++)

Ser_out(dat[i]);

Void mobile_number(void)

Command(0x01);

Command(0x80);

Lcd_dis("enter ur number ",16);

Command(0xc0);
Lcd_dis("********** ",16);

Delay(65000);delay(65000); delay(50000);

Cu=0xc0;k=0;j=0;

While(ent)

Command(0x0e);command(cu);

If(cur==0){ delay(20000); cu++; k++;if(cu>0xc9){cu=0xc0;k=0;}j=0; }

Else if(inc==0){ delay(20000); j++; if(j>9) j=0; command(cu); write(j+0x30); num[k]=j; }

Else if(dec==0){ delay(20000); j--; if(j>10)j=9; command(cu); write(j+0x30); num[k]=j; }

Delay(40000);

Command(0x01);

Command(0x80);

Lcd_dis(" number stored ",16);

Command(0xc0);

Aa=0x20;

For(k=0;k<10;k++) {write(num[k]+0x30); i2c_write(aa,num[k]);delay(1000); aa++;}

Del();del();

Lcd_init();

Command(0x80);

Lcd_dis("-- oil wel --",16);


}

Void display(unsigned char ds)

Write(ds/10+'0');

Write(ds%10+'0');

CHAPTER-8
ADVANTAGES AND APPLICATIONS

ADVANTAGE
• Decreased safety and environmental risks
• Reduced operating costs
• Reduced energy costs

DISADVANTAGES

 There is the possibility of the message to be lost.

 More data cannot be transmitted.

 Transmission is possible for particular distance.


FUTURE DEVELOPEMENT

Due to the disadvantages in our project this project can be


enhanced to give a better and more accurate result. This project can be enhanced
by calling the chief instead of sending message . Here we can go for zigbee
instead
of RF transmitter so that the transmission length can be increased and there is
no need of using two RF transmitter and receiver.

APPLICATIONS

 Petroleum storage tanks


 Fuel Management
 Leak Detection and Compliance Reporting
 Lube Tank Monitoring System
 Vehicle/Truck Tracking and Routing

CONCLUSION

The project work has been completed successfully. The project work functions
satisfactorily as per the design. The project work was developed after conducting a number of
experiments before finalizing the design work, this reduced the bottle necks and we did not
face much difficulty in the final integration process.
In general the entire development of the project work was educative and we could gain
a lot of experience by way of doing the project practically. We could understand the practical
constraints of developing such systems about which we have studied by way of lectures in the
theory classes.

It was satisfying to see so many theoretical aspects work before us in real life practice
of which we have heard through lectures and of which we have studied in the books.

REFERENCES

1. A text book of electrical technology ---- bl theraja.


2. Electrical machines. ---- mg say.
3. The 8051 micro controller and embedded systems. ---- mohammad ali.
4. Programming and customizing the 8051 micro controller.---- myke predko
5. The 8051 micro controller architecture programming and applications. ----kenneth j. Ayala.

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