This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2019.2892144, IEEE
Transactions on Circuits and Systems II: Express Briefs
High Step-Up Gain DC-DC Converter with Switched
Capacitor and Regenerative Boost Configuration for
Solar PV Applications
V. Karthikeyan, Member IEEE, Kumaravel S Senior Member IEEE and G. Guru kumar Student Member
Abstract: Because of cost, size, and weight, the transformer is
the primary burden in grid-connected solar PV-system and it
decreases the whole system efficiency. In order to avoid the use
of a transformer, a high step-up gain DC-DC converter is
proposed by combining the switched capacitor and regenerative
boost (SCRB) configuration in this paper. In classic boost type
and derived converters, the device stresses and losses associated
with the converter are high and result in lower efficiency. In the
proposed converter, the switched capacitor and regenerative
boost operations take place simultaneously using lossless passive
components and a minimum number of semiconductor devices.
Thereby, it drastically increases the DC-voltage gain and
enhances efficiency. In addition, it also dominates with fewer
ripple content, which helps to elongate the lifetime of devices and
suppress the electromagnetic interference. This paper describes
detailed steady-state waveforms and various modes of operation
under continuous conduction mode (CCM) and discontinuous
conduction mode (DCM). This paper also presents the
performances of the proposed converter and compares with
conventional converters characteristics. A 500 W experimental
model has been built to validate the operation and confirms the
theoretical waveforms with experimental results. The maximum
efficiency of 95.60 % is obtained at 480 W for the proposed
converter.
Index terms: Duty ratio, high dc-voltage gain, solar photovoltaic
system, switched capacitor.
I. INTRODUCTION
The dc-dc converter is the most promising and attractive
converter for renewable energy systems. In solar and/or wind
energy conversion system the generation voltage level is so
far from grid voltage. After voltage source inverter (VSI)
stage, a transformer is mainly used to step-up the AC voltage
to meet grid requirement for effective synchronization. But,
due to the presence of 50 Hz transformer, it increases the
system volume and losses, bulk in size and decreases overall
efficiency especially in poor environmental conditions. The
simple block diagram approach for conventional grid-
connected solar PV system is represented in Fig. 1(a) [1]-[3].
In past decades, many researchers focused to eliminate the
transformer and introduced cascaded multilevel converter [4]-
[5]. However, it increases the device counts, complexity in
control and penalty on efficiency.
This paragraph of the first footnote will contain the date on which you
submitted your paper for review. For example, “This work was supported by
LVDC Micro grid Laboratory, National Institute of Technology Calicut.”
V. Karthikeyan, Kumaravel S and G. Guru kumar are in the Department of
Electrical Engineering, National Institute of Technology, Calicut, India (e-
mail:karthikeyan@nitc.ac.in;kumaravel_s@nitc.ac.in;gurukumar537@gmail.
com).
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Recently, modular multilevel converter (MMC) structures
becoming popular and provide better support to step-up
voltage and lower device rating. However, due to the presence
of more number of converter combinations, achieving high-
efficiency is still challenging task [6]. This paper proposes a
novel high step-up gain dc-dc converter to match the DC-link
voltage; thereby the use of transformer can be avoided. The
proposed block diagram approach is shown in Fig. 1(b).
Derived topologies were proposed from classic boost type
converters to achieve DC-voltage gain [7]-[9]. However, the
converter presented in [7] must operate at lower duty ratio to
support for higher conversion ratio and deteriorates the
performance under transient conditions. In [8], the harmonic
boosted resonant converter is proposed to extend the DC-
voltage gain, but it has complicated design due to resonant
behavior in nature for boosted-up operation. Varieties of dual
coupled-inductor and single inductor based reconfigurable
converters were reported in [9]-[10] and they can operate with
high efficiency under transient conditions. However, they
introduce electromagnetic interference (EMI), more device
counts and the additional snubbed circuitry is required to
mitigate stored energy present in leakage inductance. In [11],
an ultra-high gain converter is proposed with low voltage
stress. However, the converter DC-voltage gain is not
sufficient to meet DC-link voltage. The galvanically isolated
type dc-dc converters arrived at the market to increase
appropriate conversion ratio. But, it has several issues like
voltage stress on the primary switch, increased size and
volume and also EMI issues [12]-[13].
Among these, the switched–capacitor (SC) converters are
the most common solution to achieve unlimited gain. When
the switched capacitors are integrated with classic boost type,
the DC-voltage gain drastically improves [14]. Obviously, the
reactive components of the converter increase to attain higher
DC-voltage gain. For fair performance comparison of these
SC-based converters, the reactive elements count and device
stresses and DC-voltage gain are considered to convince
researchers [15].
DC-DC Three
Boost Phase DC-AC
Converter Converter
3 Phase 50 Hz
Transformer AC Grid
(a)
A Novel High Three
Voltage Gain Phase DC-AC
DC-DC Converter Converter
AC Grid
(b)
Fig. 1. Generalized block diagram for grid connected solar PV system (a)
Conventional Approach and (b) Proposed Approach.
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Transactions on Circuits and Systems II: Express Briefs

The switched inductor (SI) type converters often used in Mode 2: At instant t1, the switch S2 gets turned off, but still S1
medium power applications to reduce the current ripple and is on state. Therefore, L2 and C2 get discharges the energy to
mitigate the issues associated with pulsating current. A new load. The current paths are clearly depicted in the circuit as
SC-based active network converter (SC-ANC) was proposed shown in Fig. 4(b). During this interval, the inductor currents
in [16]. However, the device stresses are high and and voltages are clearly illustrated in Fig. 3(a). VL1 and VL2
comparatively less DC-voltage gain. In this paper, the high during this interval can be written as,
step-up gain dc-dc converter is proposed by combining the  V (1  D1 )  Vs 
switched-capacitor and regenerative boost configuration. VL1  Vs ; VL 2    0  (2)
Compared to previous literature report on recently derived  (1  D1 ) 
converters, the proposed converter improves the DC-voltage By applying KVL, the voltage appears across the capacitor C1
gain extremely especially at large duty ratios and lowering the can be given as,
current ripple, thereby it enhances the efficiency. vC1  V0  vL 2  vC 2  V0  vC 3 (3)
Ts Ts
II. PROPOSED HIGH GAIN DC-DC CONVERTER WITH SCRB S2 D 2 Ts (1-D2)Ts
S2 D 2Ts (1-D2)Ts

(D1-D2)Ts Ts t Ts t
(D1-D2)Ts
As stated previously, the SC-based networks can greatly (1-D1)Ts
S1 D 1 Ts S1 D1Ts (1-D1)Ts
support to improve the dc-voltage gain. By keeping this goal, t t
the fundamental principle of this paper is to regenerate vL2
Vs
1-D1 vL2
Vs
1-D1

boosted voltage using switched capacitor and inductor during Vs

V0 - 1-D
V0 - 2Vs
1-D1
1

on-state of the switches. Consecutively, it discharges the vL1 vL1

D2x

Vs Vs
reactive elements energy at cascaded form during off-state of iLP1 D2x
iL1 iLP1
the switches. Therefore, the proposed converter improves the iL1 iL01
iL01 iLP2 iLP2
DC-voltage gain at an extreme level. The circuit diagram of iL2 iLm iL2
iL02 iL02
the proposed high DC-voltage gain dc-dc converter is iC1 iLP2-i0

VS1 Vs -i0 Vs
presented in Fig. 2. It contains two active switches S1 and S2. 1-D1 VS1 1-D1

The inductor L1 and capacitor C1 are used to perform boost VS2 V0

V0 -
Vs
1-D1
VS2 V0
VC2

operation. According to the proposed structure, the boosted t0 t1 t2 t0 t1 t2 t3 Ts

1 2 3 1 2 3 4
voltage is regenerated and further stored into capacitor C2 and
(a) (b)
inductor L2. The energy stored in C2 and L2 is controlled by Fig. 3 Detailed steady state waveforms of proposed high DC-voltage gain
the switches S1 and S2, respectively. DC-DC converter (a) CCM operation (b) DCM operation

D3
Mode 3: At instant t2, the switch S2 gets turned off, the stored
L2 C3 energy in L1, L2, and C2 is discharged along with the source to
S2
D2 the load. Due to this cascaded operation, the output voltage
C2 V0
gets increased drastically. Here, C1 and C3 act as filter
L1 D1 network. For better insight, the current paths during this
Vs C1
particular interval are clearly marked in the equivalent circuit
S1
as shown in Fig. 4(c). The voltage appears across the switches
Fig. 2 Proposed single stage transformerless dc-dc converter (VS1 and VS2) under each switching states are clearly indicated
in Fig. 3. VL1 and VL2 at this interval can be written as,
III OPERATION PRINCIPLE OF PROPOSED CONVERTER
The detailed steady-state analytical waveforms under Vs D1 V (1  D1 )  2Vs 
VL1   ; VL 2    0  (4)
CCM and DCM operations are illustrated in Fig. 3. The duty (1  D1 )  (1  D1 ) 
cycles D1 and D2 represent the gating signals of S1 and S2,
respectively. Based on the waveforms, three major operating B. DCM Operation
modes are identified in the converter at every switching The steady state analytical waveform under DCM
period. operation is illustrated in Fig. 3(b). From this figure, it is clear
A. CCM operation that the inductor current becomes discontinuous and attains
zero state at instant t3. Four operating modes are identified in
Mode 1: At instant t0, the switch S1 is turned on and the
DCM operation.
inductor L1 stores the energy till t1. At the same time, C1 gets
Mode 1: At t0, L1 and L2 get charged and the current paths are
discharged to L2 through switch S2. This is called regenerative
similar to CCM operation. The peak inductor current iLP2 can
boost operation. Simultaneously, C1 gets discharged to C2 and
be given as,
it is called switched capacitor operation. The change in slope
Vs
of L1 and L2 during gating signals of S1 and S2 are clearly iLp 2  D2Ts (5)
depicted in Fig. 3(a). The equivalent circuit during mode 1 is (1  D1 ) L2
shown in Fig. 4(a). The voltage appears across the inductors The inductor peak current iLp1 for L1 is similar to classic boost
VL1 and VL2 are given by, converter.
Vs Mode 2: At t1, S2 gets turned off and the operation is similar to
VL1  Vs ; VL 2  (1) mode 2 of CCM condition.
(1  D1 )

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2019.2892144, IEEE
Transactions on Circuits and Systems II: Express Briefs

(i) non-zero state of iL1

D3
iL2 D3 i0 D3 (ii) zero state of iL1
L2 C3 L2 L2 iL2 C3 V0
iS2 C3 C3 V0 C3 V0 i0
iL2 i0 i0
i0
S2 C2 S2 S2
D2 D2 C2 D2 RL RL
iC2 RL RL RL
C2 iC2 iC2
V0 iC1
V0 L1
L1 L1 L1 D1
D1 iC1 D1 D1 Vs C1
Vs iL1 Vs iL1 Vs iL1 iC1 iC1
iS1 C1 iS1 C1 C1
C1 iC1
S1 S1 S1
(i) (ii)

(a) (b) (c) (d)

Fig. 4 Different operating modes of proposed high DC-voltage gain DC/DC converter i) CCM operation (a) mode 1, (b) mode 2 and (c) mode 3 ii) DCM
operation (d) mode 4.

But, here the inductor current reaches to zero at instant t2.

Therefore, the same peak inductor current iLP2 in terms of

DC-Voltage Gain
unknown duty ratio D2x can be given as,
V (1  D1 )  Vs
iLp 2  0 D2 xTs (6)
(1  D1 ) L2
Mode 3: At t2, iL2 holds zero current till next cycle begins. L1
still gets charged similar to mode 2 of CCM operation. C1 and
Dut
C2 together supply current to the load. y rat
io D
2
Mode 4: At instant t3, S1 gets turned off and iL1 starts falling Duty ratio D1

and reaches to zero at instant t4. After this instant t4, C1 and C2 Fig. 5 3-D plot for DC-voltage gain variation with D1 and D2.
discharge the energy to load and the corresponding circuit
Fig. 5. It is noted that wide range of DC-voltage gain can be
representation is clearly depicted in Fig. 4(d). The equivalent
obtained in the proposed converter.
circuits before and after iL1 reaches to zero is shown in Fig.
4(d) (i) and (ii), respectively. Using (5) and (6), D2x can be B. DCM operation
written as, From Fig. 3(b), during S2 turned off state, the average
Vs D2 capacitor current IC3 can be expressed as,
D2 x  (7)
V0 (1  D1 )  Vs 1
I C 3  D2 x I Lp 2  I 0 (12)
2
IV ANALYSIS OF DC-VOLTAGE GAIN By substituting (6) and (7) in (12), IC3 can be derived as,
A. CCM operation D2 2Vs 2 V
IC 3   0 (13)
To obtain the DC-voltage gain in CCM operation, the 2 V0 (1  D1 )  Vs  2 f s (1  D1 )  R
average inductor voltage is considered to zero at every single
For considering D1 = D2, the DC-voltage gain is derived by
switching period. From Fig. 3(a), the following equation can
simplifying (13), the DC-voltage gain under DCM KDCM can
be obtained,
be written as,
Vs D2  Vs   2Vs 
  V0  ( D1  D2 )    V0  (1  D1 )  0 (8) D2
(1  D1 )  (1  D1 )   (1  D1 )  K DCM  1  1  (14)
L
By simplifying (8), the DC-voltage gain KCCM in CCM
operation can be written as, The unified inductor time constant τL can be given as,
(2  D1 ) L2 f s
V
KCCM  0  (9) L  (15)
Vs  (1  D1 )(1  D2 ) R
Here, fs is the operating frequency and R is the load resistance.
To obtain DC-voltage gain transfer characteristics of the
C. BCM Operation
proposed high gain converter, the constants D2 = D1 and D2 =
0 are considered. The maximum DC-voltage gain Kmax can be Under this boundary condition, the inductor current
obtained by substituting D2 = D1 = D in (9), becomes discontinues from continuous conduction. Hence,
V (2  D) the DC-voltage gain in CCM and DCM are equal. Therefore,
K max  0  (10) by equating the DC-gains obtained in (10) and (14), the
Vs (1  D)2
boundary unified inductor current constant can be obtained as,
Similarly for D2 = 0 in (9), the minimum DC-voltage gain Kmin 2
can be obtained as,  D(1  D) 2 
 LB    (16)
V (2  D1 )  (2  D) 
Kmin  0  (11)
Vs (1  D1 ) The unified inductor current constant τLB is plotted with
Using (9), three-dimensional characteristics for DC-voltage variation of D as shown in Fig. 6. The margins of CCM and
gain in accordance to D1 and D2 has been plotted as shown in DCM regions along with boundary lines are indicated in the
figure.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2019.2892144, IEEE
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has less voltage stress on power switches and diodes at D =

CCM Operation
0.8. Thereby, the lower on-state resistance can be preferred
τLB for selecting the power switch, which greatly reduces the cost
DCM Operation
and losses. Moreover, for diode selection, lower voltage
rating can be utilized, which neutralize the reverse recovery
Duty ratio (D) problems and reduces the cost.
Fig. 6 Boundary conditions of DCM and CCM operations
VI EXPERIMENT RESULTS AND DISCUSSION
V COMPARATIVE ANALYSIS OF PROPOSED CONVERTER
A 500 W laboratory model was built with the following
An aforementioned statement the SI and SC based parameters Vs = 24 V and Vs = 48 V, inductors L1 = L2 = 1 mH
converters are the more suitable solution to improve the DC- and capacitors C1 = C2 = 47 µF. The experimental results
voltage gain and enhance the performances. In order to claim were observed for switching frequency of 10 kHz and
the proposed converter has better performance, the discussed in this section. The gating signals correspondence
comparison of the proposed converter with recently derived to the switches S1 and S2 and inductor currents iL1 and iL2 are
SI and SC-based high gain converters [14]-[16] are reported displayed in Fig. 8(a). Similarly, at the same gating signals,
in Table I. the input and output voltages are measured and presented in
TABLE I
PERFORMANCE COMPARISON OF PROPOSED CONVERTER WITH CONVENTIONAL Fig. 8(b). Here, D1 = D2 are considered, thereby the slopes of
CONVERTERS inductor current waveforms are equal, which is clearly visible
SL-Boost SC-Boost SC-ANC in Fig. 8(a) and (b) for 50% of the load (250 W). From Fig.
Topology Boost Proposed Converter
[14] [15] [16]
Power Switches 1 1 1 2 2 8(b), it is clear that the output voltage is exactly matched with
Power Diodes 1 4 3 3 3 the theoretical expression derived in (10).
DC-Voltage 1 (1  D ) 2 (3  D) (2  D )
Gain (1  D ) (1  D ) (1  D ) (1  D) (1  D ) 2 Inductor current (iL1)
I n d u c t o r c u rL r1)e n t ( i
VSW 1 K ccm (1  D)
 Inductor current (iL2)
Voltage stress V0 V0  Vs Vs (2  D)
on power switch V0 V0 I n d u c t o r c u rL2r)e n t ( i

2 4 VSW 2  1 
  K ccm  Gate pulse (S1)
Vs  (1  D)  Output VolV
ta
0) g e (
VD1 VD 2 K ccm (1  D)
  Gate pulse (S2)
Voltage stress V0 V0  Vs Vs Vs (2  D)
V0 V0 I n p u t V o l t as)g e ( V
on power diode
2 2 VD 3  2 
 K ccm 
Vs  (1  D) 
Voltage stress Vs Vs
on capacitors VC1  VC 2  VC 3  V0  (a) (b)
1  D1 1  D1 Fig. 8 Experimental results showing (a) iL1 (CH1) and iL2 (CH2) gating single
of S1 (CH3) and gating single of S2 (CH4) (b), iL1 (CH1) and iL2 (CH2), V0
A. DC-voltage gain (CH3) and Vs (CH4).
The ideal DC-voltage gain for the proposed converter The experimental results were captured when D1 > D2.
with recently derived converters has been listed in Table I. The instantaneous inductor currents iL1 and iL2 get changed in
For any practical applications, the dc-dc converter must be accordance with gating signals of S1 and S2, respectively,
operated at lower duty ratios to get maximum efficiency and which is clearly shown in Fig. 9(a). Further Fig. 9(b) shows
the duty ratio can be extended up to 0.8. Beyond this duty the inductor voltages VL1 and VL2 polarity changes with
cycle, the inductor core is saturated and generates noise in the respect to gating signals of S1 and S2, respectively. In DCM
circuit, which automatically degrades the performances. operation, the inductors current and voltage are measured and
presented in Fig. 9(c), in which we could see the currents
become discontinues as shown in the Fig. 3(b). The inductors
DC-Voltage Gain

current waveforms with respect to gating signals have been

observed and presented in Fig. 9(d) for D1 > D2. It is clear that
the inductors current get discontinues in accordance to duty
cycle. From the experimental results, it is clearer that the
results have a very good agreement with the theoretical
Duty ratio (D) waveform as shown in Fig. 3. In Fig. 8 and 9, it is evident that
Fig. 7 Comparative DC-voltage gains for proposed and reported converters. the operation of the proposed converter is validated
Using (10), the DC-voltage gain can be calculated as 30 experimentally. As stated before, the proposed high DC-
at D = 0.8 for the proposed converter. But in conventional voltage gain dc-dc converter with the same components count,
approach of SC-ANC [16], the maximum DC-voltage gain it has a high DC-voltage gain. Due to minimum voltage stress
can be achieved as 20 at D = 0.8. For better insight, on switch S1, lower on-state resistance in power MOSFET has
comparative DC-voltage gain is plotted as shown in Fig. 7 for been utilized for the experiment. Moreover, the lower range of
the proposed and conventional converters reported in recent duty cycle is sufficient to get required output voltage, which
literatures. It is evident that proposed converter has high DC- further reduces the conduction losses. The voltage stresses of
voltage gain than other reported converters [14] and [15]. S1 and S2 are captured as shown in Fig. 10 (a), which is
And, it also has higher gain than SC-ANC [16] for D > 0.6. similar to the theoretical waveform presented in Fig. 3.
Apart from this, Table I confirms that the proposed converter

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2019.2892144, IEEE
Transactions on Circuits and Systems II: Express Briefs
Inductor current (iL1)
Inductor current (iL2)
Inductor voV
Gate pulse (S1)
Inductor voV
G a t e p u l s1)e ( S
Gate pulse (S2)
G a t e p u l s2)e ( S
(a)
Inductor voltage (VL2) G a t e p u l s2)e ( S
Inductor current (iL2) I n d u c t o r c u rL2r)e n t ( i
G a t e p u l s1)e ( S
Inductor voltage (VL1)
I n d u c t o r c u irL1r)e n t (
Inductor current (iL1)
(c) (d)
Fig. 9 Experimental results showing (a) iL1 (CH1), iL2 (CH2) Gating signal of
S1 (CH3) and Gating signal of S2 (CH4) (b) VL1 (CH3), VL2 (CH4), Gating
signal of S1 (CH3), Gating signal of S2 (CH4) (c) VL2 (CH1), iL2 (CH2), VL1
(CH3) and iL1(CH4) (d) S2 (CH1), iL2 (CH2), S1 (CH3) and iL1 (CH4).
To validate the efficiency, losses associated with each
device and component of the proposed converter is
considered. The measured sample data has been taken at
experimentally and efficiency graph has been plotted with
respect to the output power at Vs = 24 V and Vs = 48V, which
is clearly shown in Fig. 10 (b). It concludes that the proposed
converter operates with high-efficiency and the maximum
efficiency of the converter is observed as 95.60 % at 480 W.
Output Voltage (V0)
Input Voltage (Vin)
Switch (S1) Voltage (VS1)
Switch (S2) Voltage (VS2)
(a) (b)
Fig. 10. (a) Experimental results showing Vo (CH1), Vs = 48 V (CH2), switch
voltage stress (S1) (CH3) and switch voltage stress (S2) (CH4) and (b)
Measured efficiency graph of the proposed converter at Vs = 24 V and 48 V.
VII CONCLUSION
This paper proposes high step-up gain dc-dc converter by
combining switched capacitor and regenerative boost
configuration. The main goal of this paper is to achieve high
DC-voltage gain to avoid the use of the transformer in solar
PV applications. The detailed steady state waveforms for
CCM and DCM operations are discussed in this paper. The
comparative performances of the proposed converter such as
DC-voltage gain, voltage stress on the active devices are
presented. From the analysis, it is concluded that the proposed
converter has better merit than recently reported converters;
thereby it is more suitable for solar PV applications.
Moreover, it offers low losses due to the utilization of lower
on-state resistance and lower duty cycle operations; it results
in high-efficiency. A 500 W experimental model was built
and verified the operation. The experimental results have been
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observed and discussed in this paper. The measured results
have good agreement with the theoretical waveforms and
l tL a1) g e (
confirm the DC-voltage gain analysis presented in (10).
Furthermore, measured efficiency graph is discussed and it is
l tL a2) g e (
noted that the maximum efficiency of 95.60 % is obtained at
480 W. Finally, by implementing the proposed high-gain dc-
dc converter, the size and cost of the whole solar PV system
can be minimized and elongates the overall efficiency.
(b)
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