EXP.

NO:
DATE :
CHARACTERISTICS OF PN JUNCTION DIODE

AIM

To conduct a suitable experiment to obtain the Characteristics of PN junction

diode under forward and reverse bias conditions. Also plot the characteristics.

EQUIPMENTS REQUIRED

S. No Equipment Range Quantity

1. Regulated Power Supply (0 – 30) V 1

2. Voltmeter (0 – 30) V Each 1

(0 – 1) V

3. Ammeter (0-500) μA Each 1

(0-30) mA

COMPONENTS REQUIRED

S. No Component Range Quantity

1. Diode 1N4007 1

2. Resistor 1 K 1

3. Bread Board 1

4. Connecting Wires As required

THEORY
A p-n junction diode is formed by joining a p-type and a n-type semiconductor
through a metallic junction. The symbol and operations are discussed bellow. A diode
is a two terminal, uni-junction device. It is unidirectional, i.e., it conducts in only one
direction (only on forward biasing). Biasing is defined as the process in which the
device is connected to an external source. If the +ve terminal of the supply is
CIRCUIT DIAGRAM

Forward Bias Reverse Bias

connected to the (p-region) anode and negative terminal to (n-region). cathodes the
diode is said to be forward biased. If the connections are reversed, i.e., the +ve
terminal of the supply is connected to the (n-region) cathode and negative terminal to
(p-region) anode, the diode is said to be reverse biased.

Biased Diode
Forward Biased Diode: On forward biasing a diode, initially no current flows
due to the barrier potential. The applied forward potential repels the charge carriers
and hence pushes them towards the junction. As the applied potential increases, it
exceeds the barrier potential at one value (above cut-off value), and the charge
carriers gain sufficient energy to cross the potential barrier and enter the other region.
The holes, which are the majority carriers in the p-region, become minority carriers
on entering the n-region and electrons, which are the majority carriers in the n-region,
becomes minority carriers on entering the p-region. This injection of the minority
carriers results in a current, opposite to the direction of electron movement.

Reverse Biased Diode: On reverse biasing, the majority charge carriers are
attracted towards the terminals due to the applied potential. This results in widening
of the depletion region. Since the charge carriers are pushed towards the terminals no
current flows in the device due to majority charge carriers. There will be some
current in the device due to the thermally generated minority carriers. The
generations of such carriers are independent of the applied potential and hence the
current is a constant for all increasing reverse potential. This current is referred to as
‘Reverse saturation current, Ico and it increases with temperature. When the applied
reverse voltage is increased beyond a certain limit, it results in breakdown. During
breakdown, the diode current increases tremendously for a particular voltage.

Pre-Lab Questions
1. What is the need for doping?
2. How depletion region is formed in the PN junction?
3. What is leakage current?
4. What is break down voltage?
5. What is an ideal diode? How does it differ from a real diode?
6. What is the effect of temperature in the diode reverse characteristics?
7. What is cut-in or knee voltage? Specify its value in case of Ge or Si?
8. What are the difference between Ge and Si diode?
9. What is the capacitance formed at forward biasing?
10. What is the relationship between depletion width and the concentration of
impurities?
TABULATION
Forward Bias

VF (Volts) IF (mA)

Reverse Bias

VR (Volts) IR (µA)
PROCEDURE
Forward Biasing

1. Rig up the circuit shown in the circuit diagram.

2. Vary the Regulated Power supply voltage in such a way that the
readings are taken in steps of 0.1V in the voltmeter.
3. Note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Calculate the dynamic resistance using the formula given below.
V
r 
I

Reverse biasing

1. Rig up the circuit shown in the circuit diagram.

2. Vary the Regulated Power supply voltage in such a way that the
readings are taken in steps of 1V in the voltmeter.
3. Note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Find the dynamic resistance using the following formula.
V
r K
I
MODEL GRAPH

Graph (instructions)

1. Take a graph sheet and divide it into 4 equal parts. Mark origin at the
center of the graph sheet.
2. Now mark +ve x-axis as Vf, -ve x-axis as Vr, +ve y-axis as If, -ve y-
axis as Ir.
3. Mark the readings tabulated for diode forward biased condition in
first Quadrant and diode reverse biased condition in third Quadrant.
Calculations

Conclusion/Inference

RESULT

Characteristics Parameter
Forward Bias
Reverse Bias
Cut in voltage (Volts)
 DESCRIPTION MARKS MARKS
AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE :
ZENER DIODE CHARACTERISTICS AND
REGULATOR USING ZENER DIODE

AIM

 To conduct an experiment to obtain the Volt-Ampere

characteristics of Zener diode under forward and reverse biased
conditions.
 To determine Zener break down voltage in reverse biased
condition.

 To plot the load regulation characteristics of zener diode

regulator.

EQUIPMENTS REQUIRED

S. No Equipment Range Quantity

1. Regulated Power Supply (0 – 30) V 1

2. Voltmeter (0 – 30) V Each 1

(0 – 1) V

3. Ammeter (0-30) mA 1

COMPONENTS REQUIRED

S. No Component Range Quantity

1. Zener Diode 5Z1/9Z1 1

 2. Resistor 330,1 K Each 1

3. Bread Board 1

4. Connecting Wires As required

5. DRB 1

CIRCUIT DIAGRAM

Forward Bias Reverse Bias

THEORY
An ideal P-N Junction diode does not conduct in reverse biased
condition. A zener diode conducts excellently even in reverse biased
condition. These diodes operate at a precise value of voltage called
break down voltage. A zener diode when forward biased behaves like an
ordinary P-N junction diode. A zener diode when reverse biased can
either undergo avalanche break down or zener break down.

Avalanche Multiplication: When the reverse potential increases,

thermally generated carrier acquires sufficient energy from it and by
colliding it releases energy which breaks the covalent bonds of the
bound charges. This results in a new electron-hole pair. These carriers in
turn acquire energies from the applied potential, thermal energy and
fusion energy and collide with other bound charges. This collision and
generation of new electron-hole pairs is continuous and multiplicative,
which results in a large amount of charge carriers and thus an increase
in reverse current.

Zener Breakdown: Due to the applied reverse potential, an electric

field exists near the junction. This field exerts a strong force on the
bound charges, which breaks the covalent bonds and releases free
charge carriers. These newly created electron-hole pairs result in a
sudden increase of reverse current. Since the field intensity is directly
proportional to the charge concentration, for heavily doped diodes
breakdown is due to Zener mechanism, while lightly doped ones
breakdown due to avalanche multiplication. As the level of doping is
increased, the breakdown voltage decreases.

ZENER DIODE AS VOLTAGE REGULATORS

The function of a regulator is to provide a constant output voltage
to a load connected in parallel with it in spite of the ripples in the supply
voltage or the variation in the load current and the zener diode will
continue to regulate the voltage until the diodes current falls below the
minimum IZ(min) value in the reverse breakdown region. It permits
current to flow in the forward direction as normal, but will also allow it
to flow in the reverse direction when the voltage is above a certain value
- the breakdown voltage known as the Zener voltage. The Zener diode
specially made to have a reverse voltage breakdown at a specific
voltage. Its characteristics are otherwise very similar to common diodes.
In breakdown the voltage across the Zener diode is close to constant
over a wide range of currents thus making it useful as a shunt voltage
regulator. The purpose of a voltage regulator is to maintain a constant
voltage across a load regardless of variations in the applied input
voltage and variations in the load current. A typical Zener diode shunt
regulator is shown in Figure 3. The resistor is selected so that when the
input voltage is at VIN(min) and the load current is at IL(max) that the current
through the Zener diode is at least I z(min). Then for all other combinations
of input voltage and load current the Zener diode conducts the excess
current thus maintaining a constant voltage across the load. The Zener
conducts the least current when the load current is the highest and it
conducts the most current when the load current is the lowest.

TABULATION
Forward Bias
VF (Volts) IF (mA)
Reverse Bias
VR (Volts) IR (mA)
If there is no load resistance, shunt regulators can be used to dissipate
total power through the series resistance and the Zener diode. Shunt
regulators have an inherent current limiting advantage under load fault
conditions because the series resistor limits excess current. Zener diode
of break down voltage Vz is reverse connected to an input voltage
source Vi across a load resistance RL and a series resistor RS. The
voltage across the zener will remain steady at its break down voltage V Z
for all the values of zener current IZ as long as the current remains in the
break down region. Hence a regulated DC output voltage V 0 = VZ is
obtained across RL, whenever the input voltage remains within a
minimum and maximum voltage.

Basically there are two types of regulations such as:

a) Line Regulation
In this type of regulation, series resistance and load resistance are
fixed, only input voltage is changing. Output voltage remains the same
as long as the input voltage is maintained above a minimum value.

Percentage of line regulation can be calculated by =

where V0 is the output voltage and VIN is the input voltage and ΔV0 is
the change in output voltage for a particular change in input
voltage ΔVIN.
b) Load Regulation
In this type of regulation, input voltage is fixed and the load resistance
is varying. Output volt remains same, as long as the load resistance is
maintained above a minimum value.

Percentage of load regulation =

where is the null load resistor voltage (ie. remove the load
resistance and measure the voltage across the Zener Diode) and is
the full load resistor voltage

Pre lab Questions

1. Explain the concept of zener breakdown?

2. How depletion region gets thin by increasing doping level in zener
diode?
3. State the reason why an ordinary diode suffers avalanche breakdown
rather than zener breakdown?
4. Give the reasons why zener diode acts as a reference element in the
voltage regulator circuits.
MODEL GRAPH
PROCEDURE
Forward Biasing

1. Rig up the circuit shown in the circuit diagram.

2. Vary the Regulated Power supply voltage in such a way that the
readings are taken in steps of 0.1V in the voltmeter till the
Regulated Power supply shows 20 V.
3. Also Note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Find the dynamic resistance from formula specified below.
V
r 
I
Reverse biasing

1. Rig up the circuit shown in the circuit diagram.

2. Vary the Regulated Power supply voltage in such a way that the
readings are taken in steps of 1V in the voltmeter till the needle of
the Regulated Power supply shows 20 V.
3. Also note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Find the dynamic resistance from the given formula.
V
r K
I

TABULATION
 RL = VNL = Vin =
Line Regulation Load Regulation
S. No Vin (V) Vo (V) % Regulation RL (Ohm) Vo (V) % Regulation

Calculations
Conclusion/Inference

RESULT

Characteristics Parameter
Forward Bias
Reverse Bias
Cut in voltage (volts)
Break down voltage (volts)

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE :

COMMON EMITTER INPUT-OUTPUT

CHARACTERISTICS

AIM
 To conduct an experiment to obtain the input & output
Characteristics of Common-Emitter Configuration
 To determine the h-parameters from the input & output
Characteristics.

EQUIPMENTS REQUIRED

S. No Equipment Range Quantity

1. Regulated Power Supply (0 – 30) V 2

2. Voltmeter (0 – 30)V Each 1

(0 – 2) V

3. Ammeter (0-10)mA Each 1

(0-100)µA

COMPONENTS REQUIRED

S. No Component Range Quantity

1. Transistor BC 107 1

2. Resistor 1 K 2

3. Bread Board 1

4. Connecting Wires As required

THEORY
In CE configuration, the emitter is common to both input and
output. The input characteristics relate I B and VBE for a constant VCE.
When VCE is 0 V, the transistor operates like a forward biased diode.
When VCE is increased, due to base width modulation, IB decreases. Also
the graph shifts to the right. The output characteristics
CIRCUIT DIAGRAM

PIN DIAGRAM
relate IC and VCE for a constant IB. For a particular value of IB, IC
increases linearly with VCE and levels off after some time based on the
a
relation IC= b IB. As VCE increases, its effect on α is less but b  has
1-a
an appreciable change. So but due to early effect, an increase in V CE
causes an appreciable increase in b and thus on IC . So the current
increases with VCE making the characteristics slanting rather than a
straight line as in CB configuration.

Pre lab Questions

1. What is the significance of arrow in the transistor symbol?

2. Define current amplification factor?
3. What is the function of a transistor?
4. Give the doping levels and the width of the layers of BJT.
5. Two discrete diodes connected back-to-back can work as a transistor?
Give comments.
6. For amplification, CE configuration is preferred, why?
7. To operate a transistor as amplifier, the emitter junction is forward
biased and the collector junction is reversed biased, why?
8. With the rise in temperature, the leakage collector current increases,
why?
9. Can a transistor base emitter junction be used as zener diode?

PROCEDURE
Input Characteristics
1. Rig up the circuit shown in the circuit diagram.
2. Set VCE = 5 V (say), vary VBE insteps of 0.1V and note down the
corresponding IB.
3. Repeat the above procedure for 10 V, 15 V etc.
4. Plot the graph: VBE Vs IB for a constant VCE.
5. Determine the h-parameters as shown in the Figure.
(a) hfe: forward current gain
(b) hie: input impedance.

Output Characteristics
1. Rig up the circuit shown in the circuit diagram.
2. Set IB = 20μA (say), vary VCE insteps of 1V note down the
corresponding IC.
 3. Repeat the above procedure for 40 μA and 80μA, etc.
4. Plot the graph: VCE Vs IC for a constant IB.
5. Determine the h-parameters as given below.
(a) hoe: output admittance
(b) hre: reverse voltage gain
MODEL GRAPH
Calculation
TABULAR COLUMN
Input Characteristics: VCE =
VBE(volts) IB(μA)

Input Characteristics: VCE =

VBE(volts) IB(μA)
Output Characteristics: IB =
VCE(volts) IC(mA)

Output Characteristics: IB =
VCE(volts) IC(mA)
Conclusion / Inference

RESULT

Parameters Practical Readings

hfe

hie

hre

hoe

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE :

COMMON BASE INPUT-OUTPUT

CHARACTERISTICS

AIM
 To conduct an experiment to obtain the input & output
characteristics of Common-Base Configuration
 Also to determine h-parameters from the input & output
characteristic of the transistor.

EQUIPMENTS REQUIRED

S. No Equipment Range Quantity

1. Regulated Power Supply (0 – 30) V 2

2. Voltmeter (0 – 30) V Each 1

(0 – 2) V

3. Ammeter (0-10) mA 2

COMPONENTS REQUIRED

S. No Component Range Quantity

1. Transistor BC 107 1

2. Resistor 1 K 2

3. Bread Board 1

4. Connecting Wires As required

THEORY
In CB Configuration, base is common to both input and output. To
understand the operation of a transistor in these configurations it is
preferable to learn the characteristics. In CB Configuration, the input
characteristics relate IE and VEB for a constant VCB. Initially let VCB
= 0 then the input junction is equivalent to a forward

CIRCUIT DIAGRAM

PIN DIAGRAM
biased diode and the characteristics resembles that of a diode. Where
VCB = + Vi (volts) thus due to early effect IE increases and so the
characteristics shifts to the left.

The output characteristics relate IC and VCB for a constant IE.

Initially Ic increases and then it levels for a value IC = a IE. When IE is
increased IC also increases proportionality. Though increase in VCB
causes an increase in a , since a is a fraction, it is negligible and so IC
remains a constant for all values of VCB once it levels off.

Pre lab questions

1. What are the different configurations of BJT?

2. What is BJT? How are its terminals named?

3. Explain how a transistor is used as an Amplifier?

PROCEDURE

Input Characteristics
1. Rig up the circuit shown in the circuit diagram.
2. Set VCB = 5 V (say), vary VEB in steps of 0.1 V and note down
the corresponding IE.
3. Repeat the above procedure for 10 V, 15 V, etc.,
4. Plot the graph: VEB Vs IE for a constant VCB.
5. Determine the h-parameters as given below
(a) hfb: forward current gain
(b) hib: input impedance

Output Characteristics
1. Rig up the circuit shown in the circuit diagram.
2. Set IE = 2 mA (say), vary VCB insteps of 1 V and note down the
corresponding IC. Repeat the above procedure for 4 mA, 6 mA,
etc.
3. Plot the graph: VCB vs IC for a constant IE.
 4. Determine the h-parameters as given below
(a) hob: output admittance
(b) hrb: reverse voltage gain

MODEL GRAPH
Calculation
TABULATION
Input Characteristics: VCB =
VEB(volts) IE(mA)

Output Characteristics: IE =
VCB(volts) IC(mA)

Input Characteristics: VCB =

VEB(volts) IE(mA)

Output Characteristics: IE =
VCB(volts) IC(mA)
Conclusion/ Inference

RESULT

Parameters Practical Readings

hfb

hib

hrb

hob

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE :
 JUNCTION FIELD EFFECT TRANSISTOR

AIM

To conduct an experiment for obtaining the drain and transfer characteristics of

JFET. Also determine the drain Resistance and Transconductance.

EQUIPMENTS REQUIRED

S. No Equipment Range Quantity

1. Regulated Power Supply (0 – 30) V 2

2. Voltmeter (0 – 30)V 2

3. Ammeter (0-30) mA 1

COMPONENTS REQUIRED

S. No Component Range Quantity

1. JFET Transistor BFW 10 1

2. Resistor 1 K 2

3. Bread Board 1

4. Connecting Wires As required

THEORY
JFET is a uni-polar device in which the conduction is due to majority
carriers alone. This is a three terminal device in which the field or potential at the
third terminal controls the current flow between the first two terminals. Hence it is
called as Field-effect transistor. This is categorized into two types depending on the
construction as JFET and MOSFET. Depending on the channel material, it is further
classified as n-channel FET and p-channel FET.
CIRCUIT DIAGRAM
PIN DIAGRAM

The comparison between the features of a BJT and FET:

 1. It is uni-polar while BJT is bi-polar.
2. It is simpler to fabricate and it occupies less space in the IC.
3 Due to reverse biased input junction, the device offers high input impedance
compared to BJT.
4. Less noisy.

The operation of the device can be clearly understood by discussing output

characteristics and the transfer characteristics. The static output characteristic deals
with the variation of ID with respect to VDS for a constant VGS. Initially assume that
VGS is 0V. Then for a small applied voltage VDS, the device acts like a resistor and
the current increases linearly with the voltage. With an increase in current, an unequal
ohmic drop results. The drop is more near the drain compared to the source due to the
reverse bias there and so the channel region gets restricted resulting in a constant
current flow. The voltage at which the current levels-off is known as the Pinch-off
voltage. If VDS is increased further the reverse voltage the drain region increases
resulting in a breakdown. Thus the device operates in three region i.e., as a resistor in
the variable resistance region, as a constant current device in the active region and
finally, the breakdown region in which the device collapses.

When the gate voltage is applied, the depletion region widens. The penetration
is more near the drain region and less near the source region and thereby the effective
channel width reduces which reduces the amount of charges moving from the source
to the drain, there decreasing the ID. The pinch-off and breakdown occur at an earlier
stage due to the increased overall reverse bias. Thus as the gate bias is increased the
channel width is reduced and decreases.

Transfer Characteristics: This relates the VGS and ID for a constant VDS.
When VGS =0, then for a particular value of VDS, ID is maximum. As VGS is
increased due to the reduction the effective channel width, ID decreases and finally
becomes zero at which the device is s to be at cut-off. These characteristics can be
obtained for different values of VDS.

Pre lab Questions

1. Why FET is called as a unipolar transistor?

2. What are the advantages of FET over BJT?
3. State why FET is voltage controlled device?
4. Why thermal runaway does not occur in FET?
5. What is the difference between MOSFET and FET?

TABULATION
Drain Characteristics
VGS1 = VGS2 =
VDS(volts) ID(mA) VDS(volts) ID(mA)

Transfer Characteristics
VDS 1 = VDS 2 =
VGS(volts) ID(mA) VGS(volts) ID(mA)

PROCEDURE
Drain Characteristics

1. Rig up the circuit shown in the circuit diagram.

2. Set gate voltage VGS = 0 V, then vary drain voltage VDS in steps of 1 V and note
down the corresponding drain current, ID.
3. Repeat the above procedure for VGS = -1 V, -2 V, etc.
4. Plot the graph: VDS against ID for a constant VGS.

5. Calculate the drain resistance,

Transfer Characteristics

1. Rig up the circuit given in the circuit diagram.

2. Set the drain voltage VDS = + 5 V, vary the gate voltage V GS in steps of 1 V
(negative voltage) and note down the corresponding drain current, ID.
3. Repeat the above procedure for VDS = + 10 V, + 15 V, etc.
4. Plot the graph: VGS vs ID for a constant VDS.

5. Determine the trans-conductance,

Calculations from Graph

Drain Resistance (rd)

It is given by the ration of small change in drain to source voltage (ΔV DS) to the
corresponding change in Drain current (ΔID) for a constant gate to source voltage
(VGS), when the JFET is operating in pinch-off or saturation region.

Trans-Conductance (gm)
Ratio of small change in drain current (ΔID) to the corresponding change in gate to
source voltage (ΔVGS) for a constant VDS. gm = ΔID / ΔVGS at constant VDS. (from
transfer characteristics) The value of gm is expressed in mho’s or Siemens(s).

Amplification Factor (μ)

It is given by the ratio of small change in drain to source voltage (ΔV DS) to the
corresponding change in gate to source voltage (ΔVGS) for a constant drain current.
μ = ΔVDS / ΔVGS.
μ = (ΔVDS / ΔID) X (ΔID / ΔVGS)
μ = r d X gm.
MODEL GRAPH

Drain Characteristics Transfer Characteristics

a) Transconductance

b) Drain Resistance

a) Amplification Factor

µ = rD * gm

Inference
1. As the gate to source voltage (V GS) is increased above zero, pinch off voltage is
increased at a smaller value of drain current as compared to that when VGS =0 V
2. The value of drain to source voltage (VDS) is decreased as compared to that
Then VGS=0V

Conclusion/ Inference

RESULT

Parameters Practical Readings

rd

gm

μ= gm x rd

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE :
 SILICON CONTROLLED RECTIFIER
AIM
To conduct a suitable experiment to obtain the Characteristics of Silicon
Controlled Rectifier (SCR), and thereby obtaining it’s latching and Holding currents.

EQUIPMENTS REQUIRED

S. No Equipment Range Quantity

1. Regulated Power Supply (0 – 30) V 2

2. Voltmeter (0 – 30) V 1

3. Ammeter (0-30) mA 2

COMPONENTS REQUIRED

S. No Component Range Quantity

1. SCR TYN 604 1

2. Resistor 1 K 2

3. Bread Board 1

4. Connecting Wires As required

THEORY

Silicon Controlled rectifier is a four layer device with three junction and four
terminals. The terminals are anode, cathode, anode gate and cathode gate. The
doping of the anode and cathode layers is high while that of the gate regions are
low. The anode is always at a higher positive potential than the cathode. This
forward biases the outer junctions J1 & J3 while the inner junction J2 is reverse
biased. Due to the presence of a reverse biased junction in series no current other
than a small amount of minority current flows through the device.
PIN DIAGRAM

CIRCUIT DIAGRAM
 When the applied potential is increased, the forward bias at the outer layers
and the reverse voltage at the inner layer increase resulting in avalanche
multiplication. The potential at which the breakdown occurs is known as breaking
potential or firing potential. Since breakdown occurs there is a large increase in
current through the device and hence a decreased resistance and voltage across the
device. With further increase in the anode potential, the current increases with
respect to the applied voltage. Thus the device is in the cut-off region or in the off
state before the breakdown potential and after VB0, it is in the ON state, initially,
entering the negative resistance region and then operating in the saturation region.
A voltage applied at the gate terminal can control the breakdown voltage. Such
a device in which either of the gate terminals is used to control the operation of
the device is called a SCR (Silicon Controlled Rectifier). The gate terminal is
forward biased with respect to cathode and when a gate potential is given, the
inner junction is forward biased and introduction of the gate current decreases the
break over voltage thereby turning ON the SCR at a earlier stage. Thus the gate
terminal is used to control the turn ON of the SCR. Once the SCR is ON, the gate
loses control and only by reducing the anode to cathode voltage can switch off the
device.

PROCEDURE
1. Rig up the circuit shown in the circuit diagram.
2. Set gate current IG equal to firing current, vary anode to cathode voltage,
VAK, in steps of 0.5 V and note down the corresponding anode current, IA
3. VB0 is the point where voltage (VAK,) suddenly drops and there is a sudden
increase in anode current IA.
4. Note down the current at that point, which is termed as latching current.
5. Increase the VAK in steps of 1 V in the voltmeter until it reaches maximum
value.
6. Open the gate terminal and thereby decrease the VAK.
7. Holding current is the current below which the deflection in both voltmeter
(VAK) and ammeter (IA) suddenly reduces to zero.
8. Holding current is the minimum current that a SCR can maintain its on
condition and it is always less than latching current.
MODEL GRAPH TABULATION

VAK (Volts) IA (mA)

Calculations
Conclusion/Inference

RESULT

Parameter Practical reading

VBO

IL

IH

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE :
 FREQUENCY RESPONSE OF SERIES AND PARALLEL
RESONANCE CIRCUITS

AIM

To conduct an experiment to obtain the frequency response characteristics of

both series and parallel resonance circuits. And also determine the Q-factor and
bandwidth from the circuits.

APPARATUS REQUIRED

S. No Equipment Range Quantity

1.
Function Generator (0 – 10) MHz 1

2. CRO (0-30) MHz 1

3.
Decade Resistance Box 1

4.
Decade Inductance Box 1

5.
Decade Capacitance Box 1

6.
Connecting wires As required

7.
Bread board 1

FORMULA USED

Series Circuit

1. Resonance Frequency :
 2. Bandwidth:

3. Quality Factor:

CIRCUIT DIAGRAM

Series Resonance

Parallel Resonance
 Parallel Circuit

1. Resonance Frequency :

2. Bandwidth:

3. Quality Factor:

PROCEDURE

1. Rig up the circuit shown in the circuit diagram.

2. Generate a sine wave of amplitude 5 volts at frequency of 2500Hz using AFO.
(Vin=5V,fc=2500Hz)
3. Vary the input frequency, and observe the corresponding output voltage and
tabulate the readings.
4. Determine the current
5. Plot the graph: current (I) against frequency (F) in the semi log graph sheet.
TABULATION

Series Resonance R=

Frequency (Hz) Voltage (volts) Current (mA)

Parallel Resonance R=

Frequency (Hz) Voltage (volts) Current (mA)

Calculation
MODEL GRAPH

Series Resonance Parallel Resonance

Conclusion/Inference

RESULT
 DESCRIPTION MARKS MARKS
AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE :

CLIPPER, CLAMPER AND FULL WAVE RECTIFIERS

AIM

 To conduct a suitable experiment to obtain the characteristics of Full wave

rectifier. Also determine the Ripple factor and efficiency.
 To conduct an experiment for understanding the operating principle of diode in
clipping and clamping circuits. And also observe the changes in its output
wave form while applying bias voltage and plot the graph.

COMPONENTS REQUIRED

S. No Equipment Range Quantity

1.
Transformer 230V/ 12V, 50Hz 1

2. Diode BY 127, 1N4007 1, 2

3. Capacitor 1000 F 1
 4. Resistor 1K 1

5. Power Supply (0-30)V 1

6. CRO (0-20) MHz 1

7. Function Generator (0-10) MHz 1

8.
Connecting wires As required

9.
Bread board 1

THEORY

CLIPPER & CLAMPER

Clipping circuits (also known as limiters, amplitude selectors, or slicers), are

used to remove the part of a signal that is above or below some defined reference
level. To clip to a reference level other than zero, a dc source is put in series with the
diode. Depending on the direction of the diode and the polarity of the battery, the
circuit will either clip the input waveform above or below the reference level.

CIRCUIT DIAGRAM
Full wave Rectifier
 A device is capable of converting a sinusoidal input waveform into a
unidirectional waveform with non zero average component is called a rectifier. A
practical half wave rectifier with a resistive load is shown in the circuit diagram. It
consists of two half wave rectifiers connected to a common load. One rectifies
during positive half cycle of the input and the other rectifying the negative half cycle.
The transformer supplies the two diodes (D1 and D2) with sinusoidal input voltages
that are equal in magnitude but opposite in phase. During input positive half cycle,
diode D1 is ON and diode D2 is OFF. During negative half cycle D1 is OFF and
diode D2 is ON. Generally, ripple is undesirable, thus the smaller the ripple, the
better the filtering action.
Ripple factor is an indication of the effectiveness of the filter and is defined as

R=Vr(pp)/Vdc
Where Vr(pp) = Ripple voltage
Vdc= Peak rectified voltage.
The ripple factor can be lowered by increasing the value of the filter capacitor or
increasing the load capacitance.

MATHEMATICAL ANALYSIS (Neglecting Rf and Rs)

The current through the load during both half cycles is in the same direction
and hence it is the sum of the individual currents and is unidirectional Therefore, I =
Id1 + Id2. The individual currents and voltages are combined in the load and
therefore their average values are double that obtained in a half – wave rectifier
circuit.

AVERAGE OR DC VALUE OF CURRENT (Idc)

The RMS VALUE OF CURRENT

TABULATION
Full Wave Rectifier

Parameter Amplitude (volts) Time Period (ms) Frequency (Hz)

Input

Output without
filter (VPP)

Output with RC
filter (VPP)

MODEL GRAPH

RECTIFICATION FACTOR
The ratio of output DC power to the input AC power is defined as efficiency
η = 81% (if R >> Rf . then Rf can be neglected)

PERCENTAGE OF REGULATION
It is a measure of the variation of AC output voltage as a function of DC output
voltage.

For an ideal Full-wave rectifier. The percentage regulation is 0 percent.

Peak – Inverse – Voltage (PIV)

It is the maximum voltage that has to be with stood by a diode when it is
reverse biased
PIV = 2Vm

Advantages of Full wave Rectifier

1. γ is reduced
2. η is improved

Disadvantages of Full wave Rectifier

1. Output voltage is half the secondary voltage

2. Diodes with high PIV rating are used

Formulae:
Ripple Voltage, Vrms=2.4Vdc/RLC
Ripple Factor = Vrms/Vdc=2.4/RLC

PROCEDURE (Full wave Rectifier)

WITHOUT FILTER
1. Rig up the circuit as per the circuit diagram.
2. Give 230v, 50HZ as input to the step down transformer (TFR) whose
secondary is the input to the rectifier circuit.
3. Obtain the rectified output across the Load.
4. P lot t he graph: Vol tage (V) agai nst Time (ms)
CIRCUIT DIAGRAM
WITH FILTER

1. Rig up the circuit as per the circuit diagram.

 2. Give 230v, 50HZ as input to the step down transformer (TFR) whose
secondary is the input to the rectifier circuit.
3. For capacitive filter, connect the Capacitor across the Load. For
inductive filter, connect the inductor (DIB) in series with the load.
4. Obtain the rectified output across the Load.
5. P lot t he graph: Vol tage (V) agai nst Time (ms)

PROCEDURE FOR CLIPPER AND CLAMPER

1. Rig up the circuit shown in the circuit diagram.

2. Generate an input signal at appropriate voltage and frequency using Function
generator (AFO).
3. Observe the output waveform using CRO
4. Sketch the observed waveform on the graph sheet.

CIRCUIT DIAGRAM
Calculation
TABULATION

CLIPPER & CLAMPER

 Input: Amplitude (V) = Time Period (ms) =

S.No Circuit Amplitude (volts) Time Period (ms)

1. Positive clipper
2. Negative clipper
3. Positive clamper
4. Negative clamper

Conclusion/Inference
RESULT

Observations

Parameter Input Waveform Output Waveform Ripple Voltage

Amplitude
Time Period
Frequency

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE:
VERIFICATION OF KVL and KCL

AIM

To verify Kirchhoff’s Current Law (KCL) and Kirchhoff’s Voltage Law (KVL)
for the given circuit by determining current flowing through each component and
voltage across each component.

APPARATUS REQUIRED
 S. No Equipment Range Quantity

1.
Voltmeter

2. Ammeter

3. Power Supply

R1 =
4. Resistor R2 = Each 1

R3 =

5.
Connecting wires As required

6.
Bread board 1

THEORY

KIRCHHOFF’S CURRENT LAW

The algebraic sum of the currents entering a point in an electric circuit

must equal the algebraic sum of the currents leaving that point.

KIRCHHOFF’S VOLTAGE LAW

In any electric circuit, the algebraic sum of the voltage drops must equal
the algebraic sum of the applied EMFs.

CIRCUIT DIAGRAM

1. Circuit diagram for verification of Kirchhoff’s Current Law

 Figure 1

2. Circuit diagram for verification of Kirchhoff’s Voltage Law

Figure 2

Theoretical Calculation

1. KCL
 It is to be proven that the algebraic sum of currents entering the node A (in figure
1) is equal to the algebraic sum of the currents leaving the same node. Let the
currents through R1, R2, & R3 are IR1,IR2 &IR3.
To prove this
 Step1- Calculate the total resistance (equivalent resistance) by reducing the
circuit towards the source.

(Refer figure 1)
 Step 2- Calculate the total current I
V
I 
Req
 Step 3 – Calculate IR1, IR2 &IR3.
I R1  I
I R3
I R2 
R2  R3
I R2
I R3 
R2  R3

 Check whether .

Calculation

1284.84Ω
R2 R3
Req  R1  
R2  R3

V 10
I  
Req 1284 =7.7mA

I R1  I
I R3
I R2 
R2  R3 =6.6mA
I R2
I R3 
R2  R3

=1.1mA
TABULATION

For KCL

Resistances (Ω) Value of currents as per manual Value of currents measured

calculation (mA) experimentally (mA)
 R1= IR1= IR1=
R2= IR2= IR2=
R3= IR3= IR3=

For KVL

Resistances (Ω) Value of voltages as per manual Value of voltages measured

calculation (Volts) experimentally (Volts)
R1= VR1= VR1=
R2= VR2= VR2=
R3= VR3= VR3=

EXPERIMENTAL PROCEDURE

KIRCHHOFF’S CURRENT LAW

1) Connect the circuit shown in figure 1.

2) Measure the currents IR1, IR2 &IR3.
3) Check whether IR1=IR2 +IR3.

KIRCHHOFF’S VOLTAGE LAW

1) Connect the circuit of figure 2.

2) Measure the currents VR1, VR2 &VR3.
3) Check whether VR1+VR2 +VR3+V=0.
.

Calculation

Req  R1  R2  R3  1860
V 10
I  
Req 1860 =
 VR1  I R1  6.36V
VR 2  I R2  0.53V
VR 3  I R3  2.96V
Now,

2. KVL

It is to be proven that the algebraic sum of voltage around a closed path in a

circuit (figure 2) is zero. Let the voltages across R1, R2, & R3 are VR1,VR2 &VR3.
To prove this
 Step1- Calculate the total resistance (equivalent resistance) by reducing the
circuit towards the source.

(Refer figure 2)
 Step 2- Calculate the total current I
V
I 
Req

 Step 3 – Calculate VR1,VR2 &VR3

VR1  I R1
V R 2  I R2
VR 3  I R3

 Check whether

Calculation
Conclusion/Inference
RESULT

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE:
VERIFICATION OF THEVENIN’S AND NORTON’S THEOREMS

AIM

To verify the Thevenin’s and Norton’s theorem by determining Thevenin’s

voltage and resistance, Norton’s current and resistance using given circuit.
APPARATUS REQUIRED

S. No Equipment Range Quantity

1.
Voltmeter

2. Ammeter

3. Power Supply

R1 =
4. Resistor R2 = Each 1

R3 =

5.
Connecting wires As required

6.
Bread board 1

7.
Multimeter 1

THEORY

THEVENIN’S THEOREM

Any linear bilateral network containing one or more voltage sources can be
replaced by a single voltage source whose value is equal to the open circuit voltage at
output terminal with a series resistance. The series resistance is equal to the effective
resistance looking back from the output terminal by removing the load resistance.

CIRCUIT DIAGRAM

THEVENIN’S THEOREM
TABULATION

Voltage Open Circuit voltage Thevenin’s resistance Load Current (mA)

(Fig.a. (volts) Vth (Ω)
) Theoretica Practical Theoretica Practical Theoretica Practica
Vin l l l l
(volts)

FORMULA USED
 1)

2)

4)

3)

NORTON’S THEOREM

Any linear bilateral network containing one or more generators can be replaced
by an equivalent circuit consisting of current source (IN) in parallel with admittance
(YN). The IN is the short-circuited current flowing through the output terminals and
YN is the admittance measured across the output terminals with all the sources
replaced by its internal impedance.

FORMULA USED

2)

3) IN =

4)
CIRCUIT DIAGRAM

NORTON’S THEOREM

TABULATION

Voltage Short Circuit / Norton’s resistance Load Current

(Fig.1.) Norton’s current (mA) (Ω) IL (mA)
Vin(volts) IN RN
Theoretica Practical Theoretica Practica Theoretica Practica
l l l l l
EXPERIMENTAL PROCEDURE (THEVENIN’S THEOREM)

1. Connect the circuit as shown in step-1 Figure.

2. Measure the current through the load.

To Find Thevenin’s Voltage

1. Connect the circuit as shown in step-2 Figure.
2. Remove the load resistance and measure the open circuited voltage across
the output terminal (Vth).

To Find Thevenin’s Resistance

1. Connect the circuit as shown in step-3 Figure.
2. Replace the supply by a short circuit and open circuit the load.
3. Using multimeter in resistance mode, measure the resistance across the
output terminal (Rth).

Thevenin’s Circuit
1. Connect the circuit of step-4 Figure.
2. Adjust Vin=Vth.
3. Measure the load current.
4. Check whether the Load current measured at step-1 Figure is equal to the
load current measured at step-4 Figure.

NORTON’S THEOREM

1. Connect the circuit as shown in Figure (1).

2. Measure the load current IL.

To Find Norton’s Current

1. Connect the circuit as shown in Figure (2).
2. Short-circuit the load resistance and measure the short-circuited current (IN).

To Find Norton’s Resistance

1. Connect the circuit as shown in Figure (3).
2. Replace the supply by a short circuit and open circuit the load.
3. Using multimeter in resistance mode, measure the resistance across the
output terminal (Rth).

To Find Norton’s Circuit

1. Connect the circuit as shown in Figure (4).
 2. Adjust Iin=In.
3. Measure the load current.
4. Check whether the Load current measured at Figure (1) is equal to the load
current measured at Figure (4).
Calculations (Thevenin’s Theorem)

V 10
I  
R1  R 2 1.2 K  100 =

Vth  IR2  0.76V

Vth
IL   0.77 mA
Rth  R L

Calculations (Norton’s Theorem)

V 10
I   =
Req 1284.84

IR2
In   1.17 mA
R 2  R3

I n Rn
IL   0.7 mA
Rn  R L

Now, check theoretical and practical values of IL.

THEORETICAL CALCULATION (Thevenin’s Theorem)

It is to be proven that any linear bilateral network containing one or more

voltage sources can be replaced by a single voltage source whose value is equal to the
open circuit voltage at output terminal with a series resistance. The series resistance
is equal to the effective resistance looking back from the output terminal by removing
the load resistance. To prove this
 Step1- Calculate the total resistance (equivalent resistance) by reducing the
circuit towards the source.
RTH = (R1||R2) + R3 (refer figure a)
 Step 2- Calculate the total current I
V
I  mA
R1  R2
VTH  I * R2  volts 
 Step 3 – Calculate Thevenin’s voltage
V
Step 4 – Calculate IL and check whether I theoretical = IL practical I L  R  R  mA
th

th L

Norton’s Theorem

It is to be proven that any linear bilateral network containing one or more

generators can be replaced by an equivalent circuit consisting of current source (I nor)
in parallel with admittance (Ynor). The Inor is the short-circuited current flowing
through the output terminals and Ynor is the admittance measured across the output
terminals with all the sources replaced by its internal impedance.
To prove this
 Step1- Calculate the total resistance (equivalent resistance) by reducing the
circuit towards the source.
(Refer figure 1)
 Step 2- Calculate the total current I
V
I   mA
Req

 Step 3 – Calculate In ,R n , IL
IR2
In   mA
R2  R3

I n Rn
IL   mA
Rn  RL
 Check the theoretical and practical values of IL.
Calculation
Conclusion/Inference

RESULT

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE:
VERIFICATION OF SUPERPOSITION THEOREM

AIM

To verify Superposition theorem by measuring the current flowing through the

given circuit.

APPARATUS REQUIRED

S. No Equipment Range Quantity

1. Ammeter

2. Power Supply

R1 =
3. Resistor R2 = Each 1

R3 =

4.
Connecting wires As required

5.
Bread board 1

THEORY

Statement

It states that in any linear network containing two or more sources, the
response in any element is equal to the algebraic sum of the responses caused by
individual sources acting alone, while the other sources are non-operative.
CIRCUIT DIAGRAM

TABULATION

Case Theoretical Value (mA) Practical Value (mA)

I1 = I1 =
Both sources active I2 = I2 =
I3 = I3 =
I1’= I1’=
V1 is active & V2 is Short-
I2’= I2’=
circuited
I3’= I3’=
I1’’= I1’’=
V2 is active & V1 is Short- I2’’= I2’’=
circuited I3’’= I3’’=

FORMULA USED

1) Mesh Loop Analysis

2) V1 is active

I1' R3 I1' R2
I 2'   mA I 3'   mA
R2  R3 R2  R3

3) V2 is active

"
I3 R1
"'
I2   mA 
R1  R2
"
I3 R2
I 1"   mA
R1  R2

EXPERIMENTAL PROCEDURE

1. Connect the circuit as in the Figure (1).

2. Measure I1,I2,and I3 when both V1 and V2 are active
3. Short-circuit the second power supply as in the Figure (2).
4. Switch on the power supply (V1) and measure I1’, I2’ and I3’.
5. Short-circuit the First power supply as in the Figure (3).
6. Switch on the power supply (V2), and measure I1’’,I2’’and I3’’.
7. Verify the following condition:

I1 = I1’- I1’’
I2 = I2’ +
I2’’
I3 = I3’’- I3’
Calculation

By Mesh Loop analysis,

=848000

=5100

=-18500

I1' R3 I1' R2
I 2'  I 3' 
R2  R3 R2  R3

WhenV2 is active,

"
I3 R1
"'
I2  
R1  R 2
"
I3 R2
"
I1 
R1  R 2
Theoretical Calculation

It is to be proven that in any linear network containing two or

more sources, the response in any element is equal to the algebraic sum
of the responses caused by individual sources acting alone, while the
other sources are non-operative.
To prove this

 Step1- Using Mesh Loop analysis, calculate the following

 Step 2-When V1 is active, calculate the following

I1' R3 I1' R2
I 2'   mA I 3'   mA
R2  R3 R2  R3

 Step 3 – When V2 is active, calculate the following

"
I3 R1
I "'
2   mA
R1  R2
"
I3 R2
I 1"   mA
R1  R2
  Step 4 – Check whether

I1 = I1’- I1’’
I2 = I2’ + I2’’
I3 = I3’’- I3’

Calculation
Conclusion/Inference

RESULT

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE:
VERIFICATION OF MAXIMUM POWER TRANSFER
THEOREM & RECIPROCITY THEOREM

AIM

To verify the Maximum power transfer theorem and Reciprocity

theorem for the given circuit.

APPARATUS REQUIRED

S. No Equipment Range Quantity

1.
Voltmeter

2. Ammeter

3. Power Supply

R1 = R1 =

4. R2 = R2 =
Resistor Each 1
R3 = R3 =

RL = RL =
 5.
Connecting wires As required

6.
Bread board 1

THEORY

MAXIMUM POWER TRANSFER THEOREM

Statement

Maximum power transfer theorem states that "the maximum

amount of power will be dissipated in the load resistance if it is equal in
value to the Thevenin’s or Norton source resistance of the network
supplying the power".

CIRCUIT DIAGRAM (Maximum Power Transfer Theorem)

TABULATION

% of RL w.r.t. Rth 50% 100% 150% 200%

RL (Ω)

Theoretical
IL(mA)
Practical

Theoretical
PL(mW)
Practical

In other words, the load resistance resulting in greatest power

dissipation must be equal in value to the equivalent Thevenin’s source
resistance, then RL = RS but if the load resistance is lower or higher in
value than the Thevenin’s source resistance of the network, its
dissipated power will be less than maximum.

FORMULA USED

1)

2)

3)

4)

5)

6)

7)

PROCEDURE

1. Connect the circuit as per the circuit diagram.

2. Find Vth by removing the load resistance and measuring the open
circuit voltage with a voltmeter.
3. Replace the voltage source by its internal resistance and find out
Rth.
4. For maximum power to be transferred, the load resistance must
be equal to source resistance (Rth == RL).
5. Set the resistance in the DRB and measure the load current (IL)
using ammeter.
6. Calculate the maximum power transferred through the load.
 CIRCUIT DIAGRAM (Reciprocity Theorem)

TABULATION

Voltage source in Voltage source in Voltage source in

Source
branch 1 branch 2 branch 3
Current
I1 I2 I3 I1’ I2’ I3’ I1’’ I2’’ I3’’
(mA)
Theoretical
value
Practical
value
RECIPROCITY THEOREM

Statement

It states that in a linear bilateral network, the voltage source

V in a branch gives rise to the current I in another branch, if V is
supplied in the second branch then the current in the first branch will be
I. The ratio V/I are called transfer impedance or resistance.

PROCEDURE

1. Connect the circuit as per the circuit diagram.

2. When the voltage source is in the first branch, measure the
current flowing through each resistor using ammeter. (I1, I2,I3)
3. Replace the voltage source in the second branch, measure the
current flowing through each resistor using ammeter (I1’, I2’ , I3’).
4. Replace the voltage source in the second branch, measure the
current flowing through each resistor using ammeter (I1’’,I2’’, I3’’).
5. Check the condition of reciprocity theorem,

I2 = I1’
I3 = I1’’
I3’ = I2’’
Calculation
Conclusion/Inference

RESULT

DESCRIPTION MARKS MARKS

AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
EXP. NO:
DATE:
TRANSIENT ANALYSIS OF RL AND RC CIRCUITS

AIM
To study the transient responses of series RC AND RL circuits by
applying a step voltage.

APPARATUS REQUIRED

S. No Equipment Range Quantity

1. Power Supply (0-30)V 1

2. CRO (0-30) MHZ 1

3. Function Generator (0-3MHz) 1

4. Resistor 4.7k ohm, 100 ohm Each 1

5. Capacitor 10nF 1

6.
DIB 1

7.
Connecting wires As required

8.
Bread board 1

THEORY

Introduction
 The transient response is the fluctuation in current and voltage in a circuit
(after the application of a step voltage or current) before it settles down to its
steady state. This lab will focus on series RL (resistor-inductor), RC (resistor-
capacitor), and RLC (resistor inductor- capacitor) circuits to demonstrate
transient analysis.

CIRCUIT DIAGRAM (Series RC Circuits)

RC Circuit for Transient Analysis

Tabulation

t(ms)

Vout (volts)
Τ = RC =

Vout = Vp e-t/τ =

Transient Response of Circuit Elements

A. Resistors: As has been studied before, the application of a voltage V

to a resistor (with resistance R ohms), results in a current I, according to the
formula:
I= V/R
The current response to voltage change is instantaneous; a resistor has no
transient response.

B. Inductors: A change in voltage across an inductor (with inductance L

Henrys) does not result in an instantaneous change in the current through it. The
i-v relationship is described with the equation:
v=L di/dt
This relationship implies that the voltage across an inductor approaches zero as
the current in the circuit reaches a steady value. This means that in a DC circuit,
an inductor will eventually act like a short circuit.

C. Capacitors: The transient response of a capacitor is such that it resists

instantaneous change in the voltage across it. Its i-v relationship is described by:
i=C dv/dt
This implies that as the voltage across the capacitor reaches a steady value, the
current through it approaches zero. In other words, a capacitor eventually acts
like an open circuit in a DC circuit.

Series Combinations of Circuit Elements

Solving the circuits shown below involves the solution of first and second
order differential equations. Only the solutions have been included, as that is
all that is needed for the lab.
If the switch in this circuit was initially open, and then closed at time t=0,
the current in this circuit is:
where: I O=VO/R= the initial current in the circuit
τ = RC = the time constant for the circuit

Another definition of τ is obtained by setting t = τ in the above equation i(t).

Doing so gives i(τ) = IO*(1/e). The time constant of an RC circuit is the time
required for the current in the circuit to fall to 1/e of its initial value

CIRCUIT DIAGRAM (Series RL Circuits)

RL Circuit for Transient Analysis

Tabulation

t(ms)

Vout (volts)

Τ=L/R=
Vout = Vp (1 - e-t/τ) =

a) Push in the button to select square wave.

b) Use the DMM to set the frequency to 700Hz.

Experimental Procedure

Part 1: Series RC Circuit

The circuit shown in Figure 7.5 will be constructed to illustrate the
transient current response and the transient voltage response across the
capacitor, to an applied voltage source.

1.1 Set up the Circuit

1.) Connect the circuit as shown in Figure 7.5, with channels 1 and
2 of the oscilloscope set up to measure the input and output voltages,
respectively.
2.) Set the function generator to deliver a square wave

1.2 Transient Reaction Observations

1.) Display the input and output voltages on the oscilloscope. Set the
voltage and time scales for maximum resolution.
2.) Observe and record the input and output waveforms on the grid
provided.
3.) Tabulate the values of VOUT as a function of time for one of the
decaying exponentials displayed on the oscilloscope. Take measurements
about every 10- 20μs.
4.) τ can be measured from the oscilloscope as follows:
a) Line the forward edge of a square pulse with 0s on the display.
b) Since i(τ) = Io/e, v(τ) = Vo/e. Calculate v(τ).
c) Use voltage cursors to find the point on the output that corresponds to
v(τ).
d) Adjust the horizontal position and scale of the output waveform so that
the whole cycle from t=0 to t=τ is displayed, with the point where V=v(τ)
lined up with a vertical graticule.
e) Notice which graticule V=v(τ) is lined up with, then use time cursors to
measure the time distance from zero to that point. This is the time constant
τ.
1.3 Transient Voltage across a Capacitor

1.) Interchange R and C in the circuit of Figure 2.

2.) Repeat part 1.2, measuring the voltage across the capacitor
instead of the resistor.

Model graph

Figure 4: Waveform of the Loaded Function Generator

The time constant is now the time it takes for the voltage to grow to

(1- 1/e)*Vo

.
Where: I O=VO/R= the limiting value of the current in the circuit
τ=L
R = the time constant for the circuit
τ can also be described by noting what happens when t = τ is substituted into
i(t) Doing so gives i(τ) = IO*(1-1/e). In other words, τ is the time required in an
RL circuit for the current to grow to (1-1/e) of its limiting value.
The Time Constant τ = RC for a simple RC-circuit.
The bigger τ is the longer it takes for the circuit to discharge.
The smaller τ is the faster the response.
τ is the time needed for the Transient Response to decay by a factor of 1/e.

2.1 Set up the Circuit

1.) Connect the circuit as shown in Figure 3, with channels 1 and 2 of the
oscilloscope set up to measure the input and output voltages, respectively.
2.) Set the function generator to deliver a square wave, the same way as in
Part 1.
3.) Display the input and output voltages on the oscilloscope.

Due to the load on the function generator, the input voltage will appear
similar to the waveform shown in Figure 4. Remember to include the source
impedance in the R for calculations. Throughout this experiment, results should
be recorded in the report section of this handout.

2.2Transient Reaction Observations

 1.) Display the function generator and output voltage on channels 1 and 2
of the oscilloscope. Set the voltage and time scales for maximum
resolution.
2.) Observe and record the input and output waveforms on the grid
provided.
3.) Tabulate the values of the output voltage as a function of time for one
of the exponential curves on the oscilloscope. Note the similar form to
part 1.3.
4.) τ can be measured from the oscilloscope as follows:
a) Line the forward edge of a square pulse with 0s on the display.
Calculation
 b) Measure the limiting voltage across the resistor, Vo.
c) Since i(τ) = Io*(1-1/e), v(τ) = Vo*(1-1/e). Calculate v(τ).
d) Find the first point past the zero mark where V=v(τ).
e) Use cursors to determine at what time V=v(τ).
This is the time constant of the circuit.

2.3 Transient Voltage across the Inductor

1.) Interchange R and L in the circuit of Figure 3.

2.) Repeat part 2.2, measuring the voltage across the inductor instead of
the resistor.
a) The time constant is now the time it takes for the voltage to
drop to Vo/e.
b) The Time Constant τ = L/R for a simple RL-circuit.
c) The bigger τ is the longer it takes for the circuit energy to
discharge.
d) The smaller τ is the faster the response.
e) τ is the time needed for the Transient Response to decay by a
factor of 1/e

Conclusion/Inference

RESULT
 DESCRIPTION MARKS MARKS
AWARDED OBTAINED
PRE LAB WORK 5
CONDUCTION 5
OBSERVATION 5
VIVA VOCE 5
TOTAL 20
 Viva Questions

Characteristics of PN Junction Diode

1. Comment on diode operation under zero biasing condition.

2. How does PN-junction diode acts as a switch?
3. What is the need for connecting Resistance Rs in series with PN diode.
4. What are the applications of PN junction diode?
5. Define barrier potential.
6. Explain how a barrier potential is developed at the PN junction.
7. Define leakage current. What is the advantage of silicon over germanium?

Zener Diode Characteristics & Regulator using Zener Diode

1. Can we use Zener diode for rectification purpose?

2. What happens when the Zener diodes are connected in series?
3. What type of biasing must be used when a Zener diode is used as a regulator?
4. How will you differentiate the diodes whether it is Zener or avalanche when
you are given two diodes of rating 6.2 v and 24V?
5. When current through a Zener diode increases by a factor of 2, by what factor
the voltage of Zener diode increases.
6. Explain avalanche break down & Zener breakdown.
7. Avalanche breakdown is primarily dependent on the process of
____________.
8. What is mean by line and load regulation?

Common Emitter Input-Output Characteristics

1. NPN transistors are more preferable for amplification purpose than PNP
transistors. Why?
2. Explain the switching action of a transistor?
3. At what region of the output characteristics, a transistor can act as an
amplifier?
4. What happens when we change the biasing condition of the transistors?
5. Why the output is phase shifted by 180 ◦ only in CE configuration.
6. Give the relation between a and ß.
7. Give the h parameters for a transistor circuit.

Common Base Input-Output Characteristics

1. Explain the early effect and its consequences

2. Compare the performance of a transistor in CE and CB Configurations
3. What is the relation between IE, IB and IC in CB configurations
4. Why does the CE configuration provide large current amplification than CB?
5. Describe the two types of breakdown in transistors
6. What is the current amplification factor for CB configuration
7. What are applications of CB configuration

FET Characteristics

1. What is transconductance?
2. Why current gain is important parameter in BJT where as conductance is
important parameter in FET?
3. What is pinch off voltage?
4. How can avalanche breakdown be avoided in FET?
5. Why does FET produce less electrical noise than BJT?

SCR Characteristics

1. What is a thyristor? Mention some of them

2. Describe the working principle of SCR
3. Draw the two transistor model of an SCR
4. Explain the breakdown operation of SCR
5. Define the terms firing angle and conduction angle of SCR
6. How the triggering of SCR is controlled by gate signal applied?
7. Why SCR is operated only in the Forward bias condition?

Clipper and Clamper & FWR

1. A diode should not be employed in the circuits where it is to carry more than
its maximum forward current, why?
2. While selecting a diode, the most important consideration is its PIV, why?
3. The rectifier diodes are never operated in the breakdown region, why?
4. How big should be the value of capacitor to reduce the ripple to 0.1?
5. What happens when we remove capacitor in the rectifier circuit?
6. If a transformer is removed from the rectifier circuit, what happens to the
circuit?

Verification of Thevenin’s and Norton Theorems

1. Draw the general form of Norton equivalent circuit.

2. State Thevenin’s theorem.
3. State Norton theorem.
4. Why do you short circuit the voltage source and open the current source when
you find Thevenin’s voltage of a network?

Verification of KVL and KCL

1. Four series connected resistors have a supply of 12V and resistor values of
R1=7kΩ, R2=5kΩ, R3=8kΩ, and R4=4kΩ. Determine the current through
each resistor.
2. A series connected group of three 3.3kΩ resistors is to have a current level of
2.7mA. Calculate the required supply voltage.
3. Four series connected resistors have a supply of 12V and resistor values of
R1=7kΩ, R2=5kΩ, R3=8kΩ, and R4=4kΩ. Calculate the voltage drops across
each resistor.
4. If a 4.5 V battery is connected in series opposing sequence with the 12V
supply in Question.2, determine the new current level and voltage drop across
each resistor.
5. State the voltage divider theorem.
6. A voltage divider with two resistors connected in series has to be designed to
produce the output 7.5V from a 12V supply. Using 10mA resistor current,
determine suitable resistor values.
7. What is a potentiometer and describe its nature of resistance variation.
8. Write the voltage division rule, for the two different resistors connected in
series to a voltage source
9. State the voltage division principle for two resistors in series and the current
division principle for two resistors in parallel.

Verification of Superposition Theorem

1. State superposition theorem.

Verification of Maximum Power Transfer and Reciprocity

Theorems

1. State maximum power transfer theorem.

2. What is reciprocity theorem?

Determination of Resonance Frequency of Series and Parallel

RLC Circuits

1. Define resonance
2. What is mutual inductance?
3. Define coupling co-efficient.
4. Define quality factor.

Transient Analysis of RL and RC Circuits

1. What is transient period?
2. Define switching transient.
3. What is transient and steady state response?
4. What is called load transient?
5. What do you mean by transient condition?