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NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

Table of Contents
BRIGHTON
Page. 1 COVER
Page. 2 OPERATION BLOCK DIAGRAM
Page. 3 POWER DIAGRAM
CPU : VIA ISAIAH Page. 4 TIMING DIAGRAM (POWER ON)
Page. 5 CLOCK DISTRIBUTION
Chip Set : VIA VX800 Page. 6 BOARD INFORMATION

C Remarks : C

Page. 7 CLOCK GENERATOR


Page. 8 BLOCK1 - MICOM, THERMAL,
Model Name : BRIGHTON MAIN SATA_IF, CRT_IF
Page. 9 BLOCK2 - WLAN, HSDPA, DDR2 SODIMM,
SPI_ROM, LED_SWITCH, USB(1),
DEBUG PORT, KBD,
PCB Part No : BLUETOOTH, CAMERA, TOUCHPAD
Page. 10 BLOCK3 - CHARGER, 3V_5V, DDR POWER
CHIPSET POWER
Page. 11 VIA ISAIAH CPU(1/2)
Dev. Step : PV Page. 12 VIA ISAIAH CPU(2/2)
Page. 13~17 VX800
B
Revision : 1.0 Page. 18 VX800 STRAP B
Page. 19 MULTI CARD IF
T.R. Date : 2008.11.07 Page. 20 LAN(88E8040)
Page. 21~24 AUDIO CODEC(ALC272)
Page. 25 LVDS
Page. 26 CPU VRM POWER
Page. 27 SWITCHED POWER
Page. 28 DISCHARGER
DRAW CHECK APPROVAL Page. 29 MOUNT HOLE
Page. 30 SIM CARD & SUB BD CONNECTOR
Page. 31 SUB BOARD (USB 2PORT)
Page. 32 TEST POINTS

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 MAIN
APPROVAL REV PART NO.

JG.GOO 0.5 COVER BA41-undefi


MODULE CODE LAST EDIT

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4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 1 of 50
8-1
8-2

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
OPERATION BLOCK DIAGRAM
CLOCK
400 uFCBGA Type
THERMAL FAN CPU VRM
D GENERATOR CPU MONITOR Page 8
SC451 D
Page 26
CK-610 EMC2102
ISAIAH Page 8
Page 7
ANT Page 11, 12

BLUE 800MHz FSB


-TOOTH Bluetooth : USB 5
Page 9 SODIMM 667 MHz 1086 uFCBGA Type

g
DDR2 667MHz
MAX 4 GB PCI-Express
LAN
ANT Page 9 Transformer
RJ45 LFE8423 Marvel

n
88E8040

l
WLAN 200P
PCI-Express

u
Page 20
SCH

a
Page 9

s i
C C
VX800

t
SIM Card

m
Page 30

n
USB1, USB2

a e
ANT Sub board
HSDPA HSDPA/WIBRO : USB 4 USB Port 2
Page 13, 14, 15, 16, 17

S fid
WIBRO Page 31

Page 9

VGA
CRT

n
80PORT Con. LPC Page 8
B B
HEADPHONE HD Audio Page 9

o
ALC272-GR
MONO MIC
Page 21 LPC
MICOM LVDS

C
SPKR R 12.1" WXGA LCD
AMP H8S-2110B
TPA6017A
Page 22 Page 25
SPKR L Page 8
SPI SPI ROM SD/MMC
Page 9
Page 19

USB3
SATA
A SATA HDD 1.2M A
USB Port
Page 8 Camera DESIGN DATE TITLE

USB0
Page 9
CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
Page 9 GS.CHO ADV1 MAIN
ELECTRONICS
APPROVAL REV PART NO.

JG.GOO 0.5 BLOCK DIAGRAM BA41-undefi


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D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 2 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

POWER DIAGRAM
D D

ALWAYS POWER SUS POWER SWITCHED POWER

n g l
u
KBC3_SUSPWR KBC3_PWRON

a
ENABLE ENABLE

s i
C C
P5.0V_AUX P5.0V

t
DDR2 Power VRM CRT VRMs P5.0V
USB CONN MICOM Touchpad ENABLE
CAMERA FAN

m
AUDIO HDD

n
P1.5V

KBC3_SUSPWR VX800
P1.5V_AUX

a
HSDPA

e
ENABLE
VX800 P1.5V_AUX_PWRGD P1.5V_PWRGD
ENABLE
ENABLE
RTC Battery AC Adapter

S fid
3V 19V
P3.3V_AUX P3.3V
VX800 VDC P5.0V_ALW
VX800 VX800
P3.3V
Battery DC ENABLE
TPS51120 MultiMedia Card LCD
11.1V Thermal HDD
P3.3V_MICOM LAN CLOCK VCCA(1.5V)
AUDIO
VCCA_PWRGD
MICOM HSDPA CPU
DDR2 ENABLE

n
VCCP(1.05V)
B P1.5V_PWRGD B
CPU

o
KBC3_MEMON
ENABLE P.1.8V_AUX
P1.8V_AUX
ENABLE
DDR2
P0.9V

C
DDR2 VCCP_PWRGD
ENABLE

CPU_CORE
CPU

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 MAIN
APPROVAL REV PART NO.

JG.GOO 0.5 POWER DIAGRAM BA41-undefi


MODULE CODE LAST EDIT

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4 3 2 1

SRP Sheet Number: 3 of 50


8-3
8-4

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D VDC D

P5.0V_ALW

P3.3V_MICOM

KBC3_CHKPWRSW

KBC3_SUSPWR

g
P5.0V_AUX

n
P1.5V_AUX

l
P1.5V_AUX_PWRGD

u
P3.3V_AUX

a
KBC3_RSMRST#

s i
C C

t
KBC3_PWRBTN#

CHP3_SLPS5#
Timing Diagram, Power ON

m
Rev. 0.4 Phil 2008-08-29

n
CHP3_SLPS3#

a e
CHP3_SUSSTAT#

KBC3_PWRON

S fid
P5.0V

P1.5V

P1.5V_PWRGD

n
KBC3_MEMON

B B
P1.8V_AUX

o
P3.3V

VCCA(1.5V)

C
VCCA_PWRGD

VCCP(P1.05V)

VCCP_PWRGD

CPU_CORE

VRM3_CPU_PWRGD

KBC3_VRMCPU_PWRGD

A CHP3_PCIRST#
A
DRAW DATE TITLE

CPU1_CPURST# VX800 YH.KIM 9/4/2008


BRIGHTON(VIA) SAMSUNG
CHECK DEV. STEP
ELECTRONICS
GS.CHO ADV1 MAIN
APPROVAL REV PART NO.

JG.GOO 0.5 TIMING DIAGRAM BA41-undefi


MODULE CODE LAST EDIT

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4 3 2 1

SRP Sheet Number: 4 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CLOCK DISTRIBUTION

D D
CLK0_HOST_CPU
CLK0_HOST_CPU* CPU
200MHz

CLK0_HOST_GMCH
CLK0_HOST_GMCH*
CLK1_MCLK0/0*
200 MHz

g
CLK3_GCLK 66 MHz
CLK3_PCICLK 33 MHz CLK1_MCLK1/1* SODIMM
CLK3_XIN 14.318 MHz

n
400 MHz

l
CLK3_DISPCLKI1

u
CLK3_DISPCLKO1

a
VX800 HDA3_AUD_BCLK
CLOCK GENERATOR

s i
C CLK1_SATA 25 MHz AUDIO CODEC C
24MHz

100 MHz
CLK1_PCIEVX

m
CLK1_PCIEVX*

n t
ICS9UM702

a
CHP3_SDDB_CLK

e
24MHz SD / MMC
CLK3_USB48 48 MHz

S fid
RTC Clock
SMB3_CLK 100 MHz 32.786KHz

n
CLK1_MINIPCIE
B CLK1_MINIPCIE* WirelessLAN B
100 MHz

100 MHz

33 MHz C o
CLK1_PCIELOM
CLK1_PCIELOM*

CLK3_PCLKMICOM
LAN

MICOM
25MHz

10MHz

CLK3_DBGLPC
80PORT
A
33 MHz
A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
14.31818MHz GS.CHO ADV1 MAIN
ELECTRONICS
APPROVAL REV PART NO.

JG.GOO 0.5 CLOCK DISTRIBUTION BA41-undefi


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SRP Sheet Number: 5 of 50
8-5
8-6

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
BOARD INFORMATION

D SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D

Voltage Rails
PCI Devices Power Rail Descriptions
Devices IDSEL# REQ/GNT# Interrupts PRTC_BAT 3.3V (can drop to 2.0V min. in G3 state) supply for the RTC well.
VDC Primary DC system power supply (6 to 19V)
Wired LAN AD21 3 G
P5V_AUX 5.0V power rail (off in S4-S5)
P3.3V_AUX 3.3V power rail (off in S4-S5)

g
USB AD29(internal)
Hub to PCI AD30(internal) Programable P1.8V_AUX GMCH/DDR II Power Source(off in S4-S5)
LPC Bridge/IDE/AC97/SMBUS AD31(internal) P1.5V_AUX GMCH Power Source(off in S4-S5)

P5V 5.0V switched power rail (off in S3-S5)

n
P3.3V 3.3V switched power rail (off in S3-S5)
P1.5V 1.5V switched power rail (off in S3-S5)
2 VCCA(1.5V) 1.5V CPU power rail.(off in S3-S5)
I C / SMB Address

l
VCCP(1.05V) 1.05V CPU power rail.(off in S3-S5)
CPU_CORE Core voltage for VIA NANO CPU.

u
Devices Address Hex Bus P3.3V_MICOM 3.3V always on power rail for MICOM

a
VX800 Master - SMBUS Master

s
LCD_VDD3.3V 3.3V (LCD)

i
C ICS9UM702(Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable C
SODIMM0 1010 000X A0h - VCC_CRT 5V (CRT)

t
2.5V_LAN 2.5V(88E8040)
MICOM Master P4.75_AUD 4.75V (ALC272)
P5.0V_AUD 5V(ALC272)
BATTERY 0001 011h 16h P5.0V_AMP 5V (Audio AMP)

m
THERMAL MORNITOR x111 1010 7Ah

USB PORT Assign


Port0 Main BD USB Port

a e n CPU Core Voltage Table


VID5 VID4 VID3 VID2 VID1 VID0 Voltage VID5 VID4 VID3 VID2 VID1 VID0 Voltage

S fid
Port1 SUB BD USB Port1 0 0 0 0 0 0 1.708 V 1 0 0 0 0 0 1.196 V
Port2 SUB BD USB Port2 0 0 0 0 0 1 1.692 V 1 0 0 0 0 1 1.180 V
Port3 Camera 0 0 0 0 1 0 1.676 V 1 0 0 0 1 0 1.164 V
Port4 HSDPA 0 0 0 0 1 1 1.660 V 1 0 0 0 1 1 1.148 V
0 0 0 1 0 0 1.644 V 1 0 0 1 0 0 1.132 V
Port5 Bluetooth 0 0 0 1 0 1 1.628 V 1 0 0 1 0 1 1.116 V
0 0 0 1 1 0 1.612 V 1 0 0 1 1 0 1.100 V
-0 -0 0 1 1 1 1.596 V 1 -0 0 1 1 1 1.084 V
0 0 1 0 0 0 1.580 V 1 0 1 0 0 0 1.068 V

n
0 0 1 0 0 1 1.564 V 1 0 1 0 0 1 1.052 V
0 0 1 0 1 0 1.548 V 1 0 1 0 1 0 1.036 V
0 0 1 0 1 1 1.532 V 1 0 1 0 1 1 1.020 V
B 0 0 1 1 0 0 1.516 V 1 0 1 1 0 0 1.004 V B
0 0 1 1 0 1 1.500 V 1 0 1 1 0 1 0.988 V

o
0 0 1 1 1 0 1.484 V 1 0 1 1 1 0 0.972 V
System Power States 0 0 1 1 1 1 1.468 V 1 0 1 1 1 1 0.956 V DOTHAN-ULV Base Stealey
0 1 0 0 0 0 1.452 V 1 1 0 0 0 0 0.940 V HIGH FREQUENCY MODE
0 1 0 0 0 1 1.436 V 1 1 0 0 0 1 0.924 V
Power Rail Devices (Page Number) 0 1 0 0 1 0 1.420 V 1 1 0 0 1 0 0.908 V

C
0 1 0 0 1 1 1.404 V 1 1 0 0 1 1 0.892 V
P5V FAN(8) MICOM(8) CRT(8) CAMERA(9) AUDIO(20) 0 1 0 1 0 0 1.388 V 1 1 0 1 0 0 0.876 V
VRMs(25) TOUCHPAD(9) HDD(8) 0 1 0 1 0 1 1.372 V 1 1 0 1 0 1 0.860 V
0 1 0 1 1 0 1.356 V 1 1 0 1 1 0 0.844 V
P3.3V VX800(13) LCD(24) HDD(8) CLOCK(7) AUDIO(20) HSDPA(9) DDR2(9) -0 1 0 1 1 1 1.340 V 1 1 0 1 1 1 0.828 V DOTHAN-ULV Base Stealey
0 1 1 0 0 0 1.324 V 1 1 1 0 0 0 0.812 V LOW FREQUENCY MODE
P1.5V VX800(13) HSDPA(9) 0 1 1 0 0 1 1.308 V 1 1 1 0 0 1 0.796 V
0 1 1 0 1 0 1.292 V 1 1 1 0 1 0 0.780 V
VCCA(P1.5V) CPU(11) 0 1 1 0 1 1 1.276 V 1 1 1 0 1 1 0.764 V
0 1 1 1 0 0 1.260 V 1 1 1 1 0 0 0.748 V
VCCP(1.05V) CPU(11) 0 1 1 1 0 1 1.244 V 1 1 1 1 0 1 0.732 V
0 1 1 1 1 0 1.228 V 1 1 1 1 1 0 0.716 V DOTHAN-ULV Base Stealey
0 1 1 1 1 1 1.212 V 1 1 1 1 1 1 0.700 V DEEPER SLEEP MODE
P5V_AUX DDR2 PWR VRM(10) USB(9,30) Refer to page??
P3.3V_AUX VX800(13) MULTIMEDIA CARD(18) THERMAL(8) LAN(19)
P1.8V_AUX DDR2(9)
P1.5V_AUX VX800(13)

A A
CPU_CORE CPU(11)
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 MAIN
APPROVAL REV PART NO.

JG.GOO 0.5 BOARD INFORMATION BA41-undefi


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SRP Sheet Number: 6 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V

B28
BLM18PG181SN1
D D
P1.5V C181 C182 C184 C570 C560 C561
For ICS9UM703 10000nF-X5R
1000nF 1000nF 1000nF 100nF 100nF P3.3V
10V 6.3V 6.3V 6.3V 10V 10V

B505
BLM18PG181SN1

nostuff R550
10K
1/16W
U507
C571 C573 ICS9UM702AKLT-T

g
100nF 100nF 3
X1 CPUT_L0F
45 R570 33 1% 7-C3
CLK0_HOST_CPU
10V 10V 4 44 R571 33 1% 7-C3
P3.3V P3.3V X2 CPUC_L0F CLK0_HOST_CPU#
Y502 R553
14.31818MHz 2 41 R572 33 1% 10-D4
9
VDDREF CPUT_L1F
40 R573 33 10-D4
CLK0_HOST_GMCH
1%
VDDPCI CPUC_L1F CLK0_HOST_GMCH#

n
10K 0 11

10K

2
1/16W

1/16W
VDD3V66
16 39
VDD3.3 PCIET_L0_CPU_ITPT
C586 C585 21 38

l
VDD PCIEC_L0_CPU_ITPC
0.018nF 0.018nF 23
VDD48
50V 50V 32 36 R575 33 1% 13-C1

u
VDDPCIEX PCIET_L1 CLK1_PCIEVX
R568

R567
42 35 R574 33 1% 13-C1
VDDCPU PCIEC_L1 CLK1_PCIEVX#

a
12-A4 R564 22 1/16W 1 34 R576 33 1% 34-C3
CLK3_XIN FSLA_REF0_2X PCIET_L2
33 R577 33 34-C3
CLK1_PCIELOM
1%
R566 PCIEC_L2 CLK1_PCIELOM#

s
22

i
13-B4 1/16W 6
C CLK3_PCICLK 19-A4 R551 22 1/16W 7
FSLB_PCICLKA_F0_2X
31 R578 33 23-B4
C
1%
CLK3_PCLKMICOM 16-B4 R565 22 1/16W 8
SEL_ITP_PCICLKB_F1_2X PCIET_L3
30 R554 33 23-B4
CLK1_MINIPCIE

t
1%
CLK3_DBGLPC PCICLKB_F2_2X PCIEC_L3 CLK1_MINIPCIE#
13-D2 R166 22 22 29
CLK3_USB48 48MHZ_0_2X PCIET_L4
28
PCIEC_L4
13-C4 48
CHP3_C4PSTOP# HCLK_66_48_33_25MSTOP#

m
12 R552 22 12-A4

n
1/16W
FSLC_3V66_0F_2X CLK3_GCLK
13-D1,15-B4 46 14 13-C4,32-A1
SMB3_CLK_S 13-D1,15-B4 47
SCLK CPU_STOP#
25 13-C4
CHP3_CPUSTP#
SMB3_DATA_S SDATA PCI_STOP# CHP3_PCISTP#

a e
MIN3_CLKREQ#
23-B4 26
PEREQ0# DISPCLKOUT
19 R165 22 1/16W 12-A4
CLK3_DISPCLKI1
27 18 R112 22 1/16W 12-A4
RESET#_PEREQ1# DISPCLKIN CLK3_DISPCLKO1
5 15 R164 22
C183 C202 C203 10
GND_1 25MHZ_SATA_2X
24 CLK1_SATA

S fid
C185 0.33nF 0.33nF 0.33nF 13
GND_2 GND_6
37
0.012nF GND_3 GND_7 R549
for EMI 50V
50V 50V 50V 17 43 10K
GND_4 GND_8
20 49
GND_5 THERM_GND

0178770800

n
B
P3.3V P3.3V
SMBUS Address "D2h" B
P3.3V : ICS9UM702

o
R602
10K
P1.5V : ICS9UM703
R603 R601
4.7K 4.7K ON : 0 / OFF :1

C
G
1

3 2 1
S

SMB3_CLK_S SMB3_CLK FSLA FSLC FSLB CPU PCI


2

3
RHU002N06
Q514

0 0 0 266.66 33
G
1

1 0 0 133.33 33
S

SMB3_DATA_S SMB3_DATA
2

0 0 1 200 33
RHU002N06
Q513

1 0 1 166.66 33

0 1 0 333.33 33

1 1 0 100 33
R604 0
0 1 1 400 33
R600 0
1 1 1 200 33
A nostuff A
nostuff
DRAW DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 MAIN
APPROVAL REV PART NO.

JG.GOO 0.5 CLOCK GENERATOR BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 7 OF 31


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SRP Sheet Number: 7 of 50
8-7
8-8

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS 7-C1,10-B4
EXCEPT AS AUTHORIZED BY SAMSUNG. 7-C1,10-B4
CPU1_A20M#
CPU1_FERR# P1.05V
7-C1,10-B4
7-C1,10-B4
7-C1,10-B4
CPU1_INIT#
CPU1_INTR
CPU1_NMI
VIA Isaiah CPU
7-C1,10-B4
7-C1,10-B4
CPU1_IGNNE# P1.05V
CPU1_SMI#
D 7-C3,10-B4 R191 220
D
CPU1_BREQ0# 7-C3 R190 220

C10
A10
CPU1_BREQ1#

C9
D9
B9
A8

B8
10-C4 7-D3,10-B4 R183 56.2 1% 7-C3 R182 220
CPU1_A#(16:3) CPU1_FERR# CPU1_BREQ2# 7-C3 R175 220
CPU1_BREQ3#

A20M#
FERR#
INIT#
INTR
NMI
IGNNE#
SMI#
F3 A11 7-C1,10-B4
H3
A3# SLP#
B10 7-D1,10-B4
CPU1_SLP#
J1
A4# STPCLK#
A18 10-B4
CPU1_STPCLK#
A5# DPWR#
B1
CPU1_DPWR# P1.05V
F2 10-C4
J2
A6# ADS#
D3 10-C4
CPU1_ADS#
K1
A7# BNR#
A1 10-C4
CPU1_BNR#
G3 A8# DBSY#
A2 10-C4
CPU1_DBSY#
K3
A9# DEFER#
A4 10-C4
CPU1_DEFER# P1.05V
L2
A10# DRDY#
B3 10-C4
CPU1_DRDY#
A11# HIT# CPU1_HIT#

g
L3
A12# HITM
C3 10-C4
CPU1_HITM# CPU1_CPURST#
7-B3,10-C4 R185 56.2 1%

J3 B2 10-C4
A13# TRDY# CPU1_TRDY#
M3
A14# BPRI#
C4 10-C4
CPU1_BPRI# nostuff CPU1_STPCLK#
7-D3,10-B4 R188 150 1%

L1 C1 7-D1,10-B4 7-D3,10-B4 R178 150 1%

M1
A15# BREQ0#
U1 7-D1
CPU1_BREQ0# CPU1_INTR 7-D3,10-B4 R176 150 1%
A16# BREQ1# CPU1_BREQ1# CPU1_IGNNE#

n
C5 7-D1 7-D3,10-B4 R179 150 1%
BREQ2#
D5 7-D1
CPU1_BREQ2# CPU1_A20M#
BREQ3# CPU1_BREQ3# P1.05V
10-D2 D4 10-C4 7-D3,10-B4 R177 150 1%

l
CPU1_D#(63:0) LOCK# CPU1_LOCK# CPU1_SMI#
10-C4 7-D3,10-B4 R181 150 1%
CPU1_REQ#(2:0) CPU1_SLP#
A20 D1 7-D3,10-B4 R187 150 1%

u
D0# REQ0# CPU1_INIT#
F18 D2 7-D3,10-B4 R184 150 1%
D18
D1# REQ1#
F1 7-A3 R172 150 1%
CPU1_NMI 7-B3 R169 150 1%
D2# REQ2# CPU1_TDI CPU1_PROCHOT#

a
C19 7-A3 R174 150 1% 7-B3,9-B4,10-B4 R173 56.2 1%
E18
D3#
B4 10-C4
CPU1_TDO 7-A3 R170 56.2 1%
CPU1_THRMTRIP# 7-B3,10-B4 R186 150 1%
D4#
U508-1 RS0# CPU1_RS0# CPU1_TMS CPU1_DPSLP#

s i
H20 A3 10-C4
C C20
D5# RS1# CPU1_RS1# C
D6#
C18 ISAIAH

t
D7#
B19 G1 10-B4
D8# ASTBN0# CPU1_ADSTBN0#
E20
D9# 1/3 ASTBP0#
G2 10-B4
CPU1_ADSTBP0#
G20
D10#
G18 E19 10-B2
D11# DSTBP0# CPU1_DSTBP0#

m
J18 F19 10-B2

n
D20
D12#
0902-002393
DSTBN0#
U20 10-B2
CPU1_DSTBN0#
F20
D13# DSTBP1#
T20 10-B2
CPU1_DSTBP1#
H18
D14# DSTBN1#
W15 10-A2
CPU1_DSTBN1#
D15# DSTBP2# CPU1_DSTBP2#

a
L19 V15 10-A2

e
L18
D16# DSTBN2#
Y6 10-A2
CPU1_DSTBN2#
U19
D17# DSTBP3#
Y5 10-A2
CPU1_DSTBP3#
V19
D18# DSTBN3# CPU1_DSTBN3#
D19#
M20 A14 6-C1
D20# BCLK CLK0_HOST_CPU
K19 A13 6-C1

S fid
D21# BCLK# CLK0_HOST_CPU#
K20
D22#
N20
R19
D23#
D24#
BSEL0
BSEL1
C14
D14 CPU Power Good Logic
P19
D25#
P18 C13 7-B1,10-C4
U18
D26# RESETB#
C8
CPU1_CPURST#
9-A2
W20
D27# PWRGOOD CPU1_PWRGD P1.05V
D28#
M19
D29# GGH_RSVD
B5 B5 : NC , T4 : GND in VT6485B_0303
T18 T4
D30# FSOURCE_GND

n
R20
D31# P3.3V
Y12 C7 R180
D32# PSI#
V13
D33# 56.2 Must be closed to CPU
B Y17
D34# COMP0
H17 7-B2
CPU1_COMP0
1% B
W17 7-B3

o
V16
D35#
T3 7-B2
CPU1_PWRGD
D36# COMP2 CPU1_COMP2 R645
Y19 10K
D37# D 3
W18
D38# THERMDA
C17 9-C1
CPU2_THERMDA
1/16W C218
V18 A17 9-D1 Q523 0.1nF
W12
D39# THERMDC
A16 7-C1,9-B4,10-B4
CPU2_THERMDC G RHU002N06 50V
D40# THERMTRIP# CPU1_THRMTRIP#

C
Y14 B18 7-C1 1
Y13
D41# PROCHOT# CPU1_PROCHOT# D 3
D42#
S 2 Must be closed to CPU
Y16 J20 Q524 C642
D43# DP0 RHU002N06
W14 R18 13-D4,19-B3 R646 1K 1/16W G 100nF
Y11
D44# DP1
V11
KBC3_PWRGD 10V
D45# DP2 1
V12 Y10 S 2
V14
D46# DP3 C643
D47# 10nF
W10 B11 7-C1,10-B4
Y8
D48# DPSLP# CPU1_DPSLP# 16V

D49#
V10 C15 7-B1
D50# TDI CPU1_TDI
W4 A15 7-B1
W7
D51# TDO
B15 7-B1
CPU1_TDO
D52# TMS CPU1_TMS
Y9 B16 7-A2
W8
D53# TRST#
C16 7-B2
CPU1_TRST#
D54# TCK CPU1_TCK
W5 32-B4
V6
D55#
B7 CPU1_VID(5:0)
D56# VID0 Resistor must be close to the CPU
V9 C6
D57# VID1
V3 A7 7-B3 R167 27.4 1%
D58# VID2 CPU1_COMP0
Y3
D59# VID3
B6
CPU1_COMP2
7-B3 R189 27.4 1%
Y4 A6
D60# VID4
A V7 A5 COMP0 & COMP2 should be route with
D61# VID5 A
DINV3#
DINV2#
DINV1#
DINV0#

V4
D62#
15mil width (Zo=27.5ohm, L<0.5")
V8
D63# DRAW DATE TITLE

CPU1_TCK
7-A3 R168 56.2 1% YH.KIM 9/4/2008
BRIGHTON(VIA) SAMSUNG
V5
V17
N18
H19

CPU1_TRST#
7-A3 R171 680 CHECK DEV. STEP
10-B4 ELECTRONICS
10-B4
CPU1_DBI0# GS.CHO ADV1 CPU
10-B4
CPU1_DBI1# APPROVAL REV PART NO.

10-B4
CPU1_DBI2# JG.GOO 0.5 VIA ISAIAH CPU(1/2) BA41-undefi
CPU1_DBI3#
MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 11 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 11 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS CPU_CORE P1.05V
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS U508-3
EXCEPT AS AUTHORIZED BY SAMSUNG.
U508-2 ISAIAH 3/3

G16
ISAIAH 2/3
M5
VIA Isaiah CPU F16
H16
K16
GND1
GND2
GND64
GND65
F8
H8
K8
VCC_CORE2 VCCP1 GND3 GND66
J16 F5 M16 M8
VCC_CORE3 VCCP2 GND4 GND67
L16 E16 P16 P8
D N16
VCC_CORE4 VCCP3
V2 T16
GND5 GND68
T8
D
VCC_CORE5 VCCP4 GND6 GND69
R16 E8 U16 E7
VCC_CORE6 VCCP5 GND7 GND70
F15 W2 W16 G7
VCC_CORE7 VCCP6 GND8 GND71
H15 G17 E15 J7
VCC_CORE8 VCCP7 GND9 GND72
K15 L17 G15 L7
VCC_CORE9 VCCP8 GND10 GND73
M15 R17 J15 N7
VCC_CORE10 VCCP9 GND11 GND74
P15 U17 L15 R7
VCC_CORE11 VCCP10 GND12 GND75
T15 V1 N15 U7
VCC_CORE12 VCCP11 GND13 GND76
E14 E12 R15 Y7
VCC_CORE13 VCCP12 GND14 GND77
G14 U14 U15
VCC_CORE14 VCCP13 GND15
J14 U11 Y15 F6
VCC_CORE15 VCCP14 GND16 GND78
L14 U8 F14 H6
VCC_CORE16 VCCP15 GND17 GND79
N14 G4 H14 K6
VCC_CORE17 VCCP16 GND18 GND80

g
R14 L4 K14 M6
VCC_CORE18 VCCP17 GND19 GND81
F13 R4 M14 P6
VCC_CORE19 VCCP18 GND20 GND82
H13 P5 P14 T6
VCC_CORE20 VCCP19 GND21 GND83
K13 K17 T14 U6
VCC_CORE21 VCCP20 GND22 GND84
M13 D8 D15 W6
VCC_CORE22 VCCP21 GND23 GND85

n
P13 D12 E13 E5
VCC_CORE23 VCCP22 GND24 GND86
T13 D16 G13 G5
VCC_CORE24 VCCP23 GND25 GND87
G12 U13 J13 J5

l
VCC_CORE26 VCCP24 GND26 GND88
J12 U9 L13 L5
VCC_CORE27 VCCP25 GND27 GND89
L12 N13 N5

u
VCC_CORE28 GND28 GND90
N12 U3 R13 R5
VCC_CORE29 VCC_SENSE GND29 GND91
R12 D7
VCC_CORE30 GND92

a
F11 W13 E4
VCC_CORE31 GND30 GND93
H11 F4
VCC_CORE32 GND94

s i
K11 U5 B14 H4
C M11
VCC_CORE33 VSS_1
D11 F12
GND31 GND95
J4
C
VCC_CORE34 VSS_2 VCCA GND32 GND96
P11 H12 K4

t
VCC_CORE35 GND33 GND97
T11 U4 K12 M4
VCC_CORE36 VSS_SENSE GND34 GND98
E10 M12
VCC_CORE37 GND35
G10 B29 P12 M2
VCC_CORE38 GND36 GND99
J10 R1 T12 D6
VCC_CORE39 HALF# BLM18PG181SN1 GND37 GND100

m
L10 U12 W3

n
VCC_CORE40 GND38 GND101
N10 F17 B13 K2
VCC_CORE41 VCCA0 GND39 GND102
R10 A9 D13 H2
F9
VCC_CORE42 VCCA1 C195 C219 C194 E11
GND40 GND103
E2
VCC_CORE43 100nF 100nF 10000NF GND41 GND104

a
H9 R2 G11 C2

e
VCC_CORE44 RSVD_1 10V 10V 6.3V GND42 GND105
K9 T1 J11 H1
VCC_CORE45 RSVD_2 GND43 GND106
M9 T2 L11 Y2
VCC_CORE46 RSVD_3 GND44 GND107
P9 R3 N11
VCC_CORE47 RSVD_4 GND45
T9 B17 R11 B20
VCC_CORE48 RSVD_5 GND46 GND108
G8 P2 W11 L20

S fid
VCC_CORE50 RSVD_6 GND47 GND109
J8 P4 A12 P20
VCC_CORE51 RSVD_7 GND48 GND110
L8 Y20 V20
VCC_CORE52 RSVD_8 GND111
N8 P3 F10 D19
VCC_CORE53 RSVD_9 GND49 GND112
R8 N4 H10 G19
VCC_CORE54 RSVD_10 GND50 GND113
F7 P1 K10 J19
VCC_CORE55 RSVD_11 GND51 GND114
H7 Y1 M10 N19
VCC_CORE56 RSVD_12 GND52 GND115
K7 W1 P10 T19
VCC_CORE57 RSVD_13 GND53 GND116
M7 U2 T10 W19
VCC_CORE58 RSVD_14 GND54 GND117
P7 B12 U10 K18
VCC_CORE59 RSVD_15 GND55 GND118

n
T7 C12 E9 M18
VCC_CORE60 RSVD_16 GND56 GND119
E6 C11 G9 Y18
VCC_CORE61 RSVD_17 GND57 GND120
G6 J9 A19
VCC_CORE62 GND58 GND121
B J6
VCC_CORE63
L9
GND59 GND122
D17 B
L6 E1 N9 E17

o
VCC_CORE64 AINV# GND60 GND123
N6 R9 J17
VCC_CORE65 GND61 GND124
R6 N1 10-C4 M17
VCC_CORE66 AHI0# CPU1_A30# GND125
H5 N2 W9 N17
VCC_CORE68 AHI1# GND62 GND126
K5 N3 D10 P17
VCC_CORE69 AHI2# GND63 GND127
T5 E3 T17
VCC_CORE72 AHI3# GND128

C
0902-002393 0902-002393

Put the caps. on the bottom of CPU

CPU_CORE CPU_CORE

C208 C187
P1.05V C214 C189 C193 C211 C213 C210 C190 C192 C212 22000nF-X5R 22000nF-X5R C209
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 6.3V 6.3V 22000nF-X5R
20%
10V 10V 10V 10V 10V 10V 10V 10V 10V 20% 20% 6.3V

C226 C227 C206 C191 C205 C188 C217 C216


22000nF-X5R 22000nF-X5R 22000nF-X5R 100nF 100nF 100nF 100nF 100nF
6.3V 6.3V 6.3V
20% 20% 20%
10V 10V 10V 10V 10V
CPU_CORE
A A
DRAW DATE TITLE
C215
22000nF-X5R
6.3V
C207
22000nF-X5R
20% CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
20%
6.3V ELECTRONICS
GS.CHO ADV1 CPU
APPROVAL REV PART NO.

JG.GOO 0.5 VIA ISAIAH CPU(2/2) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 12 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 12 of 50
8-9
8-10

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS P1.05V
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P3.3V_AUX
EXCEPT AS AUTHORIZED BY SAMSUNG. P1.05V
C148 C147 C149
P3.3V 10000nF-X5R 10000nF-X5R 10000nF-X5R B24
6.3V 6.3V 6.3V BLM18PG181SN1

D B27 R149 D
BLM18PG181SN1 2K
1% C122
100nF
10V
C172 C171 C170

AE26

AE27

AF27
D29
C29

H28
H29

R16
R18
R20
R22
K20
K21
K22
P17
P19
P21
P23
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19
J23
J24
10000nF-X5R 10000nF-X5R 100nF
10V 10V 10V CPU1_D#(63:0)

GNDAHCK
VCCA33HCK

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCCSD0

VCCSD1

VCCCR
M34 E17
NC_1 HD00# R545 0
D15 G17 AN14
HD01# CPU1_THRMTRIP# THRMTRIP# SPIDI SPI3_DI
6-C1 E29 A17
CLK0_HOST_GMCH 6-C1 F29
HCLK+ HD02#
C15 H17 AM14
CLK0_HOST_GMCH# HCLK- HD03# CPU1_DPSLP# DPSLP# SPIDO SPI3_DO
C14

SPI
HD04# D19 AT14
7-D4 F15
CPU1_A#(16:3) HD05# CPU1_A20M# A20M# SPICLK SPI3_CLK

g
D23 E16
HA03# HD06#
D24 D17 B18 AN13
A24
HA04# HD07# CPU1_FERR# FERR# SPISS0#
AP13
SPI3_CS#
C17
HA05# HD08# SPISS1# SPI3_SS1#

CPU CONTROL
B23 B15 A18
B24
HA06# HD09#
A14
CPU1_IGNNE# IGNNE#
HA07# HD10#

n
E24 F16 F18
C22
HA08# HD11#
E14
CPU1_INIT# INIT#
AT39
HA09# HD12# SDIO0D0
A25 D16 B19 AT40

l
HA10# HD13# CPU1_INTR INTR SDIO0D1
F24 B14 AR38
HA11# HD14# SDIO0D2
E25 H15 C19 AR39

u
HA12# HD15# CPU1_NMI NMI SDIO0D3
F23 F12
HA13# HD16# C18 AV39
D25 H13
HA14# HD17# CPU1_SLP# SLP# SDIO1D0

a
C25
HA15# HD18#
D11 VX800 SDIO1D1
AU37
G25 H12 E18 AU40
HA16# HD19# CPU1_SMI# SMI# SDIO1D2
1/5

s i
8-B3 G26 E13 AU39
C CPU1_A30# HA30# HD20#
G14 F19
SDIO1D3 C
F28 U503-1 HD21#
F14
NAP#
AT38

SDIO
NC_2 HD22# SDIO0CLK
G27 E12 7-D1 G18 AR40
NC_3 HD23# CPU1_STPCLK# STPCLK# SDIO0CMD#
B26
NC_4 VX800 HD24#
A13
SDIO0CD#
AT36
C26 C13 AT37
NC_5 HD25# SDIO0WPD#
A28
NC_6 1/5 HD26#
A12

m
D27 F11 AT13 AV40

n
B28
NC_7 HD27# CHP3_PCIERST0# AU13
GPIO10 SDIO1CLK
AU38
G11

GPIO
F26
NC_8 0179197500 HD28#
G13
CHP3_PCIERST1# AV13
GPIO11 SDIO1CMD#
AV38
A26
NC_9 HD29# CHP3_GPIO12 AP14
GPIO12 SDIO1CD#
AW40
D12
NC_10 HD30# CHP3_BIOSWP# GPIO13 SDIO1WPD#

a
B27 B12

e
NC_11 HD31#
F27 G9
NC_12 HD32#
E26 B7 AW35
NC_13 HD33# R127 SDIO0POFF
E28 E10 4.7K J27 AV35
NC_14 HD34# TESTIN SDIO1POFF
D28 C9 1/16W J26 AY35
NC_15 HD35# DFTIN SDIO1PSEL
H27 D9 J25

S fid
NC_16 HD36#
A9 TP8 : VX800 STRAP BISTIN
HD37#
CPU1_CPURST#
H19
CPURST# HOST HD38#
A10 Always strapped LOW CR_D4
AW36
C10 AY36
HD39# CR_D5
F20 G10 J20 AW39

TEST
CPU1_ADS# HADS# HD40#
J21
TP1 CR_D6
AY40
C7 TP2 CR_D7
HD41#
E20 D8 J22 AW37
CPU1_BNR# HBNR# HD42#
F10 AL15
TP3 CR_D0
AU36 CHP3_SDDB_D0

MEMORY CARD
HD43#
AL12
TP4 CR_D1
AY38
CHP3_SDDB_D1
B20 D7
CPU1_BPRI# HBPRI# HD44#
E8 AK9
TP5 CR_D2
AY39 CHP3_SDDB_D2
HD45# TP6 CR_D3 CHP3_SDDB_D3

n
E21 H9 AN31
CPU1_DBSY# HDBSY# HD46#
E9 AN30
TP7
AY37 75
HD47# TP8 CR_CLK CHP3_SDDB_CLK
CPU1_DEFER# C21
HDEFER# HD48#
C5 R535 1%
B HD49#
A4
CRSD_CMD#
AV37
CHP3_SDDB_CMD#
B
A20 C6 R125 R126 R50 R543 R93 AU35

o
CPU1_DRDY# HDRDY# HD50#
C2
CRSD_CD#
AT35
CHP3_SDDB_CD#
HD51# 4.7K 4.7K 4.7K 4.7K 4.7K CRSD_WPD# CHP3_SDDB_WP#
D20 D4
CPU1_HIT# HHIT# HD52#
HD53#
A6 RSVD1
AV36 C539
B22 D5 nostuff nostuff AW38 33pF
CPU1_HITM# HHITM# HD54#
A2
RSVD2 50V
HD55#

C
H20 A5
CPU1_LOCK# HLOCK# HD56#
E6
CPU1_REQ#(2:0) G23
HD57#
D3
HREQ0# HD58# P1.05V NB Strapping
E22 D1
HREQ1# HD59#
C23 C1
HREQ2# HD60#
F22 B4 Pin 0:on 1:off FSB Freq.
NC_17 HD61#
G22 A1
NC_18 HD62#
HD63#
B6 R129 00 100Mhz
D21 49.9 GPIO12/
CPU1_TRDY# HTRDY#
A16 1%
01 133Mhz
HDSTB0P# CPU1_DSTBP0# CSTATE1
A21 B16 10 200Mhz
CPU1_RS0# HRS0# HDSTB0N# CPU1_DSTBN0#
A22 (2/1)
CPU1_RS1# G21
HRS1#
B11 11 Auto Mode
HRS2# HDSTB1P#
C11 CPU1_DSTBP1# C150 C151
HDSTB1N# CPU1_DSTBN1# 1000nF-X5R R128
H21 100nF 100
CPU1_BREQ0# HBREQ0# A8 10V
6.3V
1%
G15
HDSTB2P#
B8
CPU1_DSTBP2#
CPU1_DBI0# D13
HDBI0# HDSTB2N# CPU1_DSTBN2#
CPU1_DBI1# B10
HDBI1#
C3
CPU1_DBI2# B2
HDBI2# HDSTB3P#
B3
CPU1_DSTBP3#
CPU1_DBI3# HDBI3# HDSTB3N# CPU1_DSTBN3#
A H24 H25 A
CPU1_ADSTBP0# C27 HADSTB0P# HGTLVREF0
H11 P1.05V
NC_19 HGTLVREF1 DRAW DATE TITLE
R546 180 1%
CPU1_ADSTBN0#
H23
HADSTB0N# HGTLCOMPP
B29
A29
YH.KIM 9/4/2008
BRIGHTON(VIA) SAMSUNG
HGTLCOMPN C553 CHECK DEV. STEP
G19 R547 360 1% ELECTRONICS
CPU1_DPWR# HDPWR# 1000nF-X5R GS.CHO ADV1 CHIPSET
6.3V
APPROVAL REV PART NO.

JG.GOO 0.5 VX800(1/5) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 13 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 13 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

P1.8V_AUX P1.5V_AUX

D D
C173
100nF
10V

AM33
AM39
AG32
AC26
AC32
AD27
AD32

AH33

AN36
AN37
AA26
AA32
AB27
AB32

AE32

AK33
AK36
AK40

AP40
AF32

AL33
AL34
AL38
AJ33
W26
W32
M32
M36
M40
G39
H37

N32

R24
R26
R32

U26
U32
E40

K32
K34
K38

P25
P27
P32

V27
V32

Y27
Y32

B30
F38

T27
T32
L32
L34
L38
J30
J31
J32
J36
J40
VCC18MEM_1
VCC18MEM_2
VCC18MEM_3
VCC18MEM_4
VCC18MEM_5
VCC18MEM_6
VCC18MEM_7
VCC18MEM_8
VCC18MEM_9
VCC18MEM_10
VCC18MEM_11
VCC18MEM_12
VCC18MEM_13
VCC18MEM_14
VCC18MEM_15
VCC18MEM_16
VCC18MEM_17
VCC18MEM_18
VCC18MEM_19
VCC18MEM_20
VCC18MEM_21
VCC18MEM_22
VCC18MEM_23
VCC18MEM_24
VCC18MEM_25
VCC18MEM_26
VCC18MEM_27
VCC18MEM_28
VCC18MEM_29
VCC18MEM_30
VCC18MEM_31
VCC18MEM_32
VCC18MEM_33
VCC18MEM_34
VCC18MEM_35
VCC18MEM_36
VCC18MEM_37
VCC18MEM_38
VCC18MEM_39
VCC18MEM_40
VCC18MEM_41
VCC18MEM_42
VCC18MEM_43
VCC18MEM_44
VCC18MEM_45
VCC18MEM_46
VCC18MEM_47
VCC18MEM_48
VCC18MEM_49
VCC18MEM_50
VCC18MEM_51
VCC18MEM_52
VCC18MEM_53
VCC18MEM_54
VCC18MEM_55
VCC18MEM_56
VCC18MEM_57
VCC18MEM_58
VCC18MEM_59

VSUS15MEM
R114
AA37 22
MCLKOA0+ CLK1_MCLK0
N37 1/16W
MCLKOA1+
MEM1_ADQ(63:0) AB34 V40
MDA0 MCLKOA2+
AB35 R130
D39 22 AC34 AB39
MDA1 MCLKOA3+ CLK1_MCLK1 AD40
MDB0 MCLKOB0+
Y34 N40 AB40
MDA2 MCLKOA4+ 1/16W MDB1 MCLKOB0-
AA33 P39 AB36
MDA3 MCLKOA5+ MDB2

g
Y37 AC39 AC38
MDA4 MDB3 MDQMB0
AA36 R115
AA38 22 AC37 AE37
AA34
MDA5 MCLKOA0- CLK1_MCLK0# AC35
MDB4 MDQMB1
AF40
MDA6 N38 1/16W MDB5 MDQMB2
MCLKOA1-
Y36 V39 AD39 AJ39
MDA7 MCLKOA2- MDB6 MDQMB3
W37 R150
D40 22 AC33
MDA8 MCLKOA3- CLK1_MCLK1# MDB7

n
V35 P40 AD33 AB38
MDA9 MCLKOA4- 1/16W MDB8 MDQSB0
V34 P38 AD35 AE40
MDA10 MCLKOA5- MDB9 MDQSB1
W34 AE38 AF39

l
MDA11 MDB10 MDQSB2
W36
MDA12 MEM1_ADM(7:0)
AE33
MDB11 VX800 MDQSB3
AH37
W35 AA40 AE34

u
MDA13 MDQMA0 MDB12
Y33
MDA14 MDQMA1
V38 AD37
MDB13 MEMORY
V33 R39 AE36 AK39
MDA15 MDQMA2 MDB14 MODTB

a
U37
MDA16 MDQMA3
N36 AD36
MDB15 CH-C
U36 B39 AF35 AN40
MDA17 MDQMA4 MDB16 MCKEB

s i
R38 D35 AG35
C T36
MDA18 MDQMA5
D32 AF36
MDB17
AK38
C
MDA19 MDQMA6 MDB18 MCSB#
U40 E31 AF38 2/5

t
MDA20 MDQMA7 MDB19
U38 AG34
MDA21 MDB20
T35 AG33 AK37
MDA22 MDB21 MAB00
T37 Y39 AG37 AP39
MDA23 MDQSA0+
W39
MEM1_ADQS(0) AF34
MDB22 MAB01
R35 AM38
MDA24 MDQSA1+ MEM1_ADQS(1) MDB23 MAB02

m
R34 T39 AH39 AM36

n
MDA25 U503-2 MDQSA2+
P36
MEM1_ADQS(2) AH36
MDB24 MAB03
N34 AM40
P34
MDA26 MDQSA3+
A40 MEM1_ADQS(3) AG38
MDB25 MAB04
AM37
MDA27 MDQSA4+ MEM1_ADQS(4) MDB26 MAB05
T33
MDA28 VX800 MDQSA5+
B35
MEM1_ADQS(5)
AJ36
MDB27 MAB06
AN39

a
R37 D33 AH35 AK35

e
MDA29 MDQSA6+ MEM1_ADQS(6) MDB28 MAB07
N33
MDA30 2/5 MDQSA7+
B31
MEM1_ADQS(7) AH40
MDB29 MAB08
AN38
R33 AJ37 AL35
MDA31 MDB30 MAB09
C38 Y40 AG39 AP36
MDA32 0179197500 MDQSA0-
W38
MEM1_ADQS#(0) MDB31 MAB10
D37 AN35
C37
MDA33 MDQSA1-
T40 MEM1_ADQS#(1) MAB11
AK34

S fid
MDA34 MDQSA2-
P35
MEM1_ADQS#(2) AL39
MAB12
A38
F35
MDA35 MDQSA3-
B40 MEM1_ADQS#(3) AL40
MSRASB#
MDA36 MDQSA4-
C35
MEM1_ADQS#(4) AL36
MSCASB#
C39 AL37
MDA37 MDQSA5-
E33
MEM1_ADQS#(5)MEM1_VREF MSWEB# MBAB0
B38 AP37
MDA38 MDQSA6-
A31
MEM1_ADQS#(6) MBAB1
A37
MDA39 MDQSA7- MEM1_ADQS#(7)
E36 1% 301 R548 A30
MEMCOMP
MDA40
D36
MDA41
B34
MDA42 MEMORY CH-A MODTA0
H39
MEM1_ODT0
E34 E38 U33
MDA43 MODTA1 MEM1_ODT1 MEMVREF

n
B36 G37
MDA44 MODTA2
A36 F37
MDA45 MODTA3 C124
A34
MDA46
C128 1000nF-X5R
B C34
MDA47
100nF
6.3V
B
F34 K33 10V
VX800 MEM Power Cap

o
E32
MDA48 MCKEA0 MEM1_CKE0
M35
C33
MDA49 MCKEA1
L33
MEM1_CKE1
MDA50 MCKEA2
B32 L35
MDA51 MCKEA3 P1.8V_AUX
G33
MDA52
G32
MDA53

C
A33 F39
C32
MDA54 MCSA0#
F40
MEM1_CS0#
MDA55 MCSA1# MEM1_CS1#
F31
MDA56
G38 C86 C155 C154 C153
G30 MCSA2#
E39 100nF 100nF 100nF 100nF
MDA57 MCSA3#
D30 10V 10V 10V 10V
MDA58 15-C1
H30
H32
MDA59
J38
MEM1_AMA(0:13)
MDA60 MAA00
G31 L37
MDA61 MAA01
C30 K36
MDA62 MAA02 P1.8V_AUX P1.8V_AUX
E30 K39
MDA63 MAA03
K37
MAA04
J34 L39
MEM1_ABS0 MBAA0 MAA05
J37 J35
MEM1_ABS1 K35
MBAA1 MAA06
M39
C83 C85 C126 C127 C125 C152
MEM1_ABS2 MBAA2 MAA07 1000nF-X5R 1000nF-X5R 1000nF-X5R
K40 100nF 100nF 100nF
H36 MAA08 6.3V 6.3V 6.3V
L36 10V 10V 10V
MEM1_ARAS# H40
MSRASA# MAA09
MEM1_ACAS# MSCASA# J39
MAA10
G40 L40
MEM1_AWE# MSWEA# MAA11
M38
MAA12
H38
MAA13
A A
DRAW DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 CHIPSET
APPROVAL REV PART NO.

JG.GOO 0.5 VX800(2/5) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 14 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 14 of 50
8-11
8-12

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY P3.3V P3.3V P3.3V
THIS DOCUMENT CONTAINS CONFIDENTIAL B22 B14
PROPRIETARY INFORMATION THAT IS B23
BLM18PG181SN1 BLM18PG181SN1 BLM18PG181SN1
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. C107 C106 C59 P3.3V
C102 10000nF-X5R
C103 10000nF-X5R 10000nF-X5R
C60
B18 P3.3V 100nF 100nF 100nF
6.3V 6.3V 10V B21
BLM18PG181SN1 10V 10V 10V
P3.3V BLM18PG181SN1
B19
C79 BLM18PG181SN1 C105
C78 P3.3V C104
1000nF-X5R G_LVDS G_DAC 10000nF-X5R
D P1.5V B17 100nF
6.3V C81 B20 6.3V
100nF
D
BLM18PG181SN1 10V C80 1000nF-X5R BLM18PG181SN1 10V
100nF
6.3V
10V
C77 C120 C74 C76 C100 C101
10000nF-X5R G_PLL
100nF 100nF 100nF
6.3V
10V 10V 1000nF-X5R10000nF-X5R 10V

AM24
AM25
AG24

AN24
AN25

AR24

AR25
AR26

AR28
AP24
AP25

AP26
AP27
AF25

AT24

AT25

W14

AG1
AG2

AG3
6.3V

AF4
AF5
V15
6.3V

U5

U4

R4
R5
V4

V5

P3
P4
P5
T5

T4
P3.3V
VCCA15SATA_1
VCCA15SATA_2
VCCA15SATA_3
VCCA15SATA_4
VCCA15SATA_5
VCCA15SATA_6
VCCA15SATA_7
VCCA15SATA_8
VCCA15SATA_9
VCCA15SATA_10

VCCA33SATA_1
VCCA33SATA_2
VCCA33SATA_3
VCCA33SATA_4
VCCA33SATA_5

VCCA33PLLSATA

GNDALVDS
VCCA33LVDS

GNDA33PLLLVDS2
GNDA33PLLLVDS1

VCCA33PLLLVDS1
VCCA33PLLLVDS2

VCC33LVDS_1
VCC33LVDS_2
VCC33LVDS_3
VCC33LVDS_4
VCC33LVDS_5
VCC33LVDS_6
VCC33LVDS_7

VCCA33DAC1
VCCA33DAC2

VCCA33PLL1
VCCA33PLL2
GRAPHIC MISC VCCA33PLL3
AR16 AK2 H16
CLK3_PCICLK PCICLK
AL4
VCPD0 CLK GCLK CLK3_GCLK
VCPD1 R77
AP8 AV28 10nF C41 16V AK1 AF8
AD00 STX0+ SAT1_TXP0 VCPD2 XIN CLK3_XIN10K

g
AR7
AD01 STX0-
AU28 10nF C40 16V
SAT1_TXN0 AM4
VCPD3
AN8 AL1 AJ1
AD02 VCPD4 DISPCLKI0
AR6
AD03 SRX0+
AW27 1nF C38 50V
SAT1_RXP0 AM2
VCPD5 DISPCLKO0
AH1
AU6 AY27 1nF C39 50V AM1
AV5
AD04 SRX0- SAT1_RXN0 AN1
VCPD6
AG5
AD05 VCPD7 DISPCLKI1 CLK3_DISPCLKI1

VCP
AT7 AY25 AM5 AG4
AU5
AD06 STX1+
AW25 AL5
VCPD8 DISPCLKO1 CLK3_DISPCLKO1
AD07 STX1- VCPD9
AP7 AL7 AD4

SATA

l
AR5
AD08
AV26 AL6
VCPD10 DVP1SPD
AD3
MCH3_LCD_EDID_D
AN7
AD09 SRX1+
AU26 AM6
VCPD11 DVP1SPCLK MCH3_LCD_EDID_C

u
AD10 SRX1- VCPD12
AP6 AL8
AD11 VCPD13
AR4 AM8 AE6
AD12 VCPD14 CRTSPD CRT3_DDCDATA

a
AP5 AV14 4.7K 4.7K 4.7K 4.7K AM7 AE5
AN6
AD13 SATALED0#_GPO4 CHP3_SATALED#R74 R75 R80 R85 VCPD15 CRTSPCLK CRT3_DDCCLK
AD14
AM28 R91

s i
AV6 10.7K 1% AL3 AD5
C AU4
AD15 SREXT
AL2
VCPHS CRTHSYNC
AD6
CRT3_HSYNC C
AY3
AD16
AN28
VCPVS CRTVSYNC CRT3_VSYNC

t
AD17 CLKI25M CLK1_SATA

CRT
AW3 AM3 AE1
AY2
AD18
AR27 R92 249 1% Always strapped LOW VCPCLK CRTAB
AF2 CRT3_BLUE
AY1
AD19 SATAR50COMP CRTAG
AF1
CRT3_GREEN
AP4
AD20 U503-3 AB5
CRTAR CRT3_RED
AD21 LVDSEVVDDA

m
AW2 AV9 AC4 VX800 AE2 R111 140 1%

n
AD22 PDD0 LVDSENVBLDA RSET
AW1
AD23 VX800 PDD1
AR8
AV2
AD24 PDD2
AP9
LCD3_VDDEN
AA5
LVDSEVVDDB 3/5
AV1
AD25 3/5 PDD3
AY11
LCD3_BKLTEN
AB7
LVDSENVBLDB DVP1D0
AK8

a
AU3 AW10 AK7

e
AD26 PDD4 DVP1D1
AU2 AU10 AC2 AH8
AD27 0179197500 PDD5 LCD0D0+ DVP1D2
AU1 AY9 AD2 AJ7
PCI

AD28 PDD6 LCD0D0- DVP1D3


AT3 AU8 AG8
AD29 PDD7 DVP1D4
AT1 AY8 AB1 AH6
AD30 PDD8 LCD0D1+ DVP1D5
AT2 AW8 AC1 AJ6

S fid
AD31 PDD9 LCD0D1- DVP1D6
AU9 AH5
PDD10 DVP1D7
AT6 AY10 AA3 AK6
CBE0# PDD11 LCD0D2+ DVP1D8
AN5 AV11 AB3 AH3
CBE1# PDD12 LCD0D2- DVP1D9
AV4 AN9 AH4
CBE2# PDD13 DVP1D10
AV3 AN10 W2 AJ4
CBE3# PDD14 LCD0D3+ DVP1D11

DVP / TV
AR9 Y2 AJ3

LVDS
PDD15 LCD0D3-
EIDE

DVP1D12
AT5 AK4
DEVSEL# DVP1D13
AW4 Y1 AK3
FRAME# LCD0CLK+ DVP1D14
AY4 AN12 AA1 AJ5
IRDY# PDCS1# LCD0CLK- DVP1D15

n
AY6 AL11
PAR PDCS3#
AU11 R1 AJ8
PDDACK# LCD1_ADATA0 LCD1D0+ DVP1HS
R537 AY33
0 AT8 P1 AG7
BCHP3_PCIRST0#
CHP3_PCIRST1#
R538 AW33
0
PCIRST0#
PCIRST1#
PDDREQ
PDIORDY
AT11
LCD1_ADATA0# LCD1D0- DVP1VS
DVP1DE_IRRX2
AH2 B
AL10 T2

o
AY5
PDIOR#
AR10
LCD1_ADATA1 R2
LCD1D1+
AH7
AT4
STOP# PDIOW# LCD1_ADATA1# LCD1D1- DVP1TVCLKR
TRDY#
AP12 U1 AG6 R113
AN2
PDA0
AN11
LCD1_ADATA2 T1
LCD1D2+ DVP1CLK
CHP3_INTA# INTA# PDA1 CHP3_PDA1 LCD1_ADATA2# LCD1D2- 4.7K
AP1 AM10 R78 AK5
CHP3_INTB# INTB# PDA2 CHP3_PDA2 DVP1TVFLD

C
AM9 1K W1
CHP3_INTC# AP2
INTC#
AR11 1% V1
LCD1D3+
AJ2
CHP3_INTD# INTD# IRQ15 LCD1D3- IRSCLK
AR3 AU14 V3
AR1
REQ0# IDERST# LCD1_ACLK U3
LCD1CLK+
REQ1# LCD1_ACLK# LCD1CLK-
AU7
REQ2#
AW7 AD1
REQ3# NC_20
AR2 AB6
GNDA15SATA_10
GNDA15SATA_11
GNDA15SATA_12
GNDA15SATA_13
GNDA15SATA_14
GNDA15SATA_15
GNDA15SATA_16
GNDA15SATA_17

GNT0# NC_21

GNDA33DAC1
GNDA33DAC2
GNDA33DAC3
GNDA15SATA_1
GNDA15SATA_2
GNDA15SATA_3
GNDA15SATA_4
GNDA15SATA_5
GNDA15SATA_6
GNDA15SATA_7
GNDA15SATA_8
GNDA15SATA_9

GNDA33SATA_1
GNDA33SATA_2
GNDA33SATA_3
GNDA33SATA_4

GNDLVDS_10
GNDLVDS_11
GNDLVDS_12
GNDLVDS_13
GNDLVDS_14
GNDLVDS_15
GNDLVDS_16
GNDLVDS_17
GNDLVDS_18
GNDLVDS_19
GNDLVDS_20
GNDLVDS_21
GNDLVDS_22
GNDLVDS_23
AP3

GNDA33PLL1
GNDA33PLL2
GNDA33PLL3
GNDAPLLSATA

GNT1#

GNDLVDS_1
GNDLVDS_2
GNDLVDS_3
GNDLVDS_4
GNDLVDS_5
GNDLVDS_6
GNDLVDS_7
GNDLVDS_8
GNDLVDS_9
AY7 AA7
AV7
GNT2# LCD3_BRIT BLTCK
GNT3#
Y6
NC_22
AW5 AA6
PERR# NC_23
AW6
SERR#
B15
P2
R3
R6
T3
T6
U2
U6
V2
V6
W3
W4
W5
Y3
Y4
Y5
AA2
AA4
AB2
AB4
AC3
AC5
AC6
AC7

AE3
AE4
AF3

AE7
AF6
AF7
BLM18PG181SN1
AF26
AG25
AT26
AT27
AT28
AU25
AU27
AU29
AV25
AV27
AV29
AW24
AW26
AW28
AY24
AY26
AY28

AM26
AM27
AN26
AN27

AP28

VIA VX800
A P3.3V P3.3V CRT3_BLUE A
CRT3_GREEN G_LVDS G_DAC G_PLL G_DAC
CRT3_RED DRAW DATE TITLE
R110 R109 R108
C109 C61 C113
C146 C62 150
1%
C98
0.033nF
150
1%
C97
0.033nF
150
1%
C99
0.033nF
YH.KIM 9/4/2008
BRIGHTON(VIA) SAMSUNG
10000nF-X5R 10000nF-X5R CHECK DEV. STEP
100nF 100nF 100nF R76 2.2K 50V 50V 50V ELECTRONICS
10V 10V 10V
6.3V 6.3V
R541 2.2K CHP3_INTA# GS.CHO ADV1 CHIPSET
CHP3_INTB#
R84 2.2K APPROVAL REV PART NO.

R542 2.2K CHP3_INTC# JG.GOO 0.5 VX800(3/5) BA41-undefi


CHP3_INTD#
MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 15 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 15 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY P3.3V_AUX
THIS DOCUMENT CONTAINS CONFIDENTIAL P3.3V_USB P3.3V P1.5V_USB P1.5V
PROPRIETARY INFORMATION THAT IS B16
SAMSUNG ELECTRONICS CO’S PROPERTY. B9 B10
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS C69 BLM18PG181SN1
C67 C70 C71 1000nF-X5R
C75 C35 BLM18PG181SN1 C36 BLM18PG181SN1
EXCEPT AS AUTHORIZED BY SAMSUNG. 100nF C68 C72
6.3V 1000nF-X5R 1000nF-X5R
10000nF-X5R 10000nF-X5R
10000nF-X5R 10V 100nF 100nF P3.3V
PRTC_BAT 6.3V 6.3V 6.3V 10V
6.3V
10V
6.3V P1.5V_AUX

P1.5V_USB P3.3V_USB B26


KBC3_PWRGD R56 0 BLM18PG181SN1
C168
D P1.5V_AUX C169 1000nF-X5R D
C138
KBC3_RSMRST# 100nF
6.3V
R58 R57 10000nF-X5R

AG22

AR17
AR20
AR21
AR22

AU17

AR19

AR18
AV30

AP17
AP18
AP19
AP20
AP21
AP22

AV17

AP23
AF23

AT17
AT22
100K 100K 10V 10V
1% 1% P3.3V
Y501 C73
0.032768MHz
VBAT

VSUS33USB_1
VSUS33USB_2
VSUS33USB_3
VSUS33USB_4
VSUS33USB_5
VSUS33USB_6
VSUS33USB_7
VSUS33USB_8
VSUS33USB_9
VSUS33USB_10
VSUS33USB_11
VSUS33USB_12
VSUS33USB_13
VSUS33USB_14
VSUS33USB_15
VSUS33USB_16

VCCA15PLLUSB

VCCA33PLLUSB

VSUS15USB
100nF
1 4 AT30 AW15 10V B25
PWRGD USBCLK CLK3_USB48 E1 K7
CLK1_PCIEVX PEXCLK+ VSUS15PEX C131 BLM18PG181SN1
2
C537 3
C538 AU30
RSMRST# CLK1_PCIEVX# F1
PEXCLK- C132 1000nF-X5R
RTC

AV23 E4
0.007nF 0.007nF AY29
USBP0+
AU23 USB3_P0+ F4
VCCA33PE1
E3
6.3V
10000nF-X5R
RTCXI USBP0- USB3_P0- G4
PEGTX0+ GNDA33PE1 10V
PEGTX0-
AW29 AV21 G7
RTCXO USBP1+ USB3_P1+ VCCA33PE2

g
AU21 G1 G6
USBP1- USB3_P1- H1
PEGTX1+ GNDA33PE2
PEGTX1-
AT33 AY22 F5
SMB3_DATA AV34
SMBDT1 USBP2+
AW22
USB3_P2+ H2
VCC33PEX_1
F6
SMB3_CLK SMBCK1 USBP2- USB3_P2- PEGTX2+ VCC33PEX_2
J2 VX800 F7
SMBUS

PEGTX2- VCC33PEX_3

n
AW34 AY20 F8
SMB3_DATA2 SMBDT2 USBP3+ USB3_P3+ VCC33PEX_4
SMB3_CLK2
AY34
SMBCK2 USBP3-
AW20
USB3_P3-
J1
PEGTX3+ PCIE VCC33PEX_5
G8
P3.3V
K1 H7

l
PEGTX3- VCC33PEX_6
AU34 AW18 4/5 H8

USB 2.0
SMB3_ALERT# SMBALRT# USBP4+
AY18
USB3_P4+ G3
VCC33PEX_7
J7

u
P3.3V_AUX R544 1K Crisis USBP4- USB3_P4- H3
PEGRX0+ VCC33PEX_8
J8
PEGRX0- VCC33PEX_9
1% nostuff AP32 AU19 J9
SDIO0PSEL USBP5+ USB3_P5+ VCC33PEX_10 C144

a
AV19 H6 K8 C143 C139 C141 C137
R61 10K AR32
USBP5- USB3_P5- J6
PEGRX1+ VCC33PEX_11
K9
1000nF-X5R
100nF 100nF 100nF
BATLOW# PEGRX1- VCC33PEX_12 6.3V

s i
L6 10V 10V 10V
C AM15 AY16 P3.3V_AUX J4
VCC33PEX_13
L7
10000nF-X5R
6.3V
C
PCI3_CLKRUN# CLKRUN# USBOC0#
AW16 K4
PEGRX2+ VCC33PEX_14
L8

t
USBOC1# R54 PEGRX2- VCC33PEX_15
AW14 AY15 L9
CHP3_CPUSTP# CPUSTP# USBOC2#
AV16 2.2K K5
VCC33PEX_16
M4
U503-4 USBOC3# PEGRX3+ VCC33PEX_17
AY14 AU16 L5 M5
CHP3_PCISTP# PCISTP# USBOC4#
AT16
PEGRX3- VCC33PEX_18
M6
USBOC5# VCC33PEX_19

m
AR30 VX800 10V 100nF C134 K3 M7

n
KBC3_EXTSMI# EXTSMI# PEX1_MINITXP0 PE0TX+ VCC33PEX_20
AR23 R90 5.62K 10V 100nF C136 L3 M8
USBREXT PEX1_MINITXN0 PE0TX- VCC33PEX_21
CHP3_GPI6
AW31
INTRUDER# 4/5 1%
VCC33PEX_22
M9
PEX1_LAN_TXP3
10V 100nF C133 M2 PE1TX+ VCC33PEX_23
N5

a
AU31 AV12 10V 100nF C135 N2 N6

e
LID# 0179197500 LPCDRQ0# PEX1_LAN_TXN3 PE1TX- VCC33PEX_24
AR13 N7
AT31
LPCDRQ1# LPC3_DRQ1# L1
VCC33PEX_25
N8
KBC3_LANPME# PME#
AY13
PEX1_MINIRXP0 M1
PE0RX+ VCC33PEX_26
N9
LPCFRAME# LPC3_LFRAME#PEX1_MINIRXN0 PE0RX- VCC33PEX_27
LPC

AR31 P15
KBC3_PWRBTN# PWRBTN#
AW13 0 LPC3_LAD(0:3) N3
VCC33PEX_28
R14 USB Port 0 : Main BD USB Port

S fid
AT29
LPCAD0
AU12 1
PEX1_LAN_RXP3 N4
PE1RX+ VCC33PEX_29
T15
USB Port 1 : SUB BD USB port 1
RING# LPCAD1
AY12 2 PEX1_LAN_RXN3 PE1RX- VCC33PEX_30
U14 USB Port 2 : SUB BD USB port 2
AN15
LPCAD2
AR12 3
VCC33PEX_31 USB Port 3 : CAMERA
PM

THM3_ALERT# THRM# LPCAD3


F2
USB Port 4 : HSDPA
AR15 F3
PEXREXT USB Port 5 : Bluetooth
AUD3_SPKR SPKR PEXCOMP
AT34 R96 22 1/16W
AY31
AZRST# HDA3_AUD_RST#
CHP3_SUSSTAT# SUSA#
AM13 R73 22 1/16W R124 R123
AZBITCLK HDA3_AUD_BCLK
HD AUDIO

AP30 10.7K 249


CHP3_SLPS3# SUSB#
Always strapped HIGH

n
AP33 1%
AZSDIN0 HDA3_AUD_SDI0
AP31 AN33 R98 4.7K 1/16W
CHP3_SLPS5# SUSC# AZSDIN1 PRTC_BAT
AZSDIN2
AN32 R94 4.7K 1/16W
B KBC3_WAKESCI#
AW30
GPI1
B
AL14 R71 22 1/16W HDA3_AUD_SDO

o
AZSDOUT R59
AV15 1M
CHP3_DPRSLPVR VRDSLP
AL13 R72 22 1/16W CHP3_GPI6
AV31
AZSYNC HDA3_AUD_SYNC
KBC3_RUNSCI# WAKE#
AP15 AR34
CHP3_BKLTON SYSIDLE KBCK KBC3_A20G

C
AR33
KB / MS

AR14
KBDT KBC3_CPURST# P3.3V_MICOM
CHP3_C4PSTOP# C4PSTOP#
MSCK
AV33 C63
AT15 AU33 0.015nF
CHP3_GPO5 CSTATE1 MSDT 50V
PRTC_BAT

1
AW12
CHP3_SERIRQ AT12
SERIRQ
D512

3
GNDUSB_10
GNDUSB_11
GNDUSB_12
GNDUSB_13
GNDUSB_14
GNDUSB_15
GNDUSB_16
GNDUSB_17
GNDUSB_18
GNDUSB_19
GNDUSB_20
GNDUSB_21
GNDUSB_22
GNDUSB_23

TCSEN#
MISC

GNDUSB_1
GNDUSB_2
GNDUSB_3
GNDUSB_4
GNDUSB_5
GNDUSB_6
GNDUSB_7
GNDUSB_8
GNDUSB_9

C656 C638 BAT54C


P3.3V AN3
PCIDREQ# 100nF 10000nF-X5R
AN4

2
PCIDGNT# 10V 10V
BATT501
R52 4.7K C99203-1030N-L
P3.3V 1
R662 1K PWR1
AF24
AG23
AT18
AT19
AT20
AT21
AT23
AU18
AU20
AU22
AU24
AV18
AV20
AV22
AV24
AW17
AW19
AW21
AW23
AY17
AY19
AY21
AY23

2
PWR2
3
GND
C283
R650 10K
P3.3V_AUX P3.3V_AUX KBC3_A20G RTC CONN 1nF
50V
R665 10K
KBC3_CPURST#
A R569 4.7K
A
nostuff R533 10K 1/16W CHP3_C4PSTOP#
KBC3_WAKESCI# 4.7K
R67 R101 R102 R534 nostuff R53 CHP3_DPRSLPVR
DRAW DATE TITLE

10K 10K 10K 10K nostuff


R99 4.7K
SMB3_DATA
R51 10K
YH.KIM 9/4/2008
BRIGHTON(VIA) SAMSUNG
CHP3_PCISTP# CHECK DEV. STEP
R97 4.7K ELECTRONICS
CHP3_SUSSTAT# SMB3_CLK R81 10K 1/16W
GS.CHO ADV1 CHIPSET
CHP3_SLPS3# LPC3_DRQ1#
R100 10K APPROVAL REV PART NO.
CHP3_SLPS5# SMB3_ALERT# R536 10K 1/16W JG.GOO 0.5 VX800(4/5) BA41-undefi
AUD3_SPKR CHP3_PCIRST0#
R60 4.7K
SMB3_CLK2 MODULE CODE LAST EDIT
R95 4.7K R539 10K 1/16W 16 31
SMB3_DATA2 CHP3_PCIRST1# September 06, 2008 16:45:09 PM PAGE OF
4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 16 of 50
8-13
8-14

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

P3.3V
nostuff
P3.3V_AUX P1.5V_AUX P1.5V VIA VX800
nostuff nostuff
D D
U503-5

AC15
AC17
AC19
AC21
AC23
AC25
AC27
AC36
AC40
AD14
AD16
AD18
AD20
AD22
AD24
AD26
AA15
AA17
AA19
AA21
AA23
AA25
AA27
AA35
AA39
AB14
AB16
AB18
AB20
AB22
AB24
AB26
AB33
AB37
C84 C82 C123

Y24
Y26
Y35
Y38
100nF 100nF
VX800 1000nF-X5R

GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
6.3V

GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
10V 10V A3 H34
GND_1 GND_71
AT32 AG26 A7 J3
VSUS33_1 VSUS15_1 GND_2 GND_72
AU32 AY30 A11 J5
VSUS33_2 VSUS15_2 GND_3 GND_73
AV32 A15 K2
VSUS33_3 GND_4 GND_74
AW32 A19 K6
VSUS33_4 GND_5 GND_75
AY32 T17 A23 L2
VSUS33_5 VCC15_1 GND_6 GND_76
T19 A27 L4
VCC15_2 GND_7 GND_77
T21 A32 M3
VCC15_3 GND_8 GND_78
AD15 T23 A35 N1
VCC33_1 VCC15_4 GND_9 GND_79

g
AE14 T25 A39 N35
VCC33_2 VCC15_5 GND_10 GND_80
AF15 U16 B1 N39
VCC33_3 VCC15_6 GND_11 GND_81
AF17 U18 B5 P14
VCC33_4 VCC15_7 GND_12 GND_82
AF19 U20 B9 P16
VCC33_5 VCC15_8 GND_13 GND_83
AF21 U22 B13 P18
VCC33_6 VCC15_9 GND_14 GND_84

n
AG9 U24 B17 P20
VCC33_7 VCC15_10 GND_15 GND_85
AG14 V17 B21 P22
VCC33_8 VCC15_11 GND_16 GND_86
AG16 V19 B25 P24

l
VCC33_9 VCC15_12 GND_17 GND_87
AG18 V21 B33 P26
VCC33_10 VCC15_13 GND_18 GND_88
AG20 V23 B37 P33

u
VCC33_11 VCC15_14 GND_19 GND_89
AH9 V25 C4 P37
VCC33_12 VCC15_15 GND_20 GND_90
AJ9 W16 C8 R15
VCC33_13 VCC15_16 GND_21 GND_91

a
AK11 W18 C12 R17
VCC33_14 VCC15_17 GND_22 GND_92
AK12 W20 C16 R19
VCC33_15 VCC15_18 GND_23 GND_93

s i
AK13 W22 C20 R21
C AK14
VCC33_16 VCC15_19
W24 C24
GND_24 GND_94
R23
C
VCC33_17 VCC15_20 GND_25 GND_95
AK15 Y15 C28 VX800 R25

t
VCC33_18 VCC15_21 GND_26 GND_96
AK16 Y17 C31 R27
VCC33_19 VCC15_22 GND_27 GND_97
Y19 C36 R36
VCC15_23 GND_28 GND_98
Y21 C40 R40
VCC15_24 GND_29 GND_99
5/5 VCC15_25
Y23 D2
GND_30 GND GND_100
T14

m
Y25 D6 T16

n
VCC15_26 GND_31 GND_101
AA14 D10 T18
VCC15_27 GND_32 GND_102
AA16 D14 T20
VCC15_28 GND_33 GND_103
POWER VCC15_29
AA18 D18
GND_34 5/5 GND_104
T22

a
AA20 D22 T24

e
VCC15_30 GND_35 GND_105
AA22 D26 T26
VCC15_31 GND_36 GND_106
AA24 D31 T34
VCC15_32 GND_37 GND_107
AB15 D34 T38
VCC15_33 GND_38 GND_108
AB17 D38 U15
VCC15_34 GND_39 GND_109
AB19 E2 U17

S fid
VCC15_35 GND_40 GND_110
AB21 E7 U19
VCC15_36 GND_41 GND_111
AB23 E11 U21
VCC15_37 GND_42 GND_112
AB25 E15 U23
VCC15_38 GND_43 GND_113
AC14 E19 U25
VCC15_39 GND_44 GND_114
AC16 E23 U27
VCC15_40 GND_45 GND_115
AC18 E27 U34
VCC15_41 GND_46 GND_116
AC20 E35 U39
VCC15_42 GND_47 GND_117
AC22 F9 V14
VCC15_43 GND_48 GND_118
AC24 F13 V16
VCC15_44 GND_49 GND_119

n
AD17 F17 V18
VCC15_45 GND_50 GND_120
AD19 F21 V20
VCC15_46 GND_51 GND_121
AD21 F25 V22
VCC15_47 GND_52 GND_122
B VCC15_48
AD23 F30
GND_53 GND_123
V24 B
AD25 F32 V26

o
VCC15_49 GND_54 GND_124
AE16 F33 V36
VCC15_50 GND_55 GND_125
AE18 G2 V37
VCC15_51 GND_56 GND_126
AE20 G5 W15
VCC15_52 GND_57 GND_127
AE22 G12 W17
VCC15_53 GND_58 GND_128
AE24 G16 W19
VCC15_54 GND_59 GND_129

C
G20 W21
GND_60 GND_130
0179197500 G24 W23
GND_61 GND_131
G28 W25
GND_62 GND_132
H4 W27
GND_63 GND_133
H5 W33
GND_64 GND_134
H10 W40
GND_65 GND_135
H14 Y14
GND_66 GND_136
H18 Y16
GND_67 GND_137

GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201
GND_202
GND_203
GND_204
GND_205
GND_206
GND_207
GND_208
GND_209
GND_210
GND_211
GND_212
GND_213
GND_214
GND_215
GND_216
H22 Y18
GND_68 GND_138
H26 Y20
GND_69 GND_139
H31 Y22
Place VX800 Bottom GND_70 GND_140
AD34
AD38
AE15
AE17
AE19
AE21
AE23
AE25
AE35
AE39
AF14
AF16
AF18
AF20
AF22
AF33
AF37
AG15
AG17
AG19
AG21
AG27
AG36
AG40
AH34
AH38
AJ35
AJ38
AM11
AM12
AP10
AP11
AT9
AT10
AV8
AV10
AW9
AW11
P3.3V P1.5V

1000nF-X5R1000nF-X5R 1000nF-X5R

C64 C66 C65 C140 C108 C142 C145 C112 C116 C115 C111 C117 C114 C118 C119 C121 C110
A 100nF
10000nF-X5R
100nF 100nF 100nF 100nF 100nF 100nF
A
1000nF-X5R 1000nF-X5R 6.3V 6.3V 6.3V 6.3V
10000nF-X5R
10000nF-X5R
1000nF-X5R 1000nF-X5R 10V 10V 10V 10V 10V 10V
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 10V DRAW DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 CHIPSET
APPROVAL REV PART NO.

JG.GOO 0.5 VX800(5/5) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 17 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 17 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D Signal Ball# Function Description D


P3.3V
GPIO12 AV13 FSB Clock State(GPIO12 : CSTATE1) Mode(MHz)
R86 4.7K
CHP3_GPIO12
R88 4.7K
CHP3_GPO5 CSTATE1 AT15 AT15 LL 100MHz
LH 133MHz
HL 200MHz
HH Auto

g
R89 1K
CHP3_BKLTON

n
SYSIDLE AP15 IO Queue Depth L : 12-level deep H : 1-level deep

C
R87 1K
CHP3_BIOSWP# GPIO13

s u
AP14

i a l GTL Pull-up L : Enable internal GTL Pull-up


H : Disable internal GTL Pull-up C

t
R83
R82
1K
1K
CHP3_PDA1 PDA1 AN11 Dual Processor Configuration L : Single Processor H : Dual Processor
CHP3_PDA2

m n
1%
PDA2 AM10 PLL_OK Source Selection L : PLL_OK from PLL
H : PLL_OK_from logic counter

a e
P3.3V

S fid
R70 10K 1/16W
HDA3_AUD_SDO AZSDOUT AL14 Auto Reboot L : Enable H : Disable

4.7K R68 HDA3_AUD_SYNC AZSYNC AL13 LPC FWH Command L : Enable H : Disable

B
P3.3V

R69 10K 1/16W


HDA3_AUD_BCLK

o n
AZBITCLK AM13 SPI/LPC ROM Select L : LPC ROM H : SPI ROM
B

SPI3_CS#

SPI3_SS1# R79
1/16W
R20 1K

4.7K

CSPISS[1:0]# AP13
AN13
IDE Controller
[sata table support]
State(SPISS[1:0]#)
LL
Mode
IDE
Reserved

A A
DRAW DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 CHIPSET
APPROVAL REV PART NO.

JG.GOO 0.5 VX800 STRAP BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 18 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 18 of 50
8-15
8-16

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

g
SD/MMC PWR control

n l
40mil pattern
P3.3V_MCD

u a R249
P3.3V_AUX nostuff P3.3V_MCD C285 C284
2200nF 100nF

s i 0
10V 10V J523
C nostuff
EDGE-SD-9P C

D1 D2 D3 D4
R236 49.9 1% 1

1 2 5 6
t
CHP3_SDDB_D3 2
CD_DAT3
CHP3_SDDB_CMD# 3
CMD

4
VSS1

S
4
C292 5
VDD

3
R247

G
100nF CHP3_SDDB_CLK CLK

m
P3.3V_AUX AO6409L 6

n
100K 10V VSS2
R246

Q19 R235 49.9 1% 7


10K

CHP3_SDDB_D0 R234 49.9 1% 8


DAT0
C294 C293 CHP3_SDDB_D1 DAT1
R237 49.9 1% 9
1000nF-X5R 100nF CHP3_SDDB_D2 DAT2

a
10

e
10K D 3 10V 10V CHP3_SDDB_CD# 11
CARD_DETECT
R245 Q16 CHP3_SDDB_WP# WRITE_PROTECT
G RHU002N06 12
MNT1
1 13
MNT2
R251

D 3

S fid
S 2
10K

Q18 3709-001492
G RHU002N06
CHP3_SDDB_CD#
1
S 2

40 mil trace for medica card socket ground

o n B

C
A A
DRAW DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 MUTICARD
APPROVAL REV PART NO.

JG.GOO 0.5 MULTICARD IF BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 19 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 19 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

Marvell 88E8040
D D

P3.3VP3.3V_AUX

CHP3_PCIRST1#
nostuff
0 R48
R106
4.7K

R46
1K
U6

n g l
P2.5V_LAN

8
J504
JACK-LAN-8P

u
88E8040-A0-NNC-1-C00 TRD4-
7
0 R47 TRD4+
5 30 6
CHP3_PCIERST1# PERST# NC10 TRD2-

a
0 R45 6 31 5
PEX3_WAKE# 55
WAKE# NC11
26 4
TRD3-
CLK1_PCIELOM REFCLKP NC12 TRD3+

s i
56 27 LT1 3
C CLK1_PCIELOM#
C54 100nF
REFCLKN
4910V
NC13
20 LAN3_MDI1P LFE8423 2
TRD2+ C
PEX1_LAN_RXP3 C55 100nF
PCIE_TXP
5010V
RXP
21 LAN3_MDI1N 1 16 1
TRD1-

t
PEX1_LAN_RXN3 54
PCIE_TXN RXN
17 LAN3_MDI0P 3
RD+ RX+
14
TRD1+
PEX1_LAN_TXP3 53
PCIE_RXP TXP
18 LAN3_MDI0N 2
RDCT RXCT
15 9
PEX1_LAN_TXN3 PCIE_RXN TXN RD- RX-
10
MNT1
MNT2
42 59 7 10
CLKREQ# LED_ACT# TD+ TX+

m
R107 4.7K 43 60 6 11

n
PU_VDDO_TTL LED_SPEED# TDCT TXCT
62 8 9 0208939800
NC14 TD- TX-
37 63
NC1 LED_LINK#
35
NC2

a
34 3 2603-000099

e
NC3 PD_12 P3.3V
36 4
NC4 PD_25 P3.3V_AUX

1%
1%
1%
1%
38 9
VPD_CLK SWITCH_VAUX
41 11

100nF C503

100nF C504
VPD_DATA SWITCH_VCC

75
75
75
75
S fid
10V

10V
45 12
P3.3V_AUX VDDO_TTL1 VAUX_AVLBL
40
VDDO_TTL2
1 47
VDDO_TTL3 VMAIN_AVLBL
61

R501
R502
R504
R503
VDDO_TTL4
LOM_DISABLE#
10 R44 4.7K
8
VDDO_TTL5
15
C94 C27 C26 48
XTALI C502
100nF 100nF 100nF VDD1 1nF Need at least 2.5mm or more clearance
44 14
10V 10V 10V VDD2 XTALO 3KV from conductive material

n
39
P1.2V_LAN VDD3
33
VDD4
13 46
VDD5 TESTMODE
B 7
VDD6 TSTPT
29 B
2 24

o
C24 C53 VDD7 HSDACP Y1
100nF 100nF
C93 C91 C92 58
VDD8 HSDACN
25
4700nF-X5R 1nF 1nF 16 R43 2K 25MHz
10V 10V RSET
10V 50V 50V 32
NC5 Trace width 12mils
28 1% 1 2 Place crystal within 0.75inches from LAN chip.
Place nearby PIN39 For EMI NC6
22 2801-004517
P2.5V_LAN NC7

C
19
AVDDL
C25 C23
57 0.015nF 0.015nF
NC8
52 65 50V 50V
AVDD1 THERMAL
51
C51 C52 AVDD2
100nF 100nF
C29 C50 C30
4700nF-X5R 1nF 1nF 23
10V 10V
10V 50V 50V
NC9
64
Place nearby PIN64 For EMI VDD25
1205-003399
Pin Compatible with 88E8040 (1205-003399)

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 LAN
APPROVAL REV PART NO.

JG.GOO 0.5 LAN(88E8040) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 20 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 20 of 50
8-17
8-18

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
SHT5 INSTPAR
P3.3V
SHT4 INSTPAR

D D
C655 C636 C654
10000nF-X5R 100nF 100nF
10V 10V 10V G_AUD

ALL TYPE IS 1608


R660 0
U11
ALC272-GR R661 0
1 36
DVDD LOUT1-R_PORT-D-R AUD5_LINE_O_RIGHT
9 35 BOTTOM
DVDD-IO LOUT1-L_PORT-D-L AUD5_LINE_O_LEFT

g
39
LOUT2-L_PORT-A-L
5 41 G_AUD
HDA3_AUD_SDO 6
SDATA-OUT LOUT2-R_PORT-A-R
HDA3_AUD_BCLK BCLK
R640 22 5% 8 32
HDA3_AUD_SDI0 10
SDATA-IN HPOUT-R_PORT-I-R
33 AUD5_HP_O_RIGHT
HDA3_AUD_SYNC SYNC HPOUT-L_PORT-I-L AUD5_HP_O_LEFT

n
11 C596 10nF 25V
HDA3_AUD_RST# RESET#
29 C265 2200nF 10V
CBP
C635 1000nF 6.3V 12 30 C647 10nF 25V

l
AUD3_BEEP PC_BEEP CBN

10V
B512 BLM18PG181SN1 46 31 C650 2200nF C672 10nF 25V

u
AUD3_DMIC_CLK1 44
DMIC-CLK1_2 CPVEE
B513 BLM18PG181SN1 DMIC-CLK3_4
2 22 C633 1000nF 6.3V
AUD3_DMIC_DATA1 GPIO0_DMIC01_2 MIC1-R_PORT-B-R AUD5_MIC1_VREF_RIGHT

a
3 21 G_AUD C632 1000nF 6.3V
AUD3_GPIO1# GPIO1_DMIC-3_4 MIC1-L_PORT-B-L AUD5_MIC1_VREF_LEFT

s i
C C652 C653 47
EAPD MIC1-VREFO
28 G_AUD C
0.047nF 0.047nF
50V 50V 45 17 C266 1000nF-X5R 6.3V

t
SPDIFO2 MIC2-R_PORT-F-R AUD5_MIC2_INT
48
SPDIFO1 MIC2-L_PORT-F-L
16 C267 1000nF-X5R 6.3V

43 19
NC MIC2-VREFO AUD5_MIC2_VREF

m
40 24

n
JDREF LINE1-R_PORT-C-R
23
MIC_B R639 LINE1-L_PORT-C-L
20K 1% 13 1%
AUD5_SENS_MIC# SENSEA AUD5_MIC1_VREF_RIGHT
1% 5.1K R233 34 18
AUD5_SENS_HP# SENSEB LINE1-VREFO 4.7K R637

a
H/P_A

1
e
4 15

BAT54A
D510
DVSS_1 LINE2-R_PORT-E-R
7 14

3
P4.75V_AUD DVSS_2 LINE2-L_PORT-E-L
R659
20K 25 20
AVDD1 LINE2-VREFO
1% 38

S fid
2
AVDD2 1%
37
C631 C651 26
MONO-OUT AUD5_MIC1_VREF_LEFT
100nF 100nF AVSS1 4.7K R636
42 27
10V 10V AVSS2 VREF

1205-003526
SHT6 INSTPAR C630 C629
10000nF-X5R 100nF
G_AUD Place these R-Short on just opposite side of the CODEC. 10V 10V
SHT7 INSTPAR

o n G_AUD

G_AUD
P5.0V_AUD
2nd Vendor:1203-005579(G916-475T1uF)

U513
MIC5252-4.75BM5
P4.75V_AUD
B

C
1 5
IN OUT
2
GND
3 4
P4.75V_AUD C290 C662 EN BYPASS C660 C661
100nF 100nF 10000nF-X5R
10000nF 1203-003344
10V 6.3V 10V 10V

INSTPAR
R635 SHT504 C663
20K 1000nF-X5R
1% INSTPAR
6.3V
SHT505
AUD3_BEEP
PC BEEP D 3
R634
C634 G_AUD G_AUD G_AUD G_AUD
4.7nF
Q522 1K 25V
R638 1K 1% G RHU002N06 1%
AUD3_SPKR
1
S 2
A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
G_AUD G_AUD ELECTRONICS
GS.CHO ADV1 AUDIO
APPROVAL REV PART NO.

JG.GOO 0.5 AUDIO CODEC(1/4) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 21 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 21 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

P5.0V_AMP P5.0V_AMP

GAIN

100K 1%

100K 1%
10dB

g
nostuff C246 C247 C245
100nF 10000nF-X5R 100nF
10V 10V
P5.0V_AUD P5.0V_AMP
10V
R216

R610

n
U512
TPA6017A2
C612 100nF 10V 17 RIN- 16

l
AUD5_LINE_O_RIGHT 7
VDD
6 G_AUD
RIN+ PVDD1 SHT503 INSTPAR
2 GAIN0 15

u
PVDD2
3
GAIN1
18
ROUT+ SPK5_R+ GAIN0 GAIN1

a
C613 100nF 10V 5 14 SHT502 INSTPAR
AUD5_LINE_O_LEFT 9
LIN- ROUT- SPK5_R- 0 0 6dB
16V
10V

LIN+

s i
10 BYPASS LOUT+ 4 0 1 10dB
C 8
SPK5_L+ C
10V

100nF

1
LOUT- SPK5_L- 1 0 15.6dB C281 C649 C648
10V

t
10000nF-X5R
100nF

100nF

GND1 100nF 10000nF-X5R


470nF

11 19 1 1 21.6dB
0

13
GND2 SHDN*
12 AUD3_SHDN# 10V 10V 10V
GND3 NC
20 GND4
C615

21
C269

THERM

m
C268

C614
R215

R611

n
1201-001991
nostuff

nostuff

G_AUD

a
S fid e G_AUD
G_AUD

INTERNAL STEREO SPEAKERS


G_AUD

n
B30 BLM18PG181SN1
B B31 BLM18PG181SN1 B
R668 10K B32 BLM18PG181SN1 J518

o
AUD3_GPIO1# 1%
AUD3_SHDN# HDR-4P-SMD
B33 BLM18PG181SN1
D 3 SPK5_R- 1
Q538 SPK5_R+ 2
R243 1K G RHU002N06 SPK5_L- 3
KBC3_SPKMUTE SPK5_L+ 4

C
1% 1 5
MNT1
S 2 6
MNT2
C270 C271 C272 C273
1nF 1nF 1nF 1nF 3711-000922
50V
nostuff 50V
nostuff 50V
nostuff 50V
nostuff

G_AUD

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 AUDIO
APPROVAL REV PART NO.

JG.GOO 0.5 AUDIO CODEC(2/4) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 22 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 22 of 50
8-19
8-20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

P3.3V

D B5 D
BLM18PG181SN1

J512
HDR-4P-1R-SMD
B11 BLM18PG181SN1 1
AUD3_DMIC_CLK1 2
AUD3_DMIC_DATA1 3
B12 BLM18PG181SN1 4
5
MNT1
C43 C42 6
C12 MNT2

g
0.047nF 0.047nF
100nF
50V 50V 3711-000456
10V

u n a l
s i
C C

m n t R221
AUD5_MIC2_VREF

a
2.2K

e
J516
B507 HDR-2P-1R
BLM18PG181SN1

S fid
1
R222 330
AUD5_MIC2_INT 3
2
MNT1
4
MNT2
3711-002162

C597
SHT3 INSTPAR 0.1nF C598
10nF

n
50V
16V
C234 10nF
B 16V B
G_MIC G_MIC

o
R214 0

G_AUD G_MIC

C
A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 AUDIO
APPROVAL REV PART NO.

JG.GOO 0.5 AUDIO CODEC(3/4) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 23 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 23 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

HEADPHONE
J521
JACK-PHONE-6P-LIME
5
AUD5_SENS_HP# 4
R658 56.2 1% B511 BLM18PG181SN1 3 R
AUD5_HP_O_RIGHT

g
6

50V

50V
R631 56.2 1% B510 BLM18PG181SN1 2 L
AUD5_HP_O_LEFT 1
G1
R632 R633

0.1nF

0.1nF
P3.3V 20K 20K G2

1nF
3722-002416

C627

C626
50V

C280
u
P3.3V
R671 G_AUD
10K

a
1%
2
DTA114YUA G_AUD
3

s i
Q535 1% R667
C 1K 1 Q533 C
1 MMBT3904

t
3 2 Connect to Mount-hole.
D 3 1% R669 3
Q536 1K 1 Q534
R670 1K 1% G RHU002N06 MMBT3904
KBC3_SPKMUTE

m
HP depop circuit

n
1 2
S 2

a e
G_AUD

S fid AUD5_SENS_MIC#
5
4
J517
JACK-PHONE-6P-PINK

n
R630 330 B509 BLM18PG181SN1 3 R
AUD5_MIC1_VREF_RIGHT 6
R609 330 B508 BLM18PG181SN1 2 L
B AUD5_MIC1_VREF_LEFT 1 B
C628 C611 C610 G1

o
1nF 0.1nF 0.1nF G2
50V 50V 50V
3722-002365

MIC JACK

C
G_AUD

The traces led to Audio Jacks have the width over 10mil

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 AUDIO
APPROVAL REV PART NO.

JG.GOO 0.5 AUDIO CODEC(4/4) BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 24 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 24 of 50
8-21
8-22

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

P3.3V
R514 0 nostuff
CHP3_BKLTON
D U501 D
5 7SZ08
KBC3_BKLTON R515 0 1 +
4 R511 1K
2 LCD3_BKLTON
-
3
R513 R9
LCD3_BKLTEN R512 0 100K 100K
LCD_VDD3.3V P3.3V VDC_LED 1% 1%

BLM18PG181SN1

g
C515
1000nF
C514
100nF
6.3V nostuff
R510

B501
10V 0

n
P3.3V

u l
P5.0V_ALW P3.3V_AUX LCD_VDD3.3V
Q503

a
SI2315BDS-T1
R518

s i
J511

3
2
C 200K C
R8 HDR-30P-2R-SMD-MNT

D
S
0 1%
KBC3_BRIT

1
G
t
1 2 C517
C516
0 R509 3 4 LCD3_BKLTON R519 330nF
100nF
LCD3_BRIT 5 6 51.1K 1% 10V
7 8
9 10

m n
11 12 R527 R528
nostuff D 3
13 14 2.2K 2.2K
Q502
15 16 RHU002N06
R517 10K G
LCD1_ACLK 17 18 LCD1_ADATA2 LCD3_VDDEN

a
1% 1

e
LCD1_ACLK# 19 20 LCD1_ADATA2#
LCD1_ADATA1 21 22 LCD1_ADATA0
S 2 For EBL.
R516
LCD1_ADATA1# 23 24 LCD1_ADATA0# 100K
25 26 MCH3_LCD_EDID_C 1%
27 28 MCH3_LCD_EDID_D

S fid
29 30
31
MNT1
32
MNT2

3711-006896

VDC VDC_LED
For VE

n
nostuff R3 0
B nostuff nostuff R2 0 B
nostuff nostuff

o
nostuff nostuff

3
2

D
S
C
C4

1
R6

G
100nF SI2307BDS-T1-E3
300K 25V Q1
1%
C3
R7 10K 100nF
25V
P3.3V R5
100K

D 3
Q501
R4 4.7K G RHU002N06
1
S 2

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 DISPLAY
APPROVAL REV PART NO.

JG.GOO 0.5 LVDS BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 25 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 25 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CPU VRM POWER
D D

VDC

P5.0V P5.0V P5.0V

g
EC508 EC507 C618 C619
C616 C617
1nF 1nF 15uF 15uF 4700nF-X5R 4700nF-X5R
R219

2
50V 50V 25V 25V 25V 25V

n
10 C251
1% 1000nF for EMI for PI
6.3V nostuff CPU_CORE

3
l
C260 D6

1
BAT54A 5

u
1000nF U10 D
6.3V
SC453TSTRT

a
21 28 Q512
VCCA V5
2 G SI7686DP-T1-E3
TG

s i
G_CPU
C 4 C
S1 S2 S3 1uH
PCMC104T-1R0MN R591
R224 499 1% 4 1 1 2 3

t
CHP3_DPRSLPVR SLP DRN
R223 C274 5 5 L504 C574 0.001
7 3 D D
R598 R599 1W
PG# BST 4700nF 1%
3.3 470nF 10 10 6.3V EC506 EC505
25 5% 1% 1% 330uF 330uF
VCCP_PWRGD EN 16V

m
27

n
G G 2V 2V
BG 4 AL AL
C252 CPU1_VID(0) 14
VID0 4 C599 2402-001306
0.1nF 13 S1 S2 S3 S1 S2 S3 0.68nF
50V CPU1_VID(1) VID1 1 2 3 1 2 3
12 26 50V for EMI
CPU1_VID(2) VID2 PGND

a
11

e
CPU1_VID(3) VID3 Q510 Q511
10
G_CPU CPU1_VID(4) VID4 SI7634BDP-T1-E3
9 SI7634BDP-T1-E3
CPU1_VID(5) VID5
8 24 R194 475 1%
HYS CL
23 R195 453 1%

S fid
R227 1.7V CMP
22 R196 475 1%
20K CLRF
1% nostuff
20 R197
REFIN
R229 10K
270K 18 1% nostuff nostuff
DAC
1% R228 nostuff
C255

C254

C253

nostuff
220pF

220pF

220pF

22K 1.204V
1% 6 P5.0V nostuff
BOOTV R217 R198
0 43.2K

n
CPU_CORE 5%
R226 1%
R230 51.1K C257 C256 R199
1% G_CPU G_CPU G_CPU 0.33nF 0.33nF
20K 0.602V R220 332 1% Q12 10K
B 1% 5
SLPV CORE
17 C258 50V 50V 3 D
RHU002N06 1% B
1nF

o
R225 C275 C276
C259
50V G

51.1K 1nF 1nF 15 1


50V 50V 19
SS
16
0.33nF S
1% GND PG_DEL 50V 2
3 D
C261
15nF 1203-005582 Q13
G_CPU G_CPU RHU002N06

C
50V G
CHP3_DPRSLPVR
1
2 S
G_CPU G_CPU G_CPU G_CPU G_CPU G_CPU SHT501 3 D

INSTPAR P3.3V Q14


RHU002N06 G
CHP3_CPUSTP#
1
S
R218 2
1.91K
1%

G_CPU VRM3_CPU_PWRGD
G_CPU

Imax =15.0A
Ipeak = 17.4A
I limit =120% * Ipeak
= 20.8A

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 CPUVRM
APPROVAL REV PART NO.

JG.GOO 0.5 CPU VRM POWER BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 26 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 26 of 50
8-23
8-24

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D
Load Switch Control(P3.3V)
Load Switch Control(P5.0V)
P3.3V_AUX P3.3V P5.0V_AUX P5.0V P5.0V_AUD
AO6409L

D1 D2 D3 D4

D1 D2 D3 D4
AO6409L

1 2 5 6

1 2 5 6
Q22 Q520
INSTPAR SHT9

4
S

S
g
C625 INSTPAR SHT8

3
G

G
R256 C296 R628 100nF
100K 100nF 100K 10V INSTPAR SHT10

R255

R627
1% 10V 1%

10K

10K
1%

1%
n
C286

l
2200nF-X5R
R254

R624
D 3 10V D 3

u
10K

10K
1%

1%
Q21 Q521 C646
G RHU002N06 G RHU002N06 2200nF-X5R
P1.5V_PWRGD KBC3_PWRON

a
40-C4 1 40-A4 1 10V
S 2 S 2
C624

s i
C C295 10nF C
100nF nostuff
16V
10V

m n t
P1.8V_AUX a
S fid e DDR2 POWER

n
B
P3.3V_AUX
U9
P1.8V_AUX (1.809V @ 4A ) P0.9V B
L2
ISL8014IRZ-T 0.82uH

o
1 14 P3.3V_AUX P1.8V_AUX
VIN_1 LX_1
C239 C240 2 15
PCMC063T-R82MN
22000nF-X5R 22000nF-X5R VIN_2 LX_2 C232 C233
20% 20% R212 C242
6.3V 3 0.047nF
22000nF-X5R 22000nF-X5R C609 C590
6.3V
VDD 121K 20% 20% 1000nF 10000nF-X5R

C
1% 50V 6.3V 6.3V
10V
P0.9V 6.3V P0.9V
5 12 U511
KBC3_MEMON EN PGND_2 G2998P81U
R211
R209 C241 11 5.11K 1 8
1K PGND_1 10K R608 GND VTT
10nF 1% 2 7
1%
25V P1.5V_PWRGD 3
EN VTT_IN
6
0 R607 MEM1_VREF VTTS VCC
7 4 5
PG KBC3_PWRON VREF VDDQ C592 C591
22000nF-X5R 22000nF-X5R
8 R596
C605
VFB R210 C606 1203-005590
220
20% 20%
100K 2200nF 6.3V 6.3V
100nF 10V
4 1%
P3.3V_AUX SYNCH 10V
R213 C608
9 nostuff 10
nostuff SGND_1 10000nF-X5R
6 nostuff 5%
NC_1 10V
R208 10
SGND_2
0 13
NC_2 C607
16 17 1000nF
NC_3 EP 6.3V

A R207 1203-005382 A
0
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 SWITCHED POWER
APPROVAL REV PART NO.

JG.GOO 0.5 SWITCHED POWER BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 27 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 27 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

POWER DISCHARGER

n g l
P5.0V_ALW

R654
100K
P5.0V_AUX

R657
1K
P1.8V_AUX

R656
49.9
P3.3V_AUX

R655
10

u
1% 1% 1% 1%
nostuff nostuff nostuff nostuff

s i a
C C
D 3 D 3 D 3 D 3

t
Q532 Q531 Q530 Q529
R666 10K G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_SUSPWR
1% 1 1 1 1
S 2 S 2 S 2 S 2

m
nostuff nostuff nostuff nostuff

n
nostuff

a
S fid
P5.0V_ALW
e R622
P5.0V

R623
P3.3V

R652
P1.5V

R653
P1.05V

R651

n
100K 1K 10 10 10
1% 1% 1% 1% 1%
nostuff nostuff nostuff nostuff nostuff
B B

o
D 3 D 3 D 3 D 3 D 3
Q518 Q519 Q526 Q527 Q528
R621 10K G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_PWRON

C
1% 1 1 1 1 1
S 2 S 2 S 2 S 2 S 2
nostuff nostuff nostuff nostuff nostuff nostuff

A A
DESIGN DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 DISCHARGER
APPROVAL REV PART NO.

JG.GOO 0.5 DISCHARGER BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 28 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 28 of 50
8-25
8-26

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL MT1 MT5 MT9 MT7
PROPRIETARY INFORMATION THAT IS RMNT-25-70-1P RMNT-25-70-1P RMNT-25-70-1P RMNT-25-70-1P
SAMSUNG ELECTRONICS CO’S PROPERTY. M/B Top + Bottom
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS +
EXCEPT AS AUTHORIZED BY SAMSUNG. Bottom (Bottom side)

MT4 MT11 MT12 MT8 MT6


RMNT-25-70-1P RMNT-25-70-1P RMNT-25-70-1P RMNT-25-70-1P RMNT-25-70-1P
D KBD Top + Bottom D

(Topside)

g
P3.3V

n
C200 1nF P5.0V PRTC_BAT
50V
C291 1nF

l
P3.3V P5.0V 50V
C250 1nF

u
50V C248 1nF C277 1nF
C7 1nF C222 1nF 50V 50V 50V

a
50V
C637 1nF C623 1nF 50V C235 1nF C88 1nF

s i
C 50V
C167 1nF 50V
50V 50V C
P3.3V_AUX P5.0V

t
C204 1nF 50V
P3.3V_AUX
C28 1nF C510 1nF 50V
50V

m
C90 1nF C58 1nF 50V VDC

n
50V C166 1nF 50V
C199 1nF C130 1nF 50V
50V C282 1nF 50V

a
C223 1nF C525 1nF 50V

e
50V C46 1nF C224 1nF
C201 1nF 50V 50V 50V
C249 1nF
P3.3V P3.3V_AUX C6 1nF 50V 50V
C225 1nF

S fid
C531 1nF 50V 50V
C536 1nF
50V C287 1nF 50V
C57 1nF
50V C221 100nF 10V
C95 1nF
50V C535 1nF 50V
C572 1nF
50V C87 100nF 10V

n
C96 1nF
50V C303 1nF 50V
C56 1nF
B 50V B

PCB REVISION CONTROL ( ICT )


NO CONNECTION DATE(YY/MM/DD) REVISION STEP
C o FOR EMI

BOTTOM SIDE EMI CLIP


EMI1
EMI
nostuff

1 N.C. EXF-0023-02
REV1
1 2 1-2
3 2-3
2 3
4 3-1
A 5 1-2-3 A
6 N.C. DRAW DATE TITLE

7 1-2
CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
8 2-3 ELECTRONICS
GS.CHO ADV1 MT
9 3-1 APPROVAL REV PART NO.

JG.GOO 0.5 MOUNT HOLE BA41-undefi


10 1-2-3
MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 29 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 29 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

SIM Card & Main To SUB Board Connector

g
P3.3V

SIM CARD CONN.


R49
10K

u
J507

n a l
EDGE-SIM-8P-MNT

s i
C1 C5
C SIM3_C1VCC C2
C1 C5
C6 P3.3V P5.0V_AUX C
SIM3_C2RST C3
C2 C6
C7 SIM3_C6VPP

BLM18PG181SN1

BLM18PG181SN1
SIM3_C3CLK C3 C7 SIM3_C7DATA
C4 1
SIM3_C4DET# C8
CD_U MNT1
2 B34
CD_L MNT2 ACM2012-900-2P-T

1
m
nostuff 1 4

n
3709-001478 nostuff J524

B515

B514
C31 HDR-14P-1R-SMD

2
0.01nF
0.5pF 1

a
0.01nF 0.5pF

0.01nF 0.5pF

50V 2 3

e
2
10%
1000nF-X5R

3
R241 0
nostuff USB3_P1+ 4
1

nostuff USB3_P1- R242 0


5
nostuff 6

S fid
USB3_PWRON# 7
2

8
R258 0
6.3V USB3_P2+ 9
C32

R259
C34

C33

50V 50V 0
USB3_P2- 10
B35 11
PGB1010603NR
D4
PGB1010603NR
D2
ACM2012-900-2P-T KBC3_PWRSW# 12
1 4 LID3_SWITCH# 13
14
15
MNT1
16
PGB1010603NR
D1
PGB1010603NR
D3
PGB1010603NR
D5

MNT2

n
2 3 C678 3711-000686
1nF
B 50V B

C o
A A
DRAW DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 SIMCARD
APPROVAL REV PART NO.

JG.GOO 0.5 SIMCARD & SUB BD CONN. BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 30 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 30 of 50
8-27
8-28

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

POWER SWITCH
D D
P3.3V_SUB

SUB Board (USB 2Port) J505


HDR-3P-1R-SMD
1 KBC3_PWRSW#_SUB
2
3
4
P5.0V_AUX_SUB MNT1
5
MNT2

g
10V

3711-002613

100nF U3 Need 4A Routing

n
C2 TPS2062 nostuff
2 G_SB
G_SB IN
7

l
OUT1
8
OC1*
5 6 EC502

u
OC2* OUT2
3 C508 100uF C501 C509
USB3_PWRON#_SUB 4
EN1*
1 100nF 100nF 0.033nF
16V
EN2* GND

a
10V AS 10V 50V
1205-002596
P3.3V_SUB P5.0V_AUX_SUB

s i
C C

t
G_SB G_SB J502
JACK-USB-4P J503
HDR-14P-1R-SMD
USB3_P0+_R GND
R507 0
USB3_P1+_SUB D+ 1

m
R508 0

n
USB3_P1-_SUB D- 2
USB3_P0-_R PWR 3
5
2 3 6
MNT1 USB3_P1+_SUB 4
MNT2 USB3_P1-_SUB 5

a
7

e
MNT3 6
8
MNT4 USB3_PWRON#_SUB 7
nostuff 8
1 4
B2 3722-002808|usb-4p-14-1
USB3_P2+_SUB 9
USB3_P2-_SUB 10
ACM2012-900-2P-T

S fid
G_SB 11
P5.0V_AUX_SUB KBC3_PWRSW#_SUB 12
LID3_SWITCH#_SUB 13
C507
100nF

14
10V

15
MNT1
16
Need 4A Routing MNT2
U2 3711-000686
TPS2062 nostuff
2
IN

n
G_SB 7 MT13 MT14
OUT1 RMNT-25-70-1P RMNT-25-70-1P G_SB
8
OC1*
5 6 EC501
OC2* OUT2
B USB3_PWRON#_SUB
3
EN1*
C506 100uF C505 C5 B
4 1 100nF 16V 100nF 0.033nF

o
EN2* GND 10V AS 10V 50V
1205-002596

G_SB
J501
JACK-USB-4P
LID_SWITCH
G_SB G_SB G_SB

C
USB3_P4+_R GND P3.3V_SUB P3.3V_SUB
R505 0
USB3_P2+_SUB D+
R506 0
USB3_P2-_SUB D-
USB3_P4-_R PWR
5
MNT1
2 3 6 R1
MNT2 U1
7 20K
MNT3 A3212ELH/HED55XXU12
8 1%
MNT4
1
1 4 nostuff C1 SUPPLY
2
B1 3722-002808|usb-4p-14-1
1000nF-X5R
3
OUTPUT LID3_SWITCH#_SUB
6.3V GND
ACM2012-900-2P-T
G_SB
1009-001010

G_SB

A A
DRAW DATE TITLE

CHECK
YH.KIM
DEV. STEP
9/4/2008
BRIGHTON(VIA) SAMSUNG
ELECTRONICS
GS.CHO ADV1 SUB
APPROVAL REV PART NO.

JG.GOO 0.5 SUB BOARD BA41-undefi


MODULE CODE LAST EDIT

September 06, 2008 16:45:09 PM PAGE 31 OF 31


4 3 2 1
D:/users/mobile23/Brighton/Brighton_adv1_080906_01
SRP Sheet Number: 31 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D SPI3_DI CHP3_BKLTON CPU1_VID(2) CHP3_SDDB_D0 D


SPI3_DO CHP3_GPIO12 CPU1_VID(3) CHP3_SDDB_D1 CLK3_DISPCLKI1
SPK5_L+ CHP3_SERIRQ CPU1_VID(4) CHP3_SDDB_D2 CLK3_DISPCLKO1
SPK5_L- CHP3_SLPS3# CPU1_VID(5) CHP3_SDDB_D3 CLK3_PCLKMICOM P3.3V
SPK5_R+ CHP3_SLPS5# CRT3_DDCCLK P3.3V
SPK5_R- KBC3_BKLTON CPU3_THRMTRIP# P3.3V
CLK3_XIN KBC3_PRECHG CPU1_CPURST# P3.3V
SMB3_DATA KBC3_PWRSW# KBC3_CHKPWRSW# P3.3V
CPU1_TCK SPI3_SS1# CLK3_DBGLPC KBC3_RFOFF# KBC3_LED_ACIN# P5.0V
CPU1_TDI THM3_STP# CLK3_PCICLK KBC3_SCLED# KBC3_USBPWRON# P5.0V
CPU1_TDO WLON_LED# KBC3_SMCLK# VRM3_CPU_PWRGD P5.0V
CPU1_TMS AUD3_SHDN# KBC3_SUSPWR AUD3_DMIC_DATA1 P5.0V
CRT3_RED CHP3_INTA# KBC5_KSI(0) AUD5_HP_O_RIGHT P5.0V
FAN5_VDD CHP3_INTB# CPU1_BREQ0# KBC5_KSI(1) P1.05V

g
CPU1_BREQ1# KBC5_KSI(2) P1.05V
CHP3_INTD# CPU1_BREQ2# KBC5_KSI(3) P1.05V
CPU1_BREQ3# KBC5_KSI(4) P1.05V
KBC5_KSI(5) P1.05V
CLK3_USB48 KBC5_KSI(6) KBC3_BLCKPWRSW# PRTC_BAT

n
KBC5_KSI(7) CPU2_THERMDA KBC3_LED_POWER# PRTC_BAT
KBC5_KSO(0) CPU2_THERMDC KBC3_PWRSW#_SUB

l
KBC5_KSO(1) CRT3_DDCDATA MCH3_LCD_EDID_C
KBC5_KSO(2) FAN3_FDBACK# MCH3_LCD_EDID_D

u
KBC5_KSO(3) HDA3_AUD_SDO USB3_PWRON#_SUB P1.2V_LAN
KBC5_KSO(4) KBC3_CHG4.2V AUD5_LINE_O_LEFT P1.2V_LAN
KBC5_KSO(5) KBC3_CPURST# KBC3_LED_CHARGE#

a
KBC5_KSO(6) KBC3_EXTSMI# LID3_SWITCH#_SUB
KBC5_KSO(7) KBC3_LANPME# AUD5_LINE_O_RIGHT

s i
C CPU1_COMP0 KBC5_KSO(8) KBC3_NUMLED# KBC3_THERM_SMCLK# P1.5V_AUX C
CPU1_COMP2 KBC5_KSO(9) KBC3_PWRBTN# P1.5V_AUX

t
KBC3_RUNSCI# KBC3_THERM_SMDATA# P1.5V_AUX
KBC3_SMDATA# MIN3_CLKREQ# AUD5_MIC1_VREF_LEFT P1.5V_AUX
KBC3_SPKMUTE PCI3_CLKRUN# AUD5_MIC1_VREF_RIGHT P1.5V_AUX
SMB3_CLK LCD3_BKLTEN KBC5_KSO(10) BGATE P1.5V_USB
SPI3_CLK LCD3_BKLTON KBC5_KSO(11) P1.5V_USB

m n
SPI3_CS# LPC3_LAD(0) KBC5_KSO(12)
LPC3_LAD(1) KBC5_KSO(13)
LPC3_LAD(2) KBC5_KSO(14) CHP3_C4PSTOP#
LPC3_LAD(3) KBC5_KSO(15) CHP3_DPRSLPVR G_SB P1.8V_AUX

a e
CHP3_PCIRST0# P1.8V_AUX
CHP3_PCIRST1# P1.8V_AUX
CHP3_SATALED# P1.8V_AUX
LID3_SWITCH# CHP3_SDDB_CD# P1.8V_AUX
CHP3_SDDB_CLK G_AUD P2.5V_LAN

S fid
LPC3_LFRAME# CHP3_SDDB_WP# G_AUD P2.5V_LAN
CHP3_SUSSTAT#

ADT3_SEL# G_CHG P3.3V_AUX


AUD3_BEEP G_CHG P3.3V_AUX
AUD3_SPKR P3.3V_AUX
CHP3_GPI6 P3.3V_AUX
CHP3_GPO5 CPU1_STPCLK# HDA3_AUD_BCLK P3.3V_AUX
CPU1_IGNNE# HDA3_AUD_RST# G_CPU P3.3V_MCD

n
CRT3_GREEN CPU1_INTR HDA3_AUD_SDI0 G_CPU P3.3V_MCD
CLK1_SATA CRT3_HSYNC HDA3_AUD_SYNC
CLK3_GCLK CRT3_VSYNC KBC3_CAPSLED#
B KBC3_CHGEN CPU1_SLP# KBC3_WAKESCI#
B

o
KBC3_MEMON CPU1_SMI# G_P3.3V P3.3V_SUB
KBC3_PWRGD CPU1_INIT# G_P3.3V P3.3V_SUB
KBC3_PWRON CPU1_NMI P3.3V_SUB
CPU1_PROCHOT# P3.3V_SUB
CPU1_DPSLP# P3.3V_SUB
CPU1_THRMTRIP# LCD_VDD3.3V P3.3V_USB

C
CPU1_FERR# LCD_VDD3.3V P3.3V_USB
CPU1_PWRGD
CRT3_BLUE LCD3_VDDEN
KBC3_A20G LPC3_DRQ1# P1.5V_PWRGD
KBC3_BRIT SIM3_C4DET# MEM1_VREF P5.0V_ALW
KBC3_RST# SIM3_C7DATA MEM1_VREF P5.0V_ALW
KBC3_VRON PEX3_WAKE# SMB3_ALERT# P5.0V_ALW
SIM3_C1VCC SMB3_DATA_S P5.0V_ALW
LCD3_BRIT SIM3_C2RST THM3_ALERT# P5.0V_ALW
SIM3_C3CLK T_L_BUTTON# P0.9V P5.0V_AMP
SIM3_C6VPP T_R_BUTTON# AUD3_DMIC_CLK1 P0.9V P5.0V_AMP
SMB3_CLK_S BAT3_DETECT# AUD5_HP_O_LEFT
VCCA_PWRGD BAT3_SMDATA# CHP3_PCIERST1#
VCCP_PWRGD CHP3_BIOSWP# CHP3_SDDB_CMD#
AUD3_GPIO1# CPU1_VID(0) CHP3_CPUSTP# P5.0V_AUD
BAT3_SMCLK# CPU1_VID(1) CHP3_PCISTP# P1.5V P5.0V_AUD
P1.5V
P1.5V
P1.5V

A A

4 3 2 1

SRP Sheet Number: 32 of 50


8-29
8-30

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P4.75V_AUD
P4.75V_AUD

P5.0V_FILT

P3.3V_MICOM
P3.3V_MICOM

n g l
u
P5.0V_AUX_SUB
P5.0V_AUX_SUB
P5.0V_AUX_SUB

s i a
C VDC C
VDC

t
VDC
VDC
VDC
VCCA
VCCA

VREF
VREF

VCC_CRT

a m e n
S fid
VCC_CRT

VDC_LED
VDC_LED

VDC_ADPT

n
VDC_ADPT
VDC_ADPT
VDC_ADPT
B VDC_ADPT
B

o
GROUND
GROUND
GROUND
GROUND

C
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND

GROUND
GROUND
GROUND

A A

4 3 2 1

SRP Sheet Number: 33 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

THERMAL SENSOR & FAN CONTROL


P5.0V P3.3V_AUX P3.3V P3.3V_AUX

g
R148

10K 1%
10K 1%
10K 1%

10K 1%
49.9
1%
nostuff

n
P1.05V
C163 C165
C162 C164

l
10000nF 10000nF
100nF 100nF
6.3V 6.3V
10V 10V

R146
R147
R117

R118
u
U7 R116
EMC2102 2K nostuff

a
1 22 1%
VDD_3V SMDATA KBC3_THERM_SMDATA# CPU3_THRMTRIP#
24 23
VDD_5V_1 SMCLK KBC3_THERM_SMCLK# 3

s i
27
C VDD_5V_2
19 1 Q10 C
14
ALERT#
12 THM3_ALERT# MMBT3904

t
KBC3_PWRGD 16
POWER_OK SYS_SHDN# THM3_STP#
RESET# 2
2 nostuff
DN1 CPU2_THERMDC CPU1_THRMTRIP#
R121 0 10
FAN_MODE DP1
3 C129
25 0.47nF
FAN5_VDD FAN_1 CPU2_THERMDA

m
26 4 50V 10mil width and 10mil spacing.

n
FAN_2 DN2
28 5
FAN3_FDBACK# TACH DP2
13 6
CPU3_THRMTRIP# THERMTRIP# DN3

a
7

e
DP3 2 2
R122 0 9
SHDN_SEL P3.3V
P3.3V_AUX 11
TRIP_SET CLK_SEL
17 C186 MMBT3904 C264 MMBT3904
18 2.2nF 1 Q11 2.2nF 1 Q515
CLK_IN
8 50V
3 50V
3
NC_1
15 20 Line Width = 20 mil

S fid
R120 NC_2 GND R526
R1 200K 21 29 10K
NC_3 THRM_PAD
1% Opposite side of CPU. 1%
1209-001718 J510
HDR-3P-1R-SMD
R119 SMBUS Address 7Ah FAN5_VDD 1
R2 51.1K 2
1%
FAN3_FDBACK# 4
3
90 degree C MNT1
5
MNT2

n
R105 C524
5.11K 10000nF 3711-002613|head-btoc-3p-2_ng
1% 6.3V
B B

o
TRIP_SET pin voltage = (T-75)/21
3.3 * [R2/(R1+R2)] = (T-75)/21
T = 90 degree

C
A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 34 of 50


8-31
8-32

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS DDR SO-DIMM #0
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D
Array resistors & Single resistors used to improve layout & routing.
ME POWER RAIL UNDER ME ENABLE

MEM1_ADQ(63:0) P1.8V_AUX P0.9V

DDR501-2
DDR2-SODIMM-200P-STD MEM1_AMA(13:0)
2/2
DDR501-1 112
VDD1 VSS16
18
DDR2-SODIMM-200P-STD 111
VDD2 VSS17
24 0 R151 33

g
117 41 1 R160 33
MEM1_AMA(13:0)
1/2 96
VDD3
VDD4
VSS18
VSS19
53 2 R136 33
0 102
A0 DQ0
5 0 95
VDD5 VSS20
42 3 R141 33
1 101 7 1 118 54
A1 DQ1 VDD6 VSS21
2 100 17 2 81 59
A2 DQ2 VDD7 VSS22

n
3 99
A3 DQ3
19 3 82
VDD8 VSS23
65 4 R132 33
4 98 4 4 P3.3V_M for AMT 87 60 5 R144 33
A4 DQ4 VDD9 VSS24
5 97 6 5 103 66 6 R134 33

l
A5 DQ5 P3.3V VDD10 VSS25
6 94 14 6 88 127 7 R133 33
A6 DQ6 VDD11 VSS26
7 92 16 7 104 139

u
A7 DQ7 VDD12 VSS27
8 93 23 8 128
A8 DQ8 VSS28
9 91 25 9 199 145 8 R142 33
A9 DQ9 VDDSPD VSS29

a
10 105 35 10 165 9 R139 33
11 90
A10_AP DQ10
37 11 C578 83
VSS30
171 10 R161 33
A11 DQ11 1000nF-X5R NC1 VSS31

s i
C 12 89
A12 DQ12
20 12
6.3V
120
NC2 VSS32
172 11 R131 33
C
13 116 22 13 50 177
A13 DQ13 MEM1_VREF NC3 VSS33
86 36 14 69 187

t
A14 DQ14 NC4 VSS34
84
A15 DQ15
38 15 163
NCTEST VSS35
178 12 R140 33
MEM1_ABS2
85
A16_BA2 DQ16
43 16
VSS36
190 13 R156 33
45 17 1 9
DQ17 VREF VSS37
107 55 18 21
MEM1_ABS0 BA0 DQ18 C47 VSS38

m
106 57 19 201 33

n
MEM1_ABS1 BA1 DQ19 1000nF-X5R GND0 VSS39
44 20 202 155
DQ20 6.3V GND1 VSS40
110 46 21 34
MEM1_CS0# S0* DQ21 VSS41
115 56 22 47 132
MEM1_CS1# S1* DQ22 VSS1 VSS42

a
58 23 133 144 R152 33

e
DQ23 VSS2 VSS43 MEM1_CS0#
30 61 24 183 156 R163 33
CLK1_MCLK0 CK0 DQ24 VSS3 VSS44 MEM1_CS1#
32 63 25 77 168
CLK1_MCLK0# CK0* DQ25 VSS4 VSS45
164
CK1 DQ26
73 26 12 2 R143 33 nostuff
CLK1_MCLK1 VSS5 VSS46 MEM1_CKE0
CLK1_MCLK1#
166
CK1* DQ27
75 27 48
VSS6 VSS47
3
MEM1_CKE1
R135 33 nostuff
79 62 28 184 15

S fid
MEM1_CKE0 CKE0 DQ28 VSS7 VSS48
MEM1_CKE1
80
CKE1 DQ29
64 29 78
VSS8 VSS49
27
MEM1_ODT0
R154 33
DQ30
74 30 71
VSS9 VSS50
39
MEM1_ODT1
R162 33
113 76 31 72 149
MEM1_ACAS# CAS* DQ31 VSS10 VSS51
**NOTE AMT MODEL MEM1_ARAS#
108
RAS* DQ32
123 32 121
VSS11 VSS52
161
MEM1_ABS0
R159 33
MEM1_AWE#
109
WE* DQ33
125 33 122
VSS12 VSS53
28 MEM1_ABS1 R153 33
SMB3_CLK/DATA_M 135 34 196 40 R138 33
DQ34 VSS13 VSS54 MEM1_ABS2
R584 10K 1% 198
SA0 DQ35
137 35 193
VSS14 VSS55
138
R583 10K 1% 200
SA1 DQ36
124 36 8
VSS15 VSS56
150
MEM1_ACAS#
R157 33
SMB3_CLK_S
197
SCL DQ37
126 37
VSS57
162
MEM1_ARAS#
R155 33

n
SMB3_DATA_S
195
SDA DQ38
134 38
MEM1_AWE# R158 33
136 39
DQ39 0207617800
114 141 40
MEM1_ODT0 ODT0 DQ40
B MEM1_ODT1
119
ODT1 DQ41
143 41
MEM1_CKE0
R145 330 B
151 42 R137 330

o
MEM1_ADM(7:0) DQ42 MEM1_CKE1
0 10 153 43
DM0 DQ43
1 26 140 44
DM1 DQ44
2 52 142 45
DM2 DQ45
3 67 152 46
DM3 DQ46
4 130 154 47
DM4 DQ47

C
5 147 157 48
DM5 DQ48
6 170 159 49
DM6 DQ49 ME POWER RAIL UNDER ME ENABLE
7 185 173 50
DM7 DQ50
175 51
MEM1_ADQS(7:0)
0 13
DQ51
158 52
Place one cap close to every 2 pull-up resistors terminated to P0.9V
DQS0 DQ52 P0.9V
1 31
DQS1 DQ53
160 53 Place near SO-DIMM0
2 51 174 54 P1.8V_AUX
DQS2 DQ54
3 70 176 55
DQS3 DQ55 1000nF-X5R 1000nF-X5R
4 131 179 56 nostuff
DQS4 DQ56
5 148 181 57 EC1 C161 C177 C175 C156 C176 C178 C158 C180 C179 C160 C174 C157 C159 nostuff
DQS5 DQ57
6 169
DQS6 DQ58
189 58 220uF C554 C556 C547 C548 C549 C551 C555 C557 C550 nostuff
7 188 191 59 2.5V 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF nostuff
DQS7 DQ59 AD 6.3V 6.3V 6.3V 6.3V
180 60 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V nostuff
MEM1_ADQS#(7:0) DQ60
0 11 182 61
DQS*0 DQ61 1000nF-X5R 1000nF-X5R
1 29 192 62
DQS*1 DQ62 nostuff
2 49 194 63
DQS*2 DQ63 nostuff
3 68
DQS*3
4 129
DQS*4
5 146
DQS*5
6 167
DQS*6
7 186
A DQS*7 A

0207617800
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 35 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

02 VERIFY REAL MODE 66 CONFIGURE ADVANCE CACHE REG.


03 DISABLE NMI 6A DISPLAY EXTERNAL CACHE SIZE
D 04 GET CPU TYPE 6C DISPLAY SHADOW MESSAGE D
06 INIT. SYSTEM H/W 6E DISPLAY NON-DISPOSABLE SEGMENT
08 INIT. CHIPSET REG. 70 DISPLAY ERROR MESSAGE
09 SET IN POST FLAG 72 CHECK FOR CONFIGURATION ERROR
0A INIT CPU.REG 74 TEST REAL-TIME CLOCK
0B CPU CACHE ON 76 CHECK FOR KEYBOARD EERROR
0C INIT.CACHE TO POST 7C SETUP HARDWARE INTERRUPT VECTOR
OE INIT. I/O VALUE 7E TEST COPROCESSER IF PRESENT

g
0F ENABLE THE L-BUS IDE 80 DISABLE ON-BOARD I/O PORT
10 INIT. POWER MANAGER 82 DETECT AND INSTALL EXT.RS232C
11 LOAD ALTERNATE REG. 84 DETECT AND INSTALL EXT.PARALLEL

n
13 PCI BUS MASTER RESET 86 RE-INIT. ON-BOARD I/O PORT
WITH INITIAL POST VALUE 88 INIT. BIOS DATA ROM

l
P3.3V P3.3V P3.3V 14 INIT. KEYBOARD CONTROLLER 8A INIT.EXTENDED BIOS DATA AREA

u
16 CHECK CHECKSUM 8C INIT. FDD CONTROLLER

a
18 8254 TIMER INIT. 9A SHADOW OPTION ROMS

R24
s i
C 1A 8237 DMA CONTROLLER INIT. 9C SETUP POWER MANAGEMENT C
R17

R21

R23

1C RESET INTERRUP CONTROLLER 9E ENABLE H/W INTERRUPT

t
20 TEST DRAM REFRESH A0 SET TIME OF DAY

10K
U5
22 TEST 8742 KEYBOARD CONTROLLER A4 INIT. TYPEMATIC RATE
10K

10K

10K

MX25L8005M2C-15G

m
5 2 R22 33

n
SPI3_DO D Q SPI3_DI 24 SET ES SEGMENT REG. TO 4GB A8 ERASE F2 PROMPT
6
SPI3_CLK C
SPI3_CS#
1
S* 26 ENABLE A20 AA SCAN FOR F2 KEY STROKE
7
HOLD* 28 AUTO SIZING DRAM AC ENTER SETUP

a
R18 0 3

e
CHP3_BIOSWP# W*
R19

8 4
VCC VSS 32 COMPUTE THE CPU SPEED AE CLEAR IN POST FLAG
1107-001646 34 TESET CMOS RAM B0 CHECK FOR ERRORS
C8
100nF 38 SHADOW SYSTEM BIOS ROM B2 POST DONE-PREPARE TO BOOT O/S

S fid
100K

10V
nostuff 3A AUTO SIZING CACHE B4 ONE BEEP
3C CONFIGURE ADVANCED CHIPSET REG. B6 CHECK PASSWORD (OPTION)
3D LOAD ALTER REG. WITH CMOS VALUE B7 ACPI INIT
42 INIT. INTERRUPT VECTOR BA DMI INIT
44 INIT. BIOS INTERRUPT BE CLEAR SCREEN

n
46 CHECK ROM COPYRIGHT NOTICE C0 TRY BOOT WITH INT19
47 INIT. I20 SUPPORT IF INSTALLED D0 INTERRUPT HANDLER ERROR
B B
48 CHECK VIDEO CONFIGURE AGAINST CMOS D2 UNKNOWN INTERRUPT ERROR

o
49 INIT. PCI BUS AND DEVICE D4 PENDING INTERRUPT ERROR
4A INIT. ALL VIDEO BIOS ROM D6 SHUTDOWN 5
4C SHADOW VIDEO BIOS ROM D8 SHUTDOWN ERROR

C
50 DISPLAY CPU TYPE AND SPEED DA EXTENDED BLOCK MOVE
52 TEST KEYBOARD
DC SHUTDOWN 10
54 SET KEYCLICK IF ENABLED
89 ENABLE NMI
56 ENABLE KEYBOARD 90 INIT. HDD CONTROLLER
58 TEST FOR UNEXPECTED INTERRUPTS 91 INIT. LOCAL BUS HDD CONTROLLER
5A DISPLAY " PRESS ...... SETUP" 92 JUMP TO USER PATCH 2
5C TEST RAM GETWEEN 512K AND 640K 94 DISABLE A20 ADDRESS LINE
60 TEST EXTENDED MEMORY 96 CLEAR HUGE ES SEGMENT REG.
62 TEST EXTENDED MEMORY ADDRESS LINE 98 SEARCH FOR OPTION ROMS
64 JUMP TO USER PATCH 1

A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 36 of 50


8-33
8-34

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

HSDPA / WIBRO, 7mm

g
P3.3V

P3.3V P3.3V
C289

n
10000nF
C244 C243
P3.3V 100nF 100nF
6.3V

l
P1.5V
J520

u
EDGE-MINIPCI-E-52P R629
1 2 10K Mini PCI Express Card
WAKE* P3.3V_1

a
3 4
RSVD_1 GND_1 30.00 mm
5 6
RSVD_2 P1.5V_1

s i
7 8
C 9
CLKREQ* SIM_VCC_C1
10
SIM3_C1VCC C
11
GND_2 SIM_DATAIO_C7
12 SIM3_C7DATA

50.95 mm

48.05 mm
t
13
REFCLK- SIM_CLK_C3
14
SIM3_C3CLK Top
15
REFCLK+ SIM_RESET_C2
16 SIM3_C2RST
GND_3 SIM_VPP_C6 SIM3_C6VPP
Pin 1
17 18 nostuff
SIM_RSVD_C8 GND_4

m
19 20 R626 0

n
SIM_RSVD_C4 W_DISABLE* KBC3_RFOFF#
21 22 R625 0 Odd Pins : Top side
23
GND_5 PERST*
24 CHP3_PCIRST1#
PERN0 P3.3V_AUX Even Pins : Bottom Side
25 26
PERP0 GND_6

a
27 28

e
GND_7 P1.5V_2
29 30
GND_8 SMB_CLK
31 32
PETN0 SMB_DATA
33 34
PETP0 GND_9
35 36
P3.3V 37
GND_10 USB_D-
38 USB3_P4-

S fid
39
RSVD_11 USB_D+
40
USB3_P4+
RSVD_12 GND_11
41 42
RSVD_13 LED_WWAN*
43 44
RSVD_14 LED_WLAN*
45 46
47
RSVD_15 LED_WPAN*
48
SIM3_C4DET#
RSVD_16 P1.5V_3
49 50
RSVD_17 GND_12
51 52
RSVD_18 P3.3V_2
53
MNT1

n
54
MNT2

B 3709-001498 B

C o M3
HEAD
DIA
LENGTH
BA61-01090A

For SIM card Sub Board


M4
HEAD
DIA
LENGTH
BA61-01090A
M5
HEAD
DIA
LENGTH
BA61-01090A

A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 37 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
MICOM RESET
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P5.0V P3.3V_AUX
P3.3V_MICOM P5.0V KBC3_RST#

100 1%
VDC P3.3V_MICOM D 3
P3.3V_MICOM Q541
D G RHU002N06 D
U514 1

R683
10K 1%
10K 1%

TPS3809 S 2
1 R673 R682
GND Q540
C641 C640 C657 3
VDD 300K R680 4.7K
100nF 100nF 100nF 2 1% 47K BSS84
RESET*
R679 47K

2
1203-002364 R684
C674

S
C665
R643
R642

100K R672
100nF 100nF D 3

1
G
10V nostuff
100K
25V 1% Q539
G RHU002N06 THM3_STP#
R620 1 R681 10kohm pull-up to P3.3V_AUX

g
KBC3_RST# 10K R678 S 2 C673 100K should be at the thermal sensor side.
1% 1% 150K 10nF 1%
KBC3_CHKPWRSW# 10K 1% 25V
KBC3_MD R619

n
100

36
37
59
7
1

6
5

4
9

l
NMI
RES*
RESO*

VCC_1
VCC_2
VCC_3

MD0
MD1

VCCB
VCL

STBY*
nostuff nostuff nostuff nostuff nostuff

u
48 49 nostuff
THM3_ALERT# 47
PA0 P40
50 KBC3_RSMRST# nostuff
PA1 P41 KBC3_SUSPWR
FOR MICOM UPDATE

a
31 51
KBC5_TCLK 30
PA2 P42
52 KBC3_MEMON
KBC5_TDATA PA3 P43 KBC3_BKLTON

s
POWER SWITCH BLOCK WHILE MICOM UPDATE

i
C KBC3_SCLED# 21
PA4 P44
53 INSTPAR SHT2 KBC3_PWRBTN# C
20 54 P3.3V_MICOM
KBC3_NUMLED# 11
PA5 P45
55 KBC3_VRON P3.3V

t
KBC3_CAPSLED# 10
PA6 P46
56
KBC3_BLCKPWRSW#
PA7 P47 KBC3_CPURST# P3.3V
91 14 R648
KBC3_EXTSMI# 90
PB0 P50
13
KBC3_LED_ACIN#
KBC3_RUNSCI# PB1 P51 KBC3_LED_CHARGE# R231 10K

m
81 12 1%

n
KBC3_USBPWRON# PB2 P52 KBC3_SMCLK# 20K R647 R649
80 1% R615 100K 10K
KBC3_CHG4.2V 69
PB3
26 1% 1% KBC3_CHKPWRSW#
KBC3_RFOFF# PB4 P60 VRM3_CPU_PWRGD 10K
68 27
KBC3_LED_POWER# PB5 P61 LID3_SWITCH# 3 C644

a
58 28 D

e
KBC3_PWRGD 57
PB6 U12 P62
29
KBC3_PRECHG 330nF
KBC3_PWRON PB7 P63 Q525 10V
32 G RHU002N06
KBC5_KSI(0:7) 0 79 H8S-2110B P64
33
KBC3_CHGEN KBC3_BLCKPWRSW#
P10 P65 BAT3_DETECT# 1
1 78 34 S 2
2 77
P11 P66
35 CHP3_SLPS3# C620

S fid
P12 0903-001439 P67 KBC3_BRIT KBC3_PWRSW#
3 76 100nF
4 75
P13
38 8 KBC5_KSO(8:15) 10V
P14 P70
5 74 39 9
P15 P71
6 73 40 10
P16 P72
7 72 41 11
P17 P73
42 12
KBC5_KSO(0:7) 0 67
P74
43 13
P20 P75 P3.3V P3.3V_MICOM
1 66 44 14
P21 P76
2 65 45 15
P22 P77

n
3 64
P23
4 63 93 R232
5 62
P24 P80
94
KBC3_WAKESCI#
P25 P81 KBC3_A20G 10K
B 6 61
P26 P82
95
PCI3_CLKRUN#
1% B
7 60 96 R616

o
P27 P83
97 10K
LPC3_LAD(0:3) 0 82
P84
98 KBC3_TX
1 83
P30 P85
99
KBC3_RX_CHG2200 P3.3V
2 84
P31 P86 KBC3_LANPME#
P32
3 85 25
P33 P90

C
86 24 R614
LPC3_LFRAME# 87
P34 P91
23 KBC3_CHKPWRSW#
CHP3_PCIRST0# P35 P92 ADT3_SEL# 10K
88 22 1/16W
CLK3_PCLKMICOM 89
P36 P93
19 KBC3_SPKMUTE
CHP3_SERIRQ P37 P94
18
CHP3_SUSSTAT#
P95 CHP3_SLPS5#

G
2 17
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5

2
3
XTAL P96
16
PEX3_WAKE#
EXTAL P97 KBC3_SMDATA# 9-D1

D
Y503 KBC3_THERM_SMDATA# KBC3_SMDATA#

3
19-A3,27-A1

4
15
46
70
71
92

2801-004200
1

P3.3V_MICOM Q516-1

G
5
SM6K2
10MHz nostuff
C622 C621 9-D1

D
0.018nF KBC3_THERM_SMCLK# 19-B3,27-A1
KBC3_SMCLK#

1
0.018nF
D511 Q516-2
BAV99LT1
SM6K2
2 1
P3.3V_MICOM 3

J3
A HDR-4P-1R-SMD KBC3_PWRSW# A
TP23242
KBC3_MD 1
KBC3_TX 2 KBC3_MD
1
MODE0 C645
KBC3_RX_CHG2200 3 KBC3_TX
2
3
TX
R644 300K 1%
100nF
10V
SAMSUNG
4 KBC3_RX_CHG2200 RX BAT3_DETECT#
5 4 R617 4.7K ELECTRONICS
6
MNT1 GND
R618 4.7K KBC3_SMDATA#
MNT2 KBC3_SMCLK#
For Production

4 3 2 1

SRP Sheet Number: 38 of 50


8-35
8-36

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1 PORT USB CONNECTOR


D D

g
P5.0V_AUX

10V
n
U4
100nF
C513 TPS2062 Need 2A Routing

l
2 nostuff
IN
7

u
OUT1
8
OC1*
5 6 EC503
OC2* OUT2

a
3 C521 100uF C523 C522
USB3_PWRON# 4
EN1*
1 100nF 100nF 0.033nF
16V
EN2* GND

s i
10V AS 10V 50V
C C
1205-002596

t
J509
JACK-USB-4P

m
1

n
USB3_P5+_R GND
R15 0 2
USB3_P0+ R16 0 3
DATA+
USB3_P0- 4
DATA-
USB3_P5-_R PWR

a
5

e
MNT1
2 3 6
MNT2
7
MNT3
8
MNT4
1 4 nostuff

S fid
B3 3722-002792
ACM2012-900-2P-T

o n B

C
ON / OFF Control

R238 0
KBC3_USBPWRON# USB3_PWRON#

A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 39 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

USB I/F Devices


D D

Bluetooth Interface CAMERA

n g l
C P3.3V

s u t i a P5.0V
C

m n
C511 C512
100nF 100nF
C659 10V 10V

a
100nF

e
10V

J522 B4 J506
HDR-4P-SMD ACM2012-900-2P-T HDR-4P-1R-SMD
1 4

S fid
1 1
USB3_P5- 2 USB3_P3- 2
USB3_P5+ 3 USB3_P3+ 3
4 4
5 2 3 5
MNT1 MNT1
6 6
MNT2 MNT2
3711-000922
3711-000456

o n B

C
A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 40 of 50


8-37
8-38

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

n g l
80H DECODER CONNECTOR

s u t i a P3.3V

J515
HDR-10P-1R-SMD
C

m n
1
2
CHP3_PCIRST0# 3
CLK3_DBGLPC 4

a e
LPC3_LFRAME# 5
LPC3_LAD(3) 6
LPC3_LAD(2) 7
LPC3_LAD(1) 8
LPC3_LAD(0) 9

S fid
10
11
MNT1
12
MNT2
3711-000386

o n B

C
A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 41 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

VCC_CRT P5.0V
D506
MMBD4148
3 1

C559
100nF
U506 10V
SN74AHCT1G125DCKR
5

g
CRT3_HSYNC 2 +
-
4 R563 40.2 5%
CRT5_HSYNC
OE*
3
1

VCC_CRT

u n a l
s i
C P5.0V C
U505 C558

t
100nF
SN74AHCT1G125DCKR
10V
1
5
2 + 4 R562 40.2 5% MMBD4148
CRT3_VSYNC - CRT5_VSYNC

m
OE* D505

n
3
3
1

a
BLM18PG181SN1

e
B506

C579

S fid
P3.3V P3.3V VCC_CRT CRT CONNECTOR 100nF
10V J514
DSUB-15-3R-F
L506 82nH 1
CRT3_RED 6
R590 R589
G

11
1

4.7K 4.7K 82nH


L503 2
CRT3_GREEN 7
S

CRT3_DDCDATA CRT5_DDCDATA 12

1%
2

1%

1%
82nH

n
L502 3
RHU002N06
Q509

CRT3_BLUE 8

150

150

150
0.0033nF

0.0033nF

0.0033nF
13
B B

1
4
C595 C594 C582 9

PGB1010603NR
D509

PGB1010603NR
D508

PGB1010603NR
D507
o
0.0033nF 0.0033nF 0.0033nF 14
50V 50V 50V 5 16

R597

R586

R585

2
C593

C581

C580
50V 50V 50V 10 17
P3.3V P3.3V VCC_CRT 15

nostuff
nostuff
nostuff
nostuff
nostuff
nostuff

R587 R588 3701-001403


G
1

4.7K 4.7K
CRT5_DDCDATA
S

CRT3_DDCCLK CRT5_DDCCLK CRT5_DDCCLK


2

CRT5_HSYNC
RHU002N06
Q508

CRT5_VSYNC

270pF

270pF

0.1nF

0.1nF
C584

C583
C569

C568
50V 50V 50V 50V

A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 42 of 50


8-39
8-40

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

KEYBOARD

n g l
u
KBC5_KSI(0:7)

s i a
C C

m n t
KBC5_KSO(0:15)
J2
FPC-KBD-25P
1

a e
2
3
4
5
6

S fid
7
8
9
10
11
12
13
14
15
16

n
17
18
19
B 20
B

o
21
22
23
24
25
26
MNT1

C
27
MNT2
3708-002166

A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 43 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

TOUCHPAD

P5.0V

n g l
u
SW2
SW-TACT-4P

a
1 3
C198 T_R_BUTTON#

s i
1nF 2 4
C 50V P5.0V C
3

t
3404-001311
2 1

J1 BAV99LT1
CONN-6P-FPC nostuff D514

m n
1
KBC5_TCLK 2
T_L_BUTTON# 3
T_R_BUTTON# 4

a e
KBC5_TDATA 5
6
7
MNT1
C197 8
MNT2 SW1
1nF SW-TACT-4P
50V 1 3

S fid
3708-002402 T_L_BUTTON#
2 4
P5.0V
3
3404-001311
2 1

BAV99LT1
nostuff D513

o n B

C
A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 44 of 50


8-41
8-42

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

LED1
LTST-C193TBKT-AC

n g l
P3.3V
ADAPTERIN/CHARGING LED

u
R674 475
KBC3_NUMLED#

a
1% BSS84
2

1 P3.3V_MICOM Q20 LED6

s i
LTST-C195KGJRKT
C R250 475 1% C

3
1 G 3

D
S
t
2 R 4

1
G
LED2 R252 10K 1%
LTST-C193TBKT-AC KBC3_LED_ACIN#
R675 475 BSS84
KBC3_CAPSLED# P3.3V_MICOM

m
1% Q17
2

n
R244 475 1%

3
2

D
S
a

1
G
e
R248 10K 1%
LED3 KBC3_LED_CHARGE#
LTST-C193TBKT-AC
R676 475
KBC3_SCLED# 1%
2

S fid
P3.3V_AUX

LED4 U13
5 7SZ14
LTST-C193TBKT-AC
KBC3_LED_POWER# 2 + 4 R261 475 1% 1 2
R677 475 -
CHP3_SATALED# 1% 3
2

LED7
R253 LTST-C193TBKT-AC
1M

n
1%
LED5
LTST-C193TBKT-AC
B C301 B
R260 475 1000nF

o
WLON_LED# 1% 6.3V
2

C
A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 45 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_AUX & P5V_AUX & P1.5V_AUX & P3.3V_MICOM

D D
TONSEL FLOATING
5V / 3.3V : 280KHz / 430KHz P5.0V_FILT

DUTY MAX=87%
C676 R687 R688 R691 C302 R690
0.022nF 27.4K 0 0.18nF 51.1K
50V
0
1% 50V 1%

VDC nostuff nostuff VDC


R262 R689
11.8K
C677 12.7K

g
1% 1nF 1%
G_P3.3V 50V
EC510 C298
EC4 15uF C297
C666 C667 G_P3.3V G_P3.3V 4700nF-X5R
1nF
15uF 4700nF-X5R
G_P3.3V 25V 25V

n
1nF 50V
25V 25V
50V
R694

l
C670 P5.0V_ALW P5.0V_FILT
0

8
7
6
5
4
3
2
1
nostuff 4700nF-X5R
nostuff

u
25V

VO2
COMP2
VFB2
GND
VREF2
VFB1
COMP1
VO1
5 6 7 8

a
8 7 D1 33 R693 0 D1 D2 D3 D4
( 3.32V @ 4.5A ) P3.3V_AUX D2 PAD
Q537-1 9 Q23
EN5

s i
L507 G 10 32

G_P3.3V
C AP4232GM C675 EN3 SKIPSEL AP6680AGM P5.0V_AUX ( 5.02V @ 5.5A) C
3.3uH 1 S 2 100nF R685 11 31 C671 G
PGOOD2 TONSEL
25V 3.3 12 U515 30 100nF 4 L3

t
EN2 PGOOD1
13 29 25V S1 S2 S3 4.7uH
PCMC063T-3R3MN 6 5 D1 14
VBST2 EN1
28 R696 3.3 1 2 3
D2 DRVH2 TPS51120RHBR VBST1
EC509 R663 R664 15 27 5 6 7 8
C664 G 16
LL2 1203-004687 DRVH1
26 D1 D2 D3 D4
PCMC063T-4R7MN
330uF 100nF 10 10 DRVL2 LL1

m
25

n
6.3V 3 S 4
25V DRVL1 C279 EC3

PGND2

PGND1
VREG3

VREG5
AL Q537-2

V5FILT
R240 R239 100nF 330uF
18 mohm AP4232GM

CS2

CS1
G 10 10

VIN
25V 6.3V
2402-001120 C658 4 AL
Q15

a
1nF S1 S2 S3 18 mohm

e
AP6680AGM 1 2 3

17
18
19
20
21
22
23
24
50V RdsOn Max=32mohm, Typ=24mohm 2402-001120
C288
1nF
50V
R257

S fid
R698
P5.0V_ALW P3.3V_MICOM 14.7K 10K
P5.0V_ALW
1% 1% RdsOn Max=16.5mohm, Typ=13.5mohm

R686
100K R697 C669
1% P5.0V_FILT
5.1 1000nF
C668
10000nF-X5R
1% 6.3V
19-C3,28-A4
KBC3_SUSPWR
10V
C300 R692

n
P5.0V_ALW 2203-006361
47K
1000nF C299
6.3V
10000nF-X5R
10V
B R695 2203-006361 B
100K

o
G_P3.3V
P1.5V_AUX 1%

P5.0V_AUX OCP : 8.5A


G_P3.3V

P3.3V_AUX OCP : 6.9A


P1.5V_AUX_PWRGD

C
28-A3

P5.0V_AUX P1.5V_AUX P5.0V_AUX


(1.537V @ 0.3A )
U504
RT9179GB INSTPAR
1 5 R557 R582 SHT11
R561 1K 1% IN OUT
3 130K 30.1K
KBC3_SUSPWR 2
EN
4 1% 1%
19-C3,28-B1
C196 GND ADJ R558 R559
10nF 10K 130K P1.5V_AUX_PWRGD
1203-005591 1% 1% 28-B1
16V C565 D 3
C567 10000nF-X5R
Q507
4700nF 10V
G RHU002N06 C220 G_P3.3V
6.3V 10nF
1 16V
C566 3
R560 C564
S 2
1nF 30.1K 1 10K
10nF
50V 1%
16V
10K
Q506
KSR1102 2
A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 46 of 50


8-43
8-44

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D
VCCA (1.5V) D

P3.3V VCCA P3.3V

U509 (1.537V @ 0.3A )


RT9179GB
1 5 R556 R555
IN OUT
3 130K 30.1K
EN
2 4 R579 R580 1% 1%
GND ADJ
10K 130K VCCA_PWRGD

g
1203-005591 1% 1% 29-B2
D 3
C577 C576 Q505
4700nF 10000nF-X5R
G RHU002N06
6.3V 10V C562
1 10nF

n
C575 3 S
R581 C563 2 16V
1nF 30.1K 1 10K
10nF
50V 1%

l
16V
10K
Q504

u
KSR1102 2

s i a
C C

m n t
a e
P1.5V VCCP(1.05V)

P5.0V
P5.0V_AUX

C229 C228
1
U8
ISL8014IRZ-T
VIN_1

S fid
LX_1
14
L1
0.82uH
PCMC063T-R82MN
P1.5V ( 1.504V @ 4A ) P5.0V_AUX

C588 C587
1
U510
ISL8014IRZ-T
VIN_1 LX_1
14
L505
0.82uH
PCMC063T-R82MN
P1.05V
( 1.053V @ 4A )

n
2 15 EC2 22000nF-X5R 22000nF-X5R
2 15
22000nF-X5R 22000nF-X5R VIN_2 LX_2 C238 C230 C231 nostuff VIN_2 LX_2
C603 C601 C600
20% 20% R204 22000nF-X5R 22000nF-X5R 220uF 20% 20% R606 22000nF-X5R 22000nF-X5R
6.3V 3 0.047nF 2.5V 6.3V 6.3V 3 0.047nF
R202 6.3V
VDD 121K 50V 20% 20% 19-C3 R192 0 VDD 150K 20% 20%
B 1% 6.3V AD 50V 6.3V B
10K 6.3V KBC3_VRON 1% 6.3V
nostuff

o
19-B4,30-A3
32-C4 5 12 FB Ref =0.8V 29-D2 5 12
KBC3_PWRON R201 1K 1%
EN PGND_2 VCCA_PWRGD EN PGND_2 FB Ref =0.8V
C236 11 P3.3V R594 C589 11
PGND_1 PGND_1
1nF 1K 1nF
50V P3.3V_AUX R205
1% 50V R605

C
7 130K 7 475K
PG 1% R595 PG 1%
10K
R203 8 8
VFB 31-A2
VFB
10K VCCP_PWRGD
4 R206 4
30-B3,32-A4
SYNCH C604 P5.0V_AUX SYNCH
P1.5V_PWRGD 7.5K 10nF
9 1% 9
C237 P5.0V_AUX 6
SGND_1 16V nostuff 6
SGND_1
10nF NC_1 NC_1
10 R593 10
16V nostuff SGND_2 SGND_2
13 0 13
NC_2 NC_2
R193
0 16 17 16 17
NC_3 EP NC_3 EP
1203-005382 R592 1203-005382
0
R200
0

A A

SAMSUNG
ELECTRONICS

4 3 2
COM-22C-015(1996.6.5) REV. 3 D:/users/mobile23/Brighton/Brighton_adv1_080906_01/design_blocks/PWR_MV_Cantiga_Int
SRP Sheet Number: 47 of 50
NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CHARGER & POWER MANAGEMENT
VDC_ADPT
D504
B340A nostuff VDC
1 2
Q8-2
J513 B13
D AP4957AGM D

D2

D2
HDR-4P-1R

5 6

8
HU-1M2012-121JT
R62 0.033 1 8

1
D1 7
1 S1 D1

D1
S

S
EMI 1W 2 7
2 HU-1M2012-121JT C22 C48 1% S2 D2
C49 C89 3 6

2
R66

G
3 100nF R64 100nF EC504 C45 C14 C44 S3 D3
B8 10nF 100K 1000nF 300K R55 R38 15uF 4 5
4 25V 25V 25V 25V 4700nF-X5R 4700nF-X5R100nF G D4
5 1% 1% 2.2 22
MNT1 25V 25V 25V 25V
6
MNT2 Q7
Q8-1 AP4435GM
3711-007003 R65 AP4957AGM R63 C37 100nF
100K 43.2K
P3.3V_MICOM
1% 1% 25V

R103 BGATE
3

g
D
10K
G
C9 1
EMI 100nF S Q9
2

n
25V RHU002N06
ADT3_SEL#
VCHG=12.597V

l
IPRECHG=0.27A

u
ICHG=1.50A FOR 2200mAh D 3
R26 R104
ICHG=2.56A FOR 5200mAh 0 0

a
ICHG=2.56A FOR 6000mAh Q4 G Q6-2
1 S AP4232GM
SI2307BDS-T1-E3 2 nostuff nostuff HU-1M2012-121JT To enhance

s
D1 5 6

i
C D2
R531 B6 DMB performance (060310) C
G
L501 0.02

t
S
8.2uH 1W 3711-006037
4 3 PCMB063T-8R2MS 1%
5
C527 4

4700nF-X5R

4700nF-X5R
4700nF-X5R
VREF BGATE VDC_ADPT VDC D1 7 8 HU-1M2012-121JT

4700nF-X5R
100nF R41 R40 3

m
D2
B7

n
10 10 R34 R33

100nF 25V
nostuff 25V D501 G
2
BAT54A
22 22 1
R524 R12 R27 R28 2 S
1

25V

25V

25V

25V
470K
200K 300K 300K 300K BATT-CONN-5P
1% 1% G_CHG

a
1% 1% C13 J508

2
e
1nF C20 C21
15.15V@1.264V 50V C11 1nF 1nF
C10 47nF 50V 50V

3
R523 R11 10nF R29

R42

C15
C19

C18

C17

C16
16V B502
150K 30.1K 16V 27.4K C530 EMI
1% 1% 1% U502

S fid
BLM18PG181SN1

1
1000nF
25V ISL6256AHRZ-T Q6-1
19 20 AP4232GM nostuff BAT3_DETECT#
CSIP CSIN
C532
G_CHG G_CHG 18 17 0.1nF
G_CHG SGATE BGATE 50V
25
DCIN C529 B503
(1.26V) 27 100nF BLM18PG181SN1
ACSET
28 R530 25V
DCSET
14 3.3
BAT3_SMDATA#
C526 BOOT
R522 1000nF 15 C533
G_CHG

UGATE

n
10K 25V R30 5.1 13
VDDP PHASE
16 0.1nF
50V
1% 1% 26 12 B504
VDD LGATE
11 BLM18PG181SN1
PGND VREF ( 2.39V )
B 7
CHLIM BAT3_SMCLK# B
9 21

o
Q3 D 3 VADJ CSOP
RHU002N06 8
ACLIM CSON
22 C534
5 0.1nF
R13 10K ICM 50V
G 6
KBC3_PRECHG VREF
2.058V @ VCELL to 4.35V

1 R10 1
EN
S 2 121K VREF VREF

C
1% 3 2
ICOMP CELLS
4 10 R529
VCOMP GND
R37 R525 1K
P3.3V_MICOM
24.3K 150K 23 29 1%
C520 ACPRN THERM
1% R521 C518 10nF
24
DCPRN KBC3_CHGEN
G_CHG 0.1% 6.8nF
100 16V
Q2 50V 1203-004471 C528

BAV99LT1

BAV99LT1
RHU002N06 D 3 1nF

2
R36 R35 R14 R32
KBC3_RX_CHG2200 30.1K 200K 47K 0 50V
R25 10K 1% 1% nostuff

D502

D503
G
C519 R520
0.1%

3
1 100nF 10K
S 1% G_CHG
2 25V

1
G_CHG G_CHG G_CHG P3.3V_MICOM G_CHG G_CHG
D 3
G_CHG Q5 G_CHG G_CHG
10K R39 G RHU002N06
KBC3_CHG4.2V 1% R31
1 20K
1.237V @ VCELL to 4.206V S 2 1%
BAT3_SMDATA# R532 100 1%
KBC3_SMDATA#
ADT3_SEL# R540 100 1%
A (ACTIVE LOW)
BAT3_SMCLK# KBC3_SMCLK# A
G_CHG SHT1
INSTPAR SAMSUNG
ELECTRONICS

G_CHG

4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/mobile23/Brighton/Brighton_adv1_080906_01/design_blocks/PWR_MV_Charger_Isl6256a
SRP Sheet Number: 48 of 50
8-45
8-46

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

WLAN, 7mm

g
P3.3V
P3.3V P3.3V

P3.3V

n
R641
10K

l
1%
J519 P3.3V P3.3V

u
EDGE-MINIPCI-E-52P
1 2
WAKE* P3.3V_1

a
3 4
RSVD_1 GND_1
5 6
RSVD_2 P1.5V_1 C278 C262

s i
C MIN3_CLKREQ#
7
CLKREQ* SIM_VCC_C1
8 10000nF
C639 C602 10000nF
C263 C
9 10 100nF 100nF 100nF
GND_2 SIM_DATAIO_C7 6.3V 6.3V
11 12

t
CLK1_MINIPCIE# 13
REFCLK- SIM_CLK_C3
14
CLK1_MINIPCIE 15
REFCLK+ SIM_RESET_C2
16
GND_3 SIM_VPP_C6
17 18
SIM_RSVD_C8 GND_4

m
19 20

n
21
SIM_RSVD_C4 W_DISABLE*
22 R613 0 KBC3_RFOFF#
23
GND_5 PERST*
24 CHP3_PCIRST1#
PEX1_MINIRXN0 25
PERN0 P3.3V_AUX
26 R612 0
PEX1_MINIRXP0 PERP0 GND_6 CHP3_PCIERST0#

a
27 28

e
GND_7 P1.5V_2
29 30
GND_8 SMB_CLK
31 32
PEX1_MINITXN0 33
PETN0 SMB_DATA
34
PEX1_MINITXP0 35
PETP0 GND_9
36
37
GND_10 USB_D-
38 Mini PCI Express Card WLON_LED#

S fid
RSVD_11 USB_D+
39 40 30.00 mm
RSVD_12 GND_11 3
41 42 D
RSVD_13 LED_WWAN*
43 44 Q517
RSVD_14 LED_WLAN*
45 46 G RHU002N06
RSVD_15 LED_WPAN* KBC3_RFOFF#

50.95 mm

48.05 mm
47 48 1
RSVD_16 P1.5V_3 Top
49 50 S 2
RSVD_17 GND_12
51 52
RSVD_18 P3.3V_2
Pin 1
53
MNT1

n
54
MNT2
Odd Pins : Top side
Even Pins : Bottom Side
B 3709-001498 B

C o M501
HEAD
DIA
LENGTH
BA61-01090A
M2
HEAD
DIA
LENGTH
BA61-01090A
M1
HEAD
DIA
LENGTH
BA61-01090A

A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 49 of 50


NC20
NC20

8. Block Diagram and Schematic

- This Document can not be used without Samsung's authorization -


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

SATA I/F CONN

n g l
SATA HDD CONN

u a
JHDD501
HDD-22P-SMD

s i
S1
C S2
GND1 C
SAT1_TXP0 S3
RX+

SIGNAL
t
SAT1_TXN0 S4
RX-
GND2
S5
SAT1_RXN0 S6
TX-
SAT1_RXP0 S7
TX+
GND3

m n
P1
P3.3V 3.3V_1
P2
3.3V_2
P3
3.3V_3

a
P4

e
GND4
P5
C552 C542 GND5
nostuff
10000nF
C546 100nF
P6
GND6
1nF P7

POWER
6.3V 10V 5V_1
50V P8
5V_2
P9

S fid
5V_3
P10
GND7
P11
RESERVE
P12
P5.0V GND8
P13
12V_1
P14
nostuff 12V_2
P15
12V_3
C544 C541 C540 C543 C545 M1
100nF 10000nF 10000nF 100nF 100nF MNT1
M2
10V 6.3V 6.3V 10V 10V MNT2

n
3710-002736
B B

C o
A A

SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 50 of 50


8-47
www.s-manuals.com

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