Reg. No.

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Name :

Final Assessment Test (FAT) - November 2018

Programme : B. Tech (ECE&ECM) Semester : FS 2018-19
Course : Analog Electronic Circuits Code : ECE2002
Class Nbr : 1296,1298,1302
Faculty : Dr. A Brintha Therese, Dr. B Lakshmi, Dr .B. Slot : B1
Nagajayanthi
Time : 3 hours Max. Marks : 100

Answer ALL the Questions

a. With the help of a small signal equivalent circuit of a diode, plot the frequency
response characteristics of the diode. [6]
1.

b. Compare and contrast the diffusion and transition capacitances associated with the PN
[4]
diode
2. For the circuit shown in Figure 1, the transistor parameters are β = 120, VBE (on) = 0.7
V, and VA = 50 V. (i) Design a bias-stable circuit such that IEQ = 1.5 mA. (ii) Using the
results of part (i), find the small-signal midband voltage gain. (iii) Determine the
output resistance Ro. (iv) What is the lower 3 dB corner frequency?

[10]

Figure 1
3. a. Deduce an expression for short circuit current gain and unity gain bandwidth of a
[5]
MOSFET amplifier.
b. For the FET circuit shown in Figure 2, the transistor parameters are: Kn = 1 mA/V2, VT
N = 2 V, λ = 0, Cgs = 50 fF, and Cgd = 8 fF. (i) Draw the simplified high-frequency
equivalent circuit. (ii) Calculate the equivalent Miller capacitance. (iii) Determine the [10]
upper 3 dB frequency for the small signal voltage gain and find the midband voltage
gain.

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 Figure 2

4. a. Calculate maximum ac output power in the amplifier shown in Figure 3 (Assume VBE [7]
= 0)

Figure 3

b. Find out the value of resistor R2 to provide trickle current for distortion free output in [8]
the push pull amplifier shown in Figure 4 VBE for each transistor is 0.7V.

Figure 4

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5. In a particular cascaded current mirror, as shown in Figure 5, all the transistors have [10]
VTN=0.6V, μnCox=160μA/V2, L=1μm, and VA=10V. Widths W1=W4=4μm, and
W2=W3=40μm.The reference current IREF is 20 μA. What is the output current? What
are the voltages at the gates of Q2 and Q3? What is the lowest voltage at the output for
which current source operation is possible? What are the values of gm and ro of Q2 and
Q3? What is the output resistance of the mirror?

Figure 5

6 a. Sketch a simple MOSFET differential amplifier with an active load and deduce its [7]
small signal differential mode voltage gain

b. (i) Design the circuit shown in Figure 6 such that vO = vD1 − vD2 = 1 V when v1 = −50 [10]
mV and v2 = +50 mV. The transistor parameters are VT N = 0.8 V, Kn = 0.4 mA/V2,
and λ = 0. (ii) Using the results of part (i), determine the maximum common-mode
input voltage

Figure 6
7. a. Show that in RC phase oscillator, gain of the feedback network must be greater than [10]
1/29. Design the oscillator which uses current series feedback with a frequency of
oscillation of 2 KHz
b. Give an example circuit for an ideal shunt–series configuration of negative feedback [8]
amplifiers. With suitable sketches, derive the gain with feedback, input resistance with
feedback and output resistance with feedback.

8. Discuss the issues involved in the fabrication of IC design over analog discrete [5]
components

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