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Microcontroller
Microcontroller versus general-purpose
microprocessor
Microcontroller versus general-purpose
microprocessor
º A microprocessor generally º A microcontroller is 'all in one',
does not have RAM, ROM and the processor, ram, IO all on
IO pins; a complete functional the one chip; a complete
CPU functional microcomputer
8952 8k 256 3 8 32 -
891051 1k 64 1 3 16 AC
892051 2k 128 2 6 16 AC
CPU
OSC Bus
4 I/O Ports Serial
Control
P0 P2 P1 P3 TXD RXD
Addr/Data
8051 Internal Block Diagram
8051
Schematic
Pin out
8051 P1.0 1 40 Vcc
Foot Print
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9
8051 32 P0.7(AD7)
(RXD)P3.0 10 (8031) 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12
(8751) 29 PSEN
(INT1)P3.3 13 (8951) 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
XTAL Connection to 8051
C1
XTAL1
30pF
GND
XTAL Connection to an External Clock Source
N XTAL2
C
EXTERNAL
OSCILLATOR
SIGNAL XTAL1
GND
RST Pin of 8051
RST(pin 9):reset
input pin and active high(normally low).
The high pulse must be high at least 2
machine cycles.
power-on reset.
Upon applying a high pulse to RST, the
microcontroller will reset and all values in
registers will be lost.
Reset values of some 8051 registers
power-on reset circuit
Power-On RESET
Vcc
31
EA/VPP
X1
10 uF 30 pF
X2
RST
9
8.2 K
RESET Value of Some 8051 Registers:
2
4
On-Chip Memory
Internal RAM
Registers
1F
Bank 1
08
07 R7
06 R6
05 R5
04 R4
03 R3 Bank 0
02 R2
01 R1
00 R0
Register banks in the 8051 Microcontroller
2
7
Bit Addressable Memory
2F 7F 78 20h – 2Fh (16 locations X
2E 8-bits = 128 bits)
2D
2C Bit addressing:
2B
mov C, 1Ah
2A
29
or
28 mov C, 23h.2
27
26
25
24
23 1A
22 10
21 0F 08
20 07 06 05 04 03 02 01 00
Bit Addressable RAM
Figure 2-6
Summary
of the 8051
on-chip
data
memory
(RAM)
Special Function Registers
(1). 8051 has 21 special function registers (SFRs) at the top of internal RAM from
address 80H to FFH.
(2). Most of the addresses from 80H to FFH are not defined, except for 21 of
them.
(3). Some SFR’s are both bit-addressable and byte addressable, depending on the
instruction accessing the register.
(5). All 8051 CPU registers, I/O ports, timers and other architecture components
are accessible in 8051 C through SFRs
3
0
Special Function Registers
(1). ACC
(2). B
(3). PSW( Program Status Word)
(4). SP
(5). DPTR
(5). IP (Interrupt Priority Register)
(8). TMOD (Timer Mode Control Register)
(9). TCON (Timer Control Register) etc.
3
1
8051 CPU Registers
A (Accumulator)
B
PSW (Program Status Word)
SP (Stack Pointer)
PC (Program Counter)
DPTR (Data Pointer)
Used in assembler
instructions
Bit Addressable RAM
Figure 2-6
Summary
of the 8051
on-chip
data
memory
(Special
Function
Registers)
B Register
(1). B register or accumulator B is used along with the accumulator
for multiply and divide operations.
(2). MUL AB: multiplies 8 bit unsigned values in A and B. and leaves
the 16 bit result in A (low byte) and B (high byte).
10
PSW (Program Status word) / Flag Register
11
Stack Pointer
(1). Stack pointer (SP) is an 8-bit register at address 81H.
(2). It contains the address of the data item currently on top of the
stack.
(3). Stack operations include pushing data on the stack andpopping
data off the stack.
(4). 8051 stack is kept in the internal RAM
(5). Depending on the initial value of the SP, stack can have different sizes
(6). Example: MOV SP,#5FH
(7). On 8051 this would limit the stack to 32 bytes since the
uppermost address of on chip RAM is 7FH.
Data pointer (DPTR)
(1). Data pointer (DPTR): is used to access external data or code.
(2). DPTR is a 16 bit register at addresses 82H (low byte) and 83H
(high byte).
(2). Port 2 emits the high-order address byte during fetches from external
program memory and during accesses to external data memory that use 16-bit
addresses (MOVX @DPTR).
(3). The 8051 has two 16-bit registers that can be used as either timers or counters.
(4). These two up counters are name T0 and T1 and are provided for general use of the
programmer.
(5). Each counter may be programmed to count internal clock pulses, act as a timer, or
programmed to count external events as a counter.
(6). The counters are divided into two 8-bit registers called the timer low (TL0, TL1) and
timer high (TH0, TH1) bytes.
TIMER/COUNTER IN 8051
º TCON, an 8-bit bit-addressable register, controls timer/counter
controls
(TR bits )TR0 and TR1 flags start the timer counting(it is used to turn
on and off the timer).
TF1 and TF0 are Timer overflow flags , set when timer overflows(falls
from FFh to 00h)
IT0= Timer 0 interrupt flag(Enabled or disabled SETB TCON.5 or
CLR TCON.5)
IE0= External Interrupt 0 Flag
◊ The frequency for the timer is always 1/12th the frequency of crystal
attached, regardless of 8051 versions
Interrupts
Whenever any device needs its service, the device notifies the
microcontroller by sending it an interrupt signal.
2 TF0 000BH
3 INT1 0013H
4 TF1 001BH
5 SERIAL 0023H
26
Interrupt Priority (IP) SFR
Interrupt Enable (IE) SFR