Beruflich Dokumente
Kultur Dokumente
SLLS067G − AUGUST 1990 − REVISED APRIL 2006
VCC
Long Bus Lines in Noisy Environments
NC
NC
NC
R
D Very Low Disabled Supply Current . . . 200
µA Maximum 3 2 1 20 19
NC 4 18 NC
D Wide Positive and Negative Input/Output RE 5 17 B
Bus Voltage Ranges NC NC
6 16
D Thermal-Shutdown Protection DE 7 15 A
D Driver Positive-and Negative-Current NC 8 14 NC
9 10 11 12 13
Limiting
D Open-Circuit Failsafe Receiver Design
GND
NC
NC
NC
D Receiver Input Sensitivity . . . ± 200 mV Max
D Receiver Input Hysteresis . . . 50 mV Typ
NC −No internal connection
D Operates From a Single 5-V Supply
D Glitch-Free Power-Up and Power-Down
Protection Function Tables
D Available in Q-Temp Automotive DRIVER
HighRel Automotive Applications
INPUT ENABLE OUTPUTS
Configuration Control / Print Support D DE A B
Qualification to Automotive Standards H H H L
L H L H
description X L Z Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
description (continued)
The SN55LBC176, SN65LBC176, SN65LBC176Q, and SN75LBC176 combine a 3-state, differential line driver
and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and
receiver have active-high and active-low enables, respectively, which can externally connect together to
function as a direction control. The driver differential outputs and the receiver differential inputs connect
internally to form a differential input /output (I/O) bus port that is designed to offer minimum loading to the bus
whenever the driver is disabled or VCC = 0. This port features wide positive and negative common-mode voltage
ranges, making the device suitable for party-line applications. Very low device supply current can be achieved
by disabling the driver and the receiver.
These transceivers are suitable for ANSI Standard TIA/EIA−485 (RS-485) and ISO 8482 applications to the
extent that they are specified in the operating conditions and characteristics section of this data sheet. Certain
limits contained in TIA/EIA−485−A and ISO 8482:1987 (E) are not met or cannot be tested over the entire military
temperature range.
The SN55LBC176 is characterized for operation from −55°C to 125°C. The SN65LBC176 is characterized for
operation from −40°C to 85°C, and the SN65LBC176Q is characterized for operation from − 40°C to 125°C.
The SN75LBC176 is characterized for operation from 0°C to 70°C.
1 2
R
AVAILABLE OPTIONS
TA PACKAGE PART NUMBER PART MARKING
SOP SN75LBC176D 7LB176
0°C to 70°C
PDIP SN75LBC176P 75LBC176
SOP SN65LBC176D 6LB176
−40°C to 85°C
PDIP SN65LBC176P 65LBC176
SOP SN65LBC176QD LB176Q
−40°C to 110°C
SOP SN65LBC176QDR LB176Q
LCCC SNJ55LBC176FK SNJ55LBC176FK
−55°C to 125°C
CDIP SNJ55LBC176JG SNJ55LBC176
EQUIVALENT OF D, RE, and TYPICAL OF A AND B I/O PORTS TYPICAL OF RECEIVER OUTPUT
DE INPUTS VCC
VCC
VCC
100 kΩ NOM 3 kΩ
A Port Only NOM
A or B
Input Output
18 kΩ
NOM
100 kΩ NOM
1.1 kΩ
B Port Only
NOM
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
VIK Input clamp voltage II = − 18 mA −1.5 V
VO Output voltage IO = 0 0 6 V
| VOD1 | Differential output voltage IO = 0 1.5 6 V
55LBC176,
RL = 54 Ω, See Figure 1, 65LBC176, 1.1
| VOD2 | Differential output voltage 65LBC176Q V
See Note 3
75LBC176 1.5 5
55LCB176,
Vtest = − 7 V to 12 V, See Figure 2, 65LCB176, 1.1
VOD3 Differential output voltage 65LBC176Q V
See Note 3
75LBC176 1.5 5
Change in magnitude of differential
∆| VOD | −0.2 0.2 V
output voltage †
VOC Common-mode output voltage RL = 54 Ω or 100 Ω, See Figure 1 −1 3 V
Change in magnitude of
∆| VOC | −0.2 0.2 V
common-mode output voltage†
Output disabled, VO = 12 V 1
IO Output current mA
See Note 4 VO = − 7 V −0.8
IIH High-level input current VI = 2.4 V −100 µA
IIL Low-level input current VI = 0.4 V −100 µA
VO = − 7 V −250
VO = 0 −150
IOS Short-circuit output current mA
VO = VCC
250
VO = 12 V
55LBC176,
1.75
Receiver disabled 65LBC176Q
and driver enabled 65LBC176,
1.5
VI = 0 or VCC, 75LBC176
ICC Supply current mA
No load 55LBC176,
0.25
Receiver and driver 65LBC176Q
disabled 65LBC176,
0.2
75LBC176
† ∆ | VOD | and ∆ | VOC | are the changes in magnitude of VOD and VOC, respectively, that occur when the input changes from a high level to a
low level.
NOTES: 3. This device meets the VOD requirements of TIA/EIA−485−A above 0°C only.
4. This applies for both power on and off; refer to TIA/EIA−485−A for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature
SN55LBC176 SN65LBC176
PARAMETER TEST CONDITIONS SN65LBC176Q SN75LBC176 UNIT
MIN TYP MAX MIN TYP† MAX
td(OD) Differential output delay time 8 31 8 25 ns
Ω
RL = 54 Ω, CL = 50 pF,
tt(OD) Differential output transition time 12 12 ns
See Figure 3
tsk(p) Pulse skew ( | td(ODH) − td(ODL) | ) 6 0 6 ns
tPZH Output enable time to high level RL = 110 Ω, See Figure 4 65 35 ns
tPZL Output enable time to low level RL = 110 Ω, See Figure 5 65 35 ns
tPHZ Output disable time from high level RL = 110 Ω, See Figure 4 105 60 ns
tPLZ Output disable time from low level RL = 110 Ω, See Figure 5 105 35 ns
† All typical values are at VCC = 5 V, TA = 25°C.
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER RS-485
VO Voa, Vob
| VOD1 | Vo
| VOD2 | Vt (RL = 54 Ω)
Vt (test termination
| VOD3 |
measurement 2)
∆ | VOD | | | Vt | − | Vt | |
VOC | Vos |
∆ | VOC | | Vos − Vos |
IOS None
IO Iia, Iib
RECEIVER SECTION
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 15 pF
SN55LBC176 SN65LBC176
PARAMETER TEST CONDITIONS SN65LBC176Q SN75LBC176 UNIT
MIN MAX MIN TYP† MAX
Propagation delay time, low- to high-level
tPLH 11 37 11 33 ns
single-ended output
VID = − 1.5 V to 1.5 V,
Propagation delay time, high- to low-level
tPHL See Figure 7 11 37 11 33 ns
single-ended output
tsk(p) Pulse skew ( | tPLH − tPHL | ) 10 3 6 ns
tPZH Output enable time to high level 35 35 ns
See Figure 8
tPZL Output enable time to low level 35 30 ns
tPHZ Output disable time from high level 35 35 ns
See Figure 8
tPLZ Output disable time from low level 35 30 ns
† All typical values are at VCC = 5 V, TA = 25°C.
RL
2 VOD3
VOD2 60 Ω
RL VOC Vtest
2
375 Ω
3V
Input 1.5 V 1.5 V
CL = 50 pF
(see Note B) 0V
RL = 54 Ω td(ODH) td(ODL)
Generator
50 Ω Output
(see Note A)
≈ 2.5 V
90%
3V Output 50% 50%
10%
≈ − 2.5 V
tt(OD) tt(OD)
TEST CIRCUIT VOLTAGE WAVEFORMS
Output 3V
S1 Input 1.5 V 1.5 V
0 V or 3 V 0V
tPZH 0.5 V
CL = 50 pF RL = 110 Ω
VOH
Generator (see Note B)
50 Ω Output 2.3 V
(see Note A)
tPHZ Voff ≈ 0 V
5V 3V
VID
VOH
+ IOL −IOH
VOL
3V
Input 1.5 V 1.5 V
Generator Output 0V
51 Ω
(see Note A)
1.5 V tPLH tPHL
CL = 15 pF VOH
(see Note B)
Output 1.3 V 1.3 V
0V
VOL
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
CL = 15 pF 5 kΩ 1N916 or Equivalent
(see Note B)
Generator
(see Note A) 50 Ω
S3
TEST CIRCUIT
3V 3V
S1 to 1.5 V S1 to −1.5 V
Input 1.5 V S2 Open Input 1.5 V S2 Closed
S3 Closed S3 Opened
0V 0V
tPZH
tPZL
VOH
≈ 4.5 V
Output 1.5 V
Output 1.5 V
0V
VOL
3V 3V
S1 to 1.5 V S1 to −1.5 V
Input 1.5 V S2 Closed Input 1.5 V S2 Closed
S3 Closed S3 Closed
0V 0V
tPHZ
tPLZ
VOH ≈ 1.3 V
Output 0.5 V Output 0.5 V
≈ 1.3 V VOL
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Ambient Node
qCA Calculated
Surface Node
qJC Calculated/Measured
Junction
qJB Calculated/Measured
PC Board
MECHANICAL INFORMATION
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.010 (0,25) M
0.014 (0,35)
14 8
0.010 (0,25)
1 7
0°−ā 8°
0.044 (1,12)
A 0.016 (0,40)
Seating Plane
PINS **
8 14 16
DIM
MECHANICAL INFORMATION
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINALS SHOWN
NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
4040140 / C 11/95
MECHANICAL INFORMATION
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE
0.400 (10,20)
0.355 (9,00)
8 5
0.280 (7,11)
0.245 (6,22)
1 4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.020 (0,51) MIN
0.290 (7,37)
0.063 (1,60)
0°−15°
0.015 (0,38) 0.023 (0,58)
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
MECHANICAL INFORMATION
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8 5
0.260 (6,60)
0.240 (6,10)
1 4
0.070 (1,78) MAX
0.325 (8,26)
0.020 (0,51) MIN
0.300 (7,62)
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
4040082/D 05/98
PACKAGING INFORMATION
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-9318301Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9318301QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
SN65LBC176D ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LBC176DG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LBC176DR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LBC176DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LBC176P ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
SN65LBC176PE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
SN65LBC176QD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
SN65LBC176QDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
SN75LBC176D ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75LBC176DG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75LBC176DR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75LBC176DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75LBC176P ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
SN75LBC176PE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
SNJ55LBC176FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ55LBC176JG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 12-Jan-2007
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
0.400 (10,16)
0.355 (9,00)
8 5
0.280 (7,11)
0.245 (6,22)
1 4
0.065 (1,65)
0.045 (1,14)
0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
4040140 / D 10/96
0.400 (10,60)
0.355 (9,02)
8 5
0.260 (6,60)
0.240 (6,10)
1 4
0.070 (1,78) MAX
0.325 (8,26)
0.020 (0,51) MIN
0.300 (7,62)
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
4040082/D 05/98
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