Sie sind auf Seite 1von 9

Sheet1

31 30 29 28 27 26 25 24 23 22 21
11100011000000000000000000000000 1 1 1 0 0 0 1 1 0 0 0
E3000000 in hex

pg52 program manual


Rising TCK count: JTAG Clock 0 1 2 3 4 5 6 7 8 9 10
Point 1 and 2 1 1 0 0
select IR shift IR
3rd point: Pg 19: address width, i (i=6 bits), 6-
1= 5 times 0 0 0 0 0 0

shift address value on TDI

From 4, 5 and 6th point 1

Exit1 IR
7 point: data= 32 bits (32-1=31) times 0
th

From8, 9 and 10

bits 0 1 2 3 4 5 6 7 8 9 10
Final TMS value 1 1 0 0 0 0 0 0 0 0 1

Reg2
Reg6
Reg7
Reg8

Test Logic Reset


Run Test/ Idle
Select DR Scan
Select IR Scan
Capture IR
Shift IR
Exit1 IR
Pause IR
Exit12-IR
Update IR
Capture DR
Shift DR
Exit1 IR
Pause DR
Exit2-DR
Update DR

Page 1
Sheet1
20 19 18 17 16 15 14 13 12 11### 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

11 12 13 14 15 16 17 18 19 20### 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

1 1 0 0
Move DR
Select DR
from Capture
Scan
to Shift State
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
data bit count 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
to shift data value on TDI with LSB first; current serialized data reg value sh

11 12 13 14 15 16 17 18 19 20### 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Page 2
Sheet1

37 38 39 40 41 42 43 44 45 46 47 48 49

0 0 0 0 0 0 0 0 0 0
22 23 24 25 26 27 28 29 30 31
erialized data reg value shifted to TDO with LSB first
1 1 0
Exit 1DR;
shift last
MSB data
bit into TDI; Update DR; back
shift last new value to
MSB data updated in run-
bit out to internal data test
TDO reg state
37 38 39 40 41 42 43 44 45 46 47 48 49
0 0 0 0 0 0 0 0 0 0 1 1 0

Page 3
Sheet2
Sr. No. JTAG Register: 31 30 29 28 27 26

1 Mode Register
JTAG Address 000002 Default 0 0 0 0 0 0
Data Width 32 bit 32H”0126001E

Page 21 Can be changed to > 0 0 0 0 0 0


32H”01A6141E

2 Low Power Mode Default 0 0 0 0 0 0


JTAG Address 000003 32H”00001408
Data Width 32 bit

3 RS Short Exposure Ctrl Exposure time


JTAG Address 000004 Default 0 0 0 0 0 0
Data Width 32 bit 32H”00000000

Max Value
(frame size in rows-1)

4 ROI2 Start Address Value to write in this register should be the START ADDRE
JTAG Address 000006 Default 0 0 0 0 0 0
Data Width 32 bit 32H”00000000

5 ROI2 End Address Value to write in this register should be the END ADDRES
JTAG Address 000007 Default 0 0 0 0 0 0
Data Width 32 bit 32H”00000437
Decimal= 1079

6 Dark Row/ Pre Scan Size V ROI1 Value to write in this register should be the NUMBER OF R
JTAG Address 000008
Data Width 32 bit Default 0 0 0 0 0 0
32H”00000010

Max Value 0 0 0 0 0 0
32H”0003FBC7

Page 4
Sheet2
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 1 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 < Binary

0 1 1 0 1 0 0 1 1 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 1 0 < Binary
For HG freq. Values
For LG Freq. Values

0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 0 < Binary

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 < Binary

hould be the START ADDRESS OF ACTIVE PIXEL ROW


0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 < Binary

hould be the END ADDRESS OF ACTIVE PIXEL ROW


0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 1 1 < Binary

hould be the NUMBER OF ROWS TO BE CONSIDER FOR DARK SCAN

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 < Binary

0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 1 1 1 1 0 0 0 1 1 1 < Binary

Page 5
Sheet3

TCK Count 0 1 2 3 4 5 6 7 8 9
Bit Count
TMS Count
Reg Name Add Load Val Load

Reg2

Page 6
Sheet3

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

Page 7
Sheet3

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

Page 8
Sheet3

52 53 54

Page 9

Das könnte Ihnen auch gefallen