AC Circuit (Steady State

Analysis)

Prepared by:
Endah S. Ningrum, ST. MT.
Mechatronics Division
DTME-PENS
 Impedance and Admittance

 Impedance

Series

Parallel
Impedance and Admittance
The Continuation of Previous….
 Impedance and Admittance

 Admittance

Series

Parallel
Impedance and Admittance
 Homework

1. Find the current i(t) in tile network in the following figure.

2. Find the current i(t) in tile network in the following figure.

 Homework

Consider the network in the following

figure. The impedance of each element is
given in the figure. We wish to calculate the
equivalent impedance of the network Zeq at
terminals A-B.
 Homework

 Compute the impedance ZT in the network in following

Figure.
 Fasor Diagram

Let us sketch the phasor diagram for the

network shown in side Figure

• Select V as a reference phasor and arbitrarily assign it a 0° phase angle.

• If it is actually 30° for example, we will simply rotate the entire phasor
diagram by 30° because all the currents are measured with respect
to this phasor.
• At the upper node in the circuit KCL is:

• Since then,
 Fasor Diagram

The phasor diagram that illustrates the phase relationship between

is: For small values of w such that the
magnitude of is greater than that of

In the case of large values of w that is,

those for which is greater than that
of

Note that as w increases, the

phasor Is moves from Is, to Is.
along a locus of points
specified by the dashed line
shown in Figure (d)
 Fasor Diagram

 Note that I is in phase with V when or, in , or in other words when

 Hence, the node voltage V is in phase with the current source I when :

 This can also be seen from the KCL equation

 KVL for this circuit is of the form

If we select I as a reference phasor so that , then

if the phasor diagram will be of the form
as shown in previous figure (b).
If however, we select V s as reference with, for example:

and the entire phasor diagram. as shown in next figs.

Let us determine the phasor diagram for the series circuit shown in the
following Figure:

KVL for this circuit is of the form

If we select I as a reference phasor so that , then if the

phasor diagram will be of the form as shown in previous figure (b).