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Setting the MEK6800D1 1 and 2 Clock Signals

By D.R. Sentz
December 11, 2019

The Motorola MEK6800D1 Evaluation Kit, introduced in 1975, is a

single board computer using the MC6800 microprocessor and its
family of M6800 components.

My MEK6800D1 Board with Five of the MC6810s Removed.

Instead of a crystal controlled logic clock, the MEK6800D1 uses

a pair of adjustable "one-shot" pulse generators to provide the
required 1 and 2 clock signals. When I restored my computer in
2014 the 600bps console data rate was still working. Over time,
however, it became unreliable. I suspected the MPU clocks might
be too slow, but I had no way to measure or accurately readjust

The MC6800 data sheet states the maximum clock frequency as

1.00MHz. However, the MEK6800D1 instruction book procedure for
setting up the 2-phase clock never mentions clock frequency.
Instead, it states the required minimum "90%" pulse width of the
1 clock as 450 nanoseconds, and of the 2 clock as 470
nanoseconds. On 06Dec2019 I used my new oscilloscope to observe
that the MPU clock frequencies were about 850kHz, way too slow.

Test Points TP1 and TP2, and Adjustment Pots for the MPU clocks

Yellow wire on TP1 (1 clock), Green is on TP2 (2 clock)

There is an observable delay from the falling edge of one pulse

generator output to the beginning of the rising edge of the
other, and vice versa. Therefore both clock signals are in the
logic 0 state simultaneously during a small portion of the time,
but they are never in the logic 1 state simultaneously.

I first adjusted the MPU clocks to approximately 1.00 Mhz with
equal duration pulse widths. This correction fixed the issue
with the 600bps console interface.

1 and 2 XC6800 Clocks After Readjustment, 07DEC2019

December 11, 2019- I readjusted the MPU clocks today, using the
unequal "90%" pulse width requirements stated in the MEK6800D1

1 clock 90% pulse width > 450 ns

2 clock 90% pulse width > 470 ns

This time I used the oscilloscope time measurement cursors to

good effect. The time span between the cursors is displayed in
the on-screen cursor menu. The procedure is to preset the
cursors for the required pulse width and then make the
adjustment until the requirement is acceptably met.

Cursor 1 is positioned at 90% rising edge point. Cursor 2 is
positioned 452ns after cursor 1. Before readjustment, the 1
clock pulse is longer than 452ns;

After readjustment the 1 clock 90% pulse width is very close to,
but not less than, 450ns;

Cursor 2 is repositioned to 472ns delay from cursor 1. Note that
the 2 clock pulse is shorter than 472ns;

After readjustment the 2 clock 90% pulse width is very close to,
but not less than, 470ns;

After these adjustments both minimum pulse width requirements
are just met with acceptable margin, and the clock frequencies
are almost exactly 1.00 MHz;

The computer to console interface is working reliably again at

the 600 bps rate. Note that the MEK6800D1 designers did not
require it to operate the console at 600bps, but it has the
capability, as I discovered decades ago.