SDH Basics PDF

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SDH - Basics (Introduction)
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NEOR3 Fritz Schmocker NEOR3 Fritz Schmocker 1998-06-01 F NUHN:95-045 Uen

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NEOS (Ernst Rohrbach) sdh_f.fm5
Introduction to the
Synchronous Digital Hierarchy
and related Subjects
SDH - Basics (Introduction) 2 (195)
a Datum - Date Rev Dokumentnr - Document no.
1998-06-01 F NUHN:95-045 Uen
TABLE OF CONTENTS
1 GENERAL ........................................................................................... 8
1.1 Introduction ............................................................................ 8
1.2 Prerequisites ........................................................................... 8
1.3 Terminology ............................................................................ 8
1.4 Revision History ....................................................................... 9
1.5 References .............................................................................. 9
2 PDH / SDH - Multiplexing / Mapping Structure ............................. 12

2.1 General ................................................................................... 12
2.2 PDH Signals ............................................................................ 12
2.3 SDH Signals ............................................................................ 12
3 Short Introduction To PDH ............................................................... 14

3.1 General ................................................................................... 14
3.2 PDH Multiplexing Structure ..................................................... 14
3.2.1 Primary Multiplexing (Overview) ................................................... 14
3.2.2 Higher Order Multiplexing (Overview) .......................................... 14
3.3 Primary Multiplexing / Pulse Code Modulation (PCM) .............. 16
3.3.1 The Human Voice ........................................................................ 16
3.3.2 Low-Pass Filtering ........................................................................ 16
3.3.3 Sampling ..................................................................................... 16
3.3.4 Quantizing / Coding .................................................................... 16
3.3.5 2 MBit/s Basic Frame .................................................................... 18
3.3.5.1 Frame Structure ................................................................. 18
3.3.5.2 Line Coding ....................................................................... 18
3.4 Higher Order Multiplexing ....................................................... 20
3.4.1 Principle ....................................................................................... 20
3.4.2 8 MBit/s Frame ............................................................................ 20
3.4.2.1 Frame Structure ................................................................. 20
3.4.2.2 Line Coding ....................................................................... 20
3.4.3 34 MBit/s Frame .......................................................................... 20
3.4.3.1 Frame Structure ................................................................. 20
3.4.3.2 Line Coding ....................................................................... 20
3.4.4 140 MBit/s Frame ........................................................................ 20
3.4.4.1 Frame Structure ................................................................. 20
3.4.4.2 Line Coding ....................................................................... 20
4 SDH Functional Blocks ...................................................................... 26

4.1 Functional Block Diagram ........................................................ 26
4.1.1 Transport Terminal Function (TTF) ................................................ 26
4.1.1.1 SDH Physical Interface (SPI) ................................................ 26
4.1.1.2 Regenerator Section Termination (RST) .............................. 26
4.1.1.3 Multiplex Section Termination (MST) .................................. 26
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4.1.1.4 Multiplex Section Protection (MSP) .................................... 26

4.1.1.5 Multiplex Section Adaptation (MSA) .................................. 26
4.1.2 Higher Order Connection Supervision (HCS) ................................ 27
4.1.3 Higher Order Path Connection (HPC) ........................................... 27
4.1.4 Higher Order Interface (HOI) ........................................................ 27
4.1.4.1 Higher Order Path Termination (HPT) in HOI ...................... 27
4.1.4.2 Lower Order Path Adaptation (LPA) in HOI ........................ 27
4.1.4.3 PDH Physical Interface (PPI) in HOI ..................................... 27
4.1.5 Higher Order Assembler (HOA) .................................................... 27
4.1.5.1 Higher Order Path Termination (HPT) in HOA .................... 27
4.1.5.2 Higher Order Path Adaptation (HPA) ................................. 28
4.1.6 Lower Order Connection Supervision (LCS) .................................. 28
4.1.7 Lower Order Path Connection (LPC) ............................................ 28
4.1.8 Lower Order Interface (LOI) ......................................................... 28
4.1.8.1 Lower Order Path Termination (LPT) .................................. 28
4.1.8.2 Lower Order Path Adaptation (LPA) in LOI ......................... 29
4.1.8.3 PDH Physical Interface (PPI) in LOI ...................................... 29
4.1.9 Overhead Access (OHA) ............................................................... 29
4.1.10 Synchronous Equipment Management Function (SEMF) ............... 29
4.1.11 Message Communication Function (MCF) .................................... 29
4.1.12 Synchronous Equipment Timing Source (SETS) ............................. 29
4.1.13 Synchronous Equipment Timing Physical Interface (SETPI) ............ 29
4.2 SDH Functional Blocks Applied on Multiplexing Structure ........ 29
4.3 SDH Logical Functions Applied on Multiplexing Structure ......... 32
5 SDH Multiplexing / Mapping for 2 MBit/s ....................................... 34

5.1 General ................................................................................... 34
5.2 Overview ................................................................................. 34
5.3 Container C-12 ....................................................................... 36
5.3.1 Structure of C-12 ........................................................................ 36
5.3.2 Asynchronous Mapping of 2 MBit/s into C-12 ............................. 36
5.4 Virtual Container VC-12 .......................................................... 38
5.4.1 Structure of VC-12 ...................................................................... 38
5.4.2 Mapping of C-12 into VC-12 ....................................................... 38
5.5 Tributary Unit TU-12 ................................................................ 40
5.5.1 Structure of TU-12 ...................................................................... 40
5.5.2 Mapping of VC-12 into TU-12 ..................................................... 40
5.5.3 Pointer Justification on TU-12 Level ............................................. 40
5.6 Tributary Unit Group TUG-2 .................................................... 44
5.6.1 Structure of TUG-2 ...................................................................... 44
5.6.2 Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe ..................... 44
5.7 Tributary Unit Group TUG-3 (TUG-2 Structure) ....................... 46
5.7.1 Structure of TUG-3 (TUG-2 Structure) ......................................... 46
5.7.2 Multiplexing of 7 x TUG-2 Into TUG-3 ......................................... 46
5.7.3 Multiplexing of 7 x TUG-2 (containing TU-12s) into TUG-3 .......... 46
5.8 Virtual Container VC-4 (TUG Structure) .................................. 50
5.8.1 Structure of VC-4 (TUG Structure) .............................................. 50
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5.8.2 VC-4 Path Overhead (Higher Order POH) .................................... 52

5.8.3 Multiplexing of 3 x TUG-3 (containing TUG-2s) into VC-4 ............ 54
5.8.4 VC-4 with TU-12 Multiplexing ..................................................... 54
5.8.5 Multiplexing Mechanism for 63 x TU-12 into VC-4 ....................... 54
5.9 Administrative Unit AU-4 ........................................................ 58
5.9.1 Structure of AU-4 ........................................................................ 58
5.9.2 Mapping of VC-4 into AU-4 ......................................................... 58
5.9.3 Pointer Justification on AU-4 Level ............................................... 58
5.9.3.1 Justification Opportunities and Indications ......................... 58
5.9.3.2 Example for Positive Pointer Justification ............................ 58
5.9.3.3 Example for Negative Pointer Justification .......................... 58
5.10 Administrative Unit Group AUG .............................................. 64
5.10.1 Structure of AUG ......................................................................... 64
5.10.2 Multiplexing of 1 x AU-4 into AUG .............................................. 64
6 SDH Multiplexing / Mapping for 34 MBit/s .................................... 66

6.1 General ................................................................................... 66
6.2 Overview ................................................................................ 66
6.3 Container C-3 ......................................................................... 68
6.3.1 Structure of C-3 ........................................................................... 68
6.3.2 Asynchronous Mapping of 34 MBit/s into C-3 .............................. 70
6.4 Virtual Container VC-3 ............................................................ 72
6.4.1 Structure of VC-3 ........................................................................ 72
6.4.2 Mapping of C-3 into VC-3 ........................................................... 72
6.4.3 VC-3 Path Overhead (Lower Order POH) ..................................... 74
6.5 Tributary Unit TU-3 ................................................................. 76
6.5.1 Structure of TU-3 ......................................................................... 76
6.5.2 Mapping of VC-3 into TU-3 ......................................................... 76
6.5.3 Pointer Justification on TU-3 Level ................................................ 76
6.6 Tributary Unit Group TUG-3 (TU-3 Structure) ......................... 80
6.6.1 Structure of TUG-3 (TU-3 Structure) ............................................ 80
6.6.2 Multiplexing of 1 x TU-3 into TUG-3 ............................................ 80
6.7 Virtual Container VC-4 ............................................................ 82
6.7.1 Structure of VC-4 ........................................................................ 82
6.7.3 Multiplexing of 3 x TUG-3 (containing TU-3s) into VC-4 ............... 82
6.8 Administrative Unit AU-4 ........................................................ 82
6.9 Administrative Unit Group AUG .............................................. 82
7 SDH Multiplexing / Mapping for 140 MBit/s .................................. 84

7.1 Overview ................................................................................ 84
7.2 Container C-4 ......................................................................... 86
7.2.1 Structure of C-4 ........................................................................... 86
7.2.2 Asynchronous Mapping of 140 MBit/s into C-4 ............................ 88
7.3 Virtual Container VC-4 (C-4 Structure) ................................... 90
7.3.1 Structure of VC-4 (C-4 Structure) ................................................ 90
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7.3.2 Mapping of C-4 into VC-4 ........................................................... 90

7.4 Administrative Unit AU-4 ......................................................... 90
7.5 Administrative Unit Group AUG ............................................... 90
8 STM-N Frame ..................................................................................... 92

8.1 STM-1 Frame ........................................................................... 92
8.1.1 Frame Structure ........................................................................... 92
8.1.2 Multiplexing of 1 x AUG into STM-1 Payload ............................... 92
8.1.3 STM-1 Multiplex Section Overhead (MSOH) ................................. 92
8.1.4 STM-1 Regenerator Section Overhead (RSOH) ............................. 92
8.2 STM-4 Frame ........................................................................... 96
8.2.1 Frame Structure ........................................................................... 96
8.2.2 Multiplexing of 4 x AUG into STM-4 Payload ............................... 96
8.2.3 STM-4 Multiplex Section Overhead (MSOH) ................................. 96
8.2.4 STM-4 Regenerator Section Overhead (RSOH) ............................. 96
8.3 STM-16 Frame ......................................................................... 100
8.3.1 Frame Structure ........................................................................... 100
8.3.2 Multiplexing of 16 x AUG into STM-16 Payload ........................... 100
8.3.3 STM-16 Multiplex Section Overhead (MSOH) ............................... 100
8.3.4 STM-16 Regenerator Section Overhead (RSOH) ........................... 100
9 SDH Maintenance Signals ................................................................. 104

9.1 General ................................................................................... 104
9.2 Maintenance Signals and Consequent Actions ......................... 104
9.2.1 Connection Level / Termination Level ........................................... 104
9.2.2 Indications and Consequent Actions ............................................ 106
9.3 SDH Maintenance Signal Interaction ........................................ 112
9.3.1 Indication / Action Flow ............................................................... 112
9.3.2 Examples ..................................................................................... 112
9.3.3 Alarm Reporting / Alarm Suppression .......................................... 112
10 Protection ........................................................................................... 116

10.1 Multiplex Section Protection (MSP) ......................................... 116
10.1.1 MSP Architecture / Functional Blocks ........................................... 116
10.1.2 MSP Operation Modes ................................................................ 116
10.1.2.1 Bi-Directional Operation .................................................... 116
10.1.2.2 Uni-Directional Operation .................................................. 116
10.1.3 MSP Switching Modes ................................................................. 116
10.1.3.1 Revertive Switching ........................................................... 116
10.1.3.2 Non-Revertive Switching ................................................... 116
10.1.4 Basic MSP Switch Model .............................................................. 118
10.1.5 Application Examples of the MSP Switch Model .......................... 120
10.1.5.1 1:2 Architecture (one for two) ........................................... 120
10.1.5.2 1:1 Architecture (one for one) ........................................... 120
10.1.5.3 1+1 Architecture (one plus one) ........................................ 120
10.1.6 MSP Signalling ............................................................................ 124
10.1.7 Examples of Automatic Protection Switching (APS) in MSP .......... 126
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10.1.7.1 APS Protocol for 1:2 Architecture ...................................... 126

10.1.7.2 APS Protocol for 1+1 Architecture ..................................... 126
10.1.7.3 Principle of 1:1 MSP in USHR ............................................. 126
10.2 Sub-Network Connection Protection (SNCP) [*** Part of next Rev. of
Document ***] ....................................................................... 144
11 Timing (Synchronisation) ................................................................. 146

11.1 Synchronous Equipment Timing .............................................. 146
11.1.1 Timing Functional Blocks (Overview) ............................................ 146
11.1.2 Synchronous Equipment Timing Physical Interface (SETPI) ............. 146
11.1.3 Synchronous Equipment Timing Source (SETS) ............................. 146
11.1.3.1 General ............................................................................. 146
11.1.3.2 Selector A .......................................................................... 146
11.1.3.3 Synchronous Equipment Timing Generator (SETG) ............. 146
11.1.3.4 Selector B , Selector C and Squelching ............................... 147
11.2 Jitter [*** Part of next Rev. of Document ***] ....................... 149
12 Transmission Aspects ....................................................................... 150

12.1 Line Codes .............................................................................. 150
12.1.1 General ....................................................................................... 150
12.1.1.1 About Line Codes for Electrical Signals .............................. 150
12.1.1.2 About Line Codes for Optical Signals ................................. 150
12.1.1.3 HDB3 Code ....................................................................... 152
12.1.1.4 CMI Code .......................................................................... 152
12.1.2 PDH Line Coding ......................................................................... 154
12.1.2.1 Electrical PDH Signals ......................................................... 154
12.1.2.2 Optical PDH Signals ........................................................... 154
12.1.3 STM-N Line Coding ...................................................................... 154
12.1.3.1 Electrical SDH Signals ......................................................... 154
12.1.3.2 Optical SDH Signals ........................................................... 154
12.2 Optical Transmission with Fibres [*** Part of next Rev. of Document
***] ....................................................................................... 156
A Appendix A ....................................................................................... 156

A.1 SDH - Sizes and Nominal Speeds ............................................. 156
A.2 Principle of SDH Bit Interleaved Parity (BIP) .............................. 158
A.3 Principle of Time Division Multiplex (TDM) ............................... 160
A.4 Principle of SDH Pointer Processing ......................................... 162
A.4.1 Principle of SDH Pointer Alignment .............................................. 162
A.4.2 Principle of SDH Pointer Justifications ........................................... 164
A.5 TU-12 Numbering in a VC-4 .................................................... 168
A.5.1 General ....................................................................................... 168
A.5.2 Systematic TU-12 Numbering (ETSI) ............................................. 168
A.5.3 Systematic VC-4 Numbering ........................................................ 168
A.5.4 Structured Numbering ................................................................. 169
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B Appendix B ........................................................................................ 172

B.1 Abbreviations .......................................................................... 172
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1 GENERAL
1.1 Introduction
This document is an introduction to the Synchronous Digital Hierarchy
(SDH). It contains many figures (that can be used as overhead slides), along
with explanational text.
It includes also an overview over the Plesionous Digital Hierarchy (PDH),
since this knowledge is required to get a complete picture of SDH.
The main goal of this introduction is to convey the basic SDH knowledge
that is required for commissioning staff and testers. The document shall also
be useful as a reference book.
Note : Where applicable, the explanational text is on left pages
and the figures belonging to it on right pages. Therefore
the document should be copied double-sided
1.2 Prerequisites
The reader should have a basic understanding of telecommunication and
transmission.
It is assumed that the readers are aware why a migration from PDH to SDH
takes place, i.e. why a traditional PDH transmission network won’t be able
to fulfil the requirements of the future.
1.3 Terminology
See Appendix B.1 ’Abbreviations’on page 173
The list contains not only pure SDH abbreviations, also a lot of related terms
can be found.
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1.4 Revision History

Revision Date Prepared Description
A 95-09-13 Fritz - First Revision
B 95-10-12 Fritz - Mapping/Multiplexing for 34 and 140 MBit/s
included
- STM-4 and STM-16 included
- Improvements throughout the document
C 95-11-17 Fritz - Asynchronous Mapping of 140 MBit/s corr.
- SDH Functional Blocks included
- Multiplex Section Protection (MSP) included
- Document partly re-arranged
D 96-01-31 Fritz - SDH Maintenance Signals included
- Explanation for Principle of SDH Bit Interleaved
Parity included
- Explanation for Principle of SDH Pointer
Processing improved
- Terms and Abbreviations extended
- Minor corrections and improvements through-
out the document
E 97-11-26 Fritz - Document “ascomised” (Logo, Frutiger font)
- Converted to FrameMaker 5
- Timing (Synchronisation) included
- TU-12 numbering in a VC-4 added
- Abbreviations list updated
- Document partly re-arranged
F 98.02-12 Fritz - Abbreviations list updated
- Minor Updates
1.5 References
[1] ITU-T G.703
[2] ITU-T G.704
[3] ITU-T G.707
[4] ETSI 300 147
|5] ITU-T G.782
|6] ITU-T G.783
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2 PDH / SDH - Multiplexing / Mapping Structure
2.1 General
The figure on the next page shows the structure how the various existing
SDH and PDH signals are (de)multiplexed / (de)mapped into each other.
Source : ITU-T G.707 (former CCITT G.707, G.708, G.709)
ETSI 300 147
It is very important to understand this structure, i.e. to understand all the re-
quired steps to get form one block to the next one.
2.2 PDH Signals

PDH signals have been defined and introduced in the 1960’s and up to now
there is a lot of existing PDH equipment installed all over the world, which
will be in use also in the future. Therefore an SDH network has to be able
to interface and to transport the most important PDH signals.
These are : - 1.5 MBit/s (USA) [1’544 kBit/s]
- 2 MBit/s (Europe) [2’048 kBit/s]
- 6 MBit/s (USA) [6’312 kBit/s]
- 45 MBit/s (USA) [44’736 kBit/s]
This selection is a compromise between the american and the european
PDH standards. For example, it was not possible to provide a container to
carry the european 8 MBit/s signal. without losing any other signal or reduc-
ing the efficiency of the multiplexing / mapping structure. It was considered
as the lesser evil to skip the 8 MBit/s signal in the SDH standard.
2.3 SDH Signals

SDH signals are generally named as STM-N, where N could be any number
greater or equal to 1. Today’s standards define 1, 4, 16 and 64.
This leads to the following signal types :
- STM-1 155 MBit/s (optical and electrical)
- STM-4 620 MBit/s (only optical)
- STM-16 2.5 GBit/s (only optical)
- STM-64 10 GBit/s (only optical)
Higher transmission rates than 10 GBit/s) are under study. The main prob-
lem is to manufacture the required components (such as optical transmitters
and receivers) for such high rates.
PDH / SDH - Multiplexing / Mapping Structure
a
SDH PDH
xN x1
STM-N AUG AU-4 VC-4 C-4 D4
140Mb/s
x3
x1
x3 TUG-3 TU-3 VC-3

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AU-3 VC-3 C-3 D3

34Mb/s
45Mb/s
x7
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6Mb/s
AUG Administrative Unit Group

AU-x Administrative Unit x TU-12 VC-12 C-12 D12
VC-x Virtual Container x x4 2Mb/s
TUG-x Tributary Unit Group x
TU-x Tributary Unit x TU-11 VC-11 C-11 D11
C-x Container x 1.5Mb/s
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Dx PDH Signal Level x
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3 Short Introduction To PDH
3.1 General
In this chapter only the european standard is covered.
3.2 PDH Multiplexing Structure
3.2.1 Primary Multiplexing (Overview)

The basic function of a Primary Multiplexer is to multiplex several telephony
channels (voice and signalling) into a digital line signal.
The analogue voice signals are sampled and converted into a digital code
(Pulse Code Modulation) that can be easily processed further by using Time
Division Multiplex.
Of course, also data channels (e.g. computer links) can be multiplexed in-
stead of voice channels. The principle of multiplexing is very similar.
The line signal has a bit rate of 2048 kBit/s (european standard) and is suit-
able for transmission and to be multiplexed to higher order bit rates.
Source : ITU-T G.703 (Electrical characteristics)
ITU-T G.704 (Multiplexing structure)
3.2.2 Higher Order Multiplexing (Overview)

Higher Order Multiplexing is done on different levels.
- 4 x 2’048 kBit/s to 1 x 8’448 kBit/s
- 4 x 8’448 kBit/s to 1 x 34’368 kBit/s
- 4 x 34’368 kBit/s to 1 x 139’264 kBit/s
- 4 x 139’264 kBit/s to 1 x 565 MBit/s (Not standardised)
The multiplexing is done by bit-interleaved Time Division Multiplex.
Source : ITU-T G.703 (Electrical characteristics)
ITU-T G.704 (Multiplexing structure)
PDH - Multiplexing Structure
a
Primary Multiplexing Higher Order Multiplexing
Level 4
4x140
Level 3
4x34
Level 2

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Level 1
565
4x2
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34 34’368 kBit/s
8 8’448 kBit/s
2 2’048 kBit/s
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3.3 Primary Multiplexing / Pulse Code Modulation (PCM)
3.3.1 The Human Voice

The human voice contains frequencies up to 20 kHz.
The major part of the “information” is contained in the bandwidth between
300 Hz and 3700 Hz. Reducing the frequency range to this bandwidth caus-
es only little decrease in intelligibility of a voice, but it saves a lot of equip-
ment, i.e. allows to use it more efficient.
3.3.2 Low-Pass Filtering

A Low Pass filter cuts the frequencies above 3.7 kHz. The frequencies below
300 Hz are mainly cut by coupling components in the system like transform-
ers or capacitors.
3.3.3 Sampling
According to the Sampling Theorem it is a requirement to sample a signal
at least with the double of the highest frequency contained in that signal,
in order to be able to re-convert it back to analog. The highest frequency is
3.7 kHz, therefore a sampling rate of at least 7.4 kHz is required.
The standardized sampling rate is 8 kHz, i.e. 1 sample every 125 µs
3.3.4 Quantizing / Coding

For each sample the appropriate digital code is assigned, depending on the
quantization interval the sample falls in. (Note: In real PCM systems the
quantization is not linear, in order to increase the efficiency for voice trans-
mission.)
Each code consists of 8 bits, the codes are generated with the sampling rate
of 8 kHz, this results in a bit rate of 64 kBit/s.
Conclusion :
- One Voice Channel occupies a bandwidth of 64 kBit/s.
- One Voice Channel requires a transmission capacity of
1 Byte every 125 µs.
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Basic Steps of PCM

G(t)
Voice
Contains frequencies up to
20 kHz
t
H(f)
3.7 kHz
Low Pass Filtering
Cutting the frequencies
above 3.7 kHz
f
G(t) Analog Signal

Sampling Sample
Sampling rate = 8 kHz

(Sampling interval = 125 µs) t
125 µs
G(t)
3
Quantizing / Coding 2
1
Assignment of appropriate 0
digital code for each sample -1 t
-2
-3
Quantization Thresholds
Associated Codes
Each sample is converted into an 8 bit binary code

One 8 Bit Code every 125 µs X X X X X X X X
= 64 kBit/s 8 Bit / 125 µs
= 1 Voice Channel
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3.3.5 2 MBit/s Basic Frame
3.3.5.1 Frame Structure

A 2 MBit/s Basic Frame consists of 32 Time Slots (TS) with 8 Bits each.
The frame rate has to be the same as the sampling rate for the voice chan-
nels, i.e. 8 kHz or 125 µs respectively. This results in the following bit rate
for 2 MBit/s signals :
32 TS per 125 µs x 8 bit = 256 Bit/125µs = 2’048’000 Bit/s
The Time Slots are numbered from 0 to 31.
TS0 contains the Frameword (also called Frame Alignment Signal FAS) or the
Non-FAS word. The actual Frameword is contained in all even frames and is
actually used for frame alignment (Sequence ‘0011011’). The Non-FAS
word is transmitted in all odd frames and is used for error checking (i.e. Cy-
clic Redundancy Check CRC-4) , maintenance signals like Remote Alarm In-
dication (RAI) and contains bits for national use.
TS1 to TS 15 are used to carry the first 15 voice channels.
TS16 is used to carry the signalling information (CAS or CCS) for the voice
channels. )
TS17 to TS31 are used to carry the second 15 voice channels.
(Note: In systems without signalling, TS16 can be used to carry data as well.
Note: Time Slots TS1 to TS31 can also be used to carry other 64 kBit/s data
than coded voice channels, e.g. computer data links.
Conclusion :
- A 2 MBit/s signal has a transport capacity of 30 voice channels with
associated signalling or 31 data channels without signalling.
3.3.5.2 Line Coding

To get the data stream ready to be transmitted, the binary signal has to be
converted into a line code that is suitable for transmission.
The Line Code used for 2 MBit/s signals is HDB3
For more information refer to section 12.1 ’ Line Codes’on page 150
Primary Multiplexing
a
2 MBit/s Basic Frame Contains 32 Timeslots [TS] with 8 Bits each = 256 Bits
• Frameword [TS0] with CRC-4 (optional)
• 30 voice channels [TS1 - 15 , 17 - 31]
• Signalling information (CAS - Multiframe) [TS16]
FAS or Non-FAS Channel 1 Channel 15 Signalling (CAS/CCS) Channel 16 Channel 30

X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
TS0 TS1 TS2 TS3 TS15 TS16 TS17 TS29 TS30 TS31

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Frame Alignment in TS0 CRC : Bits used for Cyclic Redundancy Check (optional)
F
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RAI : Remote Alarm Indication Bit
Sn : Bits for National Use
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CRC 0 0 1 1 0 1 1 CRC 1 RAI Sn Sn Sn Sn Sn CRC 0 0 1 1 0 1 1
FAS Non-FAS FAS
TS31 TS0 TS1 TS31 TS0 TS1 TS31 TS0 TS1
Even Frame Odd Frame Even Frame
19 (195)
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3.4 Higher Order Multiplexing
3.4.1 Principle
Four independent tributary data streams of one multiplex hierarchy level are
multiplexed to the next higher level into the respective frame structure.
Since the speed of those four tributaries can be slightly different they have
to be adjusted by means of a justification mechanism (bit-stuffing). Each
Higher Order Frame has a Justification Bit for each of the four tributaries
(JB1 ... JB4) ,that can be used either as data bit or as stuff bit. Whether the
bit is data or stuff bit is indicated by 3 or 5 sets of Justification Control Bits
(JC1 ... JC4). Several sets of control bits are used to allow a majority voting
to reduce the probability of justification errors. In case a tributary has its
nominal speed, the justification rate is about half-half.
The adjusted data streams (together with the Justification Control informa-
tion) are then joined together by using Bit Interleaving Time Division Multi-
plex. (See ’Principle of Time Division Multiplex (TDM) ’on page 160)
Finally, the Frame Alignment Signal (FAS), the Remote Alarm Indication (RAI)
and the spare bits for national use are added.
3.4.2 8 MBit/s Frame

See ’8 MBit/s Frame Structure’on page 22
3.4.2.2 Line Coding

For more information refer to section 12.1 ’Line Codes’on page 150

3.4.3.2 Line Coding


3.4.4.2 Line Coding

The Line Code used for 140 MBit/s signals is CMI
Principle of PDH Higher Order Multiplexing
a
Tributary #1 Speed Bit Interleaving
FAS , RAI and Spare Bit Insertion

Data Stream Adjust Multiplexer
Tributary #2 Speed
Data Stream Adjust

1998-06-01
Datum - Date
Higher Order Frame
Tributary #3 Speed
Data Stream Adjust
F
Rev
Tributary #4 Speed
Data Stream Adjust
NUHN:95-045 Uen
Control & Synchronisation
FAS = Frame Alignment Signal

RAI = Remote Alarm Indication
21 (195)
8 MBit/s Frame Structure
a
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 211 212
Set 1 1 1 1 1 0 1 0 0 0 0 RAI Bit

12 T1 T2 T3 T4 T1 T2 T3 T2 T3 T4
Set 2 JC1 JC2 JC3 JC4 T1 T2 T3 T4 T1 T2 T3 T4 T1 T2 T3 T4 T1 T2 T3 T2 T3 T4

1998-06-01
Datum - Date
Set 4 JC1 JC2 JC3 JC4 JB1 JB2 JB3 JB4 T1 T2 T3 T4 T1 T2 T3 T4 T1 T2 T3 T4 T3 T4
848 Bit
Frame Size : 4 x 212 Bits = 848 Bits Frame Rate : = 100.38 µs -> 9’962 Frames/s
8’448’000 Bit/s
F
Rev
Explanations :
NUHN:95-045 Uen
Set 1, Bit 1 ...10 : Frame Alignment Signal (1111010000)
RAI : Remote Alarm Indication
BIT 12 : Spare bit for national use
T1, T2, T3, T4 : Actual data bits from tributary 1, 2, 3, 4 respectively
JC1, JC2, JC3, JC4 : Justification Control bits for tributary 1, 2, 3, 4 respectively
22 (195)
JB1, JB2, JB3, JB4 : Actual Justification Bits for tributary 1, 2, 3, 4 respectively
a
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 383 384
Set 1 1 1 1 1 0 1 0 0 0 0 RAI Bit
12 T1 T2 T3 T4 T1 T2 T3 T2 T3 T4

1998-06-01
Datum - Date
1536 Bit
Frame Size : 4 x 384 Bits = 1536 Bits Frame Rate : = 44.693 µs -> 22’375 Frames/s
34’368’000 Bit/s
F
Rev
Explanations :
NUHN:95-045 Uen
Set 1, Bit 1 ...10 : Frame Alignment Signal (1111010000)
BIT 12 : Spare bit for national use
23 (195)
a
Bit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 487 488
Set 1 1 1 1 1 1 0 1 0 0 0 0 0 RAI Bit Bit Bit

14 15 16 T1 T2 T3 T2 T3 T4

1998-06-01
Datum - Date

2928 Bit
Frame Size 6 x 488 Bits = 2928 Bits Frame Rate : = 21.025 µs -> 47’563 Frames/s
139’264’000 Bit/s
F
Rev
Explanations :
NUHN:95-045 Uen
Set 1, Bit 1 ... 12 : Frame Alignment Signal (111110100000)
BIT 14, 15, 16 : Spare bits for national use
24 (195)
1998-06-01 F NUHN:95-045 Uen

1998-06-01 F NUHN:95-045 Uen
4 SDH Functional Blocks
4.1 Functional Block Diagram

See ’SDH Functional Block Diagram’on page 30.
The various blocks of the diagram are briefly described below, along with
cross-references to other sections of the document, where applicable.
4.1.1 Transport Terminal Function (TTF)
4.1.1.1 SDH Physical Interface (SPI)

The SPI function provides the interface between the physical transmission
medium (optical or electrical) and the RST function.
- Optical to electrical conversion (If applicable)
- Clock recovery from incoming signal for synchronisation purposes
- Coding / Decoding
4.1.1.2 Regenerator Section Termination (RST)

The RST function acts as a source and sink for the Regenerator Section Over-
head (RSOH). A Regenerator Section is a maintenance entity between and
including two RST functions.
For further details see sections :
- 8.1.4 ’STM-1 Regenerator Section Overhead (RSOH)’on page 92
- 8.2.4 ’STM-4 Regenerator Section Overhead (RSOH)’on page 96
- 8.3.4 ’STM-16 Regenerator Section Overhead (RSOH)’on page 100.
4.1.1.3 Multiplex Section Termination (MST)

The MST function acts as a source and sink for the Multiplex Section Over-
head (MSOH). A Multiplex Section is a maintenance entity between and in-
cluding two MST functions.
- 8.1.3 ’STM-1 Multiplex Section Overhead (MSOH)’on page 92
- 8.2.3 ’STM-4 Multiplex Section Overhead (MSOH)’on page 96
- 8.3.3 ’STM-16 Multiplex Section Overhead (MSOH)’on page 100.
4.1.1.4 Multiplex Section Protection (MSP)

The MSP function provides protection for the STM-N signal against channel-
associated failures within a Multiplex Section. The two MSP functions at
both ends of the protected MS have to operate the same way. They com-
municate via a specified protocol running in K1,K2 bytes in the MSOH. This
Functional Block is optional.
For further details see section :
- 10.1 ’Multiplex Section Protection (MSP)’on page 116.
4.1.1.5 Multiplex Section Adaptation (MSA)

The MSA function provides adaptation of Higher order Paths into Adminis-
trative Units (AUs), assembly and disassembly of Administrative Unit Groups
(AUGs), AU-Pointer generation, interpretation and processing.
1998-06-01 F NUHN:95-045 Uen

- 5.9 ’Administrative Unit AU-4’on page 58
- 5.10 ’Administrative Unit Group AUG’on page 64.
4.1.2 Higher Order Connection Supervision (HCS)

The HCS function consists of the two basic functions Higher order Path
Overhead Monitor (HPOM) and Higher order Unequipped Generator (HUG).
The HPOM has access to the Higher order POH for monitoring of paths that
are not connected to HPT. The HUG generates unequipped higher order
VCs for cases when no connection is made in HPC.
4.1.3 Higher Order Path Connection (HPC)

The HPC function is the Higher order Path Cross-Connection matrix. This
matrix can be very small, e.g. in an SMUX or it can be quite large, e.g. in a
huge DXC. The HPC function may also provide a protection switch facility
on Higher order Path level.
4.1.4 Higher Order Interface (HOI)
4.1.4.1 Higher Order Path Termination (HPT) in HOI

The HPT function in HOI acts as a source and sink for the Higher order Path
Overhead, i.e. it creates a Higher order VC by generating and adding the
POH to a Higher order Container in upstream direction and it terminates and
processes the POH to determine the Path Attributes in downstream direc-
tion. A Higher order Path is a maintenance entity defined between two
Higher order Path Terminations.
- 7.3.2 ’Mapping of C-4 into VC-4’on page 90
- 7.3.3 ’VC-4 Path Overhead (Higher Order POH)’on page 90.
4.1.4.2 Lower Order Path Adaptation (LPA) in HOI

The LPA function in HOI operates at the access port of a synchronous net-
work and adapts the PDH data for transport in the synchronous domain.
For further details see section :
- 7.2.2 ’Asynchronous Mapping of 140 MBit/s into C-4’on page 88.
4.1.4.3 PDH Physical Interface (PPI) in HOI

The PPI function in HOI provides the interface between the LPA and the
physical medium (usually electrical) carrying a PDH-Tributary signal.
- Coding / Decoding
4.1.5 Higher Order Assembler (HOA)
4.1.5.1 Higher Order Path Termination (HPT) in HOA

The HPT function in HOA acts as a source and sink for the Higher order Path
Overhead, i.e. it creates a Higher order VC by generating and adding the
POH to multiplexed Tributary Unit Groups (TUGs) in upstream direction and
1998-06-01 F NUHN:95-045 Uen
it terminates and processes the POH to determine the Path Attributes in

downstream direction. A Higher order Path is a maintenance entity defined
between two Higher order Path Terminations.
- 5.8.2 ’VC-4 Path Overhead (Higher Order POH)’on page 52
- 5.8.3 ’Multiplexing of 3 x TUG-3 (containing TUG-2s) into VC-4’on page
54
- 6.7.2 ’VC-4 Path Overhead (Higher Order POH)’on page 82
- 6.7.3 ’Multiplexing of 3 x TUG-3 (containing TU-3s) into VC-4’on page
82.
4.1.5.2 Higher Order Path Adaptation (HPA)

The HPA function provides adaptation of Lower order Paths into Tributary
Units (TUs), assembly and disassembly of Tributary Unit Groups (TUGs), TU-
Pointer generation, interpretation and processing.
- 5.5.2 ’Mapping of VC-12 into TU-12’on page 40
- 5.5.3 ’Pointer Justification on TU-12 Level’on page 40
- 5.6.2 ’Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe’on page 44
- 5.7.2 ’Multiplexing of 7 x TUG-2 Into TUG-3’on page 46
- 6.5.2 ’Mapping of VC-3 into TU-3’on page 76
- 6.5.3 ’Pointer Justification on TU-3 Level’on page 76
- 6.6.2 ’Multiplexing of 1 x TU-3 into TUG-3’on page 80.
4.1.6 Lower Order Connection Supervision (LCS)

The LCS function consists of the two basic functions Lower order Path Over-
head Monitor (LPOM) and Lower order Unequipped Generator (LUG). The
LPOM has access to the Lower order POH for monitoring of paths that are
not connected to LPT. The LUG generates unequipped lower order VCs for
cases when no connection is made in LPC.
4.1.7 Lower Order Path Connection (LPC)

The LPC function is the Lower order Path Cross-Connection matrix. This ma-
trix can be very small, e.g. in an SMUX or it can be quite large, e.g. in a huge
DXC. The LPC function may also provide a protection switch facility on Low-
er order Path level.
4.1.8 Lower Order Interface (LOI)
4.1.8.1 Lower Order Path Termination (LPT)

The LPT function acts as a source and sink for the Lower order Path Over-
head, i.e. it creates a Lower order VC by generating and adding the POH to
Lower order Containers in upstream direction and it terminates and proc-
esses the POH to determine the Path Attributes in downstream direction. A
Lower order Path is a maintenance entity defined between two Lower order
Path Terminations.
1998-06-01 F NUHN:95-045 Uen

- 6.4.3 ’VC-3 Path Overhead (Lower Order POH)’on page 74.
4.1.8.2 Lower Order Path Adaptation (LPA) in LOI

The LPA function in LOI operates at the access port of a synchronous net-
work and adapts the PDH data for transport in the synchronous domain.
- 5.3.2 ’Asynchronous Mapping of 2 MBit/s into C-12’on page 36
- 6.3.2 ’Asynchronous Mapping of 34 MBit/s into C-3’on page 70.
4.1.8.3 PDH Physical Interface (PPI) in LOI

The PPI function in LOI provides the interface between the synchronous mul-
tiplexer and the physical medium (usually electrical) carrying a PDH-Tributary
signal.
- Clock recovery from incoming signal for synchronisation purposes
(2 MBit/s only)
- Coding / Decoding
4.1.9 Overhead Access (OHA)

The OHA function provides access to certain bytes in the RSOH , MSOH and
POH. The main intention is to provide service channels for maintenance pur-
poses (e.g. Engineering Orderwire or User Channel).
4.1.10 Synchronous Equipment Management Function (SEMF)

The SEMF function provides the means by which the Network Element Func-
tion (NEF) is managed. It interacts with all the other functional blocks by ex-
changing information and it contains a number of filters to provide a data
reduction on the data received from the other blocks.
4.1.11 Message Communication Function (MCF)

The MCF function provides the interface between the management agent
and the SEMF. It takes care of the DCN aspects of a network element.
4.1.12 Synchronous Equipment Timing Source (SETS)

The SETS function represents the SDH network element clock and it provides
the timing reference for all blocks that deal with the synchronous traffic.
See 11.1 ’Synchronous Equipment Timing’on page 146.
4.1.13 Synchronous Equipment Timing Physical Interface (SETPI)

The SETPI function performs the encoding and adaptation of the physical
synchronisation medium towards the SETS.
See 11.1 ’Synchronous Equipment Timing’on page 146.
4.2 SDH Functional Blocks Applied on Multiplexing Structure

See ’SDH Functional Blocks Applied on Multiplexing Structure’on page 31.
SDH Functional Block Diagram
a
TTF HCS HOI
HPOM
STM-N
MST
MSP
HPC
MSA
RST
HPT
PDH
Port
LPA
Port
SPI
PPI
HUG
HOA LCS LOI

1998-06-01
Datum - Date
SEMF SETS
LPOM
HPT
LPC
HPA
LPT
PDH
LPA
Port
PPI
OHA MCF SETPI
LUG
OHA Sync.
F
Rev
Port Q-I/F F-I/F Port
NUHN:95-045 Uen
OHA OverHead Access TTF Transport Terminal Function HOA Higher Order Assembler
SPI SDH Physical Interface HPT Higher order Path Termination
SEMF Synchronous Equipment Management Function RST Regenerator Section Termination HPA Higher order Path Adaptation
MST Multiplex Section Termination
MCF Message Communication Function MSP Multiplex Section Protection (Optional) LCS Lower order Connection Supervision
MSA Multiplex Section Adaptation LPOM Lower order Path Overhead Monitor
SETS Synchronous Equipment Timing Source LUG Lower order Unequipped Generator
HCS Higher order Connection Supervision
SETPI Synchronous Equipment Timing Physical Interface HPOM Higher order Path Overhead Monitor LPC Lower order Path Connection
HUG Higher order Unequipped Generator LOI Lower Order Interface
HPC Higher order Path Connection LPT Lower order Path Termination
LPA Lower order Path Adaptation
HOI Higher Order Interface
30 (195)
PPI PDH Physical Interface
HPT Higher order Path Termination
LPA Lower order Path Adaptation
PPI PDH Physical Interface
SDH Functional Blocks Applied on Multiplexing Structure
a
SDH PDH

xN 140Mb/s
x1
x3
x1
TUG-3 TU-3 VC-3

x3
1998-06-01
Datum - Date
x7
AU-3 VC-3 C-3 D3

RST 34Mb/s
45Mb/s
x7
MST HCS
SPI MSP MSA HPC HPT x1
F
Rev
SPI Synchronous Physical Interface
RST 6Mb/s
Regenerator Section Termination
NUHN:95-045 Uen
x3
MST Multiplex Section Termination
MSP Multiplex Section Protection
MSA Multiplex Section Adaptation
TU-12 VC-12 C-12 D12
HCS Higher Order Connection Supervision 2Mb/s
HPC Higher Order Path Connection x4
HPT Higher Order Path Termination
HPA Higher Order Path Adaption TU-11 VC-11 C-11 D11
LCS Lower Order Connection Supervision 1.5Mb/s
LPC Lower Order Path Connection
LPT Lower Order Path Termination LCS
31 (195)
LPA Lower Order Path Adaption
PPI Plesiochronous Physical Interface HPA LPC LPT LPA PPI
1998-06-01 F NUHN:95-045 Uen
4.3 SDH Logical Functions Applied on Multiplexing Structure

The logical functions used in the SDH Multiplexing Structure are :
- Mapping
- Aligning
- Pointer Processing
- Byte Interleaved Multiplexing
See ’SDH Logical Functions Applied on Multiplexing Structure’on page 33.
SDH Logical Functions Applied on Multiplexing Structure
a
SDH PDH
xN x1
140Mb/s
x3
x1
TUG-3 TU-3 VC-3
x3

1998-06-01
Datum - Date
x7
AU-3 VC-3 C-3 D3

34Mb/s
45Mb/s
x7
F
Rev
x1
6Mb/s
Pointer Processing
NUHN:95-045 Uen
x3
TU-12 VC-12 C-12 D12

Multiplexing
2Mb/s
x4
Aligning
TU-11 VC-11 C-11 D11
Mapping 1.5Mb/s
33 (195)
1998-06-01 F NUHN:95-045 Uen
5 SDH Multiplexing / Mapping for 2 MBit/s
5.1 General
5.2 Overview
This chapter explains the required steps to put a 2 MBit/s tributary signal into
an SDH structure.
This is one of the most complex multiplexing / mapping paths. If this path is
understood by the reader, all other possible paths are rather easy to follow.
Refer also to section 4 ’SDH Functional Blocks’on page 26
Some additional information can be found in A.1 ’SDH - Sizes and Nominal
Speeds’on page 156.
SDH - Multiplexing / Mapping for 2 MBit/s
a
SDH PDH
xN x1
140Mb/s
x3
x1
x3 TUG-3 TU-3 VC-3

1998-06-01
Datum - Date
x7
AU-3 VC-3 C-3 D3

34Mb/s
45Mb/s
x7
F
Rev
x1
NUHN:95-045 Uen
6Mb/s

35 (195)
1998-06-01 F NUHN:95-045 Uen
5.3 Container C-12
5.3.1 Structure of C-12

See ’Container C-12 (Asynchronous Mapping for 2 MBit/s)’on page 37
The Container C-12 has a size of 1 by 136 bytes. It consists of 4 blocks with
34 bytes each, based on a rate of 125 µs per block, thus a C-12 has a rate
of 500 µs.
5.3.2 Asynchronous Mapping of 2 MBit/s into C-12

See ’Container C-12 (Asynchronous Mapping for 2 MBit/s)’on page 37
For Asynchronous Mapping, the 4 blocks of the C-12 look similar :
Block 1 : Byte 1 : Bit 1 ... 8 -> Fixed Stuff
Byte 2 ... 33 : 256 data bits (per 125 µs)
Byte 34 : Bit 1 ... 8 -> Fixed Stuff
Block 2 : Byte 1 : Bit 1 ... 2 -> Set 1 of Justification Indic.
Bit 3 ... 6 -> Overhead bits (future use)
Bit 7 ... 8 -> Fixed Stuff
Bit 8 -> First Justification Bit
Byte 2 : Bit 1 -> Second Justification Bit
Bit 2 ... 8 -> 7 data bits (per 125 µs)
Byte 3 ... 33 : 248 data bits per 125 µs
Since the speed of the 2 MBit/s tributary can vary related to the speed of the
C-12, it has to be adjusted by means of a justification mechanism (stuffing).
The justification is explained by three typical examples below :
a) If the incoming 2 MBit/s speed is too slow, related to the speed of
the C-12, S1 and S2 are used as stuff bits.
b) If the incoming 2 MBit/s speed is exactly synchronous to the speed
of the C-12, either one of S1 or S2 is used as stuff bit, the other one
as data bit.
c) If the incoming 2 MBit/s speed is too fast, related to the speed of
the C-12, S1 and S2 are used as data bits.
Whether S1 / S2 carry data or not is indicated three times by C1 / C2. The
receiver makes a majority vote out of the three indication sets in order to
avoid wrong S1 / S2 interpretation in case one of the indication bits is erro-
neous.
Container C-12 (Asynchronous Mapping for 2 MBit/s)
a
1 Byte
R R R R R R R R
Block 1
D D D D . . . . R: Fixed Stuff-Bits
. . 256 x D . . D: Data-Bits (of 2Mb/s Tributary-Signal)
. . . . D D D D
R R R R R R R R O: Overhead-Bits (For future use)
C1 C2 O O O O R R
136 Bytes (500 µs)
Block 2
D D D D . . . . C1, C2 : Justification Indication-Bits
. . . . - C1 = ‘0’ -> S1 = Data-Bit
256 x D

1998-06-01
Datum - Date
- C1 = ‘1’ -> S1 = Stuff-Bit
. . . . D D D D - C2 = ‘0’ -> S2 = Data-Bit
R R R R R R R R - C2 = ‘1’ -> S2 = Stuff-Bit
C1 C2 O O O O R R
Block 3
D D D D . . . . S1, S2 : Actual Justification-Bits

. . 256 x D . . - Justification is indicated by C1, C2
(Majority-Vote out of 3)
F
Rev
. . . . D D D D
R R R R R R R R
C1 C2 R R R R R S1
NUHN:95-045 Uen
Block 4
S2 D D D D . . .
. . 255 x D . . Justification-Capacity
. . . . D D D D +/- 1 Bit every 500 µs -> +/- 2000 Bit/s (~ +/- 1000 ppm)
R R R R R R R R
Speed of C-12
136 Byte x 8 Bit / 500 µs = 2.176 MBit/s
37 (195)
1998-06-01 F NUHN:95-045 Uen
5.4 Virtual Container VC-12
5.4.1 Structure of VC-12

See ’Virtual Container VC-12 / Mapping of C-12 into VC-12’on page 39
The Virtual Container VC-12 has a size of 1 by 140 bytes, based on a rate
of 500 µs. It consists of four overhead bytes (V5, J2, N2, K4) and four blocks
of 34 bytes each for carrying blocks of a C-12.
Byte 1 : Overhead Byte V5
BIP-2 : Bit Interleaved Parity with 2 bits
- Used for error monitoring of
previous VC. See Note below
REI : Remote Error Indication
- Used to notify the Near End about bit
errors detected by BIP-2 at the Far End.
RFI : Remote Failure Indication
- Used to notify the Near End about a
failure condition at the Far End.
Signal Label :
- Used to specify the content of the VC-12
‘000’= Unequipped
‘001’= Equipped - Non Specific
‘010’= Asynchronous Mapped
‘100’= Byte Synchronous Mapped
RDI : Remote Defect Indication
- Used to notify the Near End about a
defect condition at the Far End.
Byte 2 ... 35 : Space to carry Block 1 of a C-12.
Byte 36 : Overhead Byte J2 (Path Trace)
- Used for Lower Order Path Trace
(15 byte identifier + 1 byte for CRC-7)
Byte 71 : Overhead Byte N2 (Network Operator Byte)
- Used for Tandem Conn. Monitoring.
Byte 106 : Overhead Byte K4
APS-Channel :
- Used for Lower Order APS SIgnalling
Spare : - For future use
Note : For more information on BIP see A.2 ’Principle of SDH Bit
Interleaved Parity (BIP)’on page 158.
5.4.2 Mapping of C-12 into VC-12

See ’Virtual Container VC-12 / Mapping of C-12 into VC-12’on page 39
The four blocks of a C-12 are just mapped into the respective spaces of the
VC-12.
Virtual Container VC-12 / Mapping of C-12 into VC-12
a
1 Byte
BIP-2 REI RFI Signal Label RDI
#1 V5 BIP-2 : Bit Interleaved Parity 2
#2
REI : Remote Error Indication (Old name FEBE)
2
C-1 k 1 RFI : Remote Failure Indication
c
Blo Signal Label : Specifies the content of the VC
#35 RDI : Remote Defect Indication (Old name = FERF)
#36 J2
#37
Path Trace J2

1998-06-01
Datum - Date
140 Bytes (500 µs)
2
C-1 k 2 J2 : Repetitively transmitted 16-Byte Frame
c
Blo containing a Path Access Point Identifier
#70
#71 N2 Network Operator Byte N2
F
Rev
#72
N2 : Used for Tandem Connection Monitoring
2
C-1 k 3
NUHN:95-045 Uen
c
Blo APS - Channel Spare
#105
#106 K4 APS - Channel : Automatic Protection Switching Signalling
#107 Spare : For future use
2
C-1 k 4
c
Blo Speed of VC-12
39 (195)
#140 140 Byte x 8 Bit / 500 µs = 2.240 MBit/s
1998-06-01 F NUHN:95-045 Uen
5.5 Tributary Unit TU-12
5.5.1 Structure of TU-12

See ’Tributary Unit TU-12’on page 41
5.5.2 Mapping of VC-12 into TU-12

See ’Mapping of VC-12 into TU-12’on page 42
5.5.3 Pointer Justification on TU-12 Level

See ’Pointer Justification on TU-12 Level’on page 43
For more information on SDH pointer justification principles
see A.4 ’Principle of SDH Pointer Processing’on page 162.
Tributary Unit TU-12
a
V1 (TU-Pointer #1) N N N N S S P P P P P P P P P P
Cell #105
Cells #106 ... #138
Cell #139 V1 + V2 N: New Data Flag (NDF)

V2 (TU-Pointer #2) - Flag NOT active -> NNNN = ‘0110’
Cell #0 - Flag active -> NNNN = ‘1001’ (Inverted)
144 Bytes (500 µs)
S: Size Indication

1998-06-01
Datum - Date
Cells #1 ... #33 - For TU-12 SS = ‘10’
P: 10-Bit Pointer Value
Cell #34 - Range for TU-12 is 0 .... 139
V3 (TU-Pointer #3) - Points to that Cell, where the VC-12 starts
Cell #35 (Location of V5)
F
Rev
Cells #36 ... #68 V3 Used for Justification
- In case of Negative Pointer Justification, this Byte
NUHN:95-045 Uen
Cell #69 is used as Auxiliary-Cell
V4 (TU-Pointer #4)
Cell #70 V4 Reserved (For future use)
Cells #71 ... #103

Speed of TU-12
Cell #104 144 Byte x 8 Bit / 500 µs = 2.304 MBit/s
41 (195)
Mapping of VC-12 into TU-12
a
V1
Important Facts :
- The TU-12 must be locked to the Higher-Order VC
35 Byte (VC-3 or VC-4)
- The 10-Bit TU-Pointer points to that Cell, where the V5-Byte

V2 of the VC-12 is located (Start of VC-12)
VC-12
35 Byte - The VC-12 can float within the TU-12 since both may have
different Clock Rates

1998-06-01
Datum - Date
- If the incoming VC-12 is too fast, the excess data is carried
by V3. The V5-Byte moves 1 Cell up in the TU-12 and the
V3 Pointer Value decrements by 1.
35 Byte -> Negative Pointer Justification
F
Rev
- If the Incoming VC-12 is too slow, the Byte immediately
after V3 (Cell #35) is used as Stuff-Byte to stuff the excess
transport capacity of the TU-12. The V5-Byte moves 1 Cell
NUHN:95-045 Uen
down in the TU-12 and the Pointer Value increments by 1.
35 Byte V4 -> Positive Pointer Justification
42 (195)
Pointer Justification on TU-12 Level
a
V1 V2
V1 0 1 1 0 1 0 I D I D I D I D I D
Cell #105 New Data Flag Size
Cell #139
V2 Inverted value of all D-Bits (Decrease)
Cell #0 indicates Negative Justification

1998-06-01
Datum - Date
Inverted value of all I-Bits (Increase)
indicates Positive Justification
Cell #34 Negative Justification Opportunity
(Used to carry Data)
V3
Cell #35
Positive Justification Opportunity
F
Rev
(Used as Stuff-Byte)
NUHN:95-045 Uen
Cell #69
V4 Under normal conditions the Pointer is justified by 1 (Increase or Decrease)
Cell #70
as soon as the phase difference between the VC-12 and the TU-12 exceeds
8 Bits (1 Byte). This is indicated by inverting either the I- or the D-Bits of the
10-Bit Pointer (Majority vote out of 5).
If a random change of the Pointer Value becomes necessary, this is indicated
by activating (inverting) the New Data Flag.
Cell #104
43 (195)
1998-06-01 F NUHN:95-045 Uen
5.6 Tributary Unit Group TUG-2
5.6.1 Structure of TUG-2

The Tributary Unit Group TUG-2 has a size of 9 by 12 bytes, based on a rate
of 125 µs.
In case structures with a rate of n x 125 µs (e.g. TU-12 with 500 µs) have to
be multiplexed / mapped into TUG-2s, a TUG-2 multiframe consisting of n
TUG-2s will result.
See ’Byte Interleaved Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe’
on page 45
5.6.2 Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe

3 x TU-12 are multiplexed into a TUG-2 multiframe, using Byte Interleaved
Time Division Multiplex (TDM).
See ’Byte Interleaved Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe’
on page 45
For more information on the principle of TDM see ’Principle of Time Division
Multiplex (TDM)’on page 160
1998-06-01 F NUHN:95-045 Uen
Byte Interleaved Multiplexing of 3 x

TU-12 into 1 TUG-2 Multiframe
V1,1 V1,2 V1,3
#105,1 #105,2 #105,3
#139,1 #139,2 #139,3

V2,1 V2,2 V2,3
#0,1 #0,2 #0,3
144 Byte / 500 µs

#34,1 #34,2 #34,3
V3,1 V3,2 V3,3
#35,1 #35,2 #35,3
#69,1 #69,2 #69,3

V4,1 V4,2 V4,3
#70,1 #70,2 #70,3
#104,1 #104,2 #104,3
TU-12 #1 TU-12 #2 TU-12 #3
Column 1 2 3 4 5 6 7 8 9 10 11 12
Row 1 V1,1 V1,2 V1,3 #105,1 #105,2 #105,3
125 µs
TUG-2 #m
Row 9 #139,1 #139,2 #139,3
Row 1 V2,1 V2,2 V2,3 #0,1 #0,2 #0,3
125 µs
TUG-2 #m+1
Row 9 #34,1 #34,2 #34,3
Row 1 V3,1 V3,2 V3,3 #35,1 #35,2 #35,3
125 µs
TUG-2 #m+2
Row 9 #69,1 #69,2 #69,3
Row 1 V4,1 V4,2 V4,3 #70,1 #70,2 #70,3
125 µs
TUG-2 #m+3
Row 9 #104,1 #104,2 #104,3
TUG-2 Multiframe
1998-06-01 F NUHN:95-045 Uen
5.7 Tributary Unit Group TUG-3 (TUG-2 Structure)
5.7.1 Structure of TUG-3 (TUG-2 Structure)

The Tributary Unit Group TUG-3 has a size of 9 by 86 bytes, based on a rate
of 125 µs.
The first Column is allocated for the TU-Pointer. If the TUG-3 is composed
with multiplexed TUG-2s, there is no TU-Pointer. Therefore a Null Pointer In-
dicator (NPI) is introduced.
See ’Byte Interleaved Multiplexing of 7 x TUG-2 into 1 TUG-3’on page 47
5.7.2 Multiplexing of 7 x TUG-2 Into TUG-3

7 x TUG-2 are multiplexed into a TUG-3, using Byte Interleaved Time Division
Multiplex (TDM). Also some Fixed Stuff and the Null Pointer Indicator (NPI)
are added.
See ’Byte Interleaved Multiplexing of 7 x TUG-2 into 1 TUG-3’on page 47
For more information on the principle of TDM see ’Principle of Time Division
Multiplex (TDM)’on page 160
5.7.3 Multiplexing of 7 x TUG-2 (containing TU-12s) into TUG-3

See ’Multiplexing of 7 x TUG-2 (containing TU-12s) into 1 TUG-3’on page
48
This is an example how a TUG-3 containing TU-12 looks like.
Byte Interleaved Multiplexing of 7 x TUG-2 into 1 TUG-3
a
TUG-2 #1 TUG-2 #2 TUG-2 #3 TUG-2 #7
Column 1 2 3 4 5 6 7 8 9 10 11 12 Column 1 2 3 12 Column 1 2 3 12 Column 1 2 3 12
Row 1 Row 1 Row 1 Row 1

1998-06-01
Datum - Date
NPI
Bit 1 8
Row 1 1 0 0 1 X X 1 1
Row 2 1 1 1 0 0 0 0 0
Row 3 X X X X X X X X
F
Rev
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 76 77 78 79 80 81 82 83 84 85 86
Row 1
NPI
Row 2
Row 3
Row 4
TUG-3 STUFF
TUG-3 STUFF
NUHN:95-045 Uen
Row 5
Row 6
Row 7
Row 8
Row 9
TUG-3
NPI (Null Pointer Indication)
The NPI is contained in the first three bytes of the first column
and is used to distinguish between TUG-3s containing TU-3s
and TUG-3s containing TUG-2s.
47 (195)
Multiplexing of 7 x TUG-2 (containing TU-12s) into 1 TUG-3
a
Column 1 2 3 4 5 6 7 8 9 10 11 12
Row 1 Vx,11 Vx,12 Vx,13
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
TUG-2 #1
Column 1 2 3 4 5 6 7 8 9 10 11 12
Row 1 Vx,21 Vx,22 Vx,23
Row 2
Row 9
TUG-2 #2 Vx = TU-12 Pointer V1 , V2 , V3 or V4
Column 1 2 3 4 5 6 7 8 9 10 11 12
Row 1 Vx,31 Vx,32 Vx,33

Row 2 Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 86
1998-06-01
Datum - Date
Row 1 Vx,11 Vx,21 Vx,31 Vx,41 Vx,51 Vx,61 Vx,71 Vx,12 Vx,22 Vx32 Vx,42 Vx,52 Vx,62 Vx,72 Vx,13 Vx,23 Vx,33 Vx,43 Vx,53 Vx,63 Vx,73
Row 9
NPI
Row 2
TUG-2 #3 Row 3
Row 4
TUG-3 STUFF
TUG-3 STUFF
Column 1 2 3 4 5 6 7 8 9 10 11 12 Row 5
Row 1 Vx,41 Vx,42 Vx,43 Row 6
Row 2 Row 7
Row 8
Row 9 Row 9
TUG-2 #4 TUG-3
F
Rev
Column 1 2 3 4 5 6 7 8 9 10 11 12
Row 1 Vx,51 Vx,52 Vx,53
Row 2
NUHN:95-045 Uen
Row 9
TUG-2 #5
Column 1 2 3 4 5 6 7 8 9 10 11 12
Row 1 Vx,61 Vx,62 Vx,63
Row 2
Row 9
TUG-2 #6
Column 1 2 3 4 5 6 7 8 9 10 11 12
Row 1 Vx,71 Vx,72 Vx,73
Row 2
48 (195)
Row 9
TUG-2 #7
1998-06-01 F NUHN:95-045 Uen

1998-06-01 F NUHN:95-045 Uen
5.8 Virtual Container VC-4 (TUG Structure)
5.8.1 Structure of VC-4 (TUG Structure)

The Virtual Container VC-4 has a size of 9 by 261 bytes, based on a rate of
125 µs.
See ’Virtual Container VC-4 (TUG Structure)’on page 51
Virtual Container VC-4 (TUG Structure)
a
259
261
260
Column 1 2 3 4 5 6 7 8
Row 1 J1
Row 2 B3
Row 3 C2
Row 4
Row 5
G1
F2
VC-4
Row 6 H4 Payload

1998-06-01
Datum - Date
Row 7 F3
Row 8 K3
Row 9 N1
F
Rev
VC-4 Path Overhead (Higher Order POH)
NUHN:95-045 Uen
Speed of VC-4
261 x 9 Byte x 8 Bit / 125 µs = 150.336 MBit/s
51 (195)
1998-06-01 F NUHN:95-045 Uen
5.8.2 VC-4 Path Overhead (Higher Order POH)

The VC-4 POH is part of the VC-4 and has a size of 9 bytes.
The following functions are assigned to the various bytes :
J1 : Path Trace
Used to repetitively transmit a Higher Order Path Access Point Iden-
tifier. The message is transmitted in the J1 Byte of a multiframe of
16 consecutive VC-4s. The start of the message is indicated by the
byte carrying the CRC-7. (Old standard: Multiframe of 64 consecu-
tive VC-4s, start of message is CR/LF)
B3 : BIP-8 Bit Interleaved Parity
Used for Higher Order Path Error Monitoring.
For more information on BIP see A.2 ’Principle of SDH Bit Inter-
leaved Parity (BIP)’on page 158.
C2 : Signal Label
Indicates the composition of the VC.
G1 : Path Status
Used to convey a path terminating status and performance back to
the path originator.
F2 : Path User Channel
Used for user communication purposes between path elements.
H4 : Position Indicator
Used as payload specific position indicator
K3 : Automatic Protection Switching Channel
Used for Higher Order APS signalling.
N1 : Network Operator Byte
Used for Higher Order Tandem Connection Monitoring.
See ’VC-4 Path Overhead (Higher Order POH)’on page 53
a
J1 : Path Trace
- Used to repetitively transmit a Higher Order Path Access Point Identifier
16 Byte Frame, 15 Byte Identifier + 1 Byte CRC-7 (Old = 64 Byte Frame)
J1 B3 : BIP-8 (HO Path-BIP)
- Bit Interleaved Parity, used for path error monitoring
B3 C2 : Signal Label
- Indicates the composition of the VC Examples : 00hex = Unequipped
C2 01hex
02hex
= Equipped Non-Specific
= TUG Structure
12hex = Async Mapping of 140MBit/s (C-4)
G1 G1 : Path Status Byte

1998-06-01
Datum - Date
- Used to convey path terminating status and performance back to path originator
F2 REI RDI Spare
REI : Remote Error Indication (Old = FEBE)
RDI : Remote Defect Indication ( Old = FERF)
H4 Spare : For future use
F3 - Used for user communication purposes between path elements
F
Rev
K3 - Used as a payload specific position indicator
NUHN:95-045 Uen
(e.g. Indication which TUG-2 of TUG-2 Multiframe is mapped in next VC-4)
N1 F3 : Path User Channel
- Used for user communication purposes between path elements
APS Spare APS : Used for Higher Order APS Signalling
Spare : For future use
53 (195)
- Used for Higher Order Tandem Connection Monitoring
1998-06-01 F NUHN:95-045 Uen
5.8.3 Multiplexing of 3 x TUG-3 (containing TUG-2s) into VC-4

See ’Byte Interleaved Multiplexing of 3 x TUG-3 (containing TUG-2s) into
VC-4’on page 55
5.8.4 VC-4 with TU-12 Multiplexing

See ’VC-4 with TU-12 Multiplexing’on page 56
See also A.5 ’TU-12 Numbering in a VC-4’on page 168.
5.8.5 Multiplexing Mechanism for 63 x TU-12 into VC-4

See ’Multiplexing Mechanism for 63 x TU-12 into VC-4’on page 57
See also A.5 ’TU-12 Numbering in a VC-4’on page 168.
Byte Interleaved Multiplexing of 3 x TUG-3
a
(containing TUG-2s) into VC-4
TUG-3 #1 TUG-3 #2 TUG-3 #3

Column 1 2 3 4 5 6 84 85 86 Column 1 2 3 4 5 6 84 85 86 Column 1 2 3 4 5 6 84 85 86
Row 1 Row 1 Row 1
NPI
NPI
NPI
Row 2 Row 2 Row 2
TUG-3 STUFF
TUG-3 STUFF
TUG-3 STUFF
Row 3 Row 3 Row 3
Row 4 Row 4 Row 4
TUG-3 STUFF
TUG-3 STUFF
TUG-3 STUFF
Row 5 Row 5 Row 5
Row 6 Row 6 Row 6
Row 7 Row 7 Row 7
Row 8 Row 8 Row 8
Row 9 Row 9 Row 9

1998-06-01
Datum - Date
F
Rev
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 251 252 253 254 255 256 257 258 259 260 261
NUHN:95-045 Uen
Row 1
TUG-3 #1 Stuff NPI #1
Row 2
TUG-3 #1 Stuff
TUG-3 #2 Stuff
TUG-3 #3 Stuff
VC-4 Path OH
Row 3
VC-4 Stuff
VC-4 Stuff
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
VC-4
55 (195)
144 Bytes (500 µs)
36 Bytes 36 Bytes 36 Bytes 36 Bytes (125 µs)

9 Bytes 9 Bytes 9 Bytes 9 Bytes
V4
V3
V2
V1
VC-4 #n
63 x TU-12
Containing V1s
will contain V2s

Indicator H4 = 01 (hex)
indicates that VC-4 #n+1
VC-4 #n+3
VC-4 #n+2
VC-4 #n+1
TU-12 Multiframe Position
Mapped into
Mapped into
Mapped into
Higher Order Path Overhead
(H4 = 00 (hex))
(H4 = 03 (hex))
(H4 = 02 (hex))
VC-4/TUG-3 Stuff , TUG-3 NPIs
Column
Column
Column
Column
VC-4
VC-4
VC-4
VC-4
Column
VC-4
Row
Row
Row
Row
Row
Row
Row
Row
Row
Row 9
Row 2
Row 1
Row 9
Row 2
Row 1
Row 9
Row 2
Row 1
Row 9
Row 2
9
8
7
6
5
4
3
2
1
J1
F3
F2
N1
K3
H4
C2
B3
TU-12 #1/1/1 2MB #01 199 136 073 010 001

G1
TU-12 #2/1/1 2MB #02 200 137 074 011 VC-4 STUFF 002
TU-12 #3/1/1 2MB #03 201 138 075 012 VC-4 STUFF 003
TU-12 #1/2/1 2MB #04 202 139 076 013 TUG-3 #1 STUFF NPI #1 004
TU-12 #1/3/1 2MB #07 205 142 079 016 TUG-3 #1 STUFF 007
TU-12 #2/3/1 2MB #08 206 143 080 017 TUG-3 #2 STUFF 008
TU-12 #3/3/1 2MB #09 207 144 081 018 TUG-3 #3 STUFF 009
TU-12 #1/4/1 2MB #10 208 145 082 019
TU-12 #2/4/1 2MB #11 209 146 083 020
TU-12 #3/4/1 2MB #12 210 147 084 021
TU-12 #1/5/1 2MB #13 211 148 085 022
TU-12 #2/5/1 2MB #14 212 149 086 023
J1 :
F3 :
F2 :
N1 :
K3 :
H4 :
C2 :
B3 :
G1 :
TU-12 #3/5/1 2MB #15 213 150 087 024

TU-12 #1/6/1 2MB #16 214 151 088 025
TU-12 #2/6/1 2MB #17 215 152 089 026
TU-12 #3/6/1 2MB #18 216 153 090 027
TU-12 #1/7/1 2MB #19 217 154 091 028
TU-12 #2/7/1 2MB #20 218 155 092 029
TU-12 #3/7/1 2MB #21 219 156 093 030
TU-12 #1/1/2 2MB #22 220 157 094 031
VC-4 with TU-12 Multiplexing
TU-12 #2/1/2 2MB #23 221 158 095 032

TU-12 #3/1/2 2MB #24 222 159 096 033
TU-12 #1/2/2 2MB #25 223 160 097 034
TU-12 #2/2/2 2MB #26 224 161 098 035
TU-12 #3/2/2 2MB #27 225 162 099 036
TU-12 #1/3/2 2MB #28 226 163 100 037
TU-12 #2/3/2 2MB #29 227 164 101 038
TU-12 #3/3/2 2MB #30 228 165 102 039
TU-12 #1/4/2 2MB #31 229 166 103 040
TU-12 #2/4/2 2MB #32 230 167 104 041
TU-12 #3/4/2 2MB #33 231 168 105 042
TU-12 #1/5/2 2MB #34 232 169 106 043
TU-12 #2/5/2 2MB #35 233 170 107 044
TU-12 #3/5/2 2MB #36 234 171 108 045
TU-12 #1/6/2 2MB #37 235 172 109 046
TU-12 #2/6/2 2MB #38 236 173 110 047
TU-12 #3/6/2 2MB #39 237 174 111 048
Higher Order Path Overhead (HO POH)
TU-12 #1/7/2 2MB #40 238 175 112 049

Signal Label (Indicates the composition of the VC)
TU-12 #2/7/2 2MB #41 239 176 113 050

TU-12 #3/7/2 2MB #42 240 177 114 051
TU-12 #1/1/3 2MB #43 241 178 115 052
TU-12 #2/1/3 2MB #44 242 179 116 053
TU-12 #3/1/3 2MB #45 243 180 117 054
APS - Channel (Used for Higher Order Path APS Signalling)
TU-12 #1/2/3 2MB #46 244 181 118 055

TU-12 #2/2/3 2MB #47 245 182 119 056
TU-12 #3/2/3 2MB #48 246 183 120 057
Path BIP-8 (Bit Interleaved Parity, used for path error monitoring)
Network Operator Byte (Used for Tandem Connection Monitoring)
TU-12 #1/3/3 2MB #49 247 184 121 058

TU-12 #2/3/3 2MB #50 248 185 122 059
TU-12 #3/3/3 2MB #51 249 186 123 060
TU-12 #1/4/3 2MB #52 250 187 124 061
TU-12 #2/4/3 2MB #53 251 188 125 062
TU-12 #3/4/3 2MB #54 252 189 126 063
TU-12 #1/5/3 2MB #55 253 190 127 064
TU-12 #2/5/3 2MB #56 254 191 128 065
TU-12 #3/5/3 2MB #57 255 192 129 066
TU-12 #1/6/3 2MB #58 256 193 130 067
Path User Channel (Used for user communication purposes between path elements)
Path User Channel (Used for user communication purposes between path elements)
Path Trace (Used to repetitively transmit a Higher Order Path Access Point Identifier)
TU-12 #2/6/3 2MB #59 257 194 131 068

Position Indicator (Used as a payload specific position indicator, e.g. TUG-2 Multiframe)
TU-12 #3/6/3 2MB #60 258 195 132 069

TU-12 #1/7/3 2MB #61 259 196 133 070
TU-12 #2/7/3 2MB #62 260 197 134 071
Row 1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1
TU-12 #3/7/3 2MB #63 261 198 135 072

Path Status (Used to convey path terminating status and performance back to path originator)
NUHN:95-045 Uen F 1998-06-01

Dokumentnr - Document no. Rev Datum - Date a
56 (195) SDH - Basics (Introduction)
1998-06-01 F NUHN:95-045 Uen
Multiplexing Mechanism for

63 x TU-12 into VC-4
TU-12 #1 2MB #01
TUG-2 #1 TU-12 #2 2MB #22
TU-12 #3 2MB #43
TU-12 #1 2MB #04
TUG-2 #2 TU-12 #2 2MB #25
TU-12 #3 2MB #46
TU-12 #1 2MB #07
TUG-2 #3 TU-12 #2 2MB #28
TU-12 #3 2MB #49
TU-12 #1 2MB #10
TUG-3 #1 TUG-2 #4 TU-12 #2 2MB #31
TU-12 #3 2MB #52
TU-12 #1 2MB #13
TUG-2 #5 TU-12 #2 2MB #34
TU-12 #3 2MB #55
TU-12 #1 2MB #16
TUG-2 #6 TU-12 #2 2MB #37
TU-12 #3 2MB #58
TU-12 #1 2MB #19
TUG-2 #7 TU-12 #2 2MB #40
TU-12 #3 2MB #61
TU-12 #1 2MB #02
TUG-2 #1 TU-12 #2 2MB #23
TU-12 #3 2MB #44
TU-12 #1 2MB #05
TUG-2 #2 TU-12 #2 2MB #26
TU-12 #3 2MB #47
TU-12 #1 2MB #08
TUG-2 #3 TU-12 #2 2MB #29
TU-12 #3 2MB #50
TU-12 #1 2MB #11
VC-4 TUG-3 #2 TUG-2 #4 TU-12 #2
TU-12 #3
2MB #32
2MB #53
TU-12 #1 2MB #14
TUG-2 #5 TU-12 #2 2MB #35
TU-12 #3 2MB #56
TU-12 #1 2MB #17
TUG-2 #6 TU-12 #2 2MB #38
TU-12 #3 2MB #59
TU-12 #1 2MB #20
TUG-2 #7 TU-12 #2 2MB #41
TU-12 #3 2MB #62
TU-12 #1 2MB #03
TUG-2 #1 TU-12 #2 2MB #24
TU-12 #3 2MB #45
TU-12 #1 2MB #06
TUG-2 #2 TU-12 #2 2MB #27
TU-12 #3 2MB #48
TU-12 #1 2MB #09
TUG-2 #3 TU-12 #2 2MB #30
TU-12 #3 2MB #51
TU-12 #1 2MB #12
TUG-3 #3 TUG-2 #4 TU-12 #2 2MB #33
TU-12 #3 2MB #54
TU-12 #1 2MB #15
TUG-2 #5 TU-12 #2 2MB #36
TU-12 #3 2MB #57
TU-12 #1 2MB #18
TUG-2 #6 TU-12 #2 2MB #39
TU-12 #3 2MB #60
TU-12 #1 2MB #21
TUG-2 #7 TU-12 #2 2MB #42
TU-12 #3 2MB #63
1998-06-01 F NUHN:95-045 Uen
5.9 Administrative Unit AU-4
5.9.1 Structure of AU-4

The Administrative Unit AU-4 has a size of 9 by 261 bytes plus 9 bytes used
for the AU-Pointer, based on a rate of 125µs.
See ’Administrative Unit AU-4’on page 59
5.9.2 Mapping of VC-4 into AU-4

See ’Mapping of VC-4 into AU-4’on page 60
5.9.3 Pointer Justification on AU-4 Level
5.9.3.1 Justification Opportunities and Indications

See ’Pointer Justification on AU-4 Level’on page 61
see A.4 ’Principle of SDH Pointer Processing’on page 162
5.9.3.2 Example for Positive Pointer Justification

See ’Positive Pointer Justification on AU-4 Level (Example)’on page 62
5.9.3.3 Example for Negative Pointer Justification

See ’Negative Pointer Justification on AU-4 Level (Example)’on page 63
Administrative Unit AU-4
a
264
265
266
267
268
269
270
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
Row 1 #522 #523 #524 #607 #608
Row 2 #609 #610 #611 #694 #695
Row 3
AU-4 Pointer #696 #697 #698 #781 #782
Row 4 H1 Y Y H2 1* 1* H3 H3 H3 #0 #1 #2 #85 #86
Row 5
AU-4
#87 #88 #89 #172 #173
Row 6 #174 #175 #176

Payload #259 #260
Row 7 #261 #262 #263 #346 #347
Row 8 #348 #349 #350 #433 #434

1998-06-01
Datum - Date
Row 9 #435 #436 #437 #520 #521
N N N N S S P P P P P P P P P P
F
Rev
NUHN:95-045 Uen
H1 + H2: N : New Data Flag (NDF) Y-Bytes: Stuff Byte (Value = 93 hex)
- Flag NOT active -> NNNN = ‘0110’ - Used as “H1” in AU-3 Pointer
- Flag active -> NNNN = ‘1001’ (Inverted)
S: Size Indication 1*-Bytes: Stuff Byte (Value = FF hex)
- Not specified on AU-4 Level (Don’t Care Bits) - Used as “H2” in AU-3 Pointer
P: 10-Bit Pointer Value H3-Bytes: Used for Justification
- Range for AU-4 is 0 .... 782 - In case of Negative Pointer
- Points to that Cell, where the VC-4 starts
59 (195)
Justification, these Bytes
(Location of J1) are used as Auxiliary-Cells
Mapping of VC-4 into AU-4
a
Important Facts :
- The AU-4 must be locked to the STM-N Frame

AU-4
- The 10-Bit AU-Pointer points to that Cell, where
the J1-Byte of the VC-4 is located (Start of VC-4)
- The VC-4 can float in 3-Byte steps within the AU-4

1998-06-01
Datum - Date
since both may have different Clock Rates
- If the incoming VC-4 is too fast, the excess data

is carried by the H3-Bytes. The J1-Byte moves
3 Cells up in the AU-4 and the Pointer Value
VC-4 decrements by 1.
F
Rev
-> Negative Pointer Justification
- If the Incoming VC-4 is too slow, the 3 Bytes
NUHN:95-045 Uen
immediately after the H3-Bytes are used as
Stuff-Bytes to stuff the excess transport capacity
of the AU-4. The J1-Byte moves 3 Cells down in
the AU-4 and the Pointer Value increments by 1.
-> Positive Pointer Justification
60 (195)
Pointer Justification on AU-4 Level
a
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
Row 1
Negative Justification Opportunity
Row 2 (Used to carry excess Data)
Row 3
Row 4 H1 Y Y H2 1* 1* H3 H3 H3
Row 5
Row 6
Row 7 (Used as Stuff-Bytes)
Row 8

1998-06-01
Datum - Date
Row 9
H1 H2
0 1 1 0 S S I D I D I D I D I D Under normal conditions the Pointer is
F
Rev
New Data Flag Size justified by 1 (Increase or Decrease) as
soon as the phase difference between
the VC-4 and the AU-4 exceeds 3 Bytes.
NUHN:95-045 Uen
This is indicated by inverting either the
I- or the D-Bits of the 10-Bit Pointer.
(Majority vote out of 5)
Inverted value of all D-Bits (Decrease) If a random change of the Pointer Value
indicates Negative Justification becomes necessary, this is indicated by
activating (inverting) the New Data Flag.
61 (195)
Positive Pointer Justification on AU-4 Level (Example)
a
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 270
AU-4 #m
H1 Y Y H2 1* 1* H3 H3 H3
Pointer value = 176 J1

B3
C2
G1
F2 VC-4 #n
AU-4 #m+1
H4
Z3
H1 Y Y H2 1* 1* H3 H3 H3 Z4
Z5
B3

1998-06-01
Datum - Date
C2
G1
F2 VC-4 #n+1
AU-4 #m+2
3 Stuff Bytes inserted H4

Z3
H1 Y Y H2 1* 1* H3 H3 H3 Z4
Z5
B3
All I-Bits inverted
F
Rev
C2
G1
F2 VC-4 #n+2
AU-4 #m+3
H4
Z3
NUHN:95-045 Uen
H1 Y Y H2 1* 1* H3 H3 H3 Z4
Z5
B3
(Incremented by 1) C2
G1
F2 VC-4 #n+3
AU-4 #m+4
H4
Z3
H1 Y Y H2 1* 1* H3 H3 H3 Z4
Z5
Pointer value = 177
62 (195)
Negative Pointer Justification on AU-4 Level (Example)
a
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 270
AU-4 #m
H1 Y Y H2 1* 1* H3 H3 H3

B3
C2
G1
F2 VC-4 #n
AU-4 #m+1
H4
Z3
H1 Y Y H2 1* 1* H3 H3 H3 Z4
Z5
B3

1998-06-01
Datum - Date
C2
G1
F2 VC-4 #n+1
AU-4 #m+2
H3 Bytes used for Data H4

Z3
H1 Y Y H2 1* 1* Z4
Z5
B3
All D-Bits inverted
F
Rev
C2
G1
F2 VC-4 #n+2
AU-4 #m+3
H4
Z3
NUHN:95-045 Uen
H1 Y Y H2 1* 1* H3 H3 H3 Z4
Z5
B3
(Decremented by 1) C2
G1
F2 VC-4 #n+3
AU-4 #m+4
H4
Z3
H1 Y Y H2 1* 1* H3 H3 H3 Z4
Z5
Pointer value = 175
63 (195)
1998-06-01 F NUHN:95-045 Uen
5.10 Administrative Unit Group AUG
5.10.1 Structure of AUG

The Administrative Unit Group AUG has a size of 9 by 261 bytes plus 9 bytes
allocated for the AU-Pointer(s), based on a rate of 125µs.
See ’Administrative Unit Group AUG’on page 65
5.10.2 Multiplexing of 1 x AU-4 into AUG

One AUG is able to carry one AU-4. In the european standard an AUG
“looks” the same as an AU-4. The AUG is only important in the USA stand-
ard, where 3 x AU-3 are multiplexed into it.
Administrative Unit Group AUG
a
267
268
269
270
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
Row 1
Row 2
Row 3
AU - Pointer(s)
Row 4
Row 5
Row 6
Payload

Row 7
1998-06-01
Datum - Date
Row 8
Row 9
F
Rev
Capacity of AUG : 1 x AU-4 (European standard)
NUHN:95-045 Uen
or
3 x AU-3 (USA standard)
65 (195)
1998-06-01 F NUHN:95-045 Uen
6.1 General
6.2 Overview
This chapter explains the required steps to put a 34 MBit/s tributary signal
into an SDH structure.
a
SDH PDH
xN x1
140Mb/s
x3
x1
x3 TUG-3 TU-3 VC-3

1998-06-01
Datum - Date
x7
AU-3 VC-3 C-3 D3

34Mb/s
45Mb/s
x7
F
Rev
x1
NUHN:95-045 Uen
6Mb/s

67 (195)
1998-06-01 F NUHN:95-045 Uen
6.3 Container C-3

The Container C-3 has a size of 9 rows by 84 columns based on a rate of
125 µs.
(9 x 84 bytes = 756 bytes)
See ’Container C-3’on page 69.
Container C-3
a
82
84
83
Column 1 2 3 4 5 6 7
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6 C-3

1998-06-01
Datum - Date
Row 7
Row 8
Row 9
F
Rev
NUHN:95-045 Uen
Speed of C-3
69 (195)
1998-06-01 F NUHN:95-045 Uen

See ’Asynchronous Mapping for 34 MBit/s into C-3’on page 71.
3 groups of 3 rows are structured the same way. They consist of 60 blocks
with 4 bytes each and some additional fixed stuff. One such structure is also
called subframe.
For Asynchronous Mapping, the 60 blocks of one subframe look similar :
Blocks 10, 20 : Byte 1 : Bit 1 ... 6 -> Fixed Stuff
30, 40, 50 Bit 7 -> Justification Indication C1
Bit 8 -> Justification Indication C2
Byte 2 ... 4 : 24 data bits
Block 60 : Byte 1 : Fixed Stuff
Bit 8 -> Justification Bit S1
Byte 3 : Bit 1 -> Justification Bit S2
Bit 2 ... 8 -> 7 data bits
Byte 4 : 8 data bits
Remaining, : Byte 1 : Fixed Stuff
Blocks Byte 2 ... 4 : 24 data bits
Since the speed of the 34 MBit/s tributary can vary related to the speed of
the C-3, it has to be adjusted by means of a justification mechanism (stuff-
ing). The justification is explained by three typical examples below :
a) If the incoming 34 MBit/s speed is too slow, related to the speed of
the C-3, S1 and S2 are used as stuff bits.
b) If the incoming 34 MBit/s speed is exactly synchronous to the speed
of the C-3, either one of S1 or S2 is used as stuff bit, the other one
as data bit.
c) If the incoming 34 MBit/s speed is too fast, related to the speed of
the C-3, S1 and S2 are used as data bits.
Whether S1 / S2 carry data or not is indicated five times by C1 / C2. The re-
ceiver makes a majority vote out of the five indication sets in order to avoid
wrong S1 / S2 interpretation in case one (or two) of the indication bits is
(are) erroneous.
Asynchronous Mapping for 34 MBit/s into C-3
a
Note : Only 1 of 3 Subframes (3 Rows) are shown
Block 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
R R R R R R R R R C R R R R R R R R R C
Blks 21 ... 40 R R R R R R R R R C R R R R R R R R R C
Blks 41 ... 60 R R R R R R R R R C R R R R R R R R R S
4 Bytes 1 Byte
84 Bytes

1998-06-01
Datum - Date
Byte 1 Byte 2 Byte 3 Byte 4 D: Data Bits
(of the 34 MBit/s Tributary)
R - Block RRRRRRRR DDD . . . 24 x D . . . DDD R: Fixed Stuff Bits
F
Rev
C - Block R R R R R R C1C2 D D D . . . 24 x D . . . DDD C1 , C2 : Justification Indication-Bits
NUHN:95-045 Uen
- Cx = ‘0’ -> Sx = Data-Bit
- Cx = ‘1’ -> Sx = Stuff-Bit
S - Block R R R R R R R R R R R R R R R S1 S2 D D D D D D D D D D D D D D D
S1 , S2 : Actual Justification-Bits
S - Block RRRRRRRR - Justification is indicated
by the C1 , C2-Bits
Justification-Capacity
71 (195)
3 x +/- 1 Bit every 125 µs -> +/- 24’000 Bit/s (~ +/- 700 ppm)
1998-06-01 F NUHN:95-045 Uen

The Virtual Container VC-3 has a size of 9 rows by 85 columns based on a
rate of 125 µs.
See ’Virtual Container VC-3’on page 73

The Mapping of C-3 into VC-3 is very simple. Just the VC-3 Path Overhead
is added.
See ’Virtual Container VC-3’on page 73
Virtual Container VC-3
a
83
85
84
Column 1 2 3 4 5 6 7 8
Row 1 J1
Row 2 B3
Row 3 C2
Row 4 G1
Row 5
Row 6
F2
H4 C-3

1998-06-01
Datum - Date
Row 7 F3
Row 8 K3
Row 9 N1
F
Rev
VC-3 Path Overhead (Lower Order POH)
NUHN:95-045 Uen
Speed of VC-3
73 (195)
1998-06-01 F NUHN:95-045 Uen
6.4.3 VC-3 Path Overhead (Lower Order POH)

The VC-3 POH is part of the VC-3 and has a size of 9 bytes.
It is very similar to the VC-4 Path Overhead.
Note : The VC-3 Path Overhead in the european standard is Lower
Order, in the USA standard it is Higher Order.
(Refer to PDH - SDH Multiplexing / Mapping Structure)
The following functions are assigned to the various bytes :
J1 : Path Trace
Used to repetitively transmit a Lower Order Path Access Point Iden-
tifier. The message is transmitted in the J1 Byte of a multiframe of
16 consecutive VC-3s. The start of the message is indicated by the
byte carrying the CRC-7. (Old standard: Multiframe of 64 consecu-
tive VC-3s, start of message is CR/LF)
B3 : BIP-8 Bit Interleaved Parity
Used for Lower Order Path Error Monitoring.
For more information on BIP see A.2 ’Principle of SDH Bit Inter-
leaved Parity (BIP)’on page 158.
C2 : Signal Label
Indicates the composition of the VC.
G1 : Path Status
Used to convey a path terminating status and performance back to
the path originator.
Not relevant in Lower Order POH.
Used for Higher Order APS signalling.
Used for Higher Order Tandem Connection Monitoring.
See ’VC-3 Path Overhead (Lower Order POH)’on page 75
VC-3 Path Overhead (Lower Order POH)
a
J1 : Path Trace
- Used to repetitively transmit a Lower Order Path Access Point Identifier
16 Byte Frame, 15 Byte Identifier + 1 Byte CRC-7 (Old = 64 Byte Frame)
J1 B3 : BIP-8 (LO Path-BIP)
- Bit Interleaved Parity, used for path error monitoring
B3 C2 : Signal Label
- Indicates the composition of the VC Examples : 00hex = Unequipped
C2 01hex
04hex
= Equipped Non-Specific
= Async Mapping of 34Mb/s (VC-3)
13hex = ATM Mapping
G1

1998-06-01
Datum - Date
G1 : Path Status Byte
F2 - Used to convey path terminating status and performance back to path originator
REI : Remote Error Indication (Old = FEBE)
REI RDI Spare RDI : Remote Defect Indication ( Old = FERF)
H4 Spare : For future use
F3
F
Rev
K3 H4 : Position Indicator
NUHN:95-045 Uen
- Used as a payload specific position indicator (Not relevant in Lower Order VC-3)
N1 F3 : Path User Channel

APS Spare APS : Used for Higher Order APS Signalling
Spare : For future use
75 (195)
- Used for Lower Order Tandem Connection Monitoring
1998-06-01 F NUHN:95-045 Uen
6.5 Tributary Unit TU-3
6.5.1 Structure of TU-3

The Tributary Unit TU-3 has a size of 9 rows by 86 columns based on a rate
of 125 µs.
See ’Tributary Unit TU-3’on page 77
6.5.2 Mapping of VC-3 into TU-3

See ’Mapping of VC-3 into TU-3’on page 78
6.5.3 Pointer Justification on TU-3 Level

See ’Pointer Justification on TU-3 Level’on page 79
see A.4 ’Principle of SDH Pointer Processing’on page 162
Refer also to :
’Positive Pointer Justification on AU-4 Level (Example)’on page 62 and
’Negative Pointer Justification on AU-4 Level (Example)’on page 63.
Tributary Unit TU-3
a
82
83
84
85
86
Column 1 2 3 4 5 6 7 8 9
Row 1 H1 #595 #595 #597 #677 #678 #679
Row 2 H2 #680 #681 #682 #683 #763 #764
Row 3 H3 #0 #1 #2 #3 #4 #5 #6 #82 #83 #84
Row 4 #85 #86 #87 #88 #89 #167 #168 #169

TU-3
Fixed Stuff
Row 5 #170 #171 #172 #173 #253 #254
#255 #256 #257

Payload #338 #339
Row 6
Row 7 #340 #341 #342 #423 #424
#425 #426 #427 #508 #509

Row 8
1998-06-01
Datum - Date
Row 9 #510 #511 #512 #593 #594
TU-3 Pointer
F
Rev
N N N N S S P P P P P P P P P P
NUHN:95-045 Uen
H1 + H2: N : New Data Flag (NDF) H3-Byte: Used for Justification
- Flag NOT active -> NNNN = ‘0110’ - In case of Negative Pointer
- Flag active -> NNNN = ‘1001’ (Inverted) Justification, this Byte is
used as Auxiliary-Cell
S: Size Indication
- Not specified on TU-3 Level (Don’t Care Bits)
P: 10-Bit Pointer Value
- Range for TU-3 is 0 .... 764
- Points to that Cell, where the VC-3 starts
77 (195)
(Location of J1)
Mapping of VC-3 into TU-3
a
Important Facts :
- The TU-3 must be locked to the Higher Order VC

TU-3 (VC-4)
- The 10-Bit TU-Pointer points to that Cell, where

the J1-Byte of the VC-3 is located (Start of VC-3)

1998-06-01
Datum - Date
- The VC-3 can float in 1-Byte steps within the TU-3
since both may have different Clock Rates
- If the incoming VC-3 is too fast, the excess data

is carried by the H3-Byte. The J1-Byte moves
VC-3 1 Cell up in the TU-3 and the Pointer Value
F
Rev
decrements by 1.
-> Negative Pointer Justification
NUHN:95-045 Uen
- If the Incoming VC-3 is too slow, the Byte
immediately after the H3-Byte is used as
Stuff-Byte to stuff the excess transport capacity
of the TU-3. The J1-Byte moves 1 Cell down in
the TU-3 and the Pointer Value increments by 1.
-> Positive Pointer Justification
78 (195)
Pointer Justification on TU-3 Level
a
Column 1 2 3 4 5 6 85 86
Row 1 H1
Negative Justification Opportunity
Row 2 H2 (Used to carry excess Data)
Row 3 H3
Row 4
Row 5
Fixed Stuff

Row 6 (Used as Stuff-Byte)
Row 7

1998-06-01
Datum - Date
Row 8
Row 9
H1 H2
Under normal conditions the Pointer is
F
Rev
0 1 1 0 S S I D I D I D I D I D justified by 1 (Increase or Decrease) as
New Data Flag Size soon as the phase difference between
NUHN:95-045 Uen
the VC-3 and the TU-3 exceeds 1 Byte.
This is indicated by inverting either the
I- or the D-Bits of the 10-Bit Pointer.
(Majority vote out of 5)
Inverted value of all D-Bits (Decrease) If a random change of the Pointer Value
indicates Negative Justification becomes necessary, this is indicated by
activating (inverting) the New Data Flag.
79 (195)
1998-06-01 F NUHN:95-045 Uen
6.6 Tributary Unit Group TUG-3 (TU-3 Structure)
6.6.1 Structure of TUG-3 (TU-3 Structure)

The Tributary Unit Group TUG-3 has a size of 9 rows by 86 columns based
on a rate of 125 µs.
See ’Tributary Unit Group TUG-3 (TU-3 Structure)’on page 81
6.6.2 Multiplexing of 1 x TU-3 into TUG-3

One TUG-3 is able to carry one TU-3 and it “looks” the same as the TU-3.
Tributary Unit Group TUG-3 (TU-3 Structure)
a
84
86
85
Column 1 2 3 4 5 6 7 8
Row 1
Row 2
Row 3
TU - Pointer
Row 4
Row 5
TUG-3
Row 6 Payload

1998-06-01
Datum - Date
Row 7
Row 8
Row 9
F
Rev
NUHN:95-045 Uen
Speed of TUG-3
81 (195)
1998-06-01 F NUHN:95-045 Uen

The structure of the VC-4 is the same as described in the previous chapter.
See 5.8.1 ’Structure of VC-4 (TUG Structure)’on page 50

The VC-4 POH is the same as described in the previous chapter.
See 5.8.2 ’VC-4 Path Overhead (Higher Order POH)’on page 52
6.7.3 Multiplexing of 3 x TUG-3 (containing TU-3s) into VC-4

See ’Byte Interleaved Multiplexing of 3 x TUG-3 (containing TU-3s) into VC-
4’on page 83

The AU-4 is the same as described in the previous chapter.
See 5.9 ’Administrative Unit AU-4’on page 58

The AUG is the same as described in the previous chapter.
See 5.10 ’Administrative Unit Group AUG’on page 64
Byte Interleaved Multiplexing of 3 x TUG-3
a
(containing TU-3s) into VC-4
TUG-3 #1 TUG-3 #2 TUG-3 #3

Column 1 2 3 4 5 6 84 85 86 Column 1 2 3 4 5 6 84 85 86 Column 1 2 3 4 5 6 84 85 86
Row 1 H1 Row 1 H1 Row 1 H1
Row 4 Row 4 Row 4
Row 5 Row 5 Row 5
Fixed Stuff
Fixed Stuff
Fixed Stuff
Row 6 Row 6 Row 6
Row 7 Row 7 Row 7
Row 8 Row 8 Row 8
Row 9 Row 9 Row 9

1998-06-01
Datum - Date
F
Rev
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 251 252 253 254 255 256 257 258 259 260 261
NUHN:95-045 Uen
Row 1 H1 H1 H1
Row 2 H2 H2 H2
VC-4 Path OH
Row 3 H3 H3 H3
VC-4 Stuff
VC-4 Stuff
Row 4
TUG-3 #1 Stuff
TUG-3 #2 Stuff
TUG-3 #3 Stuff
Row 5
Row 6
Row 7
Row 8
Row 9
VC-4
83 (195)
1998-06-01 F NUHN:95-045 Uen
7.1 Overview
This chapter explains the required steps to put a 140 MBit/s tributary signal
into an SDH structure.
a
SDH PDH
xN x1
140Mb/s
x3
x1
x3 TUG-3 TU-3 VC-3

1998-06-01
Datum - Date
x7
AU-3 VC-3 C-3 D3

34Mb/s
45Mb/s
x7
F
Rev
x1
NUHN:95-045 Uen
6Mb/s

85 (195)
1998-06-01 F NUHN:95-045 Uen
7.2 Container C-4

The Container C-4 has a size of 9 rows by 260 columns based on a rate of
125 µs.
(9 x 260 bytes = 2340 bytes)
See ’Container C-4’on page 87.
Container C-4
a
258
260
259
Column 1 2 3 4 5 6 7
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6 C-4

1998-06-01
Datum - Date
Row 7
Row 8
Row 9
F
Rev
NUHN:95-045 Uen
Speed of C-4
87 (195)
1998-06-01 F NUHN:95-045 Uen

See ’Asynchronous Mapping for 140 MBit/s into C-4’on page 89.
All 9 rows are structured the same way. They consist of 20 blocks with 13
bytes each. One such structure is also called one subframe.
For Asynchronous Mapping, the 20 blocks of one subframe look similar
(only byte 1 differs) :
Block 1 : Byte 1 : 8 data bits
Blocks 2, 6, : Byte 1 : Bit 1 -> Justification Indication (C-Bit)
10, 14, 18 Bit 2 ... 6 -> Fixed Stuff
Block 20 : Byte 1 : Bit 1 ... 6 -> 6 data bits
Bit 7 -> Justification Bit (S-Bit)
Bit 8 -> Fixed Stuff
Remaining, : Byte 1 : Fixed Stuff
Blocks Byte 2 ... 13 : 96 data bits
Since the speed of the 140 MBit/s tributary can vary related to the speed of
the C-4, it has to be adjusted by means of a justification mechanism (stuff-
ing). The justification is explained by three typical examples below :
a) If the incoming 140 MBit/s speed is too slow, related to the speed
of the C-4, the S-Bit is used as stuff bit.
b) If the incoming 140 MBit/s speed is too fast, related to the speed of
the C-4, the S-Bit is used as data bit.
c) If the incoming 140 MBit/s signal has the nominal speed relative to
the C-4, the justification rate is about half-half.
Whether the S-Bit carries data or not is indicated five times by the C-Bit. The
receiver makes a majority vote out of the five indications in order to avoid
wrong S-Bit interpretation in case one (or two) of the indication bits is (are)
erroneous.
Asynchronous Mapping for 140 MBit/s into C-4
a
Note : Only 1 of 9 Subframes is shown (1 Subframe = 20 Blocks = 1 Row of a C-4)
Block 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
D C R R R C R R R C R R R C R R R C R S
13 Bytes
260 Bytes

1998-06-01
Datum - Date
Byte 1 Bytes 2 ... 13 D: Data Bits
(of the 140 MBit/s Tributary)
D - Block DDDDDDDD DDD . . . 96 x D . . . DDD R: Fixed Stuff Bits
C - Block CRRR RROO DDD . . . 96 x D . . . DDD O: Overhead Bits
F
Rev
(For future use)
R - Block RRRRRRRR DDD . . . 96 x D . . . DDD C: Justification Indication-Bits
NUHN:95-045 Uen
- C = ‘0’ -> S = Data-Bit
- C = ‘1’ -> S = Stuff-Bit
S - Block DDDDDDSR DDD . . . 96 x D . . . DDD
S: Actual Justification-Bit
- Justification is indicated
Justification-Capacity by the C-Bits
9 x 1 Bit every 125 µs -> 72’000 Bit/s (~ +/- 250 ppm)
89 (195)
1998-06-01 F NUHN:95-045 Uen
7.3 Virtual Container VC-4 (C-4 Structure)
7.3.1 Structure of VC-4 (C-4 Structure)

The Virtual Container VC-4 has a size of 9 rows by 261 columns based on a
rate of 125 µs.
See ’Virtual Container VC-4 (C-4 Structure)’on page 91

The Mapping of C-4 into VC-4 is very simple. Just the VC-4 Path Overhead
is added.
See ’Virtual Container VC-4 (C-4 Structure)’on page 91

The VC-4 POH is the same as described in the previous chapter.
See 5.8.2 ’VC-4 Path Overhead (Higher Order POH)’on page 52

The AU-4 is the same as described in the previous chapter.
See 5.9 ’Administrative Unit AU-4’on page 58

The AUG is the same as described in the previous chapter.
See 5.10 ’Administrative Unit Group AUG’on page 64
Virtual Container VC-4 (C-4 Structure)
a
259
261
260
Column 1 2 3 4 5 6 7 8
Row 1 J1
Row 2 B3
Row 3 C2
Row 4 G1
Row 5
Row 6
F2
H4 C-4

1998-06-01
Datum - Date
Row 7 F3
Row 8 K3
Row 9 N1
F
Rev
NUHN:95-045 Uen
Speed of VC-4
91 (195)
1998-06-01 F NUHN:95-045 Uen
8 STM-N Frame
8.1 STM-1 Frame
8.1.1 Frame Structure

The STM-1 Frame has a size of 9 rows by 270 columns based on a rate of
125 µs.
See ’STM-1 Frame’on page 93
8.1.2 Multiplexing of 1 x AUG into STM-1 Payload

1 Administrative Unit Group (AUG) is just put into the STM-1 Payload. But
the procedure is called multiplexing anyway.
8.1.3 STM-1 Multiplex Section Overhead (MSOH)

The STM-1 MSOH has a size of 5 rows by 9 columns based on a rate of 125
µs. It is located in row 5 to 9 / column 1 to 9 of the STM-1 Frame.
See ’STM-1 Multiplex Section Overhead (MSOH)’on page 94
8.1.4 STM-1 Regenerator Section Overhead (RSOH)

The STM-1 RSOH has a size of 3 rows by 9 columns based on a rate of 125
See ’STM-1 Regenerator Section Overhead (RSOH)’on page 95
STM-1 Frame
a
268
269
270
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Row 1
Row 2 Regenerator Section
Overhead (RSOH)
Row 3
Row 4 AU Pointer(s)
(Payload)

1998-06-01
Datum - Date
Row 5
Row 6
Row 7 Multiplex Section
Overhead (MSOH)
Row 8
Row 9
F
Rev
NUHN:95-045 Uen
Speed of STM-1
93 (195)
STM-1 Multiplex Section Overhead (MSOH)
a
Column 1 2 3 4 5 6 7 8 9
Row 5 B2 B2 B2 K1 K2
Row 6 D4 D5 D6
Row 7 D7 D8 D9
Row 8 D10 D11 D12
Row 9 S1 M1 E2 NU NU

1998-06-01
Datum - Date
3 x B2 : Bit Interleaved Parity (BIP-24) Used for Multiplex Section Error Monitoring
(Computed over all Bits of the previous STM-1 Frame, without the RSOH)
K1 : Automatic Protection Switch Channel (APS) Used for signalling of MSP (1:n or 1+1 Architecture)
K2 : Bit 1 ... 5 -> Automatic Protection Switch Channel (APS) Used for signalling of MSP (1:n or 1+1 Arch.)
Bit 6 ... 8 -> Multiplex Section Remote Defect Indication (MS-RDI) and Alarm Indication Signal (MS-AIS)
F
Rev
(Code ‘110’= MS-RDI / Code ‘111’= MS-AIS)
D4 to Data Communication Channel for Multiplex Section (DCCM )
NUHN:95-045 Uen
D12 :
S1 : Bit 5 ... 8 -> Synchronisation Status Message Byte (SSMB) Used for signalling Quality Level of Sync.
M1 : Multiplex Section Remote Error Indication (MS-REI)
E2 : Multiplex Section Orderwire Used as Service Channel for Multiplex Sections
NU : Reserved for National Use
94 (195)
Reserved for future international standardisation
(e.g. for media dependent, additional national use or other purposes)
STM-1 Regenerator Section Overhead (RSOH)
a
Column 1 2 3 4 5 6 7 8 9
Row 1 A1 A1 A1 A2 A2 A2 J0/C1 NU NU
Row 2 B1 E1 F1 NU NU
Row 3 D1 D2 D3
3 x A1 : First Part of Frameword Used for Frame Alignment

(Value of A1 = ‘11110110’= ‘F6’HEX)

1998-06-01
Datum - Date
3 x A2 : Second Part of Frameword Used for Frame Alignment
(Value of A2 = ‘00101000’= ‘28’HEX)
J0 / C1 : Regenerator Section Trace / STM Identifier Used as Section Access Point Identifier
(J0 = 15 Byte Trace with CRC, current standard / C1 = Single Byte Identifier, old standard)
F
Rev
B1 : Bit Interleaved Parity (BIP-8) Used for Regenerator Section Error Monitoring
(Computed over all Bits of the previous STM-1 Frame)
NUHN:95-045 Uen
E1 : Regenerator Section Orderwire Used as Service Channel for Regenerator Sections
F1 : Regenerator Section User Channel Used for temporary data/voice channel, e.g. maintenance purposes
D1 to Data Communication Channel for Regenerator Section (DCCR)
D3 :
95 (195)
1998-06-01 F NUHN:95-045 Uen
8.2 STM-4 Frame

125 µs.

4 Administrative Unit Groups (AUG) are multiplexed into the STM-4 Payload
by Byte Interleaving Time Division Multiplex.
See ’Principle of Time Division Multiplex (TDM) ’on page 160

The STM-4 MSOH has a size of 5 rows by 36 columns based on a rate of 125

The STM-4 RSOH has a size of 3 rows by 36 columns based on a rate of 125
STM-4 Frame
a
Column 1 36 37 1080
Row 1
Overhead (RSOH)
Row 3
Row 4 AU Pointers
(Payload)

1998-06-01
Datum - Date
Row 5
Row 6
Overhead (MSOH)
Row 8
Row 9
F
Rev
NUHN:95-045 Uen
Speed of STM-4
97 (195)
a
Column 1 5 9 13 17 21 25 29 33 36
Row 5 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 K1 K2
Row 6 D4 D5 D6
Row 7 D7 D8 D9
Row 8 D10 D11 D12
Row 9 S1 M1 E2 NU NU NU NU NU NU NU NU NU NU NU

1998-06-01
Datum - Date
F
Rev
NUHN:95-045 Uen
D12 :
98 (195)
a
Column 1 5 9 13 17 21 25 29 33 36
J0
Row 1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 C1 Z0 Z0 Z0 NU NU NU NU NU NU NU NU
Row 2 B1 E1 F1 NU NU NU NU NU NU NU NU NU NU NU
Row 3 D1 D2 D3

(Value of A1 = ‘11110110’= ‘F6’HEX)

1998-06-01
Datum - Date
(Value of A2 = ‘00101000’= ‘28’HEX)
3 x Z0 : Spare Bytes Reserved for future international standardisation
F
Rev
NUHN:95-045 Uen
D3 :
99 (195)
1998-06-01 F NUHN:95-045 Uen
8.3 STM-16 Frame

125 µs.

16 Administrative Unit Groups (AUG) are multiplexed into the STM-16 Pay-
load by Byte Interleaving Time Division Multiplex.

The STM-16 MSOH has a size of 5 rows by 144 columns based on a rate of
125 µs. It is located in row 5 to 9 / column 1 to 144 of the STM-16 Frame.

The STM-16 RSOH has a size of 3 rows by 144 columns based on a rate of
125 µs. It is located in row 1 to 3 / column 1 to 144 of the STM-16 Frame.
STM-16 Frame
a
Column 1 144 145 4320
Row 1
Overhead (RSOH)
Row 3
Row 4 AU Pointers
(Payload)

1998-06-01
Datum - Date
Row 5
Row 6
Overhead (MSOH)
Row 8
Row 9
F
Rev
NUHN:95-045 Uen
Speed of STM-16
4320 x 9 Byte x 8 Bit / 125 µs = 2.488’320 GBit/s
101 (195)
a
Column 1 17 33 49 65 81 97 113 129 144
Row 5 B2 15 x B2 B2 15 x B2 B2 15 x B2 K1 K2
Row 6 D4 D5 D6
Row 7 D7 D8 D9
Row 8 D10 D11 D12
Row 9 S1 E2 15 x NU NU 15 x NU NU 15 x NU
M1

1998-06-01
Datum - Date
F
Rev
NUHN:95-045 Uen
D12 :
102 (195)
a
Column 1 17 33 49 65 81 97 113 129 144
J0
Row 1 A1 15 x A1 A1 15 x A1 A1 15 x A1 A2 15 x A2 A2 15 x A2 A2 15 x A2 C1 15 x Z0 NU 15 x NU NU 15 x NU
Row 2 B1 E1 F1 15 x NU NU 15 x NU NU 15 x NU
Row 3 D1 D2 D3

(Value of A1 = ‘11110110’= ‘F6’HEX)

1998-06-01
Datum - Date
(Value of A2 = ‘00101000’= ‘28’HEX)
15 x Z0 : Spare Bytes Reserved for future international standardisation
F
Rev
NUHN:95-045 Uen
D3 :
103 (195)
1998-06-01 F NUHN:95-045 Uen
9 SDH Maintenance Signals
9.1 General
Severe transmission problems are indicated by Maintenance Signals (alarm
or status indications). These indications are detected by various Functional
Blocks, as described in section 4 ’SDH Functional Blocks’on page 26 and
are reported to the Synchronous Equipment Management Function (SEMF).
Most of the indications cause a mandatory or optional Consequent Action.
The Maintenance Signals play a very important role for fault location in a
network and for performance monitoring purposes.
9.2 Maintenance Signals and Consequent Actions

Most of the Maintenance Signals (Alarm Indications) cause certain Conse-
quent Actions (CA). To be able to understand the philosophy behind the
Consequent Actions, it is essential to distinguish different Connection Levels
and Termination Levels.
9.2.1 Connection Level / Termination Level

Five different Connection / Termination Levels need to be distinguished to
understand the mystery behind the Consequent Actions :
Case 1 : - Intermediate Regenerator (IR)
- Termination in RST
Case 2 : - Connection on HPVC Level (HPC)
- HP Passed Through
Example: VC-4 passed through in an ADM
-> Cross Connection SDH <-> SDH
Case 3 : - Connection on HPVC and LPVC Level (HPC, LPC)
- HP Terminated , LP Passed Through
Example: VC-12 passed through in an ADM
-> Cross Connection SDH <-> SDH
Case 4 : - Connection on HPVC Level (HPC)
- HP Terminated
Example: VC-4 with 140Mb Mapping dropped in ADM
-> Cross Connection SDH <-> PDH
Case 5 : - Connection on HPVC and LPVC Level (HPC, LPC)
- HP Terminated , LP Terminated
Example: VC-12 with 2Mb Mapping dropped in ADM
-> Cross Connection SDH <-> PDH
For these cases listed above, different SDH Functional Blocks are involved.
See ’Connection Level / Termination Level’on page 105.
Connection Level / Termination Level
a
1. Intermediate Regenerator
Downstream Direction Upstream Direction
RST
RST
SPI
SPI
A B
2. Connection on HPVC Level (HPC) / HP Passed Through

HUG HPOM
HPOM HUG
MST
MSP
MSP
MST
MSA
HPC
MSA
RST
RST
SPI
SPI
A B
Reverse Direction

1998-06-01
Datum - Date
3. Connection on HPVC and LPVC Level (HPC, LPC) / HP Terminated, LP Passed Through
HUG HPOM
LUG LPOM
HPOM HUG
LPOM LUG
MST
MST
MSP
HPC
HPC
MSP
MSA
MSA
RST
HPT
LPC
HPT
RST
HPA
HPA
SPI
SPI
A B
Reverse Direction
F
Rev
4. Connection on HPVC Level (HPC) / HP Terminated
Downstream Direction
HUG HPOM
NUHN:95-045 Uen
MST
MSP
HPC
MSA
RST
HPT
LPA
SPI
PPI
A B Note :
The directions ‘Downstream’,
Reverse Direction ‘Upstream’and ‘Reverse’are
related to a Path that is recei-
5. Connection on HPVC and LPVC Level (HPC, LPC) / HP Terminated, LP Terminated ved at Point A and passed on
Downstream Direction to Point B.
HUG HPOM
LUG LPOM
MST
MSP
HPC
MSA
RST
HPT
LPC
HPA
LPT
LPA
SPI
PPI
105 (195)
B
Reverse Direction
1998-06-01 F NUHN:95-045 Uen
9.2.2 Indications and Consequent Actions

The table ’Indications and Consequent Actions’on page 107 and following
shows all Alarm or Status Indications that introduce ‘visible Consequent Ac-
tions (CA)’in the involved Functional Blocks of an SDH equipment. ‘Visible
CA’means that it can be detected on a related signal transmitted by the
SDH equipment. The CAs are shown for all five cases of Connection / Ter-
mination Level.
It is important to distinguish different directions in the Signal/Action Flow.
Downstream : Means the direction from an SDH port of an equipment
down to the lowest Connection or Termination Point of a
path within the equipment.
- Downstream towards the Path Receiver
Upstream : Means the direction from the lowest Connection or Termi-
nation Point of a path within an SDH equipment up to the
SDH port.
- Upstream towards the Path Receiver
Reverse : Is a special case of Upstream.
- Upstream towards the Path Originator
Indications and Consequent Actions
a
Alarm, Status Connection Termination Functional Blocks introducing ‘visible’Consequent Actions
Indication Level Level RST MST MSA HPT HPA LPT LPA
LOS Interm. Regenerator RST Upstr. MS-AIS ----- Not Applicable -----
HOVC (HPC) HP Passed Through Rvrs. MS-RDI Upstr. AU-AIS ----- Not Applicable -----
HP Terminated Rvrs. MS-RDI Rvrs. HP-RDI ----- Not Applicable ----- Downstr. AIS
LOVC (LPC) LP Passed Through Rvrs. MS-RDI Rvrs. HP-RDI Upstr. TU-AIS ----- Not Applicable -----
Detected in SPI
LP Terminated Rvrs. MS-RDI Rvrs. HP-RDI Rvrs. LP-RDI Downstr. AIS
LOF Interm. Regenerator RST Upstr. MS-AIS ----- Not Applicable -----

1998-06-01
Datum - Date
Detected in RST
RS-BIP (B1) Interm. Regenerator RST ----- Not Applicable -----
HOVC (HPC) HP Passed Through ----- Not Applicable -----
Near End Error
HP Terminated ----- Not Applicable -----
Monitoring
LOVC (LPC) LP Passed Through ----- Not Applicable -----
F
Rev
Detected in RST
LP Terminated
MS-AIS Interm. Regenerator RST ----- Not Applicable -----
NUHN:95-045 Uen
Detected in MST
Optional Interm. Regenerator RST ----- Not Applicable -----
MS-EBER (B2) HOVC (HPC) HP Passed Through Rvrs. MS-RDI Upstr. AU-AIS ----- Not Applicable -----
(Excessive BER) HP Terminated Rvrs. MS-RDI Rvrs. HP-RDI ----- Not Applicable ----- Downstr. AIS
107 (195)
Detected in MST
a
MS-BIP (B2) Interm. Regenerator RST ----- Not Applicable -----
HOVC (HPC) HP Passed Through Rvrs. MS-REI ----- Not Applicable -----
HP Terminated Rvrs. MS-REI ----- Not Applicable -----
LOVC (LPC) LP Passed Through Rvrs. MS-REI ----- Not Applicable -----
Detected in MST
LP Terminated Rvrs. MS-REI
MS-REI Interm. Regenerator RST ----- Not Applicable -----
HP Terminated Far End Error ----- Not Applicable -----
LOVC (LPC) LP Passed Through Monitoring ----- Not Applicable -----
Detected in MST
LP Terminated
MS-RDI Interm. Regenerator RST ----- Not Applicable -----

1998-06-01
Datum - Date
Far End
Defect
Detected in MST Monitoring
LP Terminated
AU-AIS Interm. Regenerator RST ----- Not Applicable -----
(HO Path AIS) HOVC (HPC) HP Passed Through Upstr. AU-AIS
F
Rev
----- Not Applicable -----
HP Terminated Rvrs. HP-RDI ----- Not Applicable ----- Downstr. AIS
LOVC (LPC) LP Passed Through Rvrs. HP-RDI Upstr. TU-AIS ----- Not Applicable -----
NUHN:95-045 Uen
Detected in MSA
LP Terminated Rvrs. HP-RDI Rvrs. LP-RDI Downstr. AIS
AU-LOP Interm. Regenerator RST ----- Not Applicable -----
HOVC (HPC) HP Passed Through Upstr. AU-AIS ----- Not Applicable -----
Detected in MSA
108 (195)
a
HP-UNEQ Interm. Regenerator RST ----- Not Applicable -----
HP Terminated ----- Not Applicable ----- Downstr. AIS
LOVC (LPC) LP Passed Through Upstr. TU-AIS ----- Not Applicable -----
Detected in HPT
LP Terminated Rvrs. LP-RDI Downstr. AIS
HP-TIM Interm. Regenerator RST ----- Not Applicable -----
Detected in HPT
HP-SLM Interm. Regenerator RST ----- Not Applicable -----

1998-06-01
Datum - Date
Detected in HPT
HP-BIP (B3) Interm. Regenerator RST ----- Not Applicable -----
HOVC (HPC) HP Passed Through
F
Rev
HP Terminated Rvrs. HP-REI ----- Not Applicable -----
LOVC (LPC) LP Passed Through Rvrs. HP-REI ----- Not Applicable -----
NUHN:95-045 Uen
Detected in HPT
LP Terminated Rvrs. HP-REI
HP-REI Interm. Regenerator RST ----- Not Applicable -----
Far End Error
Detected in HPT Monitoring
LP Terminated
109 (195)
a
HP-RDI Interm. Regenerator RST ----- Not Applicable -----
Far End Defect
Detected in HPT Monitoring
LP Terminated
TU-AIS Interm. Regenerator RST ----- Not Applicable -----
(LO Path AIS) HOVC (HPC) HP Passed Through ----- Not Applicable -----
Detected in HPA
TU-LOP Interm. Regenerator RST ----- Not Applicable -----

1998-06-01
Datum - Date
HP-LOM (H4) HOVC (HPC) HP Passed Through ----- Not Applicable -----
Detected in HPA
LP-UNEQ Interm. Regenerator RST ----- Not Applicable -----
F
Rev
NUHN:95-045 Uen
Detected in LPT
LP Terminated Downstr. AIS
LP-TIM Interm. Regenerator RST ----- Not Applicable -----
Detected in LPT
110 (195)
a
LP-SLM Interm. Regenerator RST ----- Not Applicable -----
Detected in LPT
LP-BIP (V5) Interm. Regenerator RST ----- Not Applicable -----
Detected in LPT
LP Terminated Rvrs. LP-REI
LP-REI Interm. Regenerator RST ----- Not Applicable -----

1998-06-01
Datum - Date
Detected in LPT
LP Terminated FE Error Mon.
LP-RDI Interm. Regenerator RST ----- Not Applicable -----
F
Rev
NUHN:95-045 Uen
Detected in LPT
LP Terminated FE Def. Mon.
111 (195)
1998-06-01 F NUHN:95-045 Uen
9.3 SDH Maintenance Signal Interaction
9.3.1 Indication / Action Flow

The subject discussed in section 9.2.2 ’Indications and Consequent Actions’
on page 106 can also be shown as a kind of flow chart.
See ’SDH Maintenance Signal Interaction’on page 113.
9.3.2 Examples
See ’Examples of SDH Maintenance Signal Interactions’on page 114.
Example 1 : Shows the maintenance signal interaction when MS-AIS is
received and HP and LP are terminated.
(e.g. a VC-12 with 2 MBit/s Mapping dropped in an ADM)
Example 2 : Shows the maintenance signal interaction when TU-AIS is
received, HP is terminated and LP is passed through.
Note : There is no reverse indication like LP-RDI,
since this will be generated in the NE where
the LP is actually terminated.
Example 3 : Shows the maintenance signal interaction when TU-AIS is
received and HP and LP are terminated.
9.3.3 Alarm Reporting / Alarm Suppression

When a higher order alarm indication is received by a network element, only
this one shall be reported to the management System. All lower order
alarms, which are a consequence of the higher order alarm shall not be re-
ported, i.e. be suppressed in the SEMF.
SDH Maintenance Signal Interaction
a
Upstream / Reverse Downstream
PI RS MS Higher Order Path Lower Order Path
SPI RST MST MSA HPOM HUG HPC HPT HPA LPOM LUG LPC LPT LPA
LOS
Legend
LOF
RS-BIP (B1) Signal/Action Flow
AIS
Regenerated Signal
IR only
Optional Signal/Action Flow
MS-AIS Detection
MS-EBER (B2) Generation
MS-BIP (B2)
MS-REI Generation of AIS (All Ones)
AU-AIS
MS-RDI Generation of Unequipped VC
MS-REI for unused HPC/LPC Outputs
MS-RDI

1998-06-01
Datum - Date
AU-AIS
AU-LOP
HP Signal (Passed Through)
HOVC POH
HO Unequipped Signal
HP-UNEQ
HP-TIM
HP-SLM
F
Rev
HP-BIP (B3)
HP-REI
TU-AIS
HP-RDI
HP-REI
HP-RDI
NUHN:95-045 Uen
TU-AIS
HP-LOM / TU-LOP
LP Signal (Passed Through)
LOVC POH
LO Unequipped Signal
LP-UNEQ
LP-TIM
LP-SLM
Tributary-AIS
LP-BIP (B3/V5)
LP-REI
113 (195)
LP-RDI
LP-REI
LP-RDI
Examples of SDH Maintenance Signal Interactions
a
1. MS-AIS when HP and LP Terminated
MS-AIS AU-AIS TU-AIS Trib. AIS
HUG HPOM
LUG LPOM
MST
MSP
MSA
HPC
RST
HPT
LPC
HPA
LPT
LPA
SPI
PPI
A B
MS-RDI
HP-RDI
LP-RDI

1998-06-01
Datum - Date
2. TU-AIS when HP Terminated and LP Passed Through
TU-AIS TU-AIS
HUG HPOM
LUG LPOM
HPOM HUG
LPOM LUG
MST
MST
MSP
HPC
HPC
MSP
MSA
MSA
RST
HPT
LPC
HPT
RST
HPA
HPA
SPI
SPI
A B
F
Rev
3. TU-AIS when HP and LP Terminated
NUHN:95-045 Uen
TU-AIS TU-AIS Trib. AIS
HUG HPOM
LUG LPOM
MST
MSP
HPC
MSA
RST
HPT
HPA
LPC
LPT
LPA
SPI
PPI
A B
LP-RDI
114 (195)
1998-06-01 F NUHN:95-045 Uen

1998-06-01 F NUHN:95-045 Uen
10 Protection
10.1 Multiplex Section Protection (MSP)
10.1.1 MSP Architecture / Functional Blocks

MSP is based on a 1:n (1 for n) Architecture. 1:n means that there is 1 Pro-
tection Section available for n Working Sections.
See ’1:n MSP Architecture / Functional Blocks’on page 117
The special case with n=1 is very important. Usually a 1:1 architecture is im-
plemented as 1+1. The 1+1 architecture uses a slightly different MSP Switch
Model than 1:1.
See also section 10.1.5 ’Application Examples of the MSP Switch Model’on
page 120
10.1.2 MSP Operation Modes
10.1.2.1 Bi-Directional Operation

In bi-directional operation, the failed working channel is switched to the
protection section in both directions (i.e. in both ends), even in those cases
where only one transmission direction is affected by the failure. Switching
in only one direction is not allowed.
10.1.2.2 Uni-Directional Operation

In uni-directional operation, the switching is complete when the working
channel in the failed direction (i.e. only at the affected end) is switched to
the protection section.
10.1.3 MSP Switching Modes
10.1.3.1 Revertive Switching

In revertive mode, the working channel is switched back to the working sec-
tion, i.e. restored, when the working section has recovered form failure.
Usually a wait-to-restore time is taken into consideration before the resto-
ration is performed to make sure that the recovered section is in a stable
condition.
10.1.3.2 Non-Revertive Switching

In non-revertive mode, the switch is maintained even after recovery from
failure. Usually a “do not revert” request is sent out from the node that in-
itiated the protection switch action.
For 1:n architectures, Non-Revertive Switching is not allowed.
1:n MSP Architecture / Functional Blocks
a
Node A Node B
Working Working Section #1
MSA MST RST SPI SPI RST MST MSA Working
Channel #1 Channel #1
MSP MSP

1998-06-01
Datum - Date
Working Working Section #n
Channel #n Channel #n
F
Rev
Protection MSA Protection Section
MST RST SPI SPI RST MST MSA Protection
Channel Channel
NUHN:95-045 Uen
Note : MSA for Protection Channel only needed in case Extra Traffic is used Note : MSA for Protection Channel only needed in case Extra Traffic is used
MSA : Multiplex Section Adaptation

MSP : Multiplex Section Protection
Note : 1:1 and 1+1 Architectures are a special case
MST : Multiplex Section Termination where only Working Channel #1 is used
117 (195)
RST : Regenerator Section Termination
SPI : Synchronous Physical Interface
1998-06-01 F NUHN:95-045 Uen
10.1.4 Basic MSP Switch Model

The basic MSP switch model supports 1:n architectures up 1:14 (one for
fourteen) with an optional Extra Traffic Channel that can be used when the
Protection Section is not in use. The Null Channel can be seen as a “dead-
end” channel that is able to generate and terminate idle traffic on the pro-
tection section.
See ’Basic MSP Switch Model’on page 119.
In practice, only a subset of this model is used. A special case is the 1:1 (one
for one) architecture, that is usually implemented as 1+1 (one plus one) ar-
chitecture.
See also section 10.1.5 ’Application Examples of the MSP Switch Model’on
page 120.
1998-06-01 F NUHN:95-045 Uen
Basic MSP Switch Model
Null
Channel 0
Working
Channel #1 1 Section #1
Working
Working
14
Working
15
Extra Traffic Protection

Channel 15 Section
(Optional)
Selector
Bridge (Switch)
Note : Model shown in released position

1998-06-01 F NUHN:95-045 Uen
10.1.5 Application Examples of the MSP Switch Model
10.1.5.1 1:2 Architecture (one for two)

See ’1:2 Architecture (one for two)’on page 121
10.1.5.2 1:1 Architecture (one for one)

See ’1:1 Architecture (one for one)’on page 122
10.1.5.3 1+1 Architecture (one plus one)

See ’1+1 Architecture (one plus one)’on page 123
1:2 Architecture (one for two)
a
0
Null
Channel 0
Working

1998-06-01
Datum - Date
2
Working
15
F
Rev
Extra Traffic Protection
Section
NUHN:95-045 Uen
Channel 15
(Optional)
Selector
Bridge (Switch)
121 (195)
1998-06-01 F NUHN:95-045 Uen
1:1 Architecture (one for one)
1:1 Architecture (Without optional Extra Traffic Channel)
Null
Channel 0
Working
Working 1 Section
Channel
Protection
Section
Selector
Bridge (Switch)
Simplified 1:1 Circuit (Equivalent to Circuit above)
Null
Channel
0
1
Working
Working Section
Channel 0
1
Protection
Section
Selector
Bridge (Switch)
Note : For MSP in USHR, the Null Channel must be looped

1+1 Architecture (one plus one)
a
Working
Working Section
Channel 0
1

1998-06-01
Datum - Date
Protection
Permanent Section
Bridge
Selector
F
Rev
(Switch)
NUHN:95-045 Uen
Note : The 1+1 Architecture is a 1:1 Circuit with a permanent Bridge
123 (195)
1998-06-01 F NUHN:95-045 Uen
10.1.6 MSP Signalling

For the MSP Signalling, the K1,K2 Bytes in the MSOH are used.
See ’MSP Signalling in K1,K2 Bytes’on page 125.
The MSP signalling information is transmitted over the Protection Section
and in certain applications also over the working section(s). The signalling is
based on a handshake-protocol with requests or commands and acknowl-
edgements that is also called APS Protocol. (APS = Automatic Protection
Switching)
See also section 10.1.7 ’Examples of Automatic Protection Switching (APS)
in MSP’on page 126.
MSP Signalling in K1,K2 Bytes
a
K1 Byte K2 Byte
X X X X X X X X X X X X X X X X
Type of Request Channel Requesting Bridged Channel Under Study
(Reason) Switch Action (Status) (See Note)
Bin Hex Description Bin Hex Description Bin Hex Description Bin Description
0000 0 No Request 0000 0 Null Channel (Protection) 0000 0 Null Channel (Protection) 0 1+1 Architecture

1998-06-01
Datum - Date
0001 1 Do Not Revert 0001 1 Working Channel #1 0001 1 Working Channel #1 1 1:n Architecture
0010 2 Reverse Request 0010 2 Working Channel #2 0010 2 Working Channel #2
0011 3 Not Used 0011 3 Working Channel #3 0011 3 Working Channel #3
0100 4 Exercise 0100 4 Working Channel #4 0100 4 Working Channel #4 Note :
0101 5 Not Used 0101 5 Working Channel #5 0101 5 Working Channel #5 Bits 6 ... 8 in K2 are
0110 6 Wait-to-Restore 0110 6 Working Channel #6 0110 6 Working Channel #6 under study.
0111 7 Not Used 0111 7 Working Channel #7 0111 7 Working Channel #7 However two values
F
Rev
1000 8 Manual Switch 1000 8 Working Channel #8 1000 8 Working Channel #8 are defined :
- 110 -> MS-RDI
1001 9 Not Used 1001 9 Working Channel #9 1001 9 Working Channel #9
- 111 -> MS-AIS
Signal Degrade Low Prio. Working Channel #10 Working Channel #10
NUHN:95-045 Uen
1010 A 1010 A 1010 A
1011 B Signal Degrade High Prio. 1011 B Working Channel #11 1011 B Working Channel #11
1100 C Signal Fail Low Priority 1100 C Working Channel #12 1100 C Working Channel #12
1101 D Signal Fail High Priority 1101 D Working Channel #13 1101 D Working Channel #13
1110 E Forced Switch 1110 E Working Channel #14 1110 E Working Channel #14
1111 F Lockout of Protection 1111 F Extra Traffic Channel 1111 F Extra Traffic Channel
125 (195)
For 1+1 systems, only Working Channel #1 is applicable
Extra Traffic Channel (optional) only applicable for 1:n systems
1998-06-01 F NUHN:95-045 Uen
10.1.7 Examples of Automatic Protection Switching (APS) in MSP
10.1.7.1 APS Protocol for 1:2 Architecture

This example shows the most important phases of an APS protocol for 1:2
MSP in bi-directional revertive mode.
See ’APS-Protocol for 1:2 MSP’on page 127
10.1.7.2 APS Protocol for 1+1 Architecture

There are two different approaches for the 1+1 APS Protocol :
a) The first one keeps to the generic rules of the MSP Switch Model and is
therefore compatible to systems with 1:n Architecture.
The example shows an APS protocol for bi-directional non-revertive
mode. See ’APS-Protocol for 1+1 MSP(Compatible to 1:n MSP)’on page
136
b) The second one uses a modified protocol and is therefore not compatible
to 1:n systems. The modified protocol is some sort of non-revertive and
the example shows it for bi-directional switching mode.
See ’APS-Protocol for 1+1 MSP (For Networks using predominantly 1+1
MSP)’on page 140.
10.1.7.3 Principle of 1:1 MSP in USHR

There is no APS Protocol defined in the ITU-T or ETSI Standards for Uni-di-
rectional Self-Healing Rings (USHR). Anyhow, the 1:1 MSP Switch Model is
also applicable for this kind of architecture.
See ’Principle of 1:1 MSP in USHR’on page 143.
1998-06-01 F NUHN:95-045 Uen
APS-Protocol for 1:2 MSP

Phase 0 : (MSP in released state)
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2
Protection Section Node B

Node A
K1 sent : 0000 0000 K1 sent : 0000 0000
K2 sent : 0000 1000 K2 sent : 0000 1000
- No Fault Condition - No Fault Condition

- No Request - No Request
- Protection Section not in use - Protection Section not in use
Phase 1a : (Signal Degrade on Working Section #2 in Node A)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0000 0000
K2 sent : 0000 1000 K2 sent : 0000 1000
- Signal Degrade on Working Section #2

- Order Bridge for CH #2 in B
1998-06-01 F NUHN:95-045 Uen

...... Continued (1)
Phase 1b :
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0010 0010
K2 sent : 0000 1000 K2 sent : 0010 1000
- Bridge of CH #2
- Reverse Request for Bridge of CH #2 in A
Phase 1c :
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0010 0010
K2 sent : 0010 1000 K2 sent : 0010 1000
- Switch CH #2 to protection
- Bridge of CH #2
1998-06-01 F NUHN:95-045 Uen

Phase 1d : (Bi-directional Switch Action completed)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0010 0010
K2 sent : 0010 1000 K2 sent : 0010 1000
Phase 2a : (Signal Fail pre-empts Signal Degrade)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 1101 0001
K2 sent : 0010 1000 K2 sent : 0010 1000
- Signal Fail on Working Section #1

- Order Bridge of CH #1 in A
- Release Switch CH #2
1998-06-01 F NUHN:95-045 Uen

Phase 2b :
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0010 0001 K1 sent : 1101 0001
K2 sent : 0001 1000 K2 sent : 0010 1000
- Bridge of CH #1
- Reverse Request for Bridge of CH #1 in B
Phase 2c :
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0010 0001 K1 sent : 1101 0001
K2 sent : 0001 1000 K2 sent : 0001 1000
- Bridge of CH #1
1998-06-01 F NUHN:95-045 Uen

Phase 2d : (Bi-directional Switch Action completed)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0010 0001 K1 sent : 1101 0001
K2 sent : 0001 1000 K2 sent : 0001 1000
Phase 3 : (Signal Fail on Working Section #1 repaired)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0010 0001 K1 sent : 0110 0001
K2 sent : 0001 1000 K2 sent : 0001 1000
- Start Wait-to-Restore time (WTR)

1998-06-01 F NUHN:95-045 Uen

Phase 4a : (Working Section #2 still degraded, interrupts WTR)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0110 0001
K2 sent : 0001 1000 K2 sent : 0001 1000
- Signal Degrade on Working Section #2

Phase 4b :
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0010 0010
K2 sent : 0001 1000 K2 sent : 0010 1000
- Bridge of CH #2
1998-06-01 F NUHN:95-045 Uen

Phase 4c :
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0010 0010
K2 sent : 0010 1000 K2 sent : 0010 1000
- Bridge of CH #2
Phase 4d : (Bi-directional Switch Action complete)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 1010 0010 K1 sent : 0010 0010
K2 sent : 0010 1000 K2 sent : 0010 1000
1998-06-01 F NUHN:95-045 Uen

Phase 5a : (Signal Degrade on Working Section #2 repaired)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0110 0010 K1 sent : 0010 0010
K2 sent : 0010 1000 K2 sent : 0010 1000
Phase 5b : (Wait-to-Restore time expires)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0000 0000 K1 sent : 0010 0010
K2 sent : 0010 1000 K2 sent : 0010 1000
- Send “No Request” to B

1998-06-01 F NUHN:95-045 Uen

Phase 5c :
0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0000 0000 K1 sent : 0000 0000
K2 sent : 0010 1000 K2 sent : 0000 1000
- Send “No Request” to A

- Release Bridge of CH #2
Phase 5d : (MSP in released state again)

0 0
Null CH 0 0 Null CH
1 1
Working Section #1
CH #1 1 1 CH #1
2 2
Working Section #2
CH #2 2 2 CH #2

Node A
K1 sent : 0000 0000 K1 sent : 0000 0000
K2 sent : 0000 1000 K2 sent : 0000 1000
- Release Bridge of CH #2
1998-06-01 F NUHN:95-045 Uen
APS-Protocol for 1+1 MSP

(Compatible to 1:n MSP)

Working Section #1
0 0
1 1
Node A
K1 sent : 0000 0000 K1 sent : 0000 0000
K2 sent : 0000 0000 K2 sent : 0000 0000

Phase 1a : (Signal Fail on Working Section #1 in Node A)

Working Section #1
0 0
1 1
Node A
K1 sent : 1101 0001 K1 sent : 0000 0000
K2 sent : 0000 0000 K2 sent : 0000 0000
- Signal Fail on Working Section #1

Phase 1b :
Working Section #1
0 0
1 1
Node A
K1 sent : 1101 0001 K1 sent : 0010 0001
K2 sent : 0000 0000 K2 sent : 0001 0000
- Indicates Bridge for CH #1

1998-06-01 F NUHN:95-045 Uen

(Compatible to 1:n MSP) ...... Continued (1)
Phase 1c :
Working Section #1
0 0
1 1
Node A
K1 sent : 1101 0001 K1 sent : 0010 0001
K2 sent : 0001 0000 K2 sent : 0001 0000
- Indicates Bridge for CH #1
Phase 1d : (Bi-directional Switch Action complete)

Working Section #1
0 0
1 1
Node A
K1 sent : 1101 0001 K1 sent : 0010 0001
K2 sent : 0001 0000 K2 sent : 0001 0000
Phase 2 : (Signal Fail on Working Section #1 repaired)

Working Section #1
0 0
1 1
Node A
K1 sent : 0001 0001 K1 sent : 0010 0001
K2 sent : 0001 0000 K2 sent : 0001 0000
- Send “Do Not Revert” to B

(Maintain Switch)
1998-06-01 F NUHN:95-045 Uen

Phase 3a : (Signal Degrade on Protection Section in Node A)

Working Section #1
0 0
1 1
Node A
K1 sent : 1010 0000 K1 sent : 0010 0001
K2 sent : 0001 0000 K2 sent : 0001 0000
- Signal Degrade on Protection Section

- Order Null Bridge in B
- Release Switch of CH #1
Phase 3b :
Working Section #1
0 0
1 1
Node A
K1 sent : 1010 0000 K1 sent : 0010 0000
K2 sent : 0001 0000 K2 sent : 0000 0000
- Indicate Null Bridge

- Reverse Request for Null Bridge in A
- Release Switch of CH #1
Phase 3c : (Bi-directional Switch Action complete)

Working Section #1
0 0
1 1
Node A
K1 sent : 1010 0000 K1 sent : 0010 0000
K2 sent : 0000 0000 K2 sent : 0000 0000
- Indicate Null Bridge

1998-06-01 F NUHN:95-045 Uen

Phase 4a : (Signal Degrade on Protection Section repaired)

Working Section #1
0 0
1 1
Node A
K1 sent : 0000 0000 K1 sent : 0010 0000
K2 sent : 0000 0000 K2 sent : 0000 0000

(Maintain Switch in released position)
Phase 4b : (MSP in released state again)

Working Section #1
0 0
1 1
Node A
K1 sent : 0000 0000 K1 sent : 0000 0000
K2 sent : 0000 0000 K2 sent : 0000 0000

(Maintain Switch in released position)
1998-06-01 F NUHN:95-045 Uen

(For Networks using predominantly 1+1 MSP)

Section #1
1 1
2 2
Section #2 Node B
Node A
K1 sent : 0000 0000 K1 sent : 0000 0000
K2 sent : 0001 0000 K2 sent : 0001 0000

- Traffic on Section #1 - Traffic on Section #1
Phase 1a : (Signal Fail on Section #1 in Node A)

Section #1
1 1
2 2
Section #2 Node B
Node A
K1 sent : 1101 0001 K1 sent : 0000 0000
K2 sent : 0001 0000 K2 sent : 0001 0000
- Signal Fail on Section #1
Phase 1b :
Section #1
1 1
2 2
Section #2 Node B
Node A
K1 sent : 1101 0001 K1 sent : 0010 0001
K2 sent : 0001 0000 K2 sent : 0001 0000
- Switch to Section #2
- Reverse Request to Switch
1998-06-01 F NUHN:95-045 Uen

Phase 1c : (Bi-directional Switch Action complete)

Section #1
1 1
2 2
Section #2 Node B
Node A
K1 sent : 1101 0001 K1 sent : 0010 0001
K2 sent : 0001 0000 K2 sent : 0001 0000
- Switch to Section #2
Phase 2a : (Signal Fail on Section #1 repaired)

Section #1
1 1
2 2
Section #2 Node B
Node A
K1 sent : 0110 0001 K1 sent : 0010 0001
K2 sent : 0001 0000 K2 sent : 0001 0000
Phase 2b : (Wait-to-Restore time expires)

Section #1
1 1
2 2
Section #2 Node B
Node A
K1 sent : 0000 0000 K1 sent : 0010 0001
K2 sent : 0010 0000 K2 sent : 0001 0000

- Traffic on Section #2
1998-06-01 F NUHN:95-045 Uen

Phase 2c : (MSP in released state again)

Section #1
1 1
2 2
Section #2 Node B
Node A
K1 sent : 0000 0000 K1 sent : 0000 0000
K2 sent : 0010 0000 K2 sent : 0010 0000

- Traffic on Section #2 - Traffic on Section #2
1998-06-01 F NUHN:95-045 Uen
Principle of 1:1 MSP in USHR

Null CH 0 0 Null CH
looped 1 1 looped
Working Sections
CH #1 CH #1
0 0
1 1
Node D Node C
K1 sent : xxxx yyyy K1 sent : xxxx yyyy
Null CH 0 0 Null CH
looped 1 1 looped
CH #1 CH #1
0 0
1 1
Node A Node B
K2 sent : xxxx yyyy Protection Sections K2 sent : xxxx yyyy

- Protection Sections not in use - Protection Sections not in use
Phase 1 : (Protection Switch Action complete)
Null CH 0 0 Null CH
looped 1 1 looped
Working Sections
CH #1 CH #1
0 0
1 1
Node D Node C
Null CH 0 0 Null CH
looped 1 1 looped
CH #1 CH #1
0 0
1 1
Node A Node B
K2 sent : xxxx yyyy Protection Sections K2 sent : xxxx yyyy
- Switch performed - Bridge performed

1998-06-01 F NUHN:95-045 Uen
10.2 Sub-Network Connection Protection (SNCP) [*** Part of

next Rev. of Document ***]
1998-06-01 F NUHN:95-045 Uen

1998-06-01 F NUHN:95-045 Uen
11 Timing (Synchronisation)
11.1 Synchronous Equipment Timing
11.1.1 Timing Functional Blocks (Overview)

Each SDH equipment has a Synchronous Equipment Timing Source (SETS)
that provides the timing reference to the relevant functional blocks.
The SETS can be synchronised from a received STM-N signal, from a received
2 MBit/s signal (optional), from an external 2 MHz clock signal (optional) or
from the internal clock.The clock recovery of the received transmission sig-
nals is done in SPI and PPI respectively. The SETPI performs encoding and ad-
aptation of the external 2 MHz clock signal.
See also section 4 ’SDH Functional Blocks’on page 26.
11.1.2 Synchronous Equipment Timing Physical Interface (SETPI)

The SETPI performs the encoding and adaptation of the physical synchroni-
sation medium towards the SETS and monitors the availability of the incom-
ing synchronisation signal. The SETPI can optionally accept binary or HDB3
coded clock signals.
11.1.3 Synchronous Equipment Timing Source (SETS)
11.1.3.1 General
The SETS Function represents the SDH Network Element clock.
It provides timing reference to all SDH Functional Blocks except the SPI, PPI,
SEMF, MCF and OHA.
The SETS consists of Selector A, B, C and the Synchronous Equipment Tim-
ing Generator (SETG).
See ’SDH Equipment Timing Block Diagram’on page 148.
11.1.3.2 Selector A
Selector A selects the signal to be used as timing reference for the SETS.
The signal can be a member out of three groups :
a) Clock recovered from an incoming STM-N signal (via SPI)
b) Clock recovered from an incoming 2 MBit/s signal (via PPI)
c) Clock from an external 2 MHz Synchronisation Port (via SETPI)
11.1.3.3 Synchronous Equipment Timing Generator (SETG)

The SETG consists of a clock, a controllable oscillator together with the as-
sociated control function.
The SETG can operate in three different modes :
a) Free Run Mode
(Initial clock frequency before a valid reference source has been se-
lected by selector A)
1998-06-01 F NUHN:95-045 Uen
b) Locked Mode (normal operation)

(Phase-locked to input reference source selected by selector A)
c) Holdover Mode
(Keep the last known good clock frequency during the time the ref-
erence sources selected by selector A are not available)
d) Regulation Mode
(Regulation mode is active during the time the oscillator is adjusting
the frequency after the active reference has changed, until the os-
cillator is phase-locked to the new reference signal. Regulation
mode is in principal the same as the locked mode, but with different
filtering characteristics.)
The control function of the oscillator provides the SETG with the required
timing characteristics (filtering). The output signal of the SETG is used as
timing reference for the synchronous equipment.
11.1.3.4 Selector B , Selector C and Squelching

Selector B defines the mode of the output signals of the 2 MHz Synchroni-
sation Ports :
a) SETG-Locked Mode
(Output signal follows the timing characteristics of the SETG)
b) Non-SETG-Locked Mode
(Output signal follows the timing characteristics of the STM-N ref-
erence signal selected by selector C.
Depending on the synchronisation design of a network, one or the other
mode can be advantageous.
Squelching (Inhibition) of the output signal of selector B is an optional func-
tion to suppress the transmission of invalid synchronisation signals to the ex-
ternal 2 MHz sync. ports.
Squelching criteria can be :
a) SETG in free-running mode (SETG-locked mode)
b) SETG in holdover mode (SETG-locked mode)
c) Loss of selected STM-N signal (Non-SETG-locked mode)
d) Manual command
SDH Equipment Timing Block Diagram
a
STM-N
SPI
SPI
Ports
SPI
Other SDH Functional Blocks
2 MBit/s
PPI
PPI
Ports
PPI

1998-06-01
Datum - Date
SETS
Clock
F
Rev
Oscill.
Control
NUHN:95-045 Uen
Selector A
SETG
SETPI
2 MHz Selector B
SETPI
SETPI
Synchr. Selector C Squelch

Ports
148 (195)
1998-06-01 F NUHN:95-045 Uen
11.2 Jitter [*** Part of next Rev. of Document ***]

1998-06-01 F NUHN:95-045 Uen
12 Transmission Aspects
12.1 Line Codes
12.1.1 General
12.1.1.1 About Line Codes for Electrical Signals

A Line Code has to fulfil the following requirements to be suitable for trans-
mission over long electrical lines :
a) The required bandwidth should be as narrow as possible, particu-
larly no DC-component (f = 0 Hz) is allowed.
b) The receiver must be able to recover the bit clock from the received
signal, independent from the transmitted pattern.
c) Immunity against reversed polarity.
Some auxiliary codes are the base for the real line codes :
NRZ Code : The NRZ code (Non Return Zero) is a pure binary code and
is used only internally in the systems (e.g. TTL). It is not suit-
able for transmission because it contains a DC component,
the receiver would lose the synchronisation after long “1”
or “0” sequences and it won’t work with reversed polarity.
RZ Code : The RZ code (Return Zero) solves the clock extraction prob-
lem for long “1” sequences, but that’s it.
AMI Code : The AMI code (Alternate Mark Inversion) turns every sec-
ond “1” into a negative pulse. Therefore the AMI code ac-
tually has three states : “+1”, “0” and “-1”. The DC com-
ponent disappears, long “1” sequences are no problem
any more and reversed polarity can be handled. But long
“0” sequences will still screw up the clock extraction in the
receiver.
See ’Auxiliary Codes’on page 151
12.1.1.2 About Line Codes for Optical Signals

The only thing Line Codes for optical signals have to take care of is to avoid
long “1” and “0” sequences to make sure that the receiver is able to recov-
er the bit clock from the received signal, independent from the transmitted
pattern.
Usually a scrambling algorithm with a generating polynomial is introduced,
to make sure that “1” and “0” sequences of only a certain length are pos-
sible.
1998-06-01 F NUHN:95-045 Uen
1
0
1
1
1
1
0
0
0
0
0
1
0
1
1
1
0
Auxiliary Codes
-1
NRZ
RZ
Binary Signal
Clock Interval
AMI
1998-06-01 F NUHN:95-045 Uen
12.1.1.3 HDB3 Code

See ’Line Codes’on page 153.
HDB3 stands for High Density Bipolarity with maximum 3 consecutive zeros.
The HDB3 code is similar to the AMI code, but 2 additional rules are intro-
duced to fix the problem with long “0” sequences.
Rule 1 : If a sequence of 4 consecutive zeros is to be transmitted,
the 4th zero is replaced by a Mark Pulse, but with the
wrong polarity, i.e. a pulse that violates the AMI rule. This
makes it easy for the receiver to distinguish between real
marks and substitutes.
Rule 2 : The Violation Marks have to have alternating polarity, in or-
der to avoid DC. If a Violation Pulse, introduced according
to rule 1, would have the same polarity as the previous one,
an auxiliary Mark Pulse (that follows the AMI rule) is intro-
duced at the position of the first zero in the group of 4.
Note : Long “0” sequences are split up into such groups of 4.
12.1.1.4 CMI Code

See ’Line Codes’on page 153.
The CMI code (Coded Mark Inversion) works a bit different.
Rule 1 : A binary “0” is indicated by a positive transition in the mid-
dle of a unit interval.
Rule 2 : A binary “1” is indicated by a pulse over the whole unit in-
terval with alternate polarity compared to the last “1” that
has been transmitted before.
Line Codes
a
HDB3 Code Binary Signal 1 0 1 0 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1
1
NRZ 0
Sequences with four (or more)
1
consecutive Zeros are modi- RZ 0
fied with Violation Pulses and
1
Auxiliary Pulses
AMI 0
-1
Violation Pulse 1
HDB3 0
Auxiliary Pulse -1

1998-06-01
Datum - Date
1
“All Ones” Pattern, HDB3 Coded 0
-1
1
“All Zeros” Pattern, HDB3 Coded 0
-1
F
Rev
CMI Code Binary Signal 1 0 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 1
NUHN:95-045 Uen
1
NRZ 0
1
CMI
-1
1
“All Ones” Pattern, CMI Coded
-1
153 (195)
1
“All Zeros” Pattern, CMI Coded
-1
1998-06-01 F NUHN:95-045 Uen
12.1.2 PDH Line Coding
12.1.2.1 Electrical PDH Signals

The european PDH signals use the following Line Codes :
- 2 MBit/s HDB3
- 8 MBit/s HDB3
- 34 MBit/s HDB3
- 140 MBit/s CMI
12.1.2.2 Optical PDH Signals

Not standardised.
12.1.3 STM-N Line Coding
12.1.3.1 Electrical SDH Signals

In the european standard, electrical SDH signals are only applicable for STM-
1. The following Line Code is used :
- STM-1e CMI
For compatibility reasons, the Frame Synchronous Scrambling is also used
on electrical signals. See below.
12.1.3.2 Optical SDH Signals

For STM-N Signals Frame Synchronous Scrambling is used
To avoid long “1” or “0” sequences on STM-N line signals, the binary code
is processed with a polynomial.
The generating polynomial is : 1 + x6 + x7
This can be achieved by a very simple circuit.
See ’Functional Diagram of Frame Synchronous Scrambler’on page 155
Note : This scrambling procedure is no security encoding, it is just
to avoid long “1” or “0” sequences.
Of course, the STM-N Frameword (FAS) must not be scrambled, otherwise
the receiver would have no chance to detect it. Therefore the scrambling is
frame synchronous.
This means : For the first row of the RSOH (containing the FAS) the
scrambling is inhibited and re-started at the first byte of the
payload.
See ’Frame Synchronous Scrambling’on page 155
Note : For compatibility reasons, the Frame Synchronous Scram-
bling is also used on electrical SDH signals.
Functional Diagram of Frame Synchronous Scrambler
a
Data In
D Q D Q D Q D Q D Q D Q D Q
Set Set Set Set Set Set Set Scrambled

Data out
STM-N Clock
Frame Pulse

1998-06-01
Datum - Date
Frame Synchronous Scrambling
F
Rev
= Not Scrambled
Scrambling Sequence
= Scrambled is re-started here
NUHN:95-045 Uen
(RSOH)
(Payload)
(MSOH)
155 (195)
1998-06-01 F NUHN:95-045 Uen
12.2 Optical Transmission with Fibres [*** Part of next Rev. of

Document ***]
A Appendix A
A.1 SDH - Sizes and Nominal Speeds

See ’SDH - Sizes and Nominal-Speeds’on page 157
SDH - Sizes and Nominal-Speeds
a
SDH PDH
xN x1
N x 9x270 Bytes 9x261 Bytes 9x261 Bytes 9x261 Bytes 9x260 Bytes
(N x 155.52 Mb/s) + 9 Bytes Pointer + 9 Bytes Pointer (150.336 Mb/s) (149.76 Mb/s) 139.264 Mb/s
x3
x1
x3 TUG-3 TU-3 VC-3
9x86 Bytes 9x86 Bytes 9x85 Bytes
(49.536 Mb/s) (49.536 Mb/s) (48.96 Mb/s)

1998-06-01
Datum - Date
x7
AU-3 VC-3 C-3 D3

9x87 Bytes 9x85 Bytes 9x84 Bytes 34.368 Mb/s
+ 3 Bytes Pointer (48.96 Mb/s) (48.384 Mb/s) 44.763 Mb/s
x7
F
Rev
x1
NUHN:95-045 Uen
9x12 Bytes 432 Bytes/500ms 428 Bytes/500ms 424 Bytes/500ms
STM-N Synchronous Transport Module N (6.912 Mb/s) (6.912 Mb/s) (6.848 Mb/s)) (6.784 Mb/s) 6.312 Mb/s
AUG Administrative Unit Group x3

VC-x Virtual Container x x4 144 Bytes/500ms
(2.304 Mb/s)
140 Bytes/500ms
(2.240 Mb/s)
136 Bytes/500ms
(2.176 Mb/s) 2.048 Mb/s
C-x Container x 108 Bytes/500ms 104 Bytes/500ms 100 Bytes/500ms
157 (195)
(1.728 Mb/s) (1.664 Mb/s) (1.600 Mb/s) 1.544 Mb/s
1998-06-01 F NUHN:95-045 Uen
A.2 Principle of SDH Bit Interleaved Parity (BIP)

SDH systems monitor the transmission quality using a method called Bit In-
terleaved Parity (BIP). A transmitter adds the parity information to the trans-
mitted signal. A receiver does the same parity calculation and compares the
result with the parity calculated by the transmitter. A mismatch indicates
transmission error(s).
A number of BIP types are used in SDH : BIP-2, BIP-8, BIP-24, BIP-96 and
BIP-384. They are based on the same principle, but differ in length. The ‘n’
in BIP-n indicates the number of bits in the BIP.
The procedure for calculating the BIP-n is :
• A relevant number of bits are considered as the calculation frame for the
Bit Interleaved Parity, e.g. a whole STM-Frame or a VC.
The BIP calculation frames must have an allocated space of n bits to carry
the BIP results.
• This frame is grouped into n columns.
• The parity is calculated for each group.
- The parity is even (or 0), if the number of 1s in the group is even
- the parity is odd (or 1), if the number of 1s in the group is odd.
• The bits of the BIP-n are set to the parity of the related group.
The BIP-n result of a certain calculation frame is put into the allocated space
of the next frame.
See ’Example for a BIP-8 Calculation’on page 159
Example for a BIP-8 Calculation
a
BIP Calculation Frame #n
1 0 1 1 0 0 0 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 1 1 0 1 1 1 1 1 0 1 0 0 1 0 1 0 1 1
0 0 1 1 0 1 1 0 1 0 0 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 0 0 0 1 1 1 1 1 0 0 1 1 1 1
1 1 0 0 0 1 0 1 0 0 1 0 0 1 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 1 0 0 1 1 0 0 1
BIP-8 Result 0 1 0 1 1 0 0 0 1 1 1 0 1 0 1 1 0 0 1 1 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 1 1 1 1 0
of Frame #n-1 0 1 0 1 1 0 0 0 0 0 1 0 1 1 1 1 1 1 0 1 1 1 1 1 0 1 1 0 1 1 1 1 1 1 0 1 1 0 1 1
1 1 1 0 0 1 1 1 1 1 0 0 0 1 1 1 0 1 0 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 1 0 1
1 0 0 1 1 1 0 0 1 1 0 1 0 1 1 1 1 0 0 1 0 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1
0 0 0 1 0 0 0 1 1 1 1 0 0 1 0 1 0 1 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 1 0 0 1 1
0 0 1 0 1 1 0 0 1 0 0 0 1 1 1 0 1 0 1 1 1 1 1 1 1 0 1 1 1 1 0 1 1 0 1 0 1 1 1 0
1 1 0 0 1 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 0 0 1 1 0 0 1 0 1 1 1 1 1 0 1 1 0 0 0

1998-06-01
Datum - Date
0 0 1 1 0 0 1 0 BIP-8 Result for Frame #n
F
Rev
BIP Calculation Frame #n+1
1 0 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 0 0 1 0 1 0 1 0 1 0 0 1 1 0 1 0 0 1 0 1 0 1 1
NUHN:95-045 Uen
0 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 1 1 1 0 0 1 1 1 1
1 1 0 1 0 1 0 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 0 1 1 1 0 1 0 0 1 0 0 0 0 1 1 0 0 1
0 0 1 1 0 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 1 1 1 1 0
0 1 0 1 1 0 0 0 0 0 1 0 1 1 1 1 1 1 0 1 1 1 1 1 0 1 1 1 1 0 0 1 1 1 0 1 1 0 1 1
1 0 1 0 0 1 1 1 1 1 0 0 0 1 1 1 0 1 0 1 0 1 0 0 0 1 0 1 1 0 0 0 0 1 0 0 0 1 0 1
1 0 0 0 1 1 0 0 0 1 0 1 0 1 1 1 1 0 0 1 0 1 1 1 1 0 0 1 1 1 1 1 1 1 0 1 1 1 1 1
1 1 0 1 0 0 0 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 0 1 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 1
159 (195)
0 0 0 0 1 1 0 0 1 0 1 0 1 1 1 0 1 0 1 0 0 1 1 1 1 0 1 1 1 1 0 1 1 0 1 0 1 0 1 0
1 1 0 1 1 0 0 0 0 1 0 0 1 1 1 1 0 1 0 0 1 0 0 1 1 0 0 1 0 1 1 1 1 1 0 0 1 0 0 0
1998-06-01 F NUHN:95-045 Uen
A.3 Principle of Time Division Multiplex (TDM)

Principle of Time Division Multiplex (TDM)
a
T
t
Example for TDM with 4 Tributaries
Mux
Unit The same principle applies for TDM with
any number of tributaries
Tributary #1 T
t

1998-06-01
Datum - Date
t/4
Tributary #2
F
Rev
NUHN:95-045 Uen
Tributary #3 Mux Unit
- If a Mux Unit represents 1 Bit :
-> Bit Interleaving TDM (Used in PDH)
- If a Mux Unit represents 1 Byte :
-> Byte Interleaving TDM (Used in SDH)
161 (195)
Tributary #4
1998-06-01 F NUHN:95-045 Uen
A.4 Principle of SDH Pointer Processing

A.4.1 Principle of SDH Pointer Alignment
When pointers are added to the VCs, they might not have the correct posi-
tion in time to be placed into the HOVC or into the AUG. Therefore the
pointers need to be aligned.
A pointer is supposed to point always to the start of a VC, named ‘Data#0’
in the example below. The Payload Cells are numbered relative to the point-
er position, therefore ‘Data#0’will be located in a different Payload Cell af-
ter the pointer has been moved to the aligned position. This means that the
pointer value needs to change.
See ’Principle of SDH-Pointer Alignment’on page 163.
Legend Data#n Data Block
Data#0 Begin of data structure (VC)
Data#m End of data structure (VC)
SDH - Payload Cell

Cell#n
Pointer
Cell carrying the Pointer
Principle of SDH-Pointer Alignment
a
1. Before Alignment
Pointer value = 6
Data#m-7 Data#m-6 Pointer Data#m-5 Data#m-4 Data#m-3 Data#m-2 Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3
Cell#m-1 Cell#m Cell#0 Cell#1 Cell#2 Cell#3 Cell#4 Cell#5 Cell#6 Cell#7 Cell#8 Cell#9
Pointer value = m-2
Data#m-5 Data#m-4 Data#m-3 Data#m-2 Data#m-1 Data#m Data#0 Data#1 Data#2 Pointer Data#3 Data#4 Data#5
Cell#m-8 Cell#m-7 Cell#m-6 Cell#m-5 Cell#m-4 Cell#m3 Cell#m-2 Cell#m-1 Cell#m Cell#0 Cell#1 Cell#2
Pointer value = 2

1998-06-01
Datum - Date
Pointer Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3 Data#4 Data#5 Data#6 Data#7 Data#8 Data#9
Cell#0 Cell#1 Cell#2 Cell#3 Cell#4 Cell#5 Cell#6 Cell#7 Cell#8 Cell#9 Cell#10 Cell#11
2. After Alignment
F
Rev
Pointer value = 4
Data#m-7 Data#m-6 Data#m-5 Data#m-4 Pointer Data#m-3 Data#m-2 Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3
NUHN:95-045 Uen
Cell#m-3 Cell#m-2 Cell#m-1 Cell#m Cell#0 Cell#1 Cell#2 Cell#3 Cell#4 Cell#5 Cell#6 Cell#7
Pointer value = 1
Data#m-4 Data#m-3 Data#m-2 Data#m-1 Pointer Data#m Data#0 Data#1 Data#2 Data#3 Data#4 Data#5 Data#6
Pointer value = m
Data#m-2 Data#m-1 Data#m Data#0 Pointer Data#1 Data#2 Data#3 Data#4 Data#5 Data#6 Data#7 Data#8
163 (195)
1998-06-01 F NUHN:95-045 Uen
A.4.2 Principle of SDH Pointer Justifications

SDH Pointers always point to the begin of the respective Payload (VC).
If the speed of a VC is different from the speed of the HOVC or the AUG
into which it is multiplexed (i.e. bitrate offset), it must be able to float for-
ward or backward within the HOVC or the AUG structure. This is handled
by Pointer Justifications.
There are three typical situations :
- Synchronous situation A Payload Cell is ready to be transmitted for
each incoming Data Block and vice versa.
-> No Justifications needed (Ideal)
- Incoming VC too slow Payload Cells would be ready to be transmit-
ted before the corresponding Data Blocks
are received.
To prevent this, a specified Payload Cell (Pos-
itive Justification Opportunities filled with
dummy data (Stuff) in a controlled way as
soon as the VC is one Block behind.
-> Positive Justification
- Incoming VC too fast Data Blocks would be received too early, i.e.
before the corresponding Payload Cells are
ready to be transmitted.
To prevent this, a specified OH Cell (Negative
Justification Opportunity) is used to carry the
extra data as soon as the VC is one Block
ahead.
-> Negative Justification
Conclusion : SDH systems need a data buffer with a size of at least
+/- 1 Data Block to be able to handle pointer justifications
without data loss.
See ’Principle of SDH-Pointer Justifications’on page 165 and following
Principle of SDH-Pointer Justifications
a
Legend Data#x Incoming Data Block Cell#n SDH - Payload Cell
Data#0 Begin of incoming data structure (VC) OH Overhead Cell
Data#m End of incoming data structure (VC) Pointer Cell carrying the Pointer

1998-06-01
Datum - Date
Example 1 : Speed of incoming data is accurate (synchronous)
-> No Justification needed
F
Rev
Data#m-2 Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3 Data#4 Data#5 Data#6 Data#7
NUHN:95-045 Uen
Cell#m Pointer Cell#0 Cell#1 Cell#2 Cell#3 Cell#4 OH Cell#5 Cell#6 Cell#7 Cell#8 Cell#9
Pointer value = 2
A Payload Cell is ready for each incoming Data Block and vice versa
165 (195)
a
Example 2 : Speed of incoming data is too slow
-> Positive Justification needed
a.) Problem if no Justification would take place

1998-06-01
Datum - Date
Pointer value = 2
Problem : Data#6 not ready for being placed into Cell#8. Data would be lost
due to Buffer Underflow.
-> A Payload Cell needs to be stuffed
b.) During Justification
F
Rev
Cell#m Pointer Cell#0 Cell#1 Cell#2 Cell#3 Cell#4 OH STUFF
Cell#5 Cell#6 Cell#7 Cell#8 Cell#9
Pointer value = 2 (I-Bits inverted)
NUHN:95-045 Uen
-> Cell#5 is stuffed to fill the gap caused by the slow data
-> Data#3 is placed into Cell#6 now instead of Cell#5
c.) After Justification

Data#m-3 Data#m-2 Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3 Data#4 Data#5 Data#6
166 (195)
New pointer value = 3
-> After the stuffing action all Data Blocks are placed one Cell more to the right (backward)
-> Data#0 is located in Cell#3 now instead of Cell #2, thus the pointer is increased by 1
a
Example 3 : Speed of incoming data is too fast
-> Negative Justification needed
a.) Problem if no Justification would take place
Data#m-2 Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3 Data#4 Data#5 Data#6 Data#7 Data#8

1998-06-01
Datum - Date
Pointer value = 2
Problem : Cell#5 not ready for Data#3. Data would be lost due to Buffer Overflow.
-> An auxiliary Payload Cell is needed
b.) During Justification

Data#m-2 Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3 Data#4 Data#5 Data#6 Data#7 Data#8
F
Rev
Pointer value = 2 (D-Bits inverted)
NUHN:95-045 Uen
-> A specific OH Cell is used to carry the extra data
-> Data#4 is placed into Cell#5 now instead of Cell#6
c.) After Justification

Data#m-1 Data#m Data#0 Data#1 Data#2 Data#3 Data#4 Data#5 Data#6 Data#7 Data#8
167 (195)
New pointer value = 1
-> After the justification action all Data Blocks are placed one Cell more to the left (forward)
-> Data#0 is located in Cell#1 now instead of Cell #2, thus the pointer is decreased by 1
1998-06-01 F NUHN:95-045 Uen
A.5 TU-12 Numbering in a VC-4

A.5.1 General
The numbering of the TU-12s within a VC-4 is a very important issue in or-
der to be able to pick out the desired signals from the payload.
There are three different numbering schemes :
a) Systematic TU-12 numbering
b) Systematic VC-4 numbering
c) Structured numbering
All equipment in a network must follow the same numbering scheme or ap-
propriate cross-reference tables have to be used.
A.5.2 Systematic TU-12 Numbering (ETSI)

In this numbering scheme the TU-12s are numbered in the “logical” order
how they are multiplexed into a VC-4.
i.e. TU-12 #1 ⇒ TUG-3 #1 - TUG-2 #1 - TU-12 #1
TU-12 #2 ⇒ TUG-3 #1 - TUG-2 #1 - TU-12 #2
TU-12 #3 ⇒ TUG-3 #1 - TUG-2 #1 - TU-12 #3
TU-12 #4 ⇒ TUG-3 #1 - TUG-2 #2 - TU-12 #1
TU-12 #5 ⇒ TUG-3 #1 - TUG-2 #2 - TU-12 #2
.... and so on ....
TU-12 #20 ⇒ TUG-3 #1 - TUG-2 #7 - TU-12 #2
TU-12 #21 ⇒ TUG-3 #1 - TUG-2 #7 - TU-12 #3
TU-12 #22 ⇒ TUG-3 #2 - TUG-2 #1 - TU-12 #1
.... and so on ....
TU-12 #42 ⇒ TUG-3 #2 - TUG-2 #7 - TU-12 #3
TU-12 #43 ⇒ TUG-3 #3 - TUG-2 #1 - TU-12 #1
.... and so on ....
TU-12 #63 ⇒ TUG-3 #3 - TUG-2 #7 - TU-12 #3
This is the numbering scheme recommended by ETSI.
See table ’Systematic TU-12 Numbering’on page 170
A.5.3 Systematic VC-4 Numbering

In this numbering scheme the TU-12s are numbered in the “physical” order
how they are multiplexed into a VC-4.
i.e. TU-12 #1 ⇒ Columns #10, 73, 136, 199 of the VC-4
TU-12 #2 ⇒ Columns #11, 74, 137, 200 of the VC-4
.... and so on ....
TU-12 #63 ⇒ Columns #72, 135, 198, 261of the VC-4
See table ’Systematic VC-4 Numbering’on page 171.
1998-06-01 F NUHN:95-045 Uen
A.5.4 Structured Numbering

In this numbering scheme the TU-12s are numbered according to the mul-
tiplexing structure.
i.e. TU-12 #1/1/1 ⇒ TUG-3 #1 - TUG-2 #1 - TU-12 #1
TU-12 #1/1/2 ⇒ TUG-3 #1 - TUG-2 #1 - TU-12 #2
.... and so on ....
TU-12 #3/7/3 ⇒ TUG-3 #3 - TUG-2 #7 - TU-12 #3
This numbering scheme is unambiguous since it reflects the actual multi-
plexing of the TU-12s into the VC-4.
The structured numbering is included in the tables ’Systematic TU-12 Num-
bering’on page 170 and ’Systematic VC-4 Numbering’on page 171.
Those tables can be used as cross-references to convert between the differ-
ent numbering schemes.
1998-06-01 F NUHN:95-045 Uen
Systematic TU-12 Numbering

TU-12 Numbering Mux Structure Multiplexed into
Systematic Structured TUG-3 TUG-2 TU-12 VC-4 Columns
1 1/1/1 1 10 , 73 , 136 , 199
2 1/1/2 1 2 31 , 94 , 157 , 220
3 1/1/3 3 52 , 115 , 178 , 241
4 1/2/1 1 13 , 76 , 139 , 202
5 1/2/2 2 2 34 , 97 , 160 , 223
6 1/2/3 3 55 , 118 , 181 , 244
7 1/3/1 1 16 , 79 , 142 , 205
8 1/3/2 3 2 37 , 100 , 163 , 226
9 1/3/3 3 58 , 121 , 184 , 247
10 1/4/1 1 19 , 82 , 145 , 208
11 1/4/2 1 4 2 40 , 103 , 166 , 229
12 1/4/3 3 61 , 124 , 187 , 250
13 1/5/1 1 22 , 85 , 148 , 211
14 1/5/2 5 2 43 , 106 , 169 , 232
15 1/5/3 3 64 , 127 , 190 , 253
16 1/6/1 1 25 , 88 , 151 , 214
17 1/6/2 6 2 46 , 109 , 172 , 235
18 1/6/3 3 67 , 130 , 193 , 256
19 1/7/1 1 28 , 91 , 154 , 217
20 1/7/2 7 2 49 , 112 , 175 , 238
21 1/7/3 3 70 , 133 , 196 , 259
22 2/1/1 1 11 , 74 , 137 , 200
23 2/1/2 1 2 32 , 95 , 158 , 221
24 2/1/3 3 53 , 116 , 179 , 242
25 2/2/1 1 14 , 77 , 140 , 203
26 2/2/2 2 2 35 , 98 , 161 , 224
27 2/2/3 3 56 , 119 , 182 , 245
28 2/3/1 1 17 , 80 , 143 , 206
29 2/3/2 3 2 38 , 101 , 164 , 227
30 2/3/3 3 59 , 122 , 185 , 248
31 2/4/1 1 20 , 83 , 146 , 209
32 2/4/2 2 4 2 41 , 104 , 167 , 230
33 2/4/3 3 62 , 125 , 188 , 251
34 2/5/1 1 23 , 86 , 149 , 212
35 2/5/2 5 2 44 , 107 , 170 , 233
36 2/5/3 3 65 , 128 , 191 , 254
37 2/6/1 1 26 , 89 , 152 , 215
38 2/6/2 6 2 47 , 110 , 173 , 236
39 2/6/3 3 68 , 131 , 194 , 257
40 2/7/1 1 29 , 92 , 155 , 218
41 2/7/2 7 2 50 , 113 , 176 , 239
42 2/7/3 3 71 , 134 , 197 , 260
43 3/1/1 1 12 , 75 , 138 , 201
44 3/1/2 1 2 33 , 96 , 159 , 222
45 3/1/3 3 54 , 117 , 180 , 243
46 3/2/1 1 15 , 78 , 141 , 204
47 3/2/2 2 2 36 , 99 , 162 , 225
48 3/2/3 3 57 , 120 , 183 , 246
49 3/3/1 1 18 , 81 , 144 , 207
50 3/3/2 3 2 39 , 102 , 165 , 228
51 3/3/3 3 60 , 123 , 186 , 249
52 3/4/1 1 21 , 84 , 147 , 210
53 3/4/2 3 4 2 42 , 105 , 168 , 231
54 3/4/3 3 63 , 126 , 189 , 252
55 3/5/1 1 24 , 87 , 150 , 213
56 3/5/2 5 2 45 , 108 , 171 , 234
57 3/5/3 3 66 , 129 , 192 , 255
58 3/6/1 1 27 , 90 , 153 , 216
59 3/6/2 6 2 48 , 111 , 174 , 237
60 3/6/3 3 69 , 132 , 195 , 258
61 3/7/1 1 30 , 93 , 156 , 219
62 3/7/2 7 2 51 , 114 , 177 , 240
63 3/7/3 3 72 , 135 , 198 , 261
1998-06-01 F NUHN:95-045 Uen
Systematic VC-4 Numbering

TU-12 Numbering Mux Structure Multiplexed into
Systematic Structured TUG-3 TUG-2 TU-12 VC-4 Columns
1 1/1/1 1 10 , 73 , 136 , 199
2 2/1/1 2 1 11 , 74 , 137 , 200
3 3/1/1 3 12 , 75 , 138 , 201
4 1/2/1 1 13 , 76 , 139 , 202
5 2/2/1 2 2 14 , 77 , 140 , 203
6 3/2/1 3 15 , 78 , 141 , 204
7 1/3/1 1 16 , 79 , 142 , 205
8 2/3/1 2 3 17 , 80 , 143 , 206
9 3/3/1 3 18 , 81 , 144 , 207
10 1/4/1 1 19 , 82 , 145 , 208
11 2/4/1 2 4 1 20 , 83 , 146 , 209
12 3/4/1 3 21 , 84 , 147 , 210
13 1/5/1 1 22 , 85 , 148 , 211
14 2/5/1 2 5 23 , 86 , 149 , 212
15 3/5/1 3 24 , 87 , 150 , 213
16 1/6/1 1 25 , 88 , 151 , 214
17 2/6/1 2 6 26 , 89 , 152 , 215
18 3/6/1 3 27 , 90 , 153 , 216
19 1/7/1 1 28 , 91 , 154 , 217
20 2/7/1 2 7 29 , 92 , 155 , 218
21 3/7/1 3 30 , 93 , 156 , 219
22 1/1/2 1 31 , 94 , 157 , 220
23 2/1/2 2 1 32 , 95 , 158 , 221
24 3/1/2 3 33 , 96 , 159 , 222
25 1/2/2 1 34 , 97 , 160 , 223
26 2/2/2 2 2 35 , 98 , 161 , 224
27 3/2/2 3 36 , 99 , 162 , 225
28 1/3/2 1 37 , 100 , 163 , 226
29 2/3/2 2 3 38 , 101 , 164 , 227
30 3/3/2 3 39 , 102 , 165 , 228
31 1/4/2 1 40 , 103 , 166 , 229
32 2/4/2 2 4 2 41 , 104 , 167 , 230
33 3/4/2 3 42 , 105 , 168 , 231
34 1/5/2 1 43 , 106 , 169 , 232
35 2/5/2 2 5 44 , 107 , 170 , 233
36 3/5/2 3 45 , 108 , 171 , 234
37 1/6/2 1 46 , 109 , 172 , 235
38 2/6/2 2 6 47 , 110 , 173 , 236
39 3/6/2 3 48 , 111 , 174 , 237
40 1/7/2 1 49 , 112 , 175 , 238
41 2/7/2 2 7 50 , 113 , 176 , 239
42 3/7/2 3 51 , 114 , 177 , 240
43 1/1/3 1 52 , 115 , 178 , 241
44 2/1/3 2 1 53 , 116 , 179 , 242
45 3/1/3 3 54 , 117 , 180 , 243
46 1/2/3 1 55 , 118 , 181 , 244
47 2/2/3 2 2 56 , 119 , 182 , 245
48 3/2/3 3 57 , 120 , 183 , 246
49 1/3/3 1 58 , 121 , 184 , 247
50 2/3/3 2 3 59 , 122 , 185 , 248
51 3/3/3 3 60 , 123 , 186 , 249
52 1/4/3 1 61 , 124 , 187 , 250
53 2/4/3 2 4 3 62 , 125 , 188 , 251
54 3/4/3 3 63 , 126 , 189 , 252
55 1/5/3 1 64 , 127 , 190 , 253
56 2/5/3 2 5 65 , 128 , 191 , 254
57 3/5/3 3 66 , 129 , 192 , 255
58 1/6/3 1 67 , 130 , 193 , 256
59 2/6/3 2 6 68 , 131 , 194 , 257
60 3/6/3 3 69 , 132 , 195 , 258
61 1/7/3 1 70 , 133 , 196 , 259
62 2/7/3 2 7 71 , 134 , 197 , 260
63 3/7/3 3 72 , 135 , 198 , 261
1998-06-01 F NUHN:95-045 Uen

1998-06-01 F NUHN:95-045 Uen
B Appendix B
B.1 Abbreviations
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
A
A Adaptation Function X X
ABM Asynchronous Balanced Mode X
AC Alternating Current X
ACF Access Control Field X
ACK Acknowledge X
ACO Alarm Cutoff X
ACSE Association Control Service Element X
AcSL Accepted Signal Label X X
AcTI Accepted Trace Identifier X X
ADC Analogue-Digital Converter X
ADM Add Drop Multiplexer X X X
ADP Answer Detection Pattern X
AE Application Entity X
AEC Alarm Event Criteria X
AEL Acceptable Emission Limits X
AET Application Entity Title X
AEQ Application Entity Qualifier X
AFI Authority and Format Identifier X
AGC Automatic Gain Control X
AGGR Aggregate X X
AI Adapted Information X X
AIP Alarm Interface Panel X
AIS Alarm Indication Signal X X X X
AISS AIS Second X X X
AITS Acknowledged Information Transfer Service X
ALM Alarm X
ALS Automatic Laser Shutdown X X
AMPS American Advanced Mobile Phone System X
AMI Alternate Mark Inversion X X
ANSI American National Standards Institute X
AP Access Point X X
Application Process X
Aggregate Port X
APD Avalanche Photodiode X
APDU Application Protocol Data Unit X
API Application Program Interface X
APId Access Point Identifier X X
APS Automatic Protection Switching X X X
APT Application Process Title X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
ARC Automatic Routing Component X
ARPA Advanced Research Projects Agency X
ARQ Automatic Repeat reQuest X
AS Abstract Syntax X
ASCC Automatic Switch Completed Count X
ASCD Automatic Switch Completed Duration X
ASCII American Standard Code for Information Interchange X
ASE Application Service Element X
ASIC Application Specific Integrated Circuit X
ASN.1 Abstract Syntax Notation One X
ASP Assignment Source Point X
ASRC Automatic Switch request Count X
AT Alarm Type X
ATM Asynchronous Transfer Mode X
AU-n Administrative Unit-n X X
AU-n CTP AU-n Connection Termination Point X X
AUG Administrative Unit Group X
AUI Attachment Unit Interface X
AVC Attribute Value Change X
B
B3ZS Bipolar code with 3-Zero Substitution X X
B8ZS Bipolar code with 8-Zero Substitution X X
BAS Basic Activity Subset X
B-ISDN Broadband Integrated Services Digital Network X
BBE Background Block Error X X
BBER Background Block Error Ratio X X
BCC Block Check Character X
BCP Basic Control Protocol X
BECN Backward Explicit Congestion Notification X
BER Bit Error Rate X X X X X
Basic Encoding Rules X
BFW Basic Frame Word X
Bi Biconic X
BIB Backward Indicator Bit X
BIF Backplane Interface X
BIP Bit-Interleaved Parity X X
Breaker Interface Panel X
BIP-X Bit-Interleaved Parity-X X X
BISYNC Binary Synchronous Control X
Bit Binary Digit X
Bit/s Bits per Second X
BITS Building Integrated Timing Source X
BLER BLock Error Rate X
BLIB Basic Infrastructure Library X
BLSR Bidirectional Line-Switching Ring X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
BNF Backus Naur Form
BPV Bipolar Violation X
BPVR Bipolar Violation Rate X
BRI Basic Rate Interface X
BSC Binary Synchronous Control X
BSHR Bi-directional Self-Healing Ring X X
BSN Backward Sequence Number X
BSU Bus Supply Unit X
BSS Base Station System X
BTL Bus Transceiver Logic X
C
C Connection Function X X
C-n Container-n X X
CA Consequent Action X
CAN Controller Area Network X
Customer Access Network X
CAP Change Application Procedure X
CAPI Common Application Programmers Interface X
CAS Channel Associated Signalling X
CAT Craft Access Terminal X
CATV Corporate Antenna TeleVision X
CBDS Connectionless Broadband Data Service X X
CBR Constant Bit Rate X X
CBus Control Bus X
CCITT Consultative Committee International for Telegraphy
X
and Telephony (new : ITU-T)
CC Connect Confirm X
Communication Controller X
CCS Common Channel Signalling X
CCTPK Circuit Pack X
CCU Central Clock Unit X
CD Committee Draft X
Compact Disk X
CD-ROM Compact Disk Read Only Memory X
CDDI Copper Distributed Data Interface X
CEM Common Equipment X
CEPT Conference European de Poste et Telecommunica-
X
tions (or something like that)
CFC Central Fault Collector X
CFCAP Central Fault Collector Application Process X
CI Concatenation Indication X X
Characteristic Information X X
Communication Infrastructure X
Command Interpreter X
CIR Committed Information Rate X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
CISC Complex Instruction Set Computer X
CK Clock X
CLE Customer-Located Equipment X
CLEI Common Language Equipment Identifier X
CLFI Common Language Facility Identifier X
CLLI Common Language Location Identifier X
CLK Clock X
CLLM Consolidated Link Layer Management Message X
CLNP ConnectionLess Network layer Protocol X
CLNS ConnectionLess Network layer Service X
CM Configuration Management X
Connection Matrix X
Common Connection X
CME Connection Management Entry X
CMI Coded Mark Inversion X X X X X
CMIP Common Management Information Protocol X
CMNP Connection-Mode Network Protocol X
CMIS Common Management Information Service X
CMISE Common Management Information Service Element X
CMOS Complementary Metal-Oxide Semiconductor X
CMT Character Mode Terminal X
CMU Connection Matrix Unit X
CNet Communications Network X
CO Convenience Object X
Central Office X
COM Common Connection X
COML Communication Log X
Comms Communications X
Config Configuration X
CONP Connection Oriented Network layer Protocol X
CONS Connection-Oriented Network Service X
COP Card Out of Position X
CP Connection Point X X
Conditional Package X
CPC Common Product Code X
CPG Circuit Pack Group X
CPK Circuit Pack X
CPU Central Processing Unit X
CR Connection Request X
CRC(-x) Cyclic Redundancy Check (-x) X X X X X
CS Connection Supervision X X
Circuit Switched X
Compact Shelf X
CSA Carrier Serving Area X
CSES Consecutive Severely Errored Seconds X X X X X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
CSG Critical Section Guard X
CSMA/CD Carrier Sense Multiple Access with Collision Detection X
CSR Client Server Relationship X
CT Connection Termination X X
CTP Connection Termination Point X X
CTS Clear To Send X
CV Code Violation X X X X X
D
D Data X
DAT Digital Audio Tape X
DB Data Base X
dB Decibel X
dBm dB relative to 1 Milliwatt X
DBH Data Block Handler X
DC Direct Current X
DCC Data Communications Channel X X X X
Data Country Code X
DCD Data Carrier Detect X
DCE Data Communication Equipment X
Data-Circuit terminating Equipment X
DCF Data Communication Function X
DCN Data Communications Network X X X X
DCP Display and Control Panel X
DCS Defined Context Set X
DCU Display and Control Unit X
DDCMP Digital Data Common Message Protocol X
DDF Digital Distribution Frame X X X X X
DDL Data Definition Language X
DDP Datagram Delivery Protocol X
Digital Distribution Panel X
DDS Digital Data Storage X
DEC Decrement X
DECT Digital European Cordless Telecommunications X
DEG Degraded X
DEGTHR Degraded Threshold X X
DEMUX Demultiplexer X X X X
DFB Distributed Feedback X
D/I Drop/Insert X X X X
DIN Deutsche Industrie Norm X
DIP Dual In-line Package X
DIS Draft International Standard X
DISC DISConnect X
DLC Data Link Control X
DLCI Data Link Connection Identification X
DLE Data Link Escape X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
DLPDU Data Link protocol Data Unit X
DM Disconnect Mode X
Dial Mode X
DMA Direct Memory Access X
DME Distributed Management Environment X
DMS Digital Multiplex System X
DN Distinguished Name X
DOS Disk Operating System X
DPLL Digital Phase Locked Loop X
DQDB Distributed Queue Dual Bus X
DRAM Dynamic Random Access Memory X
DS Defect Second X
DS-n Digital Signal level n (USA Standard) X
DSAP Destination Service Access Point X
DSE Data Switching Equipment (Router) X
DSF Dispersion Shifted Fibre X
DSLCP Dynamically Switched Link Control Protocol X
DSP Domain Specific Part X
DSR Data Set Ready X
DTE Data Terminal Equipment X
DTMF Dual Tone Multiple Frequency X
DTR Data Terminal Ready X
DUART Dual Asynchronous Receiver/Transmitter X
DXC Digital Cross Connect X X X
DXI Data Exchange Interface X X
E
E.164 Standard Address Format for ISDN (ITU-T) X
EA External Alarm X
EB Errored Block X X X X
EBC Errored Block Count X X X X
EBER Excessive Bit Error Rate X X X X X
EC Element Controller X
ECC Embedded Communications Channel X X X X
Embedded Control Channel X X X X
ECL Emitter-Coupled Logic X
ECMD European Computer Manufacturers Association X
ECN Embedded Control Network X
ECP Environmental Control Panel X
ECSA Exchange Carrier Standards Association X
EDAC Error Detection and Correlation X
EDC Error Detection Code X X
EDCV Error Detection Code Violation X X
EDF Erbium Doped Fibre X
EEPROM Electrically Erasable and Programmable Read Only
X
Memory
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
EFD Event Forwarding Discriminator X
EFS Error Free Second X X X X
End-of-Frame Sequence X
EIA Electronics Industries Association X
EIU Ethernet Interface Unit X
ELM Equipment Level Management X
EMC Electromagnetic Compatibility X
EMF Equipment Management Function X X
EMI Electromagnetic Interference X
EMS Event Management System X
ENet Enhanced Network X
EOC Embedded Operations Channel X
EOM Electro-Optical Module X
EOW Engineering Order Wire X X X X
EPLD Electrical Programmable Logic Device X
EPROM Erasable Programmable Read Only Memory X
EQ Equipment X
EQF Equipment Failure X
EQP Equipment X
ER Entity Relationship X
ERM Entity Relationship Modelling X
ES Electrical Section X X
End System X
Errored Second X X X X X
ESA Event Sieve Agent X
ESD Electrostatic Discharge X
ESI External Synchronisation Interface X
ESP Electrostatic Protection X
Enhanced Serial Port X
ESQL Extended Standard Query Language X
ESR Errored Second Ratio X X X X X
ESWD Electronic Software Delivery X
ET Extra Traffic X X
ETS Equipment Timing Source X X X
ETSI European Telecommunications Standards Institute X
ETX End of TeXt X
EXC Excessive X
EXCP Exception X
ExSL Expected Signal Label X X
EXT External X
ExTI Expected Trace Identifier X X
F
F_B Far-end Block X X
F_DS Far-end Defect Seconds X X
F_EBC Far-end Errored Block Count X X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
FAC Frame Alignment Control X
FaCILITY x
FAL Frame Alignment Loss X X
FAS Frame Alignment Signal X X X X X
FC Ferrule Connector X
FCC Federal Communications Commission X
FCS Frame Check Sequence X
FDDI Fibre Distributed Data Interface X
FE Far End X X X X X
FEBE Far End Block Error (Renamed as REI) X X X X
FEC Forward Error Correction X
FECN Forward Explicit Congestion Notification X
FEPROM Flash Erasable Read Only memory X
FERF Far End Receive Failure (Renamed as RDI) X X X X
FEXT Far End Cross Talk
FFOM Fault Forwarding Object Manager X
FIFO First In First Out X
FLB Fault Log Browser X
FLS Frame Loss Second X
FM Fault Management X
Frequency Modulation X
Functional Model X
FNS Flexible Network Systems X
FOP Failure Of Protocol X
FOTS Fibre-Optic Transmission System X
FP Fabry-Perrot X
FPGA Field Programmable Gate Array X
FPPA Fibre Patch Panel Assembly X
FR Frame Relay X
FS Forced Switch X X
Frame Start X X X
FTAM File Transfer, Access and Management X
FTP File Transfer Protocol X
FU Functional Unit X
FW Firmware X
FWDB FibreWorld Database X
FWP FibreWorld Product X
FWPUI FibreWorld product User Interface X
G
GDMO Guidelines for the Definition of Managed Objects X
GNE Gateway Network Element X
GND Ground (electrical earth) X
GPRS General Packet Radio Services X
GSM Global System for Mobile Communication X
GUI Graphical User Interface X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
H
HCI Human Computer Interface X
HCS Higher order Connection Supervision X X
HDB3 High Density Bipolar code with max. 3 consecutive
X
zeros
HDLC High level Data Link Control X
HDTV High Definition TeleVision X
HEC Header Error Check X X
HEX HEXadecimal X
Hi High X
HMI Human Machine Interface X
HO Higher Order X X
HOA Higher Order Assembler X X
HOI Higher Order Interface X X
HOVC Higher Order Virtual Container X X
HP Higher order Path X X
HPA Higher order Path Adaptation X X
HPC Higher order Path Connection X X
HPOM Higher order Path Overhead Monitor X X
HPP Higher order Path Protection X X
HPT Higher order Path Termination X X
High Priority Traffic X X
HPTx High Performance Transmitter X
HRP Hypothetical Reference Path X
HS High Speed X
HSCC High-level Serial Communications Controller X
HSUT Higher order path Supervisory Unequipped Termina-
X X
tion
HTCA Higher order path Tandem Connection Adaptation X X
HTCT Higher order path Tandem Connection Termination X X
HTCM Higher order path Tandem Connection Monitor X X
HU Horizontal Unit X
HUG Higher order Unequipped Generator X X
HW HardWare X
Hz Hertz X
I
I Intra-office X X X X
IC Integrated Circuit X
ICD International Code Designator X
ICN Internal Communication Network X
ID IDentifier X
IDI Initial Domain Identifier X
IDP Initial Domain Part X
IEC Incoming Error Count X
International Electrical Commission X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
IEEE Institute of Electrical & Electronic Engineers X
I/F Interface X
IF In Frame state X X
IFU Interworking Functional Unit X
IIC Inter Integrated Circuit X
IM Information Model X
INC INCrement X
INT Internal X
I/O Input/Output X
I/P Input X
IP Internet Protocol X
Interworking Protocol X
IPC Inter Process Communication X
IPCP IP Control Protocol X
IPJC Integrated Pointer Justification Count X X
IPL Initial Program Loader X
IPX Internet Packet Exchange X
IR Intermediate Regenerator X X X X X
IS Intermediate System X
International Standard X
In Service X
ISDN Integrated Services Digital Network X
ISL Initial System Loader X
ISO International Standardization Organization X
ISR Interrupt Service Routing X
ISU Incremental Software Update X
ITU-T International Telecommunication Union - Telecommu-
X
nication Standardization Sector (old : CCITT)
J
K
KAI Kernel Adaption Interface X
KAL Kernel Adaption Layer X
L
L Long-haul X X X X X
LAN Local Area Network X
LAPB Link Access Procedure Balanced X
LAPD Link Access Procedure on D-Channel X
LAPM Link Access Procedure for Modems X
LASER Light Amplification by Stimulated Emission of RadiationX
LATA Local Access and Transport Area X
LBC Laser Bias Current X
LBO Line Build Out X
LC Link Connection X
LCAP Local Craft Access Panel X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
LCD Liquid Crystal Display X
Loss of Cell Delineation X
LCN Local Communications Network X
LCP Link Control Protocol X
LCS Lower order Connection Supervision X X
LDF Local Distinguished Form X
LED Light-Emitting Diode X
LI Length Indicator X
LLC Logical Link Control X
LME Layer Management Entity X
LO LockOut X
Lower Order X X
LOA Loss Of Alignment ; generic for LOF, LOM, LOP X X
LOC Loss Of Communication X X X X
LOF Loss Of Frame X X X X X
LOI Lower Order Interface X X
LOM Loss Of Multiframe X X X
LOP Loss Of Pointer X X
LOS Loss Of Signal X X X X X
LOT Local Operator Terminal X
LOVC Lower Order Virtual Container X X
LOW Local Orderwire X
LP Lower order Path X X
LPA Lower order Path Adaptation X X
LPC Lower order Path Connection X X
LPOM Lower order Path Overhead Monitor X X
LPP Lower order Path Protection X X
LPT Lower order Path Termination X X
Low Priority Traffic X
LPS Line Protection Switching X X
LR Line Regenerator X X
Long Reach X
LRF Local Registration File X
LS Low Speed X
LSB Least Significant Bit X
LSUT Lower order path Supervisory Unequipped Termination X X
LTCA Lower order path Tandem Connection Adaptation X X
LTCT Lower order path Tandem Connection Termination X X
LTCM Lower order path Tandem Connection Monitor X X
LTE Line Terminating Equipment X
LTI Loss of all incoming TIming references X X
LUG Lower order Unequipped Generator X X
LX Local Exchange X X X X
LXC Local Cross Connect X X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
M
MAC Medium Access Control X
MAF Management Application Function X
MAN Metropolitan Area Network X
MARS Message Access Routines X
MAU Medium Access Unit X
Mediation Attachment Unit X
Multistation Access Unit X
MBUS Maintenance Bus X
MC Matrix Connection X X
Main Controller X
MCCC MCU Centralised Connection Task X
MCCF MCU Configuration Database X
MCCO MCU Connection Task X
MCEF MCU Event Forwarding Discriminator Task X
MCEQ MCU Equipment Task X
MCF Message Communications Function X X X X
MCFA MCU Fault Task X
MCFB MCU Fabric Task X
MCI MCU Connection Interface X
MCK Master Clock X
MCM Main Controller Module X
MCMC MCU MCI Driver task X
MCNE MCU Network Element Task X
MCPO MCU Port task X
MCPR MCU Protection task X
MCTG MCU Timing Generator Task X
MCTP MCU Termination Point Task X
MCU Management & Communication Unit X
MD Mediation Device X
MDU Maintenance Display Unit X
MF Mediation Function X
MFP Master Frame Pulse X
Multi-Functional Peripheral X
MFS Multiframe Synchronisation X
MH Map Handling X
MI Management Information X
MIB Management Information Base X
MIC Maintenance Interface card X
MIL Management Interface Library X
MIT Management Information tree X
MMC MCU Memory card X
MMI Man Machine Interface X
MMSB Multi-Master Serial Bus X
MO Managed Object X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
MOC Managed Object Class X
MODEM Modulator/Demodulator X
MOH Maintenance Overhead Bus X
MOI Managed Object Instance X
MON MONitored X
MOS Management Operating Software X
Metal Oxide Semiconductor X
MP Management Point X
MPE Maximum Permissible Exposure X
MPR Mapper X
MRTIE Maximum Relative Time Interval Error X X X X X
MS Manual Switch X X
Multiplex Section X
MS-AIS Multiplex Section Alarm Indication Signal X
MS-RDI Multiplex Section Remote Defect Indication X
MS-REI Multiplex Section Remote Error Indication X
MSA Multiplex Section Adaptation X
MSB Most Significant Bit X
MSOH Multiplex Section Overhead X
MSP Multiplex Section Protection X
MST Multiplex Section Termination X
MSTTP Multiplex Section Trail Termination Point X
MSVM MCU Supervisory Module X
MTBF Mean Time Between Failure X
MTIE Maximum Time Interval Error X X X X X
MTS Master Timing Source X X X X X
MTTR Mean Time To Repair X
MUX Multiplexer X
mVOA Miniature Variable optical Attenuator X
N
N_B Near-end Block X X
N_BBE Near-end Background Block Error X X
N_DS Near-end Defect Seconds X X
N_EBC Near-end Errored Block Count X X
NACK Non Acknowledge X
NC Network Component X
Network Connection X X
Normally Closed X
N.C. Not Connected X
NCK Network Clock X X X X
NDF New Data Flag X X
NDF-C New Data Flag Count X X
NDSF Non Dispersion Shifted Fibre X
NE Network Element X
Near End X X X X X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
NEBS Network Equipment Building System X
NEF Network Element Function X
NEXT Near End Cross Talk X
NFS Network File System X
NLC Network Level Controller X
NLR Network Layer Relay X
NMA Network Monitoring and Analysis X
NMON Not MONitored X
NMS Network Management System X
NNE Non-SDH Network Element X
NNI Network Node Interface X
NO Normally Open X
NPDU Network Protocol Data Unit X
NPI Null Pointer Indication X X
NRM Normal Response Mode X
NRZ Non Return to Zero X
NS Network Service X
NSA Non Service Affecting X
NSAP Network Layer Service Access Point X
NSC Network Surveillance Centre X
NSDU Network Service Data Unit X
NSF Non-Specific Form X
NSS Network Surveillance System X
NTP Northern Telecom Publication X
NU National Use X
Non-Urgent X
NUM Network Upgrade Manager X
NVL Non Valid Load X X
NVS Non Volatile Storage X
O
OAM Operation, Administration and Maintenance X
OAM&P Operation, Administration, Maintenance & Provisioning X
OAU Overhead Access Unit X X X
OBA Optical Booster Amplifier X
OBIC Overhead Bus Interface Controller X
OC(-N) Optical Carrier (-N) X
OCN Object Creation Notification X
ODP Originator Detection Pattern X
Optical Distribution Panel X
OF Optical Fibre X
OFC Out-of-Frame Count X X
OFS Out-of-Frame Second X X
OH OverHead X X
OHA OverHead Access X X
OHB OverHead Bus X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
OHDS Online Help and Documentation System X
OHZB OverHead Z Bus X
OM Object manager X
OMO Observed managed Object X
OOF Out Of Frame X X
OOL Out Of Limits X
OOS Out Of Service X
OP Optical Power X
OPA Optical Post Amplifier X
OPC Operations Controller X
O/P Output X
OOS Out Of Service X
ORM Optical Receive Module X
ORS Object Registration Service X
Optical receive Signal X
OS Operating System X
Optical Section X X
OSF Operations System Function X
Open Software Foundation X
OSI Open Systems Interconnection X X
OSIE OSI Environment X
OSS Operations Support System X
OTM Optical transmit Module X
OW Order Wire X X
OWCM OrderWire Control Module X X
OWD OrderWire and Data X X
OWI OrderWire Interface Unit X
OWU OrderWire Access Unit X
P
PA Precision Architecture X
PABX Private Automatic Branch Exchange X
PAIS Path Alarm Indication Signal X X
PAD Packet Assembler / Disassembler X
PAI Protocol Address Information X
PAPI Privileged Application Programmers Interface X
PBA Printed Board Assembly X
PC Personal Computer X
Private Circuit X
Patch Cord X
PCB Printed Circuit Board X
PCM Pulse Code Modulation X
PCS Plesiochronous Connection Supervision X X X
PCV Parity Code Violation X
PDH Plesiochronous Digital Hierarchy X
PDR Performance data Reporting X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
PDU Protocol Data Unit X
PE Parity Error X
PEC Product Engineering Code X
PES Parity Errored Second X
PI Physical Interface X
Primary Input X
PID Process Identification X
PJC Pointer Justification Count X X
PJE Pointer Justification Event X X
PLL Phase Locked Loop X
PLM PayLoad Mismatch X X
Path Label Mismatch X
P-Loop Protection Loop X
PLS Physical Layer Signalling X
PM Performance Management X
Performance Monitoring X X
Path Management X X X
Payload manager X
Post Master X
PMO Proxy managed Object X
PMP Performance Monitoring Point X
PO Primary Output X
POH Path OverHead X X
POM Passive Optical Module X
Path Overhead Monitor X X
Proxy Object Manager X
POTS Plain Old Telephone Service X
PP Physical Port X X X
Pointer Processing X X
Path Protection X X
PPDU Presentation Protocol Data Unit X
PPC PDH Path Connection X
PPI Plesiochronous Physical Interface X X
PPITTP Plesiochronous Physical Interface Trail Termination
X X
Point
PPL Point-to-Point Link X
PPP Point to Point Protocol X
PPU Pointer Processing Unit X
PRBS Pseudo Random Binary Signal X
PRBSx PRBS with a repetition rate of 2x-1 X
PRC Primary Reference Clock X X X X X
PRI Primary Rate Interface X
PROM Programmable Read Only Memory X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
PS Packet Switched X
Presentation Selector X
Protection Switching X X
Power Supply X
PSAP Presentation Service Access Point X
PSC Protection Switch Count X X
PSD Protection Switch Duration X X
PSE Protection Switch Event X X
PSES Parity Severely Errored Second X
PSN Packet Switched Network X
PSPDN Public Switched Packet Data Network X
PSTN Public Switched Telephone Network X
PSU Power Supply Unit X
Protection Switch Unit X
PT Path Termination X X
Path Trace X X
PTE Path Terminating Equipment X X
PTR PoinTeR X X
PU Peripheral Unit X
PUPS Point-of-Use Power Supply X
PVC Permanent Virtual Circuit X
PWM Pulse Width Modulation X
PWR Power X
Q
Q3 OSI Compliant Management Interface X
QOS Quality Of Service X
QOSV Quality Of Service Violation X
R
RA Receiving Attention X
Remote Access X
RAI Remote Alarm Indication X
RAM Random Access Memory X
RAU Rack Alarm Unit X
RCU Remote Concentrator Unit X
Rcv Receive X
RDBMS Relational Database management System X
RDI Remote Defect Indication (Former FERF) X X X X
RDN Relative Distinguished Name X
RDP Requirements Development Plan X
REGEN Regenerator X X X
REI Remote Error Indication (Former FEBE) X X X X
REJ Reject X
REL Release X
RETA Return Leads of Battery A X
RETB Return Leads of Battery B X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
RFI Remote Failure Indication X X X X
RFP Rack Fuse Panel X
RI Remote Information X X
Routing Information X
RIB Routing Information Base X
RISC Reduced Instruction Set Computer X
RNR Receive Not Ready X
RNT Remote Network Telemetry X
ROM Read Only Memory X
ROSE Remote Operations Service Element X
ROT Remote Operator Terminal X
RP Remote Point X X
RPC Remote Procedure Call X
RPS Ring Protection Switching X X
RR Receive Ready X
RS Regenerator Section X X
RSOH Regenerator Section Overhead X X
RST Regenerator Section Termination X X
RSTTP Regenerator Section Trail Termination Point X X
RTC Real Time Clock X
RTM Ready To Manufacture X
RTS Request To Send X
RX Receive (Direction) X
RxSL Received Signal Label X X
RxTI Received Trace Identifier X X
S
S Short-haul X X X
SA Section Adaption X X
Service Affecting X
SABM Set Asynchronous Balanced Mode X
SABME Set Asynchronous Balanced Mode Extended X
SAP Service Access Point X
SAPI Service Access Point Identifier X
SAR Segmentation and Reassembly X X
SARM Set Asynchronous Response Mode X
SASE Stand Alone Synchronising Equipment X
SAW Surface Acoustic Wave X
SC Subscriber Connector X
SCC Serial Communications Controller X
SCI Synchronous Connection Interface X X X
SCSI Small Computer System Interface X
SCU Switch Controller Unit X
SD Signal Degrade X X X X X
Structured Design X
SDH Synchronous Digital Hierarchy X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
SDLC Synchronous Data Link Control X
S/DMS SDH/Digital Multiplex System X
SDP Severely Disturbed Period X X X X X
SDTH Signal Degrade Threshold X
SDU Service Data Unit X
SDXC Synchronous Digital Cross Connect X X
SEC SDH Equipment Clock X
SEFS Severely Errored Frame Second X
SEL Select, Selector X
SELV Safety Extra Low Voltage X
SEMF Synchronous Equipment Management Function X X
SES Severely Errored Second X X X X X
SESR Severely Errored Second Ratio X X X X X
SETG Synchronous Equipment Timing Generator X X
SETPI Synchronous Equipment Timing Physical Interface X X
SETS Synchronous Equipment Timing Source X X
SF Signal Fail X X X X X
Sk Sink X
SHR Self Healing Ring X X
SI Secondary Input X
SIA Station Interface Area X
SIG bus Signalling Bus X
SIHW SIU Hardware Driver X
SILA SIU Laser Driver X
SIM Service Interface Module X
SIRPIT Serial In Transmit Parallel In Transmit X
SIU-N STM-N Optical Interface Unit X
SL Signal Label X X
SLAT System Line-up and Test X
SLE Synchronous Line Equipment X X X
SLM Signal Label Mismatch X X
SLX Synchronous Line Multiplexer X
SM Security Management X
Section Management X X
Single Mode X
SMA System management Application X
SMDS Switched Multi-megabit Data Service X
SMF Sub-MultiFrame X X X
SMFA Specific Management Functional Area X
SMN SDH Management Network X
SMO System Managed Object X
SMS SDH Management Sub-network X
SMUX Synchronous Multiplexer X X
SMX Synchronous Multiplexer X
SNAP Sub-Network Access Protocol X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
SNC Sub-Network Connection X X
SNCP Sub-Network Connection Protection X X
SNC/I Inherently monitored Sub-Network Connection Protec-
X X
tion
SNC/N Non-intrusively monitored Sub-Network Connection
X X
protection
SNC/S Sublayer (tandem connection) monitored Sub-Network
X X
Connection protection
SNPA Sub Network Point of Attachment X
SNRM Set Normal Response Mode X
SNRME Set Normal Response Mode Extended X
So Source X
SO Secondary Output X
SOH Section Overhead X
SOM System Object Manager X
SONET Synchronous Optical NETwork (USA Standard) X
SP Shelf Processor X
SPDU Session Protocol Data Unit X
SPE Synchronous Payload Envelope X
SPI Synchronous Physical Interface X X
SPRING Shared Protection Ring X X
SQL Standard Query Language X
Src Source X
SS Session Selector X
SS7 Signalling System #7 X
SSAP Source Service Access Point X
SSD Server Signal Degrade X X
SSF Server Signal Fail X X
SSM Synchronisation Status Messaging X X
SSMB Synchronisation Status Message Byte X X
SSU Synchronisation Supply Unit X X
ST Straight Connector X
STE Section Terminating Equipment X
STM(-N) Synchronous Transport Module (-N) X
STM-Nc Concatenated STM-N X
STP Shielded Twisted Pair X
STS(-N) Synchronous Transport Signal (-N) X
SU Standard Unit X
Support Unit X
SVC Switched Virtual Circuit X
Switched Virtual Connection X
SVID System V Interface Definition X
S/W SoftWare X
SW SoftWare X
Switch X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
SWERR Software Error X
SYNC Synchronisation X
T
TAU Termination Access Unit X
TAM Traffic Access Module X
TBM Transport Bandwidth Manager X
TCB Transmission Circuit Board X
TCI Tributary Connection Interface X
TCM Tandem Connection Monitoring X X
TCP Termination Connection Point X X
Transmission Control Protocol X
TD Transmit Degrade X X
TDM Time Division Multiplex X X X X X
TEI Terminal Endpoint Identifier X
Temp Temperature X
TF Transmission Fail X X
Traffic Fail X
TFAS (Trail) Trace identifier Frame Alignment Signal X X
TGIF Timing Generator Interface X
Thru Through X
TI Timing Information X X
TIM Trace Identifier Mismatch X X
Traffic Interface Module X
TIU Tributary Interface Unit X
TM Terminal Multiplexer X X
Transmux X
TMN Telecommunications Management Network X
TNV Telecommunication Network Voltages X
TOH Transport OverHead X
TOP Transport Overhead Processor X
TP Termination Point X X
Timing Point X X
Tributary Port X X X X X
Transport Class X
TPI Tributary Protection Interface X
TPmode Termination point mode X X
TPBA Transmission Printed Board Assembly X
TPDU Transport Protocol Data Unit X
TRBL Trouble X
Trib Tributary X
TS Time Slot X
Transport Selector X
Tributary Synchronisation X
TSA Time Slot Assignment X
TSAP Transport Service Access Point X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
TSD Trail Signal Degrade X X
TSF Trail Signal Fail X X
TSI Timeslot Interchange X
TSL Trail Signal Label X X
TSS Transport Services Shelf X
TT Trail Termination function X X
TTs Trail Termination supervisory function X X
TTF Transport Terminal Function X X
TTI Trail Trace Identifier X X
TTL Transistor-Transistor Logic X
TTP Trail Termination Point X X
TU-n Tributary Unit-n X X
TUG(-n) Tributary Unit Group (-N) X X
TX Transmit (Direction) X
TxSL Transmitted Signal Label X X
TxTI Transmitted Trace Identifier X X
U
U Urgent X
UA Urgent Alarm X
UART Universal Asynchronous Receiver/Transmitter X
UAS UnAvailable Second X X X X X
UAT UnAvailable Time X X X X X
UI Unit Interval X
Unnumbered Information X
User Interface X
UITS Unnumbered Information Transfer Service X
UNEQ UNEQuipped X X
Unexp Unexpected X
UNI User Network Interface X X
UPS Uninterruptible Power Supply X
USCC User Switch Complete Count X
USCD User Switch Complete Duration X
USHR Uni-directional Self-Healing Ring X X
USR User channels X X
USRC User Switch Request Count X
UTC Universal Time Coordinated X
UTP Unshielded Twisted Pair X
V
VC Virtual Channel X
Virtual Connection X X
Virtual Container X
VC-n Virtual Container-n X
VCnTTP VC-n Trail Termination Point X X
VCI Virtual Channel Identifier X X
VCXO Voltage Controlled Crystal Oscillator X
1998-06-01 F NUHN:95-045 Uen
Source
Transmission
Abbrev Description
General
SONET
Other
Other
ATM
PDH
SDH
OSI
VDU Video Display Unit X
VF Voice Frequency X
VLSI Very Large Scale Integration X
VO Verification Office X
VOA Variable Optical Attenuator X
VP Virtual Path X X
VPI Virtual Path Identifier X X
VRC Vertical Redundancy Check X
VT Virtual Tributary X
Virtual Terminal X
VTG Virtual Tributary Group X
VTx Virtual Tributary x X
VU Vertical Unit X
VUE Visual User Environment X
W
W Working X
WAN Wide Area Network X
WLAN Wireless Local Area Network X
WS WorkStation X
WTR Wait-To-Restore X X
X
X.11 ISO data communication standard X
X.25 ISO data communication standard X
XH Exception Handler X
XMP X/Open Management Tool X
XTI X/Open Transport Interface X
XOS Extended Operating System X
Xmt Transmit X
XOW Express Orderwire X
Y

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INTERNAL INFORMATION

NEOR3 Fritz Schmocker NEOR3 Fritz Schmocker 1998-06-01 F NUHN:95-045 Uen

NEOS (Ernst Rohrbach) sdh_f.fm5

1998-06-01 F NUHN:95-045 Uen

2 PDH / SDH - Multiplexing / Mapping Structure ............................. 12

3 Short Introduction To PDH ............................................................... 14

4 SDH Functional Blocks ...................................................................... 26

1998-06-01 F NUHN:95-045 Uen

4.1.1.4 Multiplex Section Protection (MSP) .................................... 26

5 SDH Multiplexing / Mapping for 2 MBit/s ....................................... 34

1998-06-01 F NUHN:95-045 Uen

5.8.2 VC-4 Path Overhead (Higher Order POH) .................................... 52

6 SDH Multiplexing / Mapping for 34 MBit/s .................................... 66

7 SDH Multiplexing / Mapping for 140 MBit/s .................................. 84

1998-06-01 F NUHN:95-045 Uen

7.3.2 Mapping of C-4 into VC-4 ........................................................... 90

8 STM-N Frame ..................................................................................... 92

9 SDH Maintenance Signals ................................................................. 104

10 Protection ........................................................................................... 116

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10.1.7.1 APS Protocol for 1:2 Architecture ...................................... 126

11 Timing (Synchronisation) ................................................................. 146

12 Transmission Aspects ....................................................................... 150

A Appendix A ....................................................................................... 156

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B Appendix B ........................................................................................ 172

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1998-06-01 F NUHN:95-045 Uen

1.4 Revision History

1998-06-01 F NUHN:95-045 Uen

-- Intentionally left blank --

1998-06-01 F NUHN:95-045 Uen

-- Intentionally left blank --

1998-06-01 F NUHN:95-045 Uen

2 PDH / SDH - Multiplexing / Mapping Structure

2.2 PDH Signals

2.3 SDH Signals

SDH - Basics (Introduction)

AU-3 VC-3 C-3 D3

AUG Administrative Unit Group

1998-06-01 F NUHN:95-045 Uen

3 Short Introduction To PDH

3.2 PDH Multiplexing Structure

3.2.1 Primary Multiplexing (Overview)

3.2.2 Higher Order Multiplexing (Overview)

SDH - Basics (Introduction)

1998-06-01 F NUHN:95-045 Uen

3.3 Primary Multiplexing / Pulse Code Modulation (PCM)

3.3.1 The Human Voice

3.3.2 Low-Pass Filtering

3.3.4 Quantizing / Coding

1998-06-01 F NUHN:95-045 Uen

Basic Steps of PCM

G(t) Analog Signal

Sampling rate = 8 kHz

Each sample is converted into an 8 bit binary code

1998-06-01 F NUHN:95-045 Uen

3.3.5 2 MBit/s Basic Frame

3.3.5.1 Frame Structure

3.3.5.2 Line Coding

FAS or Non-FAS Channel 1 Channel 15 Signalling (CAS/CCS) Channel 16 Channel 30

SDH - Basics (Introduction)

TS31 TS0 TS1 TS31 TS0 TS1 TS31 TS0 TS1