Beruflich Dokumente
Kultur Dokumente
TPS2.1A
LA
18250_000_090210.eps
090504
©
Copyright 2009 Koninklijke Philips N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by QF/EH 0965 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 18260
2010-Jun-18
EN 2 1. TPS2.1A LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
1
2.1 Technical Specifications
2
For on-line product support please use the links in . Here is
product information available, as well as getting started, user
manuals, frequently asked questions and software & drivers.
8 7 6
18260_001_090423.eps
090423
2010-Jun-18
Technical Specifications and Connections TPS2.1A LA 2. EN 3
10000_002_090121.eps
090127 Figure 2-3 HDMI (type A) connector
2010-Jun-18
EN 4 3. TPS2.1A LA Precautions, Notes, and Abbreviation List
2010-Jun-18
Precautions, Notes, and Abbreviation List TPS2.1A LA 3. EN 5
The third digit in the serial number (example: 3.4 Abbreviation List
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the 0/6/12 SCART switch control signal on A/V
specific TV set. In general, it is possible that the same TV
board. 0 = loop through (AUX to TV),
model on the market is produced with e.g. two different types
6 = play 16 : 9 format, 12 = play 4 : 3
of displays, coming from two different suppliers. This will then format
result in sets which have the same CTN (Commercial Type
AARA Automatic Aspect Ratio Adaptation:
Number; e.g. 28PW9515/12) but which have a different B.O.M.
algorithm that adapts aspect ratio to
number. remove horizontal black bars; keeps
By looking at the third digit of the serial number, one can
the original aspect ratio
identify which B.O.M. is used for the TV set he is working with.
ACI Automatic Channel Installation:
If the third digit of the serial number contains the number “1” algorithm that installs TV channels
(example: AG1B033500001), then the TV set has been
directly from a cable network by
manufactured according to B.O.M. number 1. If the third digit is
means of a predefined TXT page
a “2” (example: AG2B0335000001), then the set has been ADC Analogue to Digital Converter
produced according to B.O.M. no. 2. This is important for
AFC Automatic Frequency Control: control
ordering the correct spare parts!
signal used to tune to the correct
For the third digit, the numbers 1...9 and the characters A...Z frequency
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
AGC Automatic Gain Control: algorithm that
indicated by the third digit of the serial number.
controls the video input of the feature
box
Identification: The bottom line of a type plate gives a 14-digit AM Amplitude Modulation
serial number. Digits 1 and 2 refer to the production centre (e.g. AP Asia Pacific
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers AR Aspect Ratio: 4 by 3 or 16 by 9
to the Service version change code, digits 5 and 6 refer to the ASF Auto Screen Fit: algorithm that adapts
production year, and digits 7 and 8 refer to production week (in aspect ratio to remove horizontal black
example below it is 2006 week 17). The 6 last digits contain the bars without discarding video
serial number. information
ATSC Advanced Television Systems
MODEL : 32PF9968/10 MADE IN BELGIUM Committee, the digital TV standard in
220-240V ~ 50/60Hz the USA
128W
ATV See Auto TV
PROD.NO: AG 1A0617 000001 VHF+S+H+UHF
Auto TV A hardware and software control
S BJ3.0E LA system that measures picture content,
and adapts image parameters in a
10000_024_090121.eps dynamic way
100105
AV External Audio Video
AVC Audio Video Controller
Figure 3-1 Serial number (example)
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
3.3.7 Board Level Repair (BLR) or Component Level Repair carrier distance is 5.5 MHz
(CLR) BDS Business Display Solutions (iTV)
BLR Board-Level Repair
If a board is defective, consult your repair procedure to decide BTSC Broadcast Television Standard
if the board has to be exchanged or if it should be repaired on Committee. Multiplex FM stereo sound
component level. system, originating from the USA and
If your repair procedure says the board should be exchanged used e.g. in LATAM and AP-NTSC
completely, do not solder on the defective board. Otherwise, it countries
cannot be returned to the O.E.M. supplier for back charging! B-TXT Blue TeleteXT
C Centre channel (audio)
3.3.8 Practical Service Precautions CEC Consumer Electronics Control bus:
remote control bus on HDMI
• It makes sense to avoid exposure to electrical shock. connections
While some sources are expected to have a possible CL Constant Level: audio output to
dangerous impact, others of quite high potential are of connect with an external amplifier
limited current and are sometimes held in less regard. CLR Component Level Repair
• Always respect voltages. While some may not be ComPair Computer aided rePair
dangerous in themselves, they can cause unexpected CP Connected Planet / Copy Protection
reactions that are best avoided. Before reaching into a CSM Customer Service Mode
powered TV set, it is best to test the high voltage insulation. CTI Color Transient Improvement:
It is easy to do, and is a good service precaution. manipulates steepness of chroma
transients
CVBS Composite Video Blanking and
Synchronization
DAC Digital to Analogue Converter
DBE Dynamic Bass Enhancement: extra
low frequency amplification
DCM Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV).
DDC See “E-DDC”
D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion
2010-Jun-18
EN 6 3. TPS2.1A LA Precautions, Notes, and Abbreviation List
DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote ITV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I2 C Inter IC bus software upgrade via RF transmission.
I2 D Inter IC Data bus Upgrade software is broadcasted in
I2 S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (color
Telecommunication Union relating to carrier= 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (color carrier PAL M=
2010-Jun-18
Precautions, Notes, and Abbreviation List TPS2.1A LA 3. EN 7
3.575612 MHz and PAL N= 3.582056 SVHS Super Video Home System
MHz) SW Software
PCB Printed Circuit Board (same as “PWB”) SWAN Spatial temporal Weighted Averaging
PCM Pulse Code Modulation Noise reduction
PDP Plasma Display Panel SXGA 1280 × 1024
PFC Power Factor Corrector (or Pre- TFT Thin Film Transistor
conditioner) THD Total Harmonic Distortion
PIP Picture In Picture TMDS Transmission Minimized Differential
PLL Phase Locked Loop. Used for e.g. Signalling
FST tuning systems. The customer TS Transport Stream
can give directly the desired frequency TXT TeleteXT
POD Point Of Deployment: a removable TXT-DW Dual Window with TeleteXT
CAM module, implementing the CA UI User Interface
system for a host (e.g. a TV-set) uP Microprocessor
POR Power On Reset, signal to reset the uP UXGA 1600 × 1200 (4:3)
PSDL Power Supply for Direct view LED V V-sync to the module
backlight with 2D-dimming VESA Video Electronics Standards
PSL Power Supply with integrated LED Association
drivers VGA 640 × 480 (4:3)
PSLS Power Supply with integrated LED VL Variable Level out: processed audio
drivers with added Scanning output toward external amplifier
functionality VSB Vestigial Side Band; modulation
PTC Positive Temperature Coefficient, method
non-linear resistor WYSIWYR What You See Is What You Record:
PWB Printed Wiring Board (same as “PCB”) record selection that follows main
PWM Pulse Width Modulation picture and sound
QRC Quasi Resonant Converter WXGA 1280 × 768 (15:9)
QTNR Quality Temporal Noise Reduction XTAL Quartz crystal
QVCP Quality Video Composition Processor XGA 1024 × 768 (4:3)
RAM Random Access Memory Y Luminance signal
RGB Red, Green, and Blue. The primary Y/C Luminance (Y) and Chrominance (C)
color signals for TV. By mixing levels signal
of R, G, and B, all colors (Y/C) are YPbPr Component video. Luminance and
reproduced. scaled color difference signals (B-Y
RC Remote Control and R-Y)
RC5 / RC6 Signal protocol from the remote YUV Component video
control receiver
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
SSC Spread Spectrum Clocking, used to
reduce the effects of EMI
STB Set Top Box
STBY STand-BY
SVGA 800 × 600 (4:3)
2010-Jun-18
EN 8 4. TPS2.1A LA Mechanical Instructions
4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assy/Panel Removal Styling
4.4 Set Re-assembly.
18260_101_090423.eps
090506
2010-Jun-18
Mechanical Instructions TPS2.1A LA 4. EN 9
For easy servicing of this set, there are a few possibilities 4.3.1 Rear Cover
created:
• The buffers from the packaging. Warning: Disconnect the mains power cord before removing
• Foam bars (created for Service). the rear cover.
1. Remove the fixation screws that secure the rear cover.
4.2.1 Foam Bars 2. Lift the rear cover from the TV. Make sure that wires and
flat foils are not damaged while lifting the rear cover from
the set.
4.3.4 Speakers
The foam bars (order code 3122 785 90580 for two pieces) can Refer to Figure 4-3 for details.
be used for all types and sizes of Flat TVs. See Figure 4-2 for 1. Release the clip at the top and take whole the unit out.
details. Sets with a display of 42" and larger, require four foam 2. Unplug the connector [1].
bars [1]. Ensure that the foam bars are always supporting the 3. Remove the fixation screws [2] and take the panel from the
cabinet and never only the display. unit.
Caution: Failure to follow these guidelines can seriously When defective, replace the whole unit.
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, the screen can
be monitored.
2010-Jun-18
EN 10 4. TPS2.1A LA Mechanical Instructions
18250_102_090210.eps
090611
4.3.6 IR Board
1. Remove screw and lift the IR Board from the front cover.
2. Unplug the connectors.
When defective, replace the whole unit.
Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position. See Figure 4-1.
• Pay special attention not to damage the EMC foams on the
SSB shields. Ensure that EMC foams are mounted
correctly.
2010-Jun-18
Service Modes, Error Codes, and Fault Finding TPS2.1A LA 5. EN 11
How to Activate SAM Note: Activation of the CSM is only possible if there is no (user)
Via a standard RC transmitter: key in the code “062596” menu on the screen!
directly followed by the “INFO” button.
How to Navigate
Contents of SAM: By means of the “CURSOR-DOWN/UP” knob (or the scroll
• Brand. Displays the brand name. wheel) on the RC-transmitter, can be navigated through the
• Ver. Displays the software version of the main software. menus.
• Date. Displays the software release date.
• Model Name. Displays the models name. Contents of CSM
• Scaler. Displays the scaler type. The contents are reduced to 3 pages: General, Software
• Panel Type. Displays the panel type. versions and Quality items. The group names itself are not
• Current Source. Displays the current input source, when shown anywhere in the CSM menu.
it be changed, the value of the ADC and Color Temp will be
changed. General
• Auto color. It only is valid for the input source which need • Model. Philips Model type.This information is very helpful
auto calibration. for a helpdesk/workshop as reference for further diagnosis.
• Color Temp. Displays the current color temp. In this way, it is not necessary for the customer to look at
• Burn in. Put “on” or “off” the burn-in mode. the rear of the TV-set. Note that if an NVM is replaced or is
• EEPROM Init. Initialize all of EEPROM, including ADC initialized after corruption, this set type has to be re-written
white balance Backlight and language, and set burn-in to NVM. ComPair will foresee in a possibility to do this.
“on”. • Production serial number. Displays the production serial
• Backlight Time. Displays the accumulated total of number of the TV. Note that if an NVM is replaced or is
operation hours (not the stand-by hours). Every time the initialized after corruption, this production code has to be
TV is switched “on/off”, 0.5 hours is added to this number. re-written to NVM. ComPair will foresee a in possibility to
• Error Code. Display the latest 5 error code statusus. do this.
• Clear Error Code. Reset CSM error code to 0. • Codes. Displays the lastest 5 error codes (Layer 2) status.
• Reset PBS Setting. Reset PBS menu setting of iTV to • SSB. Displays the 12NC of the SSB (Small Signal Board).
default. • Display. Displays the 12NC of the display (LCD Panel).
2010-Jun-18
EN 12 5. TPS2.1A LA Service Modes, Error Codes, and Fault Finding
Software versions TO TO TO
UART SERVICE I2C SERVICE UART SERVICE
• Software version. Displays the built-in main software CONNECTOR CONNECTOR CONNECTOR
Quality items
ComPair II Developed by Philips Brugge
• HDCP key. Valid/Invalid.
• Signal quality. DTV shows (Digital %), ATV shows HDMI
Optional power
5V DC
(Analog Yes/No) I2C only
Introduction
How to Order
ComPair (Computer Aided Repair) is a Service tool for Philips
ComPair II order codes:
Consumer Electronics products. and offers the following:
• ComPair II interface: 3122 785 90630.
1. ComPair helps to quickly get an understanding on how to
• Programming software can be downloaded from the
repair the chassis in a short and effective way.
Philips Service portal.
2. ComPair allows very detailed diagnostics and is therefore
• ComPair UART interface cable for TPS2.1A.
capable of accurately indicating problem areas. No
(using 3.5 mm Mini Jack connector): 3104 311 12742.
knowledge on I2C or UART commands is necessary,
because ComPair takes care of this.
Note: While having problems, contact the local support desk.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available. 5.3.2 LVDS Tool
4. ComPair features TV software up possibilities.
Support of this LVDS Tool has been discontinued.
Specifications
ComPair consists of a Windows based fault finding program 5.4 Error Codes
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
5.4.1 Introduction
USB cable. For the TV chassis, the ComPair interface box and
the TV communicate via a bi-directional cable via the service
connector(s). The error code buffer contains all detected errors since the last
The ComPair fault finding program is able to determine the time the buffer was erased. The buffer is written from left to
problem of the defective television, by a combination of right, new errors are logged at the left side, and all other errors
automatic diagnostics and an interactive question/answer shift one position to the right.
procedure. When an error occurs, it is added to the list of errors, provided
the list is not full. When an error occurs and the error buffer is
full, then the new error is not added, and the error buffer stays
How to Connect
intact (history is maintained).
This is described in the chassis fault finding database in
To prevent that an occasional error stays in the list forever, the
ComPair.
error is removed from the list after more than 50 hrs. of
operation.
When multiple errors occur (errors occurred within a short time
span), there is a high probability that there is some relation
between them.
2010-Jun-18
Service Modes, Error Codes, and Fault Finding TPS2.1A LA 5. EN 13
Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
check if the front LED is blinking or if an error is logged.
2010-Jun-18
EN 14 6. TPS2.1A LA Alignments
6. Alignments
Index of this chapter: In case you have a colour analyser:
6.1 General Alignment Conditions • Measure with a calibrated (phosphor- independent) colour
6.2 Hardware Alignments analyser in the centre of the screen. Consequently, the
6.3 Software Alignments measurement needs to be done in a dark environment.
6.4 Reset of Repaired SSB • Adjust the correct x,y coordinates (while holding one of the
White point registers R, G or B on 127) by means of
Note: The Service Alignment Mode (SAM) is described in decreasing the value of one or two other white points to the
chapter 5. Menu navigation is done with the CURSOR UP, correct x,y coordinates (see table “White D alignment
DOWN, LEFT or RIGHT keys of the remote control transmitter. values”). Tolerance: dx: ± 0.15, dy: ± 0.15.
• Repeat this step for the other colour temperatures that
need to be aligned.
6.1 General Alignment Conditions • When finished press OK on the RC and then press STORE
(in the SAM root menu) to store the aligned values to the
Perform all electrical adjustments under the following NVM.
conditions: • Restore the initial picture settings after the alignments.
• Power supply voltage (depends on region):
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%). Table 6-1 White D alignment values
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).
– EU: 230 VAC / 50 Hz (± 10%). Value Cool (11000 K) Normal (9000 K) Warm (6500 K)
– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%).
x 0.278 0.289 0.314
– US: 120 VAC / 60 Hz (± 10%).
• Connect the set to the mains via an isolation transformer y 0.278 0.291 0.319
with low internal resistance.
• Allow the set to warm up for approximately 15 minutes. If you do not have a colour analyser, you can use the default
• Measure voltages and waveforms in relation to correct values. This is the next best solution. The default values are
ground (e.g. measure audio signals in relation to average values coming from production (statistics).
AUDIO_GND). • Select a Colour Temperature (e.g. Cool, Normal, or Warm).
Caution: It is not allowed to use heatsinks as ground. • Set the Red, Green and Blue default values according to
• Test probe: Ri > 10 MΩ, Ci < 20 pF. the values in Table 6-2.
• Use an isolated trimmer/screwdriver to perform • When finished press OK on the RC, then press STORE (in
alignments. the SAM root menu) to store the aligned values to the NVM.
• Restore the initial picture settings after the alignments.
6.2 Hardware Alignments
Table 6-2 Tint settings
Not applicable.
Colour Temp. R G B
Cool 102 096 128
6.3 Software Alignments
Normal 111 102 128
Put the set in SAM mode (see Chapter 5. Service Modes, Error Warm 127 114 125
Codes, and Fault Finding”). The SAM menu will now appear on
the screen.
6.4 Reset of Repaired SSB
For the next alignments, supply the following test signals via a
A very important issue towards a repaired SSB from a service
video generator to the RF input:
repair shop, implies the reset of the NVM on the SSB.
• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 10 mV and a frequency of 64.25 MHz
• EU/AP-SECAM models: an SECAM D/K TV-signal with a A repaired SSB in service should get the service Set type
signal strength of at least 10 mV and a frequency of 223.25 “00PF0000000000” and Production code “00000000000000”.
MHz. Also the virgin bit is to be set. To set all this, you can use the
ComPair tool.
6.3.1 Scaler Gain
Due to the compensation needed for the LED backlight TV sets
22PFL3409/93, the item “Backlight time” value, stored in NVM,
• Choose ”TV”, “Picture”, and then “Dig.CrystalClear” and
set: must be reset in the spare SSB with the original value of the TV
set. “Backlight time” value can be found in the SAM (062596 +
– “Dynamic contrast” to “Off”.
info button).
– “Colour enhancement” to “Off”.
– “Brightness” to “50”.
– “Colour” to “50”. In case of a display replacement, reset the “Backlight time” to
– “Contrast” to “50”. “0”, or to the operation hours of the replacement display
• Go to the SAM and select “Scaler Gain”.
2010-Jun-18
Circuit Descriptions TPS2.1A LA 7. EN 15
7. Circuit Descriptions
Index of this chapter: 7.1.1 Features
7.1 Introduction
7.2 Main Supply The main features for this chassis are:
7.3 On-Board Platform Supply • High performance back-end processing Perfect Pixel HD
7.4 MST9A885GL engine capable of 300 Mpixels/sec. With this technology,
each pixel of the incoming picture is enhanced to better
Notes: match the surrounding pixels, resulting in a more natural
• Only new circuits (circuits that are not published recently) picture. Artifacts and noise in all sources from multimedia
are described. to standard TV to highly-compressed high-definition (HD)
• Figures can deviate slightly from the actual situation, due are detected and reduced. This results in a clean and razor
to different set executions. sharp image.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (chapter 6) and 7.1.2 Click Architecture Overview
circuit diagrams (chapter 7). Where necessary, you will find
a separate drawing for clarification. For details about the chassis block diagrams refer to chapter
“Block diagrams, Test Point Overview, and Waveforms”. An
7.1 Introduction overview of the 22PFL3409/93 architecture can be found in
next figure “System Architecture”. Sets with all resolutions @
60 Hz use the MST9A885GL SoC. With the same
It comes with styling called “Click“ for sets from the
configuration, a resolution of 1360x768p @ 59.79 Hz, or even
22PFL3409/93 series.
1920 × 1080p@60 Hz can be achieved.
It’s built around the MST9A885GL-LF “System on Chip” (SoC).
PANEL
LVDS
WT6703F
Tuner
DDR
PC
MST9A885GL
HDMI
NVRAM
YPbPr
18260_202_090423.eps
090506
2010-Jun-18
EN 16 7. TPS2.1A LA Circuit Descriptions
FLASH
PCU DDR
FFC SCALER
AV IN
TUNER
VGA
AV IN
HDMI CVI 1
AV OUT
CVI 2
18260_203_090423.eps
090506
2010-Jun-18
Circuit Descriptions TPS2.1A LA 7. EN 17
TPS62203
+3V3_STBY
+5V_STBY
(WT6703F)
32
2
BEAD FB7115, for w/o WT6703F (MST9A885GL)
AVDDA LVDS
3 (MST9A885GL) 30
TH2
30 29
5V3 4 AVDD_MPLL 29 28
5 (MST9A885GL) 28 27
27
6 VDDP 26
26
7 25
(MST9A885GL) 25 24
8 24 23
9 23 22
18V SC4524B 22
10 1V2 VDDC 21
(MST9A885GL) 21 20
11 20 19
19 18
18 17
17 16
3V3 STBY 16 15
15 14
AME1117 14 13
3V3 AVDD_USB2 13
(SD RAM) (MST9A885GL) 12
12 11
(MST9A885GL) 11 10
(STMPS2171STR) AVDD_AU 10 9
(HDMI SWITCH) (MST9A885GL) 9 8
8 7
AVDD_MemPLL 7 6
6 5
(MST9A885GL)
5 4
4 3
AVDD_VIF1 3 2
TH1
(MST9A885GL) 2 1
1
31
AVDD_VIF2
(MST9A885GL)
AVDD_VIF5
(MST9A885GL)
AME1117
2V6 VDDM
(DDR) (MST9A885GL)
(MST9A885GL)
TUNER
USB5V
SI4835 (STMPS2171STR)
Panel_PWR
SI4835
+12V_SW +12V_AMP
+12V
(TPA3123)
SC4525A SI4835
5V2 Panel_PWR
USB5V
SI4835
Panel_PWR
SC4524B
3V3_SW
5V_SW
SC4524B
3V3
18250_204_090210.eps
091008
2010-Jun-18
EN 18 7. TPS2.1A LA Circuit Descriptions
CN902
CN853 Power Control
Lamp Interfacing
CN851
PFC
SSB
CCFL-inverter
Ac-input +
Mainfilter
CN833
Lamp Interfacing
(only for 22")
CN831 AC-IN
CN901
18250_205_090310.eps
091008
stand-by
Low power
Mains filter +3.3 V
stand-by & mains
stand-by
separation
+ Mains
HV inverter −
separated
+
−
CCFL
−
Dimming
18250_206_090310.eps
091008
2010-Jun-18
Circuit Descriptions TPS2.1A LA 7. EN 19
7.4 MST9A885GL
2010-Jun-18
EN 20 8. TPS2.1A LA IC Data Sheets
8. IC Data Sheets
This section shows the internal block diagrams and pin
configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic”
ICs).
ANT
1 BT(T.P)
2 IF(T.P)
3 N.C
4 AS
5 SDA PLL
Control SIF OUT
6 SCL 10
+5V 7 +5V
470 µF/16V
8 SIF
RF AGC 100 nF
9 AGC
10 AFT AFT OUT
0.01
22 µF/16V 11 AUDIO AUDIO OUT
12 VIDEO 10 µF/16V
47k
270 270
+5V
Tuner CVBS
18260_300_090423.eps
090506
2010-Jun-18
IC Data Sheets TPS2.1A LA 8. EN 21
Pin Configuration
DDCD_SDA
DDCD_SCL
HWRESET
AVDD_33
GPIOE[0]
GPIOE[1]
GPIOE[2]
GPIOE[3]
GPIOT[0]
LVBCKM
LVACKM
LVBCKP
LVACKP
RXCKN
RXCKP
HPLUG
LVB0M
LVB1M
LVB2M
LVB3M
LVA0M
LVA1M
LVA2M
LVA3M
LVB0P
LVB1P
LVB2P
LVB3P
LVA0P
LVA1P
LVA2P
LVA3P
PWM3
PWM2
VDDP
VDDC
VDDC
VDDP
VDDP
VDDP
RX2N
RX1N
RX0N
RX2P
RX1P
RX0P
GND
ICLK
GND
GND
GND
GND
DI[7]
DI[6]
DI[5]
DI[4]
DI[3]
DI[2]
DI[1]
DI[0]
NC
NC
NC
NC
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
GND 1 192 GPIOB[ 1]
REXT 2 191 GPIOB[ 0]
HSYNC1 3 190 USB_CID
VSYNC1 4 Pin 1 189 USB_DP
VCLAMP 5 188 USB_DM
REFP 6 187 USB_VBUS
REFM 7 186 VDDP
BIN1P 8 185 IRIN
SOGI N1 9 184 INT
GIN1P 10 183 DDCA_SCL
RIN1P 11 182 DDCA_SDA
VCOM2 12 181 DDCR_SCL
BIN0P 13 180 DDCR_SDA
VCOM3 14 179 PWM1
GIN0P 15 178 PWM0
SOGI N0 16 177 SAR3
RIN0P 17 176 SAR2
AVDD_33 18 175 SAR1
GND 19 174 SAR0
HSYNC0 20 173 VDDC
VSYNC0 21 172 GND
VSYNC2 22 171 SPI_SDO
BIN2P 23 170 SPI_SCZ
SOGI N2 24 169 SPI_SDI
GIN2P 25 168 SPI_SCK
RIN2P 26 167 GND
C1 27 166 VDDP
Y1 28 165 GND
C0 29 164 USB20_DP
CVBS3
Y0 30
31
MST9A885 GL 163
162
USB20_DM
AVDD_USB
CVBS2
CVBS1
32
33
XXXXXXXX 161
160
USB20_REXT
MVREF
VCOM1
CVBS0
34
35
XXXXX 159
158
MCLKE
MCLK
VCOM0 36 157 MCLKZ
AVDD_33 37 156 DQM1
CVBSOUT1 38 155 DQS1
CVBSOUT0 39 154 AVDD_MI
GND 40 153 MDATA[15]
GPIOL[ 0] 41 152 MDATA[14]
GPIOL[ 1] 42 151 MDATA[13]
GPIOL[ 2] 43 150 MDATA[12]
GPIOL[ 3] 44 149 AVDD_MI
GPIOL[ 4] 45 148 MDATA[11]
XOUT 46 147 MDATA[10]
XIN 47 146 GND
AVDD_MPLL 48 145 MDATA[9]
GND_VIFPLL 49 144 MDATA[8]
VR27 50 143 AVDD_MI
VR12 51 142 MDATA[7]
AVDD_RXS 52 141 MDATA[6]
GND_RXS 53 140 MDATA[5]
SIFP 54 139 MDATA[4]
SI FM 55 138 AVDD_MI
VI FM 56 137 MDATA[3]
VIFP 57 136 MDATA[2]
GND_RXV 58 135 GND
AVDD_RXV 59 134 MDATA[1]
TAFC 60 133 MDATA[0]
AVDD_TAGC 61 132 AVDD_MI
GND_TAGC 62 131 DQS0
TAGC 63 130 DQM0
AVDD_AU 64 129 GPIOR[0]
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
AVDD_MIPLL
LINE_OUT_3R
LINE_OUT_2R
LINE_OUT_1R
LINE_OUT_0R
AUVRP
AUCOM
AUVAG
LINE_OUT_3L
LINE_OUT_2L
LINE_OUT_1L
LINE_OUT_0L
AUVRM
AVDD_AU
LINE_IN_MONO
CASZ
RASZ
VDDC
ALE
LINE_IN_0R
LINE_IN_1R
LINE_IN_2R
LINE_IN_3R
GND
GND
AVDD_MI
GND
AVDD_MI
VDDC
WEZ
WRZ
RDZ
VDDP
LINE_IN_0L
LINE_IN_1L
LINE_IN_2L
LINE_IN_3L
GND
BADR[1]
BADR[0]
MADR[11]
MADR[10]
MADR[9]
MADR[8]
MADR[7]
MADR[6]
MADR[5]
MADR[4]
MADR[3]
MADR[2]
MADR[1]
MADR[0]
GPIOD[0]
GPIOD[1]
GPIOD[2]
GPIOD[4]
GPIOD[3]
GPIOD[5]
GPIOD[6]
GPIOD[7]
AD[0]
AD[1]
AD[2]
AD[3]
18250_301_090210.eps
090210
2010-Jun-18
EN 22 8. TPS2.1A LA IC Data Sheets
Block Diagram
Internal 256
bytes SRAM
DDC
Eternal 128
bytes SRAM
Slave IIC
32K Oscillator
HV DPMS Detector
RTC
CEC
RC Oscillator
Watchdog timer
GPIO Processor
Interrupt Processor
Key Pad ADC
Pin Configuration
32K0SCO 1 24 VDD_RTC
32KOSCI 2 23 VDD
VSS 3 22 GPIOA0/AD0
NRST 4 21 GPIOA1/AD1
PWM1/GPIOC 5 20 GPIOA2/AD2
6703F-SG240WT
PWM0/GPIOC0 6 6703F-OG240WT 19 GPIOA3/AD3/IR
RXD/IRQ3/GPIOB7 7 18 GPIOA4/P1.0
(CEC)/TXT/IRQ2/GPIOB6 8 17 GPIOA5/P1.1
HIN/GPIOB5 9 16 GPIOA6/DSCL
VIN/GPIOB4 10 15 GPIOA7/DSDA
(CEC)/IRQ1/P1.3/GPIOB3 11 14 GPIOB0/SCL
IRQ0/P1.2/GPIOB2 12 13 GPIOB1/SDA/CEC
18250_302_090210.eps
090318
2010-Jun-18
IC Data Sheets TPS2.1A LA 8. EN 23
Block Diagram
Input Buffer
Write Data Register
Mode 16
2-bit Prefetch Unit
Register DS
32
2M×16 BANK 3
DQ0
CLK Bank 2M×16 BANK 2
Output Buffer
CKE
/CS 2M×16 BANK 0
Command
/RAS 32 16
Sense AMP
Decoder
/CAS
Mode Row Memory
/WE
Register Decoder Cell
LDM
UDM Array
DQ15
Column
Decoder
A0 LDQS,
A1 UDQS
CLK_DLL
Address Column Address
Buffer Data Strobe
Decoder
LDQS, Transmitter
Amax UDQS Data Strobe
CLK, DLL
BA0 Receiver
/CLK Block
BA1
Mode Register
Pin Configuration
VDD 1 66 VSS
DQ0 2 65 DQ15
VDDQ 3 64 VSSQ
DQ1 4 63 DQ14
DQ2 5 62 DQ13
VSSQ 6 61 VDDQ
DQ3 7 60 DQ12
DQ4 8 59 DQ11
VDDQ 9 58 VSSQ
DQ5 10 57 DQ10
DQ6 11 56 DQ9
VSSQ 12 55 VDDQ
DQ7 13 54 DQ8
NC 14 53 NC
VDDQ 15 52 VSSQ
LDQS 16
400mil x 875mil 51 UDQS
NC 17 66pin TSOP-II 50 NC
VDD 18 0.65mm pin pitch 49 VREF
NC 19 48 VSS
LDM 20 47 UDM
/WE 21 46 /CK
/CAS 22 45 CK
/RAS 23 44 CKE
/CS 24 43 NC
NC 25 42 NC
BA0 26 41 A11
BA1 27 40 A9
A10/AP 28 39 A8
A0 29 38 A7
A1 30 37 A6
A2 31 36 A5
A3 32 35 A4
VDD 33 34 VSS
18250_303_090210.eps
090318
2010-Jun-18
EN 24 8. TPS2.1A LA IC Data Sheets
Block Diagram
Pin Diagram
Pin Description
18260_304_090423.eps
090506
2010-Jun-18
IC Data Sheets TPS2.1A LA 8. EN 25
Block Diagram
Pin Diagram
Pin Description
18260_306_090423.eps
090506
2010-Jun-18
EN 26 8. TPS2.1A LA IC Data Sheets
Block Diagram
VI
Current Limit Comparator
+
Undervoltage _
REF
Lockout
Bias Supply
+
Skip Comparator
_
Soft Start REF
V V(COMP) 1 MHz
I Oscillator
P-Channel
Power MOSFET
Comparator S
+ Driver SW
R
_ Control Shoot-Through
Sawtooth
Logic Logic
Generator N-Channel
Comparator High
Power MOSFET
Comparator Low
Comparator Low 2
Load Comparator
+
_
Comparator High
+
Compensation R1
Gm
_ R2
Comparator Low
See Note
Comparator Low 2 +
VREF = 0.5 V _
EN
FB GND
18250_306_090210.eps
090318
2010-Jun-18
Block Diagrams TPS2.1A LA 9. EN 27
9. Block Diagrams
Wiring Diagram
Panel
FFC Cable
1 11
1
11 Pin 4 pin
CN201
10 Pin
R L
CN902
CN6101
CN853
10
30
CN851
MST9A885GL-LF
Key Pad
U4201
CN502
30 Pin
4 Pin
Power Board
Small Signal Board
Audio R/L
1
Video
4
4 Pin
CN7301
CN853
1
AC in
7
7 Pin
CN851 CN7306
1
CN901
1 6
Speaker R/L
6 pin
IR Board
CN0201
18250_401_090210.eps
090319
2010-Jun-18
Block Diagrams TPS2.1A LA 9. EN 28
Block Diagram
B08
HDMI CEC
DDR
B07 B09
HY5DU281622FTP-5-C
D-SUB EDID
R,G,B,SOG,H/V Sync,SIP
FLASH ROM
B09
B01 D SUB
MX25L1605DM2I-12G
B15 B11
LVDS CONNECTOR
PC AUDIO
BL_EN, BL_ADJ
HDMI EDID
HP
2nd PRE-AMP
AUDIO AMP B14
DRV601RTJR*3 SPEAKER
TPA3124D2PWPR
R B02
1st
AUDIO
SWITCH L
CVBS OUT
B15
V
If only use rear AV or side AV
SIDE
COMPAIR
(3P) B10
B02 S-VIDEO
UART CLONING B12
(5P)
AOC HOTEL
VIDEO I/F
(5P)
B15 BATHROOM
SPEAKER
SPDIF OUT
iTV LEVEL 1/2
18260_402_090423.eps
090506
2010-Jun-18
Block Diagrams TPS2.1A LA 9. EN 29
I2C Overview
TU1102
U4201
Tuner
PAL+NTSC+SECAM
STM-6C3/235
SCL DDCR_CK
SDA DDCR_DA
MST9A885GL U4101
WT6703F
10
15
DDCSDA
5
CN1401
11
GPIOB1/SDA2
U1401
1
2
HDMI-1
DDCDB_DA
CN1502 DDCDB_CK
18
19
DDC U1501
24C02
U4203
NVM
DDCR_CK NVM
24C16
M24C32
DDCR_DA
18260_403_090423.eps
090506
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 30
18250_500_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 31
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 32
18250_504_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 33
18250_505_090210.eps
091008
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 34
For 22PFL3404/60
R1407 10KOHM +-5% 1/16W
18250_506_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 35
18250_507_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 36
SSB: Scart(NC)
CN1901 B1 C1901 A2 C1908 A2 C1913 B2 C1915 B3 C1916 B3 C1918 B3 C1919 B3 C1920 C3 C1921 B4 C1922 B4 C1923 C4
C1924 C4 C1925 C3 C1926 C4 C1927 C4 C1928 C4 C1929 B5 C1930 C5 C1931 B4 C1932 B3 C1933 C5 C1935 B3 C1937 C5
C1943 B1 C1944 C1 FB1901 A3 FB1902 B3 FB1903 C3 Q1901 B3 Q1902 B3 Q1903 B4 R1901 A2 R1905 A2 R1909 B2 R1910 B3
R1911 B3 R1912 B3 R1913 B3 R1914 B3 R1915 B3 R1916 B2 R1917 C2 R1918 B3 R1919 C3 R1920 B3 R1921 C3 R1922 B3
R1923 C3 R1924 C4 R1925 C4 R1926 B4 R1927 B4 R1928 B4 R1929 C4 R1930 C4 R1931 C4 R1932 C4 R1933 C5 R1934 C5
18250_508_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 37
SSB: Tuner
C1101 A2 C1104 A2 C1105 A3 C1106 A2 C1108 C2 C1109 C3 C1110 B2 C1111 B2 C1112 B2 C1113 B2 C1114 D3 C1115 A2 C1117 C2 C1118 B2 C1119 B2 C1120 B2
C1127 A2 C1128 A2 FB1101 C2 L1101 A2 TU1102 A4 Q1101 C2 R1105 C3 R1106 C3 R1107 B2 R1108 B2 R1109 C3 R1113 A2 R1114 A2 R1115 A2 R1116 D3 R1117 A2
NC\
18260_509_090423.eps
090423
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 38
18250_510_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 39
18250_511_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 40
18250_512_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 41
18250_513_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 42
MX25L1605DM2I-12G 16Mb
18260_514_090423.eps
090423
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 43
IR/LED control
18250_515_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 44
18250_516_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 45
18250_517_090210.eps
090408
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 46
18250_518_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 47
18250_519_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 48
18250_520_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 49
SSB:DC-DC Power
C7101 A1 C7102 A2 C7103 A2 C7104 A1 C7105 A2 C7106 B3 C7107 A3 C7108 A2 C7109 A2 C7110 C3 C7111 C3 C7112 D2 C7113 C4 C7114 B2 C7115 D2 C7116 D1 C7117 B4 C7118 B5
C7119 B2 C7120 B4 C7121 B5 C7122 B5 C7123 B5 C7124 B5 C7125 B5 C7126 B5 C7127 B4 C7129 C3 C7131 D4 C7132 D4 C7133 D5 C7134 D5 C7136 B1 C7137 B1 C7138 B2 C7139 B2
C7140 B2 C7141 B2 C7143 B2 C7144 D1 C7147 D1 C7148 C1 C7150 D1 C7151 D2 C7152 D1 C7156 A4 C7157 B1 C7158 A5 C7159 A5 C7160 A4 C7161 C4 C7162 C5 C7163 C5 C7164 C4
D7101 D4 D7102 B4 D7104 B1 D7105 B2 D7106 C1 FB7101 A3 FB7105 C3 FB7106 C3 FB7107 C3 FB7108 C4 FB7109 B1 FB7111 C2 FB7112 B2 FB7113 C2 FB7114 B5 FB7115 A4 FB7116 A4 FB7117 B4
FB7118 B4 FB7119 A5 L7101 A2 L7102 B5 L7103 B2 L7104 C1 Q7101 B3 Q7102 B3 Q7103 B3 Q7104 C3 Q7108 C3 Q7109 C3 R7101 B3 R7102 B3 R7103 A3 R7104 B3 R7105 B3 R7106 A2
R7107 A2 R7113 C3 R7114 C3 R7115 C3 R7116 C3 R7117 B4 R7118 B5 R7119 B5 R7120 B5 R7121 B5 R7122 D4 R7123 D5 R7124 D5 R7125 A4 R7126 B1 R7127 B1 R7128 B2 R7129 B2
R7130 B2 R7131 B2 R7132 D1 R7133 C2 R7134 D2 R7135 D1 R7136 D1 R7137 A4 R7138 C3 R7139 C3 R7140 C4 R7141 C4 U7101 A1 U7103 B4 U7105 D4 U7106 B1 U7107 C1 U7108 A4
For 22PFL3404/60
Q7101, Q7109 P06P03LVG
18250_521_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 50
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 51
Part 1
18250_522a_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 52
Part 2
18250_522b_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 53
Part 3
18250_522c_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 54
Part 4
18250_522d_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 55
18250_523_090210.eps
090210
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 56
Part 1
18250_523a_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 57
Part 2
18250_523b_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 58
Part 3
18250_523c_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 59
Part 4
18250_523d_090210.eps
090319
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 60
IR Board
CN0201 C1
J IR Board J C0201 C4
C0202 C3
C203 C2
C204 C2
C205 C2
FB0201 C1
FB0202 C2
FB0203 C2
FB0204 C2
FB0205 C1
ED0203 A3
Q0201 B3
Q0202 B3
R201 A3
R0202 C4
R0203 C4
R0204 B2
R0205 B3
R206 A3
R0207 C3
R0208 B3
U201 C5
ZD0201 C4
For 22PFL3404/60
R0203 2.7KOHM +-5% 1/10W
18250_524_090210.eps
090225
2010-Jun-18
Circuit Diagrams and PWB Layouts TPS2.1A LA 10. EN 61
18250_525_090210.eps
090408
18250_526_090210.eps
10000_012_090121.eps
090319 090121
2010-Jun-18