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Design principle of SDH digital cross-connect (SDXC) matrix

Conference Paper · February 2000

DOI: 10.1109/ICMMT.2000.895689 · Source: IEEE Xplore

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2000 2"dInternational Conference on Microwave and Millimeter Wave Technology Proceedings

Design principle of SDH Digital Cross-connect (SDXC) Matrix

Shi Guowei'Z2, Wang qing3, Chen Ming'
(1. P.O.Box 577' ,Northwestern Polytechnical University, Xi'an, China 710072)
(2.Engineering College of Police Armed Force, Xi'an, Zhina 710086)
(3. Nanyang Technological University, Singapore 639696)
Phone: (029) 8230465, email: Shigw@sohu.com

Abstract This paper presents the design principle of a SDH Digital Cross-connect (SDXC) matrix implemented with Field
Programmable Gate Array (FPGA). The SDXC matrix enables construction of flexible SDH network, reduces the effects of
physical connection points and maintenance personnel.

1 Introduction bytes(shaded part). The overhead area is divided into

It is important to establish the high-speed section overhead (SOH) area and pointer area. The SOH
telecommunication networking to support the strongly mainly contains frame configuration information,
required transport capacity. In the transport level, operation information, and maintenance information. The
Synchronous Digital Hierarchy (SDH) optical digital pointer informs the actual data starting point in the
transmission system is now broadly used to transport the payload area. The payload area comprises channel data
large volume of information. and path overhead which is added at the time of
In the main time, networking flexibility is more multiplexing from low level to high level in accordance
required for versatile traffic management. In order to meet with the multiplexing procedure.
these requirements SDH Digital Cross-connect (SDXC) 1 9 10 270
system has been used which can provide flexibility,
connectivity, and easy operability to the networking and
can reduce the effects of physical connection points and
maintenance personnel. The functions of SDXC are to
separate local service from non-local service, provide the
route for non-local service, and reconfigure networking
when networking has failure. Fig. 1 STM-I frame structure
This paper introduces the design principle of a TU-12
level SDXC matrix used in 155MHzbith SDH optical
transmission system. The SDXC matrix is implemented
with Field Programmable Gate Array (FPGA).

2 STM-1 multiplexing structure

In order to design the switching structure for the low c-12
level signals TU-12 in STM-1 frame, it is necessary to
analyze STM-I frame and STM-1 multiplexing structure
by which the low level TUs are multiplexed into STM-1
frame. Pointer
processing Multiplexing Mapping Aligning
As show,. in Fig.1, STM-I frame defined in ITU-T
Fig.2 Multiplexing structure
G.707 composes 9 rows and 270 columns. Each row
In our design, we assume the lowest level signal is TU-
comprises 9 overhead bytes and 261 payload

@ 2000 IEEE
0-7803-5743-4/00/$10.00
' 335 *
 12, and the multiplexing procedure is configured as
shown in Fig.2.
Plesiochronous Digital Hierarchy (PDH) signals E l
(2.048mHz) are mapped into Virtual Container (VC) VC-
12 by code speed adjusting, and assigned to the signals of
Tributary Unit (TU) TU-12 level in which the substantial
multiplexing is developed. The time-slot data of 3 TU-12
signals are byte interleaving multiplexed to TUG-2 signal.
TUG-2 signals compose a TUG-3 signal by 7 byte
interleaving multiplexing procedure. Similarly, TUG-3
signals compose VC-4 signal through 3 byte interleaving
multiplexing procedure. VC-4 is assigned to one AU-4 to
develop the multiplexing process to AUG signal to which
the overhead area is added to form STM-1 frame.
Fig.3 illustrates the mapping and multiplexing of the 63
TU-12s into an STM-l/VC-4. Shaded part in the figure is
stuff columns.
TUG-2 # I
\\\\
6 6 . . 86
TUG-3A
.............................................
.............................................
I 261
vc-4
Fig 3 STM-UVC-4 TU-12 Multiplex Format Mapping
Each TUG-3 can comprise seven TUG-2s that shall be
numbered #1 to #7 and each TUG-2 can comprise three
TU- 12s that shall be numbered # 1 to #3.
Thus any TU-12 can be allocated a number in the form
#K, #L, #M, where K designates the TUG-3 number (1 to
336
3), L designates the TUG-2 number (1 to 7), and M
designates the TU-12 number (1 to 3). The location of the
columns in the VC-4 occupied by TU-12 (K, L, M) is
given by the formula:
Xth column= 1O+[K- 1]+3*[L- 1]+21* [M- 1]+63* [X- 13, for
X=l to 4.
Thus TU-12(1, 1, 1) resides in columns 10, 73, 136,
and 199 of the VC-4, and TU-12(3, 7, 3) resides in
columns 72, 135, 198 and 261 ofthe VC-4.
Thus, in the fact, the switching of TU-12s is columns
switching. If TU-12(1,1,1) want to switch to TU-12(3,7,3),
it only need switch columns 10,73,136,199 to columns
72,135,198,261. It is obvious that such processing must
ensure that all AU4poiter adjustments are absorbed into
TU pointer adjustments so that the resulting STM-1 frame
has its TUs occupying fixed, appropriately phase aligned
positions with respect to the overall transport envelope
frame, ready for switching.
3 Design principle of SDXC matrix
........... ...........
: TIME :
: SWITCH i : SWITCH j
........... ..........
SWITCHING SWITCHING
.ELEMENT
.......... .ELEMENT
..........
: SWITCH j
...........
SWITCH
...........
I +
T DOUTA[8:O] DOUTB[8:O
J
Fig 4 SDCX Block Diagram
As shown in Fig.4, the SDXC matrix we designed has :.
double inputs and double outputs (it is 2x2 switch matrix).
Each SDXC matrix comprises two switching elements.
Each switching element implements two single stage,
non-blocking time switches that each process an STM-1
rate stream. The channelization of each time switch
corresponds to 9 byte columns within the SDH frame. The
switching frame processed by each time switch
corresponds to 270 byte rows within the SDH fiame, and
switch frame rate of each time switch corresponds to 1/9'h
of the SDH flame rate. Two time switches that connect tc
a common output bus are grouped within each switching
 ~

element so that they can share a common connection
memory.
The switching elements are implemented in a classical
manner with each having a pair of data memories, a
common connection memory, a output multiplexer.
Fig.5 illustrates block structure of each switch element.
DINA[8 01
MEMORY
MEMORY
a per timeslot basis. Normally one would only write to the
inactive page, performing all the programming required to
implement ones desired connections, and trigger a page
swap at a fkame boundary.
3.3 Output multiplexer
Refer to Fig 5, the output multiplexer consists of logic
that the source of information to be output fkom the
switching element. Such selection is controlled on a per
timeslot basis by the connection memory and is thus
programmable.

4 Conclusion
This paper presented the design principle of SDH
Digital Cross-Connection (SDXC) matrix implemented
PAGE SWAP with FPGA. The SDXC matrix enables construction of
flexible SDH network, reduces the effects of physical
connection points and maintenance personnel, and has
COMMON MICROPROCESSORBUS
been used in our SDH optical transmission system
Fig 5 Block Diagram of Each Switch Element
(1 55MHzbith).
3.1 Date memories
Refer to Fig 5 , the data memories each consist of two Reference
[I] Network node interface for the synchronous digital hierarchy (SDH).
270x8 RAMS implementing a double buffered switch core.
ITU-T Rec. (3,707,1996
During each switch frame, data is written into sequential
[2] Johnston, B.; Owen, H.L. SDH digital cross-connect traffic
locations in one page of memory, and read from the other
generation algorithm. Modeling, Analysis and Simulation of Computer
page of memory based on a list of addresses provided by
and Telecommunication Systems, 1999. Proceedings. 7th International
the connection memory. At each switching frame
Symposium o n , 1999, Page@): 84 -91
boundary (every 270 bytes) the function of the two
[3] Si-Won Kim; Ki-Shick Park. Functional considerations for
memory pages is reversed, so as to exhibit constant frame
development of SDH technology-based broadband digital cross-connect
delay which preserves byte sequence integrity during
system. Computers and Communications, 1998. ISCC '98. Proceedings.
group connections. Two data memories are required, one
Third IEEE Symposium o n , 1998, Page@): 510 -514
for each of the input buses connected to the switching
[4] Ji Hoon Bang; Yong Serk Kim; Yong Whan Kim. Design of TU-
element.
11iTU-12 level switching structure in optical transmission equipment
3.2 Connection memory
which supports SDH (synchronous digital hierarchy) standard.
Refer to Fig 5, the connection memory consists of a
TENCON '97. IEEE Region 10 Annual Conference. Speech and Image
double buffered 270x13 RAM. During each switching
Technologies for Computing and Telecommunications., Proceedings of
frame, information is sequentially read from the active
IEEE ,Volume: 1 , 1997 , Page(s): 97 -100 vol.1
memory page and used to generate the read addresses for
[SI Nakano, Y.; Takatori, M.; Kanno, T.; Ashi, Y. Signal processing for
the data memory and control the output multiplexer.
SDH digital cross-connect system. Communications, 1993. ICC'93
Either connection memory can be written to or read from
Geneva. Technical Program, Conference Record, IEEE Intemational
via the common bus interface and thus its contents are
Conference on, Volume: 2 , 1993 ,Page@): 900 -904 v01.2
programmable. In this manner, the switching action of the
data memory and output multiplexer are programmable on

337
 2000 2"dIntemational Conference on Microwqve and Millimeter Wave Technology Proceedings

The Time Domain Response of Lossy Transmission Line

Guo-Lin Li Zhenghe Feng
State Key Lab on Microwave and Digital Comms.
Department of Electronics Engineering, Tsinghua University, Beijing, 100084

The modes-decomposition method in frequency can be summarized as the modes-decomposition

domain is well known in the analysis of method where line voltages [q]and line currents [TI
multiconductor transmission lines (MTL), as such are represented by mode voltages [Fm] and mode
lossy ones[ 13. The time domain analysis considered is
always assumed that they are lossless[2]. When we currents [Im]when [ZY] is diagonalizable , and the
investigate the lossy transmission lines in Laplace mode quantities cab be easily represented in equation
domain, only the conductor loss is assumed, i.e., (4).
relation of is assumed, as in the method of AWE [?I= [ K , I[', I (30) -
[3]. In this paper, firstly the trapezoid pulse is ['I= [K/ I[im] (3b)
transformed into Fourier domain by using FFT; and
then on each frequency point the modes-
I= [z,&P(- [rhij]+e x p t r b l i l ) (44

decomposition method is used to analyze the lossy [io,]= [rl~)[;i]-

ex~tr~ziil) (46)
MTL; finally, the time domain waveform is obtained where [K,] is the eigenvectors matrix of [ Z Y ] , and
from IFFT. On the analysis of the interconnections [K,] is the eigenvectors matrix of [YZ]. Diagonal
in ICs, where the loss-frequency relation is complex, matrix [zW] = Diug(Z,, ,z,, ,..., Z , ) is modal
FFT is one of the most powerful tools.
characteristic impedance matrix.
MTL termed in this paper is a system of (n+ 1) - = Diag(r,,r, ,...,rn)are propagation constants of the
[I-]
conductor-lines which are parallel to the z axis. We
assume that the crosssection dimension of the MTL n modes. These two diagonal matrices can be
structure is independent of Z . Then the MTL obtained directly from [K, 1[K,] and [ Z l[Y].
equations for frequency domain analysis are exp(T [r].)= Diug(exp(T T,z),exp(Tr2z),...,exp(T T,z)) is
d [F]= -[zli] the propagation matrix. Two vectors
dz [A]=(A,,A, ,..., A,)T and [E]= (B,,B, ,..., B, are the
d -
- [ I ] = -[YIV] coefficients to be determined by the boundary
dz conditions (loads) of the MTL.
where [e]= (v,,Y, ,...,V, y are the line voltages with In order to investigate the loss effect of
respect to the reference conductor -- the zero-th waveform on the transmission lines, only the cases of
conductor, [TI= (i,, i, ,..., i, are the line currents. T n = 1,2 are studied in this paper. In fact, for the case
represents the transpose. The n x n complex of n = 2 , the modes-decomposition method has
matrices of per-unit-length (PUL) impedance [ Z ] and analytical solution [5]. And the solution of n = 1 is st,.

admittance [Y] are symmetric, i.e., [z]'= [z], simple and trivial.
The input source pulse is a trapezoid pulse, as
[ Y p = [ Y ] , and can be represented as Fig. 1 shown.
[ z ( 4 l = [ R ( d l +jm41 (20)
j4+)l
[ y ( 4= [ G ( d l + (26)
where j = f i . The PUL resistance [RI,
inductance [L], conductance [GI, and capacitance
[C] are n x n real symmetric matrices, which may be
function of frequency, but independent of Z. The
solutions of equation (1) have been presented in 0 tl t2 t3 t4
several publications [2,4,5], and they all Fig. 1 Input trapezoid Pulse
This work is supported by the found from State For the case of n = 1 (Fig. 2), we study the loss
Key Lab on MM Wave Tech., Southeast University, effect of different PUL R . Suppose L = 3 . 3 5 n H / c m ,
No.K6 10. C = 1.34pF / c m , then the character impedance of

@ 2000 IEEE
0-7803-5743-4/00/$10.00 338
lossless transmission line is Z,
I
= JiTjz;= 50R. 1 :'.. - -input
.......
.........

~-~
....... ~ ~ 5 0
..
-

(a)

I
0.. -
DJ -
E .
a 0.. -

0 1 -
0 0 -
IdOD d 'DO0 lobo lobo a;.. sob. sob0 rob0 .io0 0000

f (PS)

1 (9)

Fig. 2 (a) A source-terminated transmission line. (b)

R, = 2 5 R . (c) RE =5OR. (d) R, = 7 5 R . (e)
RI=O.lZ,. (f) R I = Z , . (g) RI=5Z,.
Assume that RE =25,50,75R, then for RI
= 5Zo,2Zo,Zo,,0.5Zo,0.2Zo,0.1Zo,0.05Zo, we can
see the different waveform on the loads, where I
= 5cm, C, = 3 p F .

10
1
-
-
- __input
........Z05
From Fig. 2, we find that the high-loss
transmission line must be driven by a low-impedance
pulse source. For the low-loss transmission line,
low resistance of R, result in a faster but
0.
. -z02
... z o
O I - ......, .... zo 5 underdamped signal that take a longer time to settle,
E . ., , .~ .. zo 2
a while high resistance of R, results in overdampling.
~

0.-

- In fact, thus we can classify the loss of transmission

0 2
-.._
. . . . . -.
... ;.: . .......... . line into three catalogues: low-loss transmission line
DO -
for these RI < 0. l z , , high-loss transmission line for
these RI > 2Z,, and medium-loss for those between
the two limits.
Following we will study the case of n = 2 ,
where its
494.6 120.0
120.0 494.6

[
[cl= -14.9
62.8 -14.9
62.8
For the lossless case, the characteristic
91.35 21.92](*)
impedance matrix is [z01=[21.92 91.35
Ignore the cross item, we suppose the characteristic

' 339
 impedance of the two lines are Z,, = Z,, = IoOR.
ID -
Same as n = 1 , we can study the loss effect of
0. -
transmission lines of n = 2 .
z"":
c

2
>
0..

0 3 -
I = lOcm , C,, = C,, = 3 p F . DO -

-!ODD
1 . , .
0
I
,000
Rc=1500hm

. I
2000
. I
,000
. I
4000
. I
ID00
. I
mm
. I
mm
. I
.DO0
1
.DO0

t (PSI

(g)
(b) Fig. 3 (a) Transmission lines of n=2 with R,
= R,, = R,, , C , = C,, = C,, . (b)(c) R, = 50R. (d)(e)
R, = IOOR. (f)(g) R, = 150R.

Reference
[ I ] Clayton R. Paul, "Decoupling the Multiconductor
Transmission Line Equations", IEEE Trans. Microwave
Theory Tech., ~01.44,No.8, pp1429-1400, Aug. 1996.
[2] Fung-Yuel Chang, "Transient Analysis of Lossless
Coupled Transmission Lines in a Nonhomogeneous
Dielectric Medium", IEEE Trans. Microwave Theory
Tech., vol. MTT-18, No.9, pp616-626, 1970.
(c> [3] Fung-Yuel Chang, "Transient Simulation of Nonuniform
1 Coupled Lossy Transmission Lines Characterized with
Frequency-Dependent Parameters Part 11: Discrete-Time
Analysis", IEEE Trans. Circuit and System, vo1.39, No. 1,
Nov. 1992.
[4] Kenneth D. Marx, "Propagation Modes, Equivalent
Circuits, and Characteristic Terminations for
Multiconductor Transmission Lines with Inhomogeneous
Dielectrics", IEEE Trans. Microwave Theory Tech., vol.
MTT-2 1, NO.7, ~ ~ 4 5 0 - 4 5 July
7 , 1973.
[5] Guo-Lin Li, Zheng-He Feng, "Line-modes Decomposition
(dl of Three Conductor Transmission Line Equations", 2000
ASIA-PACIFIC Microwave Conference, submitted.

340 9

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