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Session 37

Interrupt Based Timer/ Counter and


Serial Programming

Lecture Delivered by:


Pranupa S
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Faculty of Engineering & Technology ©M. S. Ramaiah University of Applied Sciences
Session Objectives
At the end of this session, student will be able to:

– Explain the function of Interrupts

– Describe the Pin functions and modes of operations

– Explain the Programming key points to write interrupt program

– Explain the Programming for serial Communication

– Explain the Programming for timer

– Explain Programming for external device Connections

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Faculty of Engineering & Technology ©M. S. Ramaiah University of Applied Sciences
Session Topics
• Interrupts
• Interrupt Model
• Type 1 And Type 2 – Event is remembered when interrupt is
disabled
• Interrupt Vectors
• RI and TI flags and interrupt
• Program for serial communication interrupt
• Programming timer interrupt concept
• Program for timer interrupt
• Programming for External Hardware Interrupt
• Program for External Interrupt

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Interrupts
• Allow program to respond to events when they occur, Allow
program to ignore events until the occur
• External events e.g.:
• UART ready with/for next character
• Signal change on pin
• Action depends on context
• # of edges arrived on pin

• Internal events e.g.:


• Power failure
• Arithmetic exception
• Timer “tick”
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Interrupt Model
• When an interrupt event occurs:

• Processor does an automatic procedure call

• CALL automatically done to address for that interrupt

• Push current PC, Jump to interrupt address

• Each event has its own interrupt address

• The global interrupt enable bit (in SREG) is automatically cleared

• i.e. nested interrupts are disabled

• SREG bit can be set to enable nested interrupts if desired

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Type 1 And Type 2 – Event is remembered when
interrupt is disabled
TYPE-1

• If interrupt is not enabled, flag is set

• When interrupt is enabled again, interrupt takes place, and flag is reset

TYPE-2

• Signal level causes interrupt

• If level occurs when interrupt is enabled, interrupt takes place

• If interrupt is not enabled, and level goes away before the interrupt is
enabled, nothing happens
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Interrupt Vectors
• If interrupts are not used, this memory can be used as part of the
program

• i.e. nothing special about this part of memory

• Example interrupt routine

• RESET: Sets up the stack pointer

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RI and TI flags and interrupt
• Received interrupt is raised when entire frame of data, including the
stop bit, is received

• In 8051 only one interrupt is set aside for serial communication

• If the interrupt bit in the IE register is enabled, when RI or TI is raised


the 8051 gets interrupted and jumps to the memory address location
0023H to execute the ISR

• Use of serial COM in 8051: the serial interrupt is used mainly for
receiving the data serially. For example phone call receiver

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Program for serial communication interrupt
• Write a program in which the 8051 reads data from p1 and writes it to
p2 continuously while giving a copy of it to the serial COM port to
transferred serially. Assume that XTAL= 11.0592MHZ. Set the baud rate
at 9600

org 0

LJMP main

Org 23H

LJMP serial ; jump to serial interrupt ISR

Org 30h

Main: mov p1, #0FFH ; make p1 an input port 9


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Program cont.
• Mov TMOD, #20H ; make timer 1, mode2 (auto- reload)

• Mov th1, #0FDH ; 9600 baud rate

• Mov scon, #50H ; 8-bit, 1 stop, REN enabled

• Mov IE, #10010000B ; enable serial interrupt

• SETB TR1 ; start timer 1

• Back: mov A, p1 ; read data from port 1

• Mov SUBF, A ; give a copy to SBUF

• Mov p2,A ; send it to p2

• SJMP back ; stay in loop indefinitely


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Program cont.
• ……………………serial port ISR

• ORG 100H

• Serial: JB T1, TRANS ; jump if T1 is high

• Mov A, SBUF ; otherwise due to receive

• Clr RI ; clear RI since CPU does not

• RETI ; return from ISR

• Trans: clr TI ; clear TI since CPU does not

• RETI ; clear TI since CPU does not

• END
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Programming timer interrupt
• Roll over timer flag and interrupt:

if the timer interrupt in the IE register enabled, whenever the timer rolls
over, TF is raised, and micro controller is interrupted in whatever it is
doing, and jumps to the interrupt vector table to service the ISR

• Note the following points to write the program

• We must avoid using the memory space allocated to the interrupt


vector table

• The ISR for timer 0 is located starting at memory location 000BH since
it is small enough to fit the address space allocated to this interrupt
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Programming timer interrupt cont.
• We enabled the timer 0 interrupt with “MOV IE, #1000010B” in main B

• While the p0 data is brought in and issued to P1 continuously,


whenever timer 0 is rolled over, the TF0 flag is raised, and the micro
controller gets out of the “BACK” loop and goes to 000B H to execute
the ISR associated with timer 0

• In the ISR for timer 0, notice that there is no need for a “clr tfo”
instruction before the RETI instruction

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Program for timer interrupt
• Write a program that displays a value of ‘y’ at port 0 and N at port 2
and also generates a square wave of 10KHZ with timer 0 in mode2 at
port pin p1.2. XTAL= 22MHZ

• Org 0000H

• LJMP MAIN ; bypass interrupt vector table

• Org 000BH ; timer 0 interrupt vector

• Cpl p1.2 ; timer 0 interrupt vector

• RETI

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Programming timer interrupt cont.
• Org 0030H ; a location after the interrupt vectors

• Main: Mov TMOD, #02H ; timer 0, mode 2 ( auto-reload)

• Mov TH0, #0B6H ; move count value into TH0

• MOV IE, # 82H ;enable interrupt timer 0

• SETB TR0 ; start timer 0

• Back: Mov p0, #’y’ ; display y at port p0

• Mov p2, #’N’ ; display N at port p2

• SJMP BACK ;keep doing this until interrupted

• End
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Programming External Hardware Interrupts
• The 8051 as 2 external hardware interrupt hardware : INT0 and INT1
• They are located on pins 3.2 and p3.3 of port 3, respectively
• There are 2 types of actions for the external hardware interrupts:
• level triggered
• edge triggered
• In level triggering mode INT0 and INT1 are high if low level signal is
applied to them, it triggers the interrupt. then controller stop the work
and JUMP to vector table for providing service
• INT0 and INT1 low level triggered interrupts at edge triggering. TCON
register holds the bits and all information among triggering

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Program for External Interrupt
• Generate from all pins of port 0, a square wave which is half the
frequency of the signal applied at INT0 pin( pin No. 3.2).
org 0000H
LJMP MAIN
;-- ISR for the hardware Interrupt INTO
Org 0003 H
CPL P0
RETI
Org 0030H
Main SETB TCON.0 ; make INT0 an edge triggered interrupt
Mov IE, #81H ; enable hardware interrupt INT0
Here : SJMP Here
End 17
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Summary

• Allow program to respond to events when they occur, Allow program to


ignore events until the occur

• Use of serial COM in 8051: the serial interrupt is used mainly for
receiving the data serially. For example phone call receiver

• Interrupt handling is by polling, i/o Driven , Processor methods, the


timer and its mode of operation is depended on clock signal

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