Sie sind auf Seite 1von 42

Power Supply Design Seminar

Topic 1 Presentation:

Under the Hood of Flyback


SMPS Designs
Reproduced from
2010 Texas Instruments Power Supply Design Seminar
SEM1900, Topic 1
TI Literature Number: SLUP254

© 2010, 2011 Texas Instruments Incorporated

Power Seminar topics and online power-


training modules are available at:
power.ti.com/seminars
Topic 1

Under the Hood of


Flyback SMPS Designs

Jean Picard

SLUP254
Agenda

1. Basics of Flyback Topology


2 Impact of Transformer Design on Power Supply
2.
Performance
3. Power Supply Current Limiting
4. Summary

Texas Instruments—2010 Power Supply Design Seminar 1-2


SLUP254
Transfer of Energy
• FET turns ON
– Voltage across primary
IP
magnetizing inductance ≅ Vi
• E
Energy iis stored
t d in
i flyback
fl b k Io
transformer: Function of L,
D and Ts
– Secondary
y diode in blocking
g state +Vi
• FET turns OFF 1:n2 - + Vo
– During commutation: Leakage -
IP

amp
energy absorbed by clamp circuit Iout
+

Cla
– Stored energy transferred to output
Vdrain
through diode
– If DCM operation
operation, all the stored
energy is transferred

• Pulsating input and output


currentt

Texas Instruments—2010 Power Supply Design Seminar 1-3


SLUP254
Transfer of Energy
• FET turns ON
– Voltage across primary
magnetizing inductance ≅ Vi IP
• Energy is stored in flyback
transformer: Function of L, D and Ts Io
– Secondary diode in blocking state

• FET turns OFF +V


Vi
Io
– During commutation: Leakage 1:n2 Vo
energy absorbed by clamp +
IP

mp
circuit Iout

Clam
– Stored energy transferred to -
output through diode Vdrain
– If DCM operation
operation, all the stored
energy is transferred

• Pulsating input and output


currentt

Texas Instruments—2010 Power Supply Design Seminar 1-4


SLUP254
Transfer of Energy
• FET turns ON
O
– Voltage across primary
magnetizing inductance ≅ Vi IP
• Energy is stored in flyback
transformer: Function of L, D and Ts Io
– Secondary diode in blocking state

• FET turns OFF


O +Vi
Io
– During commutation: Leakage 1:n2 Vo
energy absorbed by clamp circuit +

Clamp
– Stored
St d energy transferred
t f d to
t Iout
output through diode
-
– If DCM operation, all the stored Vdrain
energy is transferred

• Pulsating input and output


current

Texas Instruments—2010 Power Supply Design Seminar 1-5


SLUP254
Transfer of Energy
• FET turns ON
– Voltage across primary
magnetizing inductance ≅ Vi
• Energy is stored in flyback transformer:
Function of L, D and Ts +Vi
– Secondary diode in blocking state 1:n2 Vo

• FET turns OFF

Clamp
Iout
– During commutation: Leakage energy
absorbed by clamp circuit Vdrain
– Stored energy transferred to output
through diode
– If DCM operation, all the stored
energ is transferred
energy

• Pulsating input and output current

Texas Instruments—2010 Power Supply Design Seminar 1-6


SLUP254
CCM versus DCM
T
• Continuous conduction mode (CCM) Vdrain
Vo
– Small ripple and rms current Primary
MOSFET D x Ts n2 + Vi
(1 – D) x Ts

– Lower MOSFET conduction and


turn-off loss Primary
C
Current Ipk
– Lower core loss IP ΔIL Ipkmin

– Lower capacitors loss


– Can have better “full load” efficiency Secondary m2S
Current ΔILS
S Io_avg
_ g
– Smaller
S ll EMI and d output
t t filters
filt Io

Time (t)
• Discontinuous conduction mode Ts
(DCM) Vdrain
Vi
– No diode reverse recovery loss Primary D × Ts Vo
MOSFET n2 + Vi
– Lower inductance value Ipk
• May result in a smaller transformer Primary
– Better “no
no load
load” efficiency Current
IP
(1 – D) × Ts

– First-order system
Idle
• Inherently stable Period
– No RHPZ pproblem Secondary
– Slope compensation not needed Current Io_avg
Io
in CMC
Texas Instruments—2010 Power Supply Design Seminar Time (t) 1-7
SLUP254
Right-Half-Plane Zero, CCM Operation
+Vi
• Energy is delivered during 1 – D 1:n2 - + Vo
– Effect of control action during ON -
IP

Cllamp
time is delayed
y until next switch Iout
turn OFF +
Vdrain
• Initial reaction is in opposite
direction of desired correction
FET ON
⇒ RHP Zero
+Vi
Io
– Phase decreases with increasing 1 2
1:n Vo
gain
+

Clamp
Iout
(1 − D ) 2
× Vo -
f RPHZ =
2πL × D × Iout × n 22
Vdrain

FET OFF
D ↔ Main
M i switch
it h d
duty-cycle
t l

Texas Instruments—2010 Power Supply Design Seminar 1-8


SLUP254
RCD Clamp Circuit
• During commutation primary-to-
primary to
secondary, the leakage energy +Vi
Diode or
is absorbed by the clamp circuit Synchronous
– Rclamp dissipates the leakage N1:N2 Rectifier Vo

energy and some magnetizing –


Rc la m p Vc la m p
energy +
IP
– The clamp capacitor ensures a
Vdra in
low voltage ripple
– Use short connection with
minimum loop area RS
• Vclamp is maximum at full load
Clamp-Diode
and minimum input voltage Forward Recovery Leakage-Inductance
Demagnetization
– Rclamp selected for a maximum Vi + Vc la m p Vo
Vi +
drain voltage in worst case n
Vdra in
– Tradeoff between efficiency, Primary
MOSFET
peak drain voltage, output
current limit and cross regulation
(see ringing effect)
Texas Instruments—2010 Power Supply Design Seminar 1-9
SLUP254
Agenda

1. Basics of Flyback Topology


2 Impact of Transformer Design on Power
2.
Supply Performance
3. Power Supply Current Limiting
4. Summary

Texas Instruments—2010 Power Supply Design Seminar 1-10


SLUP254
Transformer’s Leakage Inductance
IS
Lleak2 During Primary-to-
N1:N2
• Transformer’s
Transformer s leakage – + Vleak2 –
Secondary Commutation
– + VD + ø
inductance represented by Lleak2 Vi
+
Clamp
+
Vmag1
+
Lm Vmag2

Vout

– Primary winding is the closest to IP W1

center gap FET


W2

• When FET turns OFF Leakage


Inductance

– Lleak2 opposes to IP decrease and Clamp Diode


Demagnetization
Leakage Inductance
Forward Recovery Resonates with Drain
IS increase Current Circulates in
Secondaryy Winding(s)
g( ) Vi + Vclamp Capacitance

– Magnetizing inductance works to Vi + Vclamp

maintain magnetizing current

• Voltage spike on FET during VFET Vclamp VFET Clamp


Capacitor
Cl
Clamp C
Capacitor
it Voltage
V lt Voltage
commutation
0V
Vmag2
• Rate of rise of current is Vmag2 – VD – Vout
influenced byy leakage
g inductance Vleak2 Reduction in Magnetizing Current
Due to Faster Commutation

• Commutation primary-to- IP
IP
secondary is not instantaneous
p
and depends on Vclamp IS IS

Dtr Lost Volt-Seconds


– Loss of volt-seconds Dtr

Low Clamp Voltage High Clamp Voltage

Texas Instruments—2010 Power Supply Design Seminar 1-11


SLUP254
Effects of Leakage Inductance
• Clamp circuits and snubbers needed for primary FET and
secondary rectifier(s)
• Lower power-supply efficiency
• Impact
p on g
gate-drive strategy
gy if synchronous
y rectifier is
used
• Higher
g duty
y cycle
y and magnetizing
g g current than expected
p
• Higher H-field radiated emission
• High
Hi h iimpactt on cross-regulation
l ti

Texas Instruments—2010 Power Supply Design Seminar 1-12


SLUP254
How Leakage Can Be Minimized
• Leakage inductance is a function of winding geometry
geometry, number of turns
and separation between primary and secondary
– Minimize the separation between the primary and main secondary
winding(s)
– Interleave the primary and main secondary
– Select a core with a long and narrow window
L L

W2 W1
W1 W2
W2 W2
W1 W1

W1 W1
W2 W2
W1 W2
W2 W1

Option 1 Option 2
• Leakage inductance is not lowered with a high permeability core
• Having the winding tightly coupled to the core will not reduce it

Texas Instruments—2010 Power Supply Design Seminar 1-13


SLUP254
Cross-Regulation – Overview
• Multiple-output flyback topology is popular because of its
simplicity and low cost

• If the coupling is perfect, the turns ratio directly defines


output voltages

• In the real world, “perfect” coupling is not possible

• This often results in poor cross-regulation

Texas Instruments—2010 Power Supply Design Seminar 1-14


SLUP254
Cross-Regulation Physical Model
• Transformer windings cannot all be equally well coupled to
the gap because of physical separation between them

• Magnetic energy stored between the windings represented


as leakage inductances

• Model not applicable to any transformer geometry

•C
Can b
become complex
l if iinterleaving
t l i iis used,
d or if multiple
lti l
secondary windings are wound simultaneously (multifilar)

• Not accurate in situation of lightly loaded secondary outputs

• Good tool to understand how the common flyback


transformer geometries work
Texas Instruments—2010 Power Supply Design Seminar 1-15
SLUP254
Cross-Regulation Physical Model
lW4
+
N4 V4

lW3
lp +
N3 V3

Primary
W1

W2

W3

W4
W

W
+
lW2
+ Vi V2

Clamp
– + N1:N2

FET

Basic Flyback Circuit Transformer Construction

lp Lleak12 Lleak23 Lleak34

– I3 N2:N3 N2:N4
Clamp Vmag1 Lm I4
+ I2 IW4
Vi + IW33
N1:N2

FET + + +
V2 V3 V4
– – –

Transformer Physical Model

• This circuit is only applicable to the transformer windings stackup shown


• Each leakage inductance considered is between two consecutive secondaries
• Also called “Ladder model”
Texas Instruments—2010 Power Supply Design Seminar 1-16
SLUP254
Flux Lines during Commutation
Each Secondary Winding with Nominal Load
• φm decreases during commutation
φm
• dφ/dt (decreasing) in each secondary
winding
d g iss limited
ted by its
ts output voltage
o tage
W2
– Increasing current
induced in W2 to dφ m W1 W3 W4 L
W4 to maintain
e = −N ×
dt
φm in the gap

• Leakage between W2 and W1


– W1’s voltage limited by clamp During Primary-to-Secondary Commutation
Current in All Windings
• W1 closest to gap
– Vclamp limits dφm/dt in the gap during
lp I2
commutation

• W2 is next to W1 I3
– W2 limits the dφ/dt seen by W3 and W4 I4
– W3 and W4 output voltage lower than
without leakage Secondary Currents During
C
Commutation
t ti Based
B d on Physical
Ph i l Model
M d l
• Current commutates progressively from
near to remote secondary windings
Texas Instruments—2010 Power Supply Design Seminar 1-17
SLUP254
Ringing Effect
• High
Hi h dV/dt when
h main
i switch
it h tturns off
ff if main
i output
t t iis h
heavily
il lloaded
d d
• Transformer leakage inductance and parasitic capacity ⇒ auxiliary
secondary
y voltage
g tends to “ring”
g
• If auxiliary output fully loaded ⇒ this ringing is clamped
• If lightly loaded ⇒ voltage overshoot with peak detector effect
• Much higher (sometimes > 2 x nominal value!) auxiliary output voltage at
light load
– Primary clamp voltage has high impact on result

• Most existing transformer models fail to predict this


• This effect can be mitigated (but not eliminated)
– Minimize leakage inductance between secondary windings
– Locate the highest power secondary(ies) closest to the primary

• Other solutions include a post-regulator, series resistor or minimum load


Texas Instruments—2010 Power Supply Design Seminar 1-18
SLUP254
Cross-Regulation Example
Auxiliary Output Lightly Loaded
• W2 (high current output) heavily loaded, I4_pk
IW4
W4 lightly loaded
I3_pk
– W4’s output received too much energy
gy during
g IW3

Phase 1 due to ringing


Effect of V3
– W2’s output did not receive enough energy V3
Capacitors ESR
I2_pk
• At end of commutation ((Phase 1):
) IW2

– Σ{reflected secondary currents} Ù magnetizing


Vmag1
current

• V4 went too high


g IP
IP_pk

– Phase 2: high dφ/dt (decreasing) in W4 Phase Phase Phase Time (t)


• IW4 ⇒ 0 A rapidly 1 2 3

– IW2 increases to maintain φm in the gap φm

• After IW4 crosses 0 A, W2’s and W3’s di/dt


W2
change to maintain the downslope of the W1 W3 W4
magnetizing current and flux
φm
H×δ = ×δ = ∑ N×I
A×μ Phase 2: No Primary Current

Texas Instruments—2010 Power Supply Design Seminar 1-19


SLUP254
Test Results
Current Probe
VD D 10 Ω IW6 V6
R W3

VAW3 W3 W6 R6
( 9T) (9T) 6.8 µF

Current
Current Transformer Probe
V Iprim
V_I 100 1
100:1 IW4 V4

36 Ω
W4 6.8 µF R4
300 Ω ( 14T)
W1A

W1B

W2
W4
W3
W6 +Vi 5V

W1 W2
( 4T) Current Transformer
( 21T)
R c la m p 1:100 V_Is e c
0.1 µF Vc la m p
15 kΩ
IP IW2 6.8 Ω
MURS120
249 Ω

Primary MOSFET
I5 V

• Input voltage: 48 V
To CS Input To 5-V Filter
and Load

Sync

• 5-V
5 V output
t t load:
l d 0 A to
t 5A Rectifier

• Switching frequency: 250 kHz


• Auxiliary outputs:
V6 ((10 V at 0 to 140 mA)) and • Primary magnetizing
V4 (18 V at 0 to 200 mA) inductance: 70 µH

Texas Instruments—2010 Power Supply Design Seminar 1-20


SLUP254
Cross-Regulation Test Results with
p Fully
Main Output y Loaded
IW6
(0.5 A/div)
IW6 (0.5 A/div)
2 2

IW4 (1 A/div) IW4 (1 A/div)


4 4

IW2
IW2 (2.94 A/div)
(2.94 A/div)

1 1

Time (0.5 µs/div) Time (0.5 µs/div)

V6 at 1
1.6
6WW, V4 at 2
2.5
5WW, V6 at 0
0.5
5WW, V4 at 3
3.6
6WW,
I5 V = 5 A I5 V = 5 A
• The two auxiliary outputs operate in DCM
• Notice the change of slope of IW2 when IW4 or IW6 crosses 0 A

Texas Instruments—2010 Power Supply Design Seminar 1-21


SLUP254
Cross-Regulation Test Results: Lightly Loaded
Auxiliary
y with Main Output
p Fullyy Loaded
I5 V = 5 A, V6 (10 V/div) I5 V = 5 A, V6 (10 V/div)
V4 at 0.3 W, 12.4 V V4 at 0.3 W, 20.6 V
Vclamp = 70 V Vclampp = 70 V

VW6 VW6
(10 V/div) (10 V/div)
V/di )

IW6
(200 mA/div)
Time ((1 µ
µs/div)) Time ((1 µ
µs/div))

V6 at 0.5 W V6 at < 5 mW

• At minimum load,
load V6 (10 V nominal) goes up to 20.6
20 6 V

Texas Instruments—2010 Power Supply Design Seminar 1-22


SLUP254
Cross-Regulation Test Results with Main Output
Fully Loaded : Impact of Clamp Voltage
I5 V = 5 A, V6 (10 V/div) I5 V = 5 A, V6 (10 V/div)
V4 at 0.3 W, 14.4 V V4 at 0.3 W, 26 V
Vclamp = 83 V
Vclamp
l = 83 V

VW6 VW6
(10 V/div)
V/di ) (10 V/div)

IW6
(200 mA/div)

Time (1 µs/div) Time (1 µs/div)

V6 at 0.5 W V6 at < 5 mW

• RCD resistor has been increased for higher Vclamp: 70 V ⇒ 83 V


⇒V6 increased significantly in both cases

Texas Instruments—2010 Power Supply Design Seminar 1-23


SLUP254
Overload Test at Auxiliary Output:
p
Impact of Leakage
g

• There was no hiccup I5 V = 0 A,


V4 at 2.5 W,
IW4 (1 A/div)
mode even at more R6 = 1 Ω

than 3 A! 4

3
• Th
The overloaded
l d d winding
i di VAW3 (20 V/div)

is unable to take all the


energy because of
6.2-A Peak
leakage W3 having in
leakage, IW6 (2 A/div)

fact a better coupling to


primary than W6 2

– Enough energy
Time (0.5 µs/div)
delivered by W3 to VDD
to maintain switching

Texas Instruments—2010 Power Supply Design Seminar 1-24


SLUP254
Benefits of Good Cross-Regulation
• Good control of auxiliary outputs in spite of load variations

• Better control of gate drive voltage amplitude,


amplitude less gate
drive losses

• Lower rms current in output capacitors, lower dissipation

• May allow the controller to reach hiccup mode more easily


when the main output is short-circuited for better protection
– Not necessarily true if the short-circuit is applied to an auxiliary
output!

Texas Instruments—2010 Power Supply Design Seminar 1-25


SLUP254
How Cross-Regulation can be Improved
• The high current winding must have the best coupling to primary
• Minimize leakage between all secondary windings
• Optimize,
p , not minimize,, the leakage
g inductance of auxiliaryy windings
g to p
primary
y
• Use winding placement to control leakage inductance
– Winding stackup
– Spread each winding over the full width of the bobbin for better coupling
If W3 is lightly
loaded and W2
Primary A

Primary B

Primary A

Primary B

Primary A

Primary B
Better
or is the high-
W2A

W2B

W2A

W2B

W2A

W2B
W3

W3

W3
than
current main
output.
• Operate main output in CCM
• Try to avoid operating the auxiliary outputs in DCM. In some cases, consider
using resistance in series with the diode
• Consider winding more than one auxiliary secondary simultaneously (multifilar)
• Lower clamp voltage may help
– Trade-off between cross regulation, efficiency, peak drain voltage and current limit
– Some other types of clamp circuits may provide better results than the RCD clamp

Texas Instruments—2010 Power Supply Design Seminar 1-26


SLUP254
Impact of Transformer Design on Flyback Efficiency
• Th
The following
f ll i guidelines
id li can be
b used d during
d i ttransformer
f
design to optimize the converter efficiency 300 300

– Minimize leakage inductance from primary 275

d (A2)

d (A )
2
to main (high
(high-current)
current) secondary
250
Secondary RMS

MS Current Squared

S Curr ent Squared


225 Current Squared
at 48 V
– Minimize transformer high frequency 200 200

conduction loss 175


150
Good Duty-Cycle
Trade-Off with
• Multifilar or Litz wires when necessaryy 125 48-V Input
p

Secondary RMS
20x Primar y RM
• Interleaving 100 100
75
• Select core shape for minimum number of layers 50
20 x Primary RMS
– Optimize the transformer turns ratio for 25 Current Squared at 48 V
0 0
best efficiency 0 20 40 60 80 100
Duty Cycle ( %)
– Select CCM operation

• Other factors also have an indirect impact on efficiency


– Cross-regulation
• VDD rail used for gate drive
• Output capacitors rms current
– Impact of fringing flux from gap
• Worse with planar transformers
Texas Instruments—2010 Power Supply Design Seminar 1-27
SLUP254
Flyback and EMI
• Flyback ⇒ IP and IS pulsate ICM
2 IP IS
– Use low Z caps, minimize loop areas
N1:N2
– Output filter often required +

Vi P S Vout
• Interwinding capacitance ⇒ CM CE IDM
Clamp VD +
– – +
• Transformer and diode configuration ICM
impact effective capacitance 2
FET
Output to
Chassis CM
– Less if facing windings
indings at same AC
potential
– Diode versus synchronous rectifier
+Vi
– Flyback ≠ Forward

• Better to start with end connected to primary


MOSFET

Other Secondary
y
ndary A
ndary B
– Shields Vdrain E-field

mary A
mary B
mary C
– Reduces
R d iinterwinding
t i di capacity
it effect
ff t on CE

Secon
Secon
Prim
Prim
Prim
• Minimize leakage for low H-field RE
• Interleaving reduces H-field RE but may increase
effective
ff ti P P-S
S iinterwinding
t i di capacitance
it FET

Vout
VD +
• Center-gap transformer
Texas Instruments—2010 Power Supply Design Seminar 1-28
SLUP254
Agenda

1. Basics of Flyback Topology


2 Impact of Transformer Design on Power Supply
2.
Performance
3. Power Supply Current Limiting
4. Summary

Texas Instruments—2010 Power Supply Design Seminar 1-29


SLUP254
Power Supply Current Limiting – Overview

• Current-limiting characteristic of power supply


defines:
– Output power beyond which output voltage falls out
of regulation. Corresponds to the “output load-current
li it” (Iout_LIM)
limit”
– Output current in overload situations
• including short-circuits
short circuits

• Current-limiting characteristic is influenced by


parasitics
– Turn-off delays, leakage inductance,…

Texas Instruments—2010 Power Supply Design Seminar 1-30


SLUP254
Understanding Current Limit –
Flyback Power Supply with Peak CMC in CCM
+Vi
Io
1:n2 Vo IA _LIM Ipk_LIM
Clamp Iout ΔIL
Slope Comp Primary D x Ts
Clock Ramp Current
RSC
Power Supply Controller m2S
– I_SENSE R Secondary
Current
(1 – D) x Ts I o_avg
PWM +
VC C Rs
COMP
((From Error
Time (t)
Amp) VC _ LIM
Current- Just at Current Limit, Output Begins
Sense
Filter to Fall Out of Regulation

Ipk_LIM
Primary
Current
• Ipk_LIM is
i th
the primary
i peak
k D x Ts

current limit I o_avg


Secondary
Current
• Io_avg
o avg is the output
p current (1 – D) x Ts

Time (t)
• If short-circuit, Io_avg can be Output Short Circuit

much higher than when


IA
current limit has just been Iout = Io _ avg = × (1 − D )
reached n2
Texas Instruments—2010 Power Supply Design Seminar 1-31
SLUP254
Current-Limit Model – Basic Representation
• Peak CMC in CCM, fixed switching frequency

VC
I pk =
m2 RS
IA (Average
Magnetizing
m1
ΔIL Current))

D × Ts

Gate Control

Neglecting DC voltage drops:

ΔI L Vo Vo
m2 = ≈ D=
(1 − D ) × TS n 2 × L n 2 × Vi + Vo
Texas Instruments—2010 Power Supply Design Seminar 1-32
SLUP254
Influence of Input DC Voltage on Output Load
Current Limit – Impact of Feedforward
+Vi
Io 10
Rff 1:n2 Vo
Feedforward

ad Current L imit (A)


Clamp Iout

Slope Comp 9
Clock Ramp Without Feedforward
RSC
Power Supply Controller

I_SENSE R 8

PWM +
VC C Rs
COMP
7

Output Loa
(From Error
Amp) VC _ LIM
With Feedforward
6

5
20 25 30 35 40 45 50 55
If Vi ↑ ⇒ (1 – D) ↑ ⇒ Iout_LIM increases Input Voltage(V)

• With feedforward, output load current limit becomes almost independent of


input voltage
⇒ Better control during overload, less stress on power circuitry
⇒ Power limit
⇒ Cost
C t and/or
d/ size
i reduction
d ti
• Feedforward also improves line noise rejection
Texas Instruments—2010 Power Supply Design Seminar 1-33
SLUP254
Current Limit Model – With Feedforward

VC
K ff × V i
R S × I pk
RS × m 2

RS × RS × I A
g g
Magnetizing RS × m1
Current)

D × Ts

Gate Control

• Kff x Vi is the feedforward contribution


– Subtracting it from Vc is identical to adding it to current feedback

Texas Instruments—2010 Power Supply Design Seminar 1-34


SLUP254
Current Limit Model – Adding Slope Compensation
Slope Compensation
(Clock Ramp)
– VC
m0 x(Ts Tdis) m0 K ff × V i
2

RS × I A
RS × m2 R S × m1
RS × IL_ pk m in
D × Ts Tdis
2
D × Ts

Gate Control

• Slope compensation to avoid subharmonic oscillation at duty-cycle


duty cycle close to or
higher than 50%
• For easier understanding, slope compensation contribution subtracted from Vc.
– Equivalent to slope compensation added to current feedback
– In that circuit representation, the slope compensation is capacitively-coupled

Texas Instruments—2010 Power Supply Design Seminar 1-35


SLUP254
Current Limit Model – With all Delays, Slope
Compensation
p and Feedforward

• For a more accurate, parasitics must be included in the


analysis
• Parasitic delays
– RC filter time delay
– Turn off delay, including current comparator and gate drive
– FET turn-on delay from onset of slope compensation ramp

• See Topic 1, Appendix A, in the Seminar Manual for


detailed equations

Texas Instruments—2010 Power Supply Design Seminar 1-36


SLUP254
Influence of Transformer Leakage on
Output
p Load Current Limit
IS
• Rate of rise of current is influenced Ideal Xfmr Lleak2
N1:N2
by leakage, commutation primary-to- – + Vleak2 – +
– + VD
secondary is not instantaneous Clamp
Vmag1 Lm Vmag2 Vout
Vi
+
+ + –
⇒ Loss of volt-seconds (also influenced –
by the clamp voltage)
IP
⇒ Duty-cycle and average magnetizing FET

current have to increase to maintain


the output voltage
g
⇒ Higher conduction loss
IP
⇒ Higher transformer peak current than
expected
IS
-> Iout_LIM lower than expected

• Leakage inductance helps Lost Volt-Seconds


Dtr
however to keep control of
the output current in output Vo
Vi × D new ≈ Vclamp × D tr + × (1 − D new − D tr )
short-circuit situation n2

Texas Instruments—2010 Power Supply Design Seminar 1-37


SLUP254
Current Limit During Overload – Example with
Combined Effects
• In overload: Output current Assuming no hiccup mode
25
increases ⇒ output voltage
decreases

ut Current (A)
20 Without Leakage
– Short-circuit: output current
much higher than at onset of With Leakage
15
current limit

Outpu
• Parasitic turn off delays may
10
result in an out of control
current if volt-seconds
5
balance is not possible at the 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0
transformer Output Voltage (V) Vo1 Vo2
Short Circuit
– Transformer’s leakage
i d t
inductance h
helps
l tto maintain
i t i Vo _ short
that balance
n2
(
× TS − t del _ OFF − D tr × TS = )
– If no leakage, the imbalance
occurs starting
g at Vo1 Vi × t del
d l _ OFF − Vclamp
l × D tr × TS
– With leakage, the imbalance
occurs only from Vo2
Texas Instruments—2010 Power Supply Design Seminar 1-38
SLUP254
Summary
• Th
The flflyback
b k power ttransformer
f iis th
the kkey element
l t off th
the
converter, for optimum efficiency and cross-regulation
• Parasitics ha
have
e a strong infl
influence
ence on flflyback
back con
converter’s
erter’s
behavior, particularly under overload or short-circuit
conditions
• The primary clamp circuit design is a trade-off between:
– Efficiency
– Peak drain voltage
– Output current limit
– Cross regulation
Cross-regulation

• Simple feedforward technique can be used to optimize the


converter and the system, lowering worst-case
worst case components
stress and reducing the overall cost and size
Texas Instruments—2010 Power Supply Design Seminar 1-39
SLUP254
TI Worldwide Technical Support
Internet
TI Semiconductor Product Information Center Home Page
support.ti.com

TI E2E™ Community Home Page


e2e.ti.com

Product Information Centers


Americas Phone +1(972) 644-5580 Japan Asia
Brazil Phone 0800-891-2616 Phone Domestic Phone
0120-92-3326 International +91-80-41381665
Mexico Phone 0800-670-7544 Fax International Domestic Toll-Free Number
+81-3-3344-5317 Note: Toll-free numbers do not support
Fax +1(972) 927-6377 Domestic mobile and IP phones.
Internet/Email support.ti.com/sc/pic/americas.htm 0120-81-0036 Australia 1-800-999-084
Internet/Email International China 800-820-8682
Europe, Middle East, and Africa support.ti.com/sc/pic/japan.htm
Hong Kong 800-96-5941
Phone Domestic
India 1-800-425-7888
European Free Call 00800-ASK-TEXAS www.tij.co.jp/pic
Indonesia 001-803-8861-1006
(00800 275 83927)
Korea 080-551-2804
International +49 (0) 8161 80 2121
Malaysia 1-800-80-3973
Russian Support +7 (4) 95 98 10 701
New Zealand 0800-446-934
Philippines 1-800-765-7404
Note: The European Free Call (Toll Free) number is not active
in all countries. If you have technical difficulty calling the free Important Notice: The products and services of Texas Instruments Singapore 800-886-1028
Incorporated and its subsidiaries described herein are sold subject to TI’s
call number, please use the international number above. standard terms and conditions of sale. Customers are advised to obtain the Taiwan 0800-006800
most current and complete information about TI products and services
before placing orders. TI assumes no liability for applications assistance, Thailand 001-800-886-0010
Fax +(49) (0) 8161 80 2045 customer’s applications or product designs, software performance, or Fax +8621-23073686
infringement of patents. The publication of information regarding any other
Internet support.ti.com/sc/pic/euro.htm company’s products or services does not constitute TI’s approval, warranty Email tiasia@ti.com or ti-china@ti.com
or endorsement thereof.
Direct Email asktexas@ti.com Internet support.ti.com/sc/pic/asia.htm
A122010

The platform bar and E2E are trademarks of Texas Instruments. All other trademarks
are the property of their respective owners. SLUP254
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Audio www.ti.com/audio Communications and Telecom www.ti.com/communications
Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers
Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps
DLP® Products www.dlp.com Energy and Lighting www.ti.com/energy
DSP dsp.ti.com Industrial www.ti.com/industrial
Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical
Interface interface.ti.com Security www.ti.com/security
Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Mobile Processors www.ti.com/omap
Wireless Connectivity www.ti.com/wirelessconnectivity
TI E2E Community Home Page e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated