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z
G : Green (Halogen Free and Pb Free)
z LCD Monitors and TVs
Z : ECO (Ecological Element with
Halogen Free and Pb free) z Green Electronics/Appliances
z Point of Load Regulation of High-Performance DSPs
H : UVP Hiccup
L : UVP Latch-Off
Note :
Pin Configurations
Richtek products are : (TOP VIEW)
` RoHS compliant and compatible with the current require- 8
BOOT SS
ments of IPC/JEDEC J-STD-020. VIN 2 7 EN
GND
SW 3 6 COMP
` Suitable for use in SnPb or Pb-free soldering processes. 9
GND 4 5 FB
VIN 2 VIN 1
BOOT
4.5V to 23V CIN CBOOT L
10µF RT8295A 100nF 10µH
VOUT
SW 3
3.3V/2A
REN 100k 7 EN R1
75k
8 SS COUT
FB 5 22µF x 2
C SS CC RC
3.3nF R2
0.1µF 4, 9 (Exposed Pad) 6 13k 24k
GND COMP
CP
Open
Bootstrap for high side gate driver. Connect a 0.1µF or greater ceramic
1 BOOT
capacitor from BOOT to SW pins.
Input Supply Voltage, 4.5V to 23V. Must bypass with a suitably large ceramic
2 VIN
capacitor.
3 SW Phase Node. Connect this pin to an external L-C filter.
4, Ground. The exposed pad must be soldered to a large PCB and connected to
GND
9 (Exposed Pad) GND for maximum power dissipation.
Feedback Input. This pin is connected to the converter output. It is used to set
the output of the converter to regulate to the desired value via an internal
5 FB
resistive voltage divider. For an adjustable output, an external resistive
voltage divider is connected to this pin.
Compensation Node. COMP is used to compensate the regulation control
6 COMP loop. Connect a series RC network from COMP to GND. In some cases, an
additional capacitor from COMP to GND is required.
Chip Enable (Active High). A logic high enables the converter; a logic low
forces the RT8295A into shutdown mode reducing the supply current to less
7 EN
than 3µA. Attach this pin to VIN with a 100kΩ pull up resistor for automatic
startup.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor
8 SS from SS to GND to set the soft-start period. A 0.1µF capacitor sets the
soft-start period to 13.5ms.
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RT8295A
Function Block Diagram
VIN
Internal
Regulator Oscillator
Current Sense
Shutdown Slope Comp Amplifier
Comparator VA VCC Foldback + VA
1.2V + Control -
-
0.4V + BOOT
Lockout -
Comparator UV S Q 130mΩ
5k Comparator SW
EN - +
R Q 130mΩ
2.7V + -
3V Current GND
Comparator
VCC
6µA
0.8V +
SS +EA
-
FB COMP
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To be continued
www.richtek.com DS8295A-03 March 2011
4
datasheetpdf-http:/www.DataSheet4U.net/
RT8295A
Parameter Symbol Test Conditions Min Typ Max Unit
EN Input Threshold Logic-High VIH 2.7 -- 5.5
V
Voltage Logic-Low VIL -- -- 0.4
Input Under Voltage Lockout Threshold VUVLO VIN Rising 3.8 4.2 4.5 V
Input Under Voltage Lockout Hysteresis ∆VUVLO -- 320 -- mV
Soft-Start Current ISS VSS = 0V -- 6 -- µA
Soft-Start Period tSS C SS = 0.1µF -- 13.5 -- ms
Thermal Shutdown TSD -- 150 -- °C
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at T A = 25°C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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datasheetpdf-http://www.DataSheet4U.net/
RT8295A
Typical Operating Characteristics
Efficiency vs. Output Current Reference Voltage vs. Input Voltage
100 0.820
90 0.815
80
0.815 3.38
3.36
Reference Voltage (V)
0.810
Output Voltage (V)
3.34
0.805 3.32
0.800 3.30
http://www.DataSheet4U.net/ VIN = 4.5V
0.795 3.28
VIN = 12V
3.26 VIN = 23V
0.790
3.24
0.785
3.22
VOUT = 3.3V, IOUT = 0V to 2A
0.780 3.20
-50 -25 0 25 50 75 100 125 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Temperature (°C) Output Current (A)
370 370
Switching Frequency (kHz)1
360 360
350 350
340 340
330 330
320 320
310 310
VOUT = 3.3V, IOUT = 0.5A VIN = 12V, VOUT = 3.3V, IOUT = 0.5A
300 300
4 6 8 10 12 14 16 18 20 22 24 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (°C)
Output Current Limit vs. Input Voltage Current Limit vs. Temperature
6.0 6.0
5.5
5.5
Output Current Limit (A)
5.0
4.0 4.5
3.5
4.0
3.0
3.5
2.5
VOUT = 3.3V VIN = 12V, VOUT = 3.3V
2.0 3.0
4 6 8 10 12 14 16 18 20 22 24 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (°C)
VOUT VOUT
(100mV/Div) (100mV/Div)
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IOUT IOUT
(1A/Div) (1A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 0.1A to 2A VIN = 12V, VOUT = 3.3V, IOUT = 1A to 2A
VOUT VOUT
(10mV/Div) (10mV/Div)
VSW VSW
(10V/Div) (10V/Div)
IL IL
(1A/Div) (1A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A VIN = 12V, VOUT = 3.3V, IOUT = 1A
VIN VIN
(5V/Div) (5V/Div)
VOUT VOUT
(2V/Div) (2V/Div)
IL IL
(2A/Div) (2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A VIN = 12V, VOUT = 3.3V, IOUT = 2A
VEN VEN
(5V/Div) (5V/Div)
VOUT VOUT
(2V/Div) (2V/Div)
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IL IL
(2A/Div) (2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A VIN = 12V, VOUT = 3.3V, IOUT = 2A
VOUT = VFB 1+ R1
control on the EN pin when no system voltage above 2.5V
R2 is available, as shown in Figure 3. In this case, a 100kΩ
where VFB is the feedback reference voltage (0.8V typ.). pull-up resistor, REN, is connected between VIN and the
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EN pin. MOSFET Q1 will be under logic control to pull
External Bootstrap Diode down the EN pin.
Connect a 100nF low ESR ceramic capacitor between
the BOOT pin and SW pin. This capacitor provides the VIN
2 VIN BOOT
1
CIN CBOOT VOUT
gate driver voltage for the high side MOSFET. REN RT8295A
100k L
7 EN SW 3
It is recommended to add an external bootstrap diode Chip Enable
R1 COUT
Q1
between an external 5V and BOOT pin for efficiency
8 SS FB 5
improvement when input voltage is lower than 5.5V or duty CSS CC RC R2
4, 6
COMP
ratio is higher than 65% .The bootstrap diode can be a 9 (Exposed Pad) GND
CP
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
Figure 3. Enable Control Circuit for Logic Control with
RT8295A. Note that the external boot voltage must be
Low Voltage
lower than 5.5V.
To prevent enabling circuit when VIN is smaller than the
5V
VOUT target value, a resistive voltage divider can be placed
between the input voltage and ground and connected to
BOOT the EN pin to adjust IC lockout threshold, as shown in
RT8295A 100nF Figure 4. For example, if an 8V output voltage is regulated
SW from a 12V input voltage, the resistor ,REN2, can be
selected to set input lockout threshold larger than 8V.
Figure 2. External Bootstrap Diode
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RT8295A
2 1
ripple current stays below the specified maximum, the
VIN VIN BOOT VOUT
12V CIN
8V
inductor value should be chosen according to the following
REN1 10µF RT8295A CBOOT
100k L equation :
7 EN 3
SW
VOUT VOUT
R1 L = × 1−
f × ∆IL(MAX) VIN(MAX)
REN2 COUT
8 SS FB 5
CSS CC RC R2 The inductor's current rating (caused a 40°C temperature
4, 6
9 (Exposed Pad) COMP rising from 25°C ambient) should be greater than the
GND CP
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
Figure 4. The Resistors can be Selected to Set IC
see Table 2 for the inductor selection reference.
Lockout Threshold.
Table 2. Suggested Inductors for Typical
Hiccup Mode Application Circuit
Component Dimensions
For the RT8295AH, Hiccup Mode Under Voltage Protection Series
Supplier (mm)
(UVP) is provided. When the FB voltage drops below half
TDK VLF10045 10 x 9.7 x 4.5
of the feedback reference voltage, VFB, the UVP function
TDK SLF12565 12.5 x 12.5 x 6.5
will be triggered and the RT8295AH will shut down for a
TAIYO
period of time and then recover automatically. The Hiccup NR8040 8x8x4
YUDEN
Mode UVP can reduce input current in short circuit
conditions. CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
Latch-Off Mode trapezoidal current at the source of the high side MOSFET.
For the RT8295AL, Latch-Off Mode Under Voltage To prevent large ripple current, a low ESR input capacitor
Protection (UVP) is provided. When the FB voltage drops sized for the maximum RMS current should be used. The
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below half of the feedback reference voltage, VFB, UVP RMS current is given by :
will be triggered and the RT8295AL will shut down in Latch-
V VIN
Off Mode. In shutdown condition, the RT8295AL can be IRMS = IOUT(MAX) OUT −1
VIN VOUT
reset via the the EN pin or power input VIN.
This formula has a maximum at VIN = 2VOUT , where
Inductor Selection
I RMS = I OUT /2. This simple worst-case condition is
The inductor value and operating frequency determine the commonly used for design because even significant
ripple current according to a specific input and output deviations do not offer much relief.
voltage. The ripple current ∆IL increases with higher VIN
Choose a capacitor rated at a higher temperature than
and decreases with higher inductance.
required. Several capacitors may also be paralleled to
∆IL = OUT × 1 − OUT
V V
f × L VIN meet size or height requirements in the design.
Having a lower ripple current reduces not only the ESR For the input capacitor, one 10µF low ESR ceramic
capacitors are recommended. For the recommended
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve capacitor, please refer to Table 3 for more detail.
highest efficiency operation. However, it requires a large The selection of COUT is determined by the required ESR
inductor to achieve this goal. to minimize voltage ripple.
For the ripple current selection, the value of ∆IL = 0.24 (IMAX) Moreover, the amount of bulk capacitance is also a key
will be a reasonable starting point. The largest ripple for COUT selection to ensure that the control loop is stable.
current occurs at the highest VIN. To guarantee that the Loop stability can be checked by viewing the load transient
ringing.
R-C snubber between SW and GND and locating them as
Higher values, lower cost ceramic capacitors are now close as possible to the SW pin (see Figure 5). Another
becoming available in smaller case sizes. Their high ripple method is by adding a resistor in series with the bootstrap
current, high voltage rating and low ESR make them ideal capacitor, CBOOT , but this method will decrease the driving
for switching regulator applications. However, care must capability to the high side MOSFET. It is strongly
be taken when these capacitors are used at input and recommended to reserve the R-C snubber during PCB
output. When a ceramic capacitor is used at the input layout for EMI improvement. Moreover, reducing the SW
and the power is supplied by a wall adapter through long trace area and keeping the main power in a small loop will
wires, a load step at the output can induce ringing at the be helpful on EMI performance. For detailed PCB layout
guide, please refer to the section Layout Considerations.
RBOOT*
VIN 2 1
VIN BOOT
4.5V to 23V CIN CBOOT L
REN* 10µF RT8295A 100nF 10µH
3 VOUT
Chip Enable SW
7 EN 3.3V/2A
RS*
CEN* R1 COUT
CS* 75k 22µFx2
8 SS 5
FB
CSS 4, CC
0.1µF 9 (Exposed Pad) RC R2
3.3nF 13k
GND 6
COMP 24k
CP
* : Optional NC
Figure 5. Reference Circuit with Snubber and Enable Timing Control
DS8295A-03 March 2011 www.richtek.com
11
d a
RT8295A
Thermal Considerations The maximum power dissipation depends on operating
For continuous operation, do not exceed the maximum ambient temperature for fixed T J(MAX) and thermal
operation junction temperature 125°C. The maximum resistance θJA. For RT8295A package, the derating curves
power dissipation depends on the thermal resistance of in Figure 7 allow the designer to see the effect of rising
IC package, PCB layout, the rate of surroundings airflow ambient temperature on the maximum power dissipation .
2.2
and temperature difference between junction to ambient. Four Layer PCB
2.0
The maximum power dissipation can be calculated by
1.8 Copper Area
(d) Copper Area = 50mm2 , θJA = 51°C/W (e) Copper Area = 70mm2 , θJA = 49°C/W
Figure 6. Themal Resistance vs. Copper Area Layout Design
Layout Considerations
For best performance of the RT8295A, the following layout giidelines must be strictly followed.
} Input capacitor must be placed as close to the IC as possible.
} SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace.
} The feedback components must be connected as close to the device as possible
R2
L VOUT
SW should be connected to inductor by
wide and short trace. Keep sensitive
VOUT components away from this trace. GND
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RT8295A
Outline Dimension
H
A
C
I
D
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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