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VER : 1A
PWA:
GM6B Studio Intel UMA and Discrete GFX PWB:

A A

FAN & THERMAL POWER


SMSC1422
PG 36
REGULATOR CPU VR
POWER +1.5V_SUS/+0.75V_DDR_VTT
PG 42
SYSTEM PG 43
CLOCK DC/DC
RESET CIRCUIT PG 40 +1.05V_PCH +3.3V_ALW/+5V_ALW/
SLG8SP585VTR PG 45
+15V_ALW PG 46
BATT (QFN-32)
PG 15
AC/BATT CHARGER PG 41 +1.05V_VTT PG 44 VGA Core
Arrandale/Clarksfield PG 49
CONNECTOR
RUN POWER SW
PG 51 +3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V
LVDS
PG 50 LVDS
PCIEx16 Switchable LVDS CONN
nvidia TS3DV421 PG 23
PG 23
DDR3-SODIMM1
DDR3 x 8 N11P-GE/GT
B PG 13 Dual Channel DDR3 DP B
128Mx16x8 DP
800/1066/1333 1.5V Switchable SN75DP120 DISPLAY CONN
( rPGA 989 ) PG 21,22
DDR3-SODIMM2 TS3DV421 PG 25 PG 25
PG 25
PG 14 PG 3,4,5,6
HDMI
PG 16,17,18,19,20 HDMI SN75DP139RGZR HDMI CONN
Switchable
PG 24 PG 23
FDI DMI X 4 TS3DV421
PG 24
SATA-ODD SATA
PG 33
DP
HDMI
SATA-HDD SATA
LVDS
& Fall Sensor PG 33
USB2.0 USB CONN x 2 LAN
E-SATA Combo RTL8111E-GR/RJ45/Transformer
SN75LVCP412 SATA PG 39
with USB CONN
C PG 32 PG 32 PCH PCIEx1 PG 31 C

USB2.0 PCIEx1
Card Reader 8 in 1 CONN
IHDA USB2.0 JMB389A PG 26 PG 26
USB2.0
PCIEx2
AUDIO Code MINI-CARD
USB2.0
Camera + D-MIC WLAN
ALC665 PG 29
PG 23 USB2.0
PG 37 PG 7,8,9,10,11,12
MINI-CARD
SPI SIM Card CONN
WWAN/TV Tuner
LPC PG 30
PG 30
Main SPK Subwoofer FLASH
MAX9736AEJ+ MAX9736AEJ+ 8Mbyts Bluetooth CONN TV CONN
PG 38 PG 38 KBC PG 31
PG 28
ITE8502 PG 29
17X8
D Audio SPK Audio SPK PG 27 Keyboard D

CONN CONN
SPI PS/2 PG 34
PG 38 PG 38
QUANTA
FLASH Touchpad
USER 1Mbyts Title
COMPUTER
Schematic Block Diagram1
INTERFACE
WWW.MANUALS.CLAN.SU PG 28 PG 34 Size Document Number
GM6
Rev
2B

Date: Thursday, June 24, 2010 Sheet 1 of 63


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Table of Contents Power States


CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
SIGNAL
1 Schematic Block Diagram
2 Front Page +PWR_SRC 10V~+19V 24,30,45,46,47,48,49,50,51 MAIN POWER S0~S5
3-6 Clarksfield/Auburndale
+RTC_CELL +3.0V~+3.3V 08,11,29,30 RTC S0~S5
7-12 PCH
A 13-14 DDRIII SO-DIMM(204P) +5V_ALW2 +5V 37,46,52,53 LARGE POWER MAIN POWER S0~S5 A

15 Clock Generator
+5V_ALW +5V 13,33,44,46,47,48,49,50,51,52 LARGE POWER ALW_ON S0~S5
16-22 N11P-GE
23 LCD CONN +3.3V_ALW +3.3V 29,30,35,36,37,42,44,45,46,47,51,52,53 8051 POWER 3.3V_ALW_ON S0~S5
24 HDMI CONN
+5V_SUS +5V 11,33,34,37,51,52 SLP_S5# CTRLD POWER SUS_ON
25 MINI DP CONN
07,08,09,10,11,13,14,19,24,28,29,37,41,42,44
26 Card Reader (JMB389) +3.3V_SUS +3.3V ,48,49,50,52 SLP_S5# CTRLD POWER SUS_ON
27 SIO (ITE8502)
+1.5V_SUS +1.5V 03,05,13,14,47,50,52 SODIMM POWER SUS_ON
28 FLASH / RTC
29 MINI-Card (WLAN\WPAN) +0.75V_DDR_VTT +0.75V 13,14,47,52 SODIMM POWER RUN_ON
30 MINI-Card (WWAN)
+5V_RUN +5V 11,18,24,25,35,36,38,39,40,51,52 SLP_S3# CTRLD POWER RUN_ON
31 LAN(RTL8111EL/RJ-45)
3,7,8,9,10,11,13,14,15,17,24,25,26,28,29,30
32 Right PUSB/ESATA +3.3V_RUN +3.3V ,31,32,33,35,37,38,39,40,41,42,46,51,52,60 SLP_S3# CTRLD POWER RUN_ON
33 SATA (HDD & ODD)
+1.8V_RUN +1.8V 05,11,44,52 SDVO POWER RUN_ON
34 TP / KEYBOARD
B 35 SWITCH / LED / T-Screen +1.8V_RUN_GFX +1.8V 17,18,21,22,44,52 VGA POWER RUN_ON B

36 FAN / THERMAL
+1.5V_RUN +1.5V 11,18,19,20,28,31,32,52 VGA POWER RUN_ON
37 Azelia CODEC
38 AUDIO AMP +VCC_GFX_CORE +0.9V~+1.2V 18,21,50 VGA POWER RUN_ON
39 Left USB/MMB CONN
+1.05V_PCH +1.05V 08,09,11,15,48 PCH POWER RUN_ON
40 System Reset Circuit
41 Charger (ISL88731) +VCC_CORE +0.7V~+1.77V 05,51 CPU CORE POWER IMVP_VR_ON
42 CPU CORE(ADP3212) LCDVCC_TST_EN
+LCDVCC +3.3V 24 LCD Power & ENVDD
43 1.5_DDR/0.75(RT8207A)
44 1.05V_VTT(VT358) +5V_MOD +5V 35 MOD Power MODC_EN
45 1.05V_PCH(VT356)
+5V_HDD +5V 35 HDD Power HDDC_EN
46 3V/5V (TPS51427A)
47 GFX_CORE(ADP3211) +1.1V_VTT +1.1V 03,05,10,11,49,60 CPU POWER RUN_ON
48 1.8V_RUN(HPA00835RTER)
+1.1V_GFX_PCIE +1.1V 18,50 VGA POWER GFX_ON
49 VGA_N11P-dGFX(MAX17007)
C C
50 Run Power Switch
51 DCin & Batt GND PLANE PAGE DESCRIPTION
52 PAD & SCREW
53 SMBUS BLOCK GND ALL
54 THERMAL MAP
55 Power Block Diagram
56 Power sequence Block
57
58
59
60

D D

QUANTA
Title
COMPUTER
Index & Power Status

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Thursday, June 24, 2010 Sheet 2 of 63


1 2 3 4 5 6 7 8
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

U46A U46B
B26 PEG_ICOMPI R532 49.9/F H_COMP3 AT23
PEG_ICOMPI SC(V1.0),P17: COMP3
A26 A16 CLK_CPU_BCLKP 10
PEG_ICOMPO BCLK

MISC
A24 B27 SKTOCC# H_COMP2 AT24 B16 CLK_CPU_BCLKN 10
7 DMI_TXN0 DMI_RX#[0] PEG_RCOMPO COMP2 BCLK#
C23 A25 R530 750/F Can be left No Connect
7 DMI_TXN1 DMI_RX#[1] PEG_RBIAS H_COMP1

CLOCKS
7 DMI_TXN2 B22 PEG_RXN[0..15] 16 or tied to GND G16 AR30 TP37
DMI_RX#[2] PEG_RXN0 COMP1 BCLK_ITP
7 DMI_TXN3 A21 K35 AT30 TP36
D DMI_RX#[3] PEG_RX#[0] PEG_RXN1 H_COMP0 BCLK_ITP# D
J34 AT26
PEG_RX#[1] PEG_RXN2 COMP0
7 DMI_TXP0 B24 J33 E16 CLK_PCIE_3GPLLP 9
DMI_RX[0] PEG_RX#[2] PEG_RXN3 PEG_CLK
7 DMI_TXP1 D23 G35 D16 CLK_PCIE_3GPLLN 9
DMI_RX[1] PEG_RX#[3] PEG_CLK#

DMI
B23 G32 PEG_RXN4 R314 *0_shortTP_SKT0CC# AH24 DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be GND when discrete.
7 DMI_TXP2 DMI_RX[2] PEG_RX#[4] 27 H_CPUDET# SKTOCC#
A22 F34 PEG_RXN5 A18 R527 0_SW CLK_DREFSSCLKP 9
7 DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK
F31 PEG_RXN6 A17 R526 0_SW CLK_DREFSSCLKN 9
PEG_RX#[6] PEG_RXN7 H_CATERR# DPLL_REF_SSCLK# R529 0_DIS
7 DMI_RXN0 D24 D35 AK14
DMI_TX#[0] PEG_RX#[7] CATERR#

THERMAL
G24 E33 PEG_RXN8 R528 0_DIS
7 DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F23 C33 PEG_RXN9
7 DMI_RXN2 DMI_TX#[2] PEG_RX#[9]
H23 D32 PEG_RXN10 F6 DDR3_DRAMRST#_R S3 Power reduce
7 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] SM_DRAMRST#
B32 PEG_RXN11 R516 *0_short H_PECI_ISO AT15 Layout Note: Place
PEG_RX#[11] 10 H_PECI PECI
D25 C31 PEG_RXN12 AL1 SM_RCOMP_0 R509 100/F these resistors
7 DMI_RXP0 DMI_TX[0] PEG_RX#[12] SM_RCOMP[0] +1.05V_VTT
F24 B28 PEG_RXN13 AM1 SM_RCOMP_1 R510 24.9/F near Processor
7 DMI_RXP1 DMI_TX[1] PEG_RX#[13] SM_RCOMP[1]
E23 B30 PEG_RXN14 AN1 SM_RCOMP_2 R513 130/F
7 DMI_RXP2 DMI_TX[2] PEG_RX#[14] SM_RCOMP[2]
G23 A31 PEG_RXN15 H_PROCHOT#_R AN26
7 DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT#
PEG_RXP[0..15] 16 AN15 R273 10K
PM_EXT_TS#[0]

DDR3
MISC
J35 PEG_RXP0 AP15 R520 10K
PEG_RX[0] PEG_RXP1 PM_EXT_TS#[1] R274 *0_short
H34 PM_EXTTS#0 13
PEG_RX[1] PEG_RXP2 H_THERM# R278 *0_short
H_THERM#_R R519 *0_short
H33 10 H_THERM# AK15 PM_EXTTS#1 14
PEG_RX[2] PEG_RXP3 THERMTRIP#
7 FDI_TXN0 E22 F35
FDI_TX#[0] PEG_RX[3] PEG_RXP4
7 FDI_TXN1 D21 G33
FDI_TX#[1] PEG_RX[4] PEG_RXP5
7 FDI_TXN2 D19
FDI_TX#[2] PEG_RX[5]
E34
PRDY#
AT28 TP35 CRB(v0.71) P.11
D18 F32 PEG_RXP6 AP27
7 FDI_TXN3 FDI_TX#[3] PEG_RX[6] PREQ# TP19
G21 D34 PEG_RXP7 R522
7 FDI_TXN4 FDI_TX#[4] PEG_RX[7]
E19 F33 PEG_RXP8 AN28 *12.4K/F_NC
7 FDI_TXN5 FDI_TX#[5] PEG_RX[8] TCK TP16
PCI EXPRESS -- GRAPHICS
F21 B33 PEG_RXP9 H_CPURST# AP26 AP28
7 FDI_TXN6 FDI_TX#[6] PEG_RX[9] RESET_OBS# TMS TP13
Intel(R) FDI

PWR MANAGEMENT
G18 D31 PEG_RXP10 AT27 TRST# R328 51
7 FDI_TXN7 FDI_TX#[7] PEG_RX[10] TRST#
PEG_RXP11

JTAG & BPM


A32
PEG_RX[11] PEG_RXP12 R307 *0_short
H_PM_SYNC_R
C30 7 PM_SYNC AL15 AT29 TP20
PEG_RX[12] PEG_RXP13 PM_SYNC TDI
7 FDI_TXP0 D22 A28 AR27 TP14
FDI_TX[0] PEG_RX[13] PEG_RXP14 TDO TDIM R327 0 +3.3V_RUN
7 FDI_TXP1 C21 B29 PEG_TXN[0..15] 16 AR29
FDI_TX[1] PEG_RX[14] PEG_RXP15 TDI_M TDIM_R
7 FDI_TXP2 D20 A30 AN14 AP29
FDI_TX[2] PEG_RX[15] VCCPWRGOOD_1 TDO_M
7 FDI_TXP3 C18
FDI_TX[3] PEG_TXN0_C C733 0.1U/10V/X7R PEG_TXN0 DBR# R313 1K
7 FDI_TXP4 G22 L33 AN25
C FDI_TX[4] PEG_TX#[0] PEG_TXN1_C C729 0.1U/10V/X7R PEG_TXN1 R324 *0_short DBR# C
7 FDI_TXP5 E20 M35 10 H_PWRGOOD AN27
FDI_TX[5] PEG_TX#[1] PEG_TXN2_C C725 0.1U/10V/X7R PEG_TXN2 VCCPWRGOOD_0
7 FDI_TXP6 F20 M33
FDI_TX[6] PEG_TX#[2] PEG_TXN3_C C721 0.1U/10V/X7R PEG_TXN3
7 FDI_TXP7 G19 M30 AJ22 TP11
FDI_TX[7] PEG_TX#[3] PEG_TXN4_C C715 0.1U/10V/X7R PEG_TXN4 R286 *0_short
VDDPWRGOOD_R BPM#[0]
L31 7 PM_DRAM_PWRGD AK13 AK22 TP17
FDI_FSYNC0 PEG_TX#[4] PEG_TXN5_C C708 0.1U/10V/X7R PEG_TXN5 SM_DRAMPWROK BPM#[1]
7 FDI_FSYNC0 F17 K32 AK24 TP15
FDI_FSYNC1 FDI_FSYNC[0] PEG_TX#[5] PEG_TXN6_C C702 0.1U/10V/X7R PEG_TXN6 BPM#[2]
7 FDI_FSYNC1 E17 M29 AJ24 TP8
FDI_FSYNC[1] PEG_TX#[6] PEG_TXN7_C C695 0.1U/10V/X7R PEG_TXN7 H_VTTPWRGD BPM#[3]
J31 40 H_VTTPWRGD AM15 AJ25 TP7
FDI_INT PEG_TX#[7] PEG_TXN8_C C689 0.1U/10V/X7R PEG_TXN8 VTTPWRGOOD BPM#[4]
7 FDI_INT C17 K29 AH22 TP9
FDI_INT PEG_TX#[8] PEG_TXN9_C C685 0.1U/10V/X7R PEG_TXN9 BPM#[5]
H30 AK23 TP18
FDI_LSYNC0 PEG_TX#[9] PEG_TXN10_C C678 0.1U/10V/X7R PEG_TXN10 BPM#[6]
7 FDI_LSYNC0 F18 H29 TP12 AM26 AH23 TP10
FDI_LSYNC1 FDI_LSYNC[0] PEG_TX#[10] PEG_TXN11_C C675 0.1U/10V/X7R PEG_TXN11 TAPPWRGOOD BPM#[7]
7 FDI_LSYNC1 D17 F29
FDI_LSYNC[1] PEG_TX#[11] PEG_TXN12_C C672 0.1U/10V/X7R PEG_TXN12
E28
PEG_TX#[12] PEG_TXN13_C C662 0.1U/10V/X7R PEG_TXN13 R284 1.5K/F CPU_PLTRST#
D29 9,16,26,27,29,30,31,39 PLTRST#
AL14
PEG_TX#[13] PEG_TXN14_C C659 0.1U/10V/X7R PEG_TXN14 RSTIN#
D27 PEG_TXP[0..15] 16
R309 1K_DIS FDI_FSYNC0 PEG_TX#[14] PEG_TXN15_C C657 0.1U/10V/X7R PEG_TXN15
C26
R308 1K_DIS FDI_FSYNC1 PEG_TX#[15]
R310 1K_DIS FDI_LSYNC0 L34 PEG_TXP0_C C730 0.1U/10V/X7R PEG_TXP0 R288 Clarksfield/Auburndale
R306 1K_DIS FDI_LSYNC1 PEG_TX[0] PEG_TXP1_C C726 0.1U/10V/X7R PEG_TXP1 750/F
M34
R305 1K_DIS FDI_INT PEG_TX[1] PEG_TXP2_C C722 0.1U/10V/X7R PEG_TXP2
M32
PEG_TX[2] PEG_TXP3_C C716 0.1U/10V/X7R PEG_TXP3 +3.3V_SUS +3.3V_SUS
PEG_TX[3]
L30
PEG_TXP4_C C709 0.1U/10V/X7R PEG_TXP4
S3 Power reduce
M31
PEG_TX[4] PEG_TXP5_C C703 0.1U/10V/X7R PEG_TXP5 RSTIN#: +1.5V_SUS_CPU
PEG_TX[5]
K31
M28 PEG_TXP6_C C696 0.1U/10V/X7R PEG_TXP6
73
PEG_TX[6] DG(V1.11)(Doc.# 414044),P10:
H31 PEG_TXP7_C C690 0.1U/10V/X7R PEG_TXP7 Need a voltage divider
PEG_TX[7] PEG_TXP8_C C686 0.1U/10V/X7R PEG_TXP8 R645
K28 network to scale down from
PEG_TX[8] PEG_TXP9_C C680 0.1U/10V/X7R PEG_TXP9
G30 10K
DG(V1.5),P86: FDI_INT should be tied to GND PEG_TX[9] PEG_TXP10_C C676 0.1U/10V/X7R PEG_TXP10 3.3V (PCH driven) to 1.05V/1.1V (Clarksfield/Auburndale) R281
G29
PEG_TX[10] PEG_TXP11_C C673 0.1U/10V/X7R PEG_TXP11 *1.1K/F_NC
(through 1K ±5% resistors), F28
PEG_TX[11] PEG_TXP12_C C663 0.1U/10V/X7R PEG_TXP12 R276
if these signals are left floating, E27
PEG_TX[12] PEG_TXP13_C C660 0.1U/10V/X7R PEG_TXP13
there are nofunctional impacts D28 1.5K/F
PEG_TX[13] PEG_TXP14_C C658 0.1U/10V/X7R PEG_TXP14
C27
but a small amount of power (~15 mW) PEG_TX[14] PEG_TXP15_C C655 0.1U/10V/X7R PEG_TXP15 PM_DRAM_PWRGD
C25
PEG_TX[15]

3
maybe wasted.
DG(V1.5) P86: 2 R643 10K +1.5V_SUS_CPU
B B
FDI_FSYNC[0], FDI_FSYNC[1],
FDI_LSYNC[0],FDI_LSYNC[1] Clarksfield/Auburndale R283 Q79

1
750/F MMST3904-7-F
can be ganged together

3
Q64
with one resistor[1K ±5% resistors]. 2N7002W-7-F 2

1
21 +1.5V_SUS

+3.3V_RUN
R268 *0_NC
R262
Q33
PM_THRMTRIP# 20 1K
BSS138-7-F

R277 DDR3_DRAMRST#_R 1 3 DDR3_DRAMRST# 13,14


*10M_NC

3
Q35
Processor Compensation Signals

2
2 *2N7002W-7-F_NC

3
H_COMP0
Processor Pullups

1
H_THERM# R634 2 1 *2.2K_NC 2

2
H_COMP1 C307
RST_GATE 10,13,14
Q38 *0.1U_NC PR65

2
+1.05V_VTT H_COMP2 *MMST3904-7-F_NC 16 100K

1
H_COMP3 C293

1
0.047U

2
SC(1.0V),P17: 10
H_PROCHOT#D
A R300 R325 R326 use: pull to 68 ohm R533 R304 R312 R311 A
49.9/F 49.9/F *68_NC if it isn'tt used: pull to 50 ohm 49.9/F 49.9/F 20/F 20/F

H_CATERR#

H_PROCHOT#_R SC(1.0V),P17:
H_CPURST#
H_CATERR# QUANTA
49.9-Ω ±1% Pull-Up to the VTT rail
(+V1.1S_VTT)
DG(V1.0),P17: Title
COMPUTER
COMP[0.1] 49.9-Ω ±1% pull-down to GND ARRD/CFD 1/4
COMP[2.3] 20-Ω ±1% pull-down to GND
Size Document Number Rev
GM6 2B

Date: Friday, June 25, 2010 Sheet 3 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3) U46D

U46C

14 M_B_DQ[63:0] SB_CK[0] W8 M_B_CLKP0 14


SB_CK#[0] W9 M_B_CLKN0 14
M_B_DQ0 B5 M3
SB_DQ[0] SB_CKE[0] M_B_CKE0 14
M_B_DQ1 A5
M_B_DQ2 SB_DQ[1]
AA6 M_A_CLKP0 13 C3
SA_CK[0] M_B_DQ3 SB_DQ[2]
AA7 M_A_CLKN0 13 B3 V7 M_B_CLKP1 14
SA_CK#[0] M_B_DQ4 SB_DQ[3] SB_CK[1]
13 M_A_DQ[63:0] P7 M_A_CKE0 13 E4 V6 M_B_CLKN1 14
D M_A_DQ0 SA_CKE[0] M_B_DQ5 SB_DQ[4] SB_CK#[1] D
A10 A6 M2 M_B_CKE1 14
M_A_DQ1 SA_DQ[0] M_B_DQ6 SB_DQ[5] SB_CKE[1]
C10 A4
M_A_DQ2 SA_DQ[1] M_B_DQ7 SB_DQ[6]
C7 C4
M_A_DQ3 SA_DQ[2] M_B_DQ8 SB_DQ[7]
A7 Y6 M_A_CLKP1 13 D1
M_A_DQ4 SA_DQ[3] SA_CK[1] M_B_DQ9 SB_DQ[8]
B10 Y5 M_A_CLKN1 13 D2
M_A_DQ5 SA_DQ[4] SA_CK#[1] M_B_DQ10 SB_DQ[9]
D10 P6 M_A_CKE1 13 F2 AB8 M_B_CS#0 14
M_A_DQ6 SA_DQ[5] SA_CKE[1] M_B_DQ11 SB_DQ[10] SB_CS#[0]
E10 F1 AD6 M_B_CS#1 14
M_A_DQ7 SA_DQ[6] M_B_DQ12 SB_DQ[11] SB_CS#[1]
A8 C2
M_A_DQ8 SA_DQ[7] M_B_DQ13 SB_DQ[12]
D8 F5
M_A_DQ9 SA_DQ[8] M_B_DQ14 SB_DQ[13]
F10 AE2 M_A_CS#0 13 F3
M_A_DQ10 SA_DQ[9] SA_CS#[0] M_B_DQ15 SB_DQ[14]
E6 AE8 M_A_CS#1 13 G4 AC7 M_B_ODT0 14
M_A_DQ11 SA_DQ[10] SA_CS#[1] M_B_DQ16 SB_DQ[15] SB_ODT[0]
F7 SA_DQ[11] H6 SB_DQ[16] SB_ODT[1] AD1 M_B_ODT1 14
M_A_DQ12 E9 M_B_DQ17 G2
M_A_DQ13 SA_DQ[12] M_B_DQ18 SB_DQ[17]
B7 SA_DQ[13] J6 SB_DQ[18]
M_A_DQ14 E7 AD8 M_A_ODT0 13 M_B_DQ19 J3
M_A_DQ15 SA_DQ[14] SA_ODT[0] M_B_DQ20 SB_DQ[19]
C6 SA_DQ[15] SA_ODT[1] AF9 M_A_ODT1 13 G1 SB_DQ[20] M_B_DM[7:0] 14
M_A_DQ16 H10 M_B_DQ21 G5 D4 M_B_DM0
M_A_DQ17 SA_DQ[16] M_B_DQ22 SB_DQ[21] SB_DM[0] M_B_DM1
G8 SA_DQ[17] J2 SB_DQ[22] SB_DM[1] E1
M_A_DQ18 K7 M_B_DQ23 J1 H3 M_B_DM2
M_A_DQ19 SA_DQ[18] M_B_DQ24 SB_DQ[23] SB_DM[2] M_B_DM3
J8 SA_DQ[19] J5 SB_DQ[24] SB_DM[3] K1
M_A_DQ20 G7 M_B_DQ25 K2 AH1 M_B_DM4
M_A_DQ21 SA_DQ[20] M_B_DQ26 SB_DQ[25] SB_DM[4] M_B_DM5
G10 SA_DQ[21] M_A_DM[7:0] 13 L3 SB_DQ[26] SB_DM[5] AL2
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ27 M1 AR4 M_B_DM6
M_A_DQ23 SA_DQ[22] SA_DM[0] M_A_DM1 M_B_DQ28 SB_DQ[27] SB_DM[6] M_B_DM7
J10 SA_DQ[23] SA_DM[1] D7 K5 SB_DQ[28] SB_DM[7] AT8
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ29 K4
M_A_DQ25 SA_DQ[24] SA_DM[2] M_A_DM3 M_B_DQ30 SB_DQ[29]
M6 SA_DQ[25] SA_DM[3] M7 M4 SB_DQ[30]
M_A_DQ26 M8 AG6 M_A_DM4 M_B_DQ31 N5
M_A_DQ27 SA_DQ[26] SA_DM[4] M_A_DM5 M_B_DQ32 SB_DQ[31]
L9 SA_DQ[27] SA_DM[5] AM7 AF3 SB_DQ[32]
M_A_DQ28 L6 AN10 M_A_DM6 M_B_DQ33 AG1
M_A_DQ29 SA_DQ[28] SA_DM[6] M_A_DM7 M_B_DQ34 SB_DQ[33] M_B_DQSN0 M_B_DQSN[7:0] 14
K8 SA_DQ[29] SA_DM[7] AN13 AJ3 SB_DQ[34] SB_DQS#[0] D5
M_A_DQ30 N8 M_B_DQ35 AK1 F4 M_B_DQSN1
M_A_DQ31 SA_DQ[30] M_B_DQ36 SB_DQ[35] SB_DQS#[1] M_B_DQSN2
P9 SA_DQ[31] AG4 SB_DQ[36] SB_DQS#[2] J4
C M_A_DQ32 M_B_DQ37 M_B_DQSN3 C
AH5 SA_DQ[32] AG3 SB_DQ[37] SB_DQS#[3] L4
M_A_DQ33 AF5 M_B_DQ38 AJ4 AH2 M_B_DQSN4
SA_DQ[33] M_A_DQSN[7:0] 13 SB_DQ[38] SB_DQS#[4]

DDR SYSTEM MEMORY - B


M_A_DQ34 AK6 C9 M_A_DQSN0 M_B_DQ39 AH4 AL4 M_B_DQSN5
SA_DQ[34] SA_DQS#[0] SB_DQ[39] SB_DQS#[5]
DDR SYSTEM MEMORY A

M_A_DQ35 AK7 F8 M_A_DQSN1 M_B_DQ40 AK3 AR5 M_B_DQSN6


M_A_DQ36 SA_DQ[35] SA_DQS#[1] M_A_DQSN2 M_B_DQ41 SB_DQ[40] SB_DQS#[6] M_B_DQSN7
AF6 SA_DQ[36] SA_DQS#[2] J9 AK4 SB_DQ[41] SB_DQS#[7] AR8
M_A_DQ37 AG5 N9 M_A_DQSN3 M_B_DQ42 AM6
M_A_DQ38 SA_DQ[37] SA_DQS#[3] M_A_DQSN4 M_B_DQ43 SB_DQ[42]
AJ7 SA_DQ[38] SA_DQS#[4] AH7 AN2 SB_DQ[43]
M_A_DQ39 AJ6 AK9 M_A_DQSN5 M_B_DQ44 AK5
M_A_DQ40 SA_DQ[39] SA_DQS#[5] M_A_DQSN6 M_B_DQ45 SB_DQ[44]
AJ10 AP11 AK2
M_A_DQ41 SA_DQ[40] SA_DQS#[6] M_A_DQSN7 M_B_DQ46 SB_DQ[45]
AJ9 AT13 AM4
M_A_DQ42 SA_DQ[41] SA_DQS#[7] M_B_DQ47 SB_DQ[46]
AL10 AM3 M_B_DQSP[7:0] 14
M_A_DQ43 SA_DQ[42] M_B_DQ48 SB_DQ[47] M_B_DQSP0
AK12 AP3 C5
M_A_DQ44 SA_DQ[43] M_B_DQ49 SB_DQ[48] SB_DQS[0] M_B_DQSP1
AK8 AN5 E3
M_A_DQ45 SA_DQ[44] M_B_DQ50 SB_DQ[49] SB_DQS[1] M_B_DQSP2
AL7 M_A_DQSP[7:0] 13 AT4 H4
M_A_DQ46 SA_DQ[45] M_A_DQSP0 M_B_DQ51 SB_DQ[50] SB_DQS[2] M_B_DQSP3
AK11 C8 AN6 M5
M_A_DQ47 SA_DQ[46] SA_DQS[0] M_A_DQSP1 M_B_DQ52 SB_DQ[51] SB_DQS[3] M_B_DQSP4
AL8 F9 AN4 AG2
M_A_DQ48 SA_DQ[47] SA_DQS[1] M_A_DQSP2 M_B_DQ53 SB_DQ[52] SB_DQS[4] M_B_DQSP5
AN8 H9 AN3 AL5
M_A_DQ49 SA_DQ[48] SA_DQS[2] M_A_DQSP3 M_B_DQ54 SB_DQ[53] SB_DQS[5] M_B_DQSP6
AM10 M9 AT5 AP5
M_A_DQ50 SA_DQ[49] SA_DQS[3] M_A_DQSP4 M_B_DQ55 SB_DQ[54] SB_DQS[6] M_B_DQSP7
AR11 AH8 AT6 AR7
M_A_DQ51 SA_DQ[50] SA_DQS[4] M_A_DQSP5 M_B_DQ56 SB_DQ[55] SB_DQS[7]
AL11 AK10 AN7
M_A_DQ52 SA_DQ[51] SA_DQS[5] M_A_DQSP6 M_B_DQ57 SB_DQ[56]
AM9 AN11 AP6
M_A_DQ53 SA_DQ[52] SA_DQS[6] M_A_DQSP7 M_B_DQ58 SB_DQ[57]
AN9 AR13 AP8
M_A_DQ54 SA_DQ[53] SA_DQS[7] M_B_DQ59 SB_DQ[58]
AT11 AT9
M_A_DQ55 SA_DQ[54] M_B_DQ60 SB_DQ[59]
AP12 AT7
M_A_DQ56 SA_DQ[55] M_B_DQ61 SB_DQ[60]
AM12 AP9
M_A_DQ57 SA_DQ[56] M_B_DQ62 SB_DQ[61]
AN12 M_A_A[15:0] 13 AR10 M_B_A[15:0] 14
M_A_DQ58 SA_DQ[57] M_A_A0 M_B_DQ63 SB_DQ[62] M_B_A0
AM13 Y3 AT10 U5
M_A_DQ59 SA_DQ[58] SA_MA[0] M_A_A1 SB_DQ[63] SB_MA[0] M_B_A1
AT14 W1 V2
M_A_DQ60 SA_DQ[59] SA_MA[1] M_A_A2 SB_MA[1] M_B_A2
AT12 AA8 T5
M_A_DQ61 SA_DQ[60] SA_MA[2] M_A_A3 SB_MA[2] M_B_A3
AL13 AA3 V3
M_A_DQ62 SA_DQ[61] SA_MA[3] M_A_A4 SB_MA[3] M_B_A4
AR14 V1 R1
M_A_DQ63 SA_DQ[62] SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
AP14 AA9 14 M_B_BS#0 AB1 T8
B SA_DQ[63] SA_MA[5] M_A_A6 SB_BS[0] SB_MA[5] M_B_A6 B
V8 14 M_B_BS#1 W5 R2
SA_MA[6] M_A_A7 SB_BS[1] SB_MA[6] M_B_A7
T1 14 M_B_BS#2 R7 R6
SA_MA[7] M_A_A8 SB_BS[2] SB_MA[7] M_B_A8
Y9 R4
SA_MA[8] M_A_A9 SB_MA[8] M_B_A9
13 M_A_BS#0 AC3 U6 R5
SA_BS[0] SA_MA[9] M_A_A10 SB_MA[9] M_B_A10
13 M_A_BS#1 AB2 AD4 14 M_B_CAS# AC5 AB5
SA_BS[1] SA_MA[10] M_A_A11 SB_CAS# SB_MA[10] M_B_A11
13 M_A_BS#2 U7 T2 14 M_B_RAS# Y7 P3
SA_BS[2] SA_MA[11] M_A_A12 SB_RAS# SB_MA[11] M_B_A12
U3 14 M_B_WE# AC6 R3
SA_MA[12] M_A_A13 SB_WE# SB_MA[12] M_B_A13
AG8 AF7
SA_MA[13] M_A_A14 SB_MA[13] M_B_A14
T3 P5
SA_MA[14] M_A_A15 SB_MA[14] M_B_A15
13 M_A_CAS# AE1 V9 N1
SA_CAS# SA_MA[15] SB_MA[15]
13 M_A_RAS# AB3
SA_RAS#
13 M_A_WE# AE9
SA_WE#

Clarksfield/Auburndale Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5] Channel B DQ[16,18,36,42,56,57,60,61,62]


Requires minimum 12mils spacing Requires minimum 12mils spacing
with all other signals, including data signals. with all other signals, including data signals.

A A

QUANTA
Title
COMPUTER
ARRD/CFD 2/4

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 4 of 63


5 4 3 2 1
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER) AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)


VTT Rail Values are
CPU Core Power U46F
Auburndal VTT=1.05V +VCC_iGPU_CORE
Clarksfield VTT=1.1V +1.05V_VTT
+VCC_CORE
ARD:48A U46G
CFD:52A 18A
D
22A AT21 D
VAXG1
AG35 AH14 AT19 AR22 VCC_AXG_SENSE 47
VCC1 VTT0_1 VAXG2 VAXG_SENSE

SENSE
LINES
AG34 AH12 AT18 AT22 VSS_AXG_SENSE 47
VCC2 VTT0_2 + + C652 + C717 VAXG3 VSSAXG_SENSE
AG33 AH11 AT16
+ C456 + C694 + C457 + C412 VCC3 VTT0_3 C395 C394 C669 C651 *330U/2V_NC 330U/2V_SW VAXG4
AG32 AH10 AR21
VCC4 VTT0_4 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R *330U/2V_NC VAXG5
AG31 J14 AR19
*330U/2V_NC *330U/2V_NC 330U/2V *330U/2V_7343_NC VCC5 VTT0_5 VAXG6
AG30 J13 AR18
VCC6 VTT0_6 VAXG7
AG29 H14 AR16 AM22 GFX_VID0 47
VCC7 VTT0_7 VAXG8 GFX_VID[0]
AG28 H12 AP21 AP22 GFX_VID1 47
VCC8 VTT0_8 VAXG9 GFX_VID[1]

GRAPHICS VIDs
AG27 G14 AP19 AN22 GFX_VID2 47
VCC9 VTT0_9 VAXG10 GFX_VID[2]
AG26 G13 AP18 AP23 GFX_VID3 47
VCC10 VTT0_10 VAXG11 GFX_VID[3]
AF35 G12 AP16 AM23 GFX_VID4 47
VCC11 VTT0_11 VAXG12 GFX_VID[4]
AF34 G11 AN21 AP24 GFX_VID5 47
VCC12 VTT0_12 VAXG13 GFX_VID[5]

GRAPHICS
AF33 F14 AN19 AN24 GFX_VID6 47
VCC13 VTT0_13 C670 C666 C419 C665 C409 C720 C410 VAXG14 GFX_VID[6] R531 4.7K_SW
AF32 F13 AN18
C683 C697 C749 C713 C430 C403 C691 C460 VCC14 VTT0_14 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 22U/6.3V/X5R_SW 22U/6.3V/X5R_SW 22U/6.3V/X5R_SW VAXG15
AF31 F12 AN16
22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R VCC15 VTT0_15 VAXG16
AF30 F11 AM21 AR25 GFXVR_EN 47
VCC16 VTT0_16 VAXG17 GFX_VR_EN
AF29 E14 AM19 AT25
VCC17 VTT0_17 VAXG18 GFX_DPRSLPVR
AF28 E12 AM18 AM24 GFXVR_IMON 47
VCC18 VTT0_18 VAXG19 GFX_IMON
AF27 D14 AM16
VCC19 VTT0_19 VAXG20 R315 1K_DIS add it for Intel suggestion at 6/1
AF26 D13 AL21
VCC20 VTT0_20 VAXG21 +1.5V_SUS_CPU

1.1V RAIL POWER


AD35
VCC21 VTT0_21
D12 AL19
VAXG22 ARD:3A
AD34 D11 AL18
AD33
VCC22 VTT0_22
C14 C667 C684 C392 AL16
VAXG23 CFD:6A
VCC23 VTT0_23 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R VAXG24
AD32 C13 AK21 AJ1
C704 C415 C712 C408 C451 C420 C679 C688 VCC24 VTT0_24 C681 C682 C700 VAXG25 VDDQ1
AD31 C12 AK19 AF1
22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R VCC25 VTT0_25 10U/6.3V/X5R_SW 10U/6.3V/X5R_SW 10U/6.3V/X5R_SW VAXG26 VDDQ2
AD30 C11 AK18 AE7

- 1.5V RAILS
VCC26 VTT0_26 VAXG27 VDDQ3 C303 C328 C322 C314 C343
AD29 B14 AK16 AE4
VCC27 VTT0_27 VAXG28 VDDQ4 1U/10V/X5R 1U/10V/X5R 1U/10V/X5R 1U/10V/X5R 1U/10V/X5R
AD28 B12 AJ21 AC1
VCC28 VTT0_28 VAXG29 VDDQ5
AD27 A14 AJ19 AB7
VCC29 VTT0_29 VAXG30 VDDQ6
AD26 A13 AJ18 AB4
VCC30 VTT0_30 +1.05V_VTT VAXG31 VDDQ7
AC35 A12 AJ16 Y1
VCC31 VTT0_31 VAXG32 VDDQ8
AC34 A11 AH21 W7
VCC32 VTT0_32 VAXG33 VDDQ9

POWER
AC33 R521 0_DIS AH19 W4
VCC33 VAXG34 VDDQ10
C
AC32
VCC34
AH18
VAXG35 VDDQ11
U1 S3 Power reduce C
AC31 AH16 T7
C421 C426 C458 C418 C414 C406 C431 C411 VCC35 VAXG36 VDDQ12 +
AC30 AF10 T4
10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R VCC36 VTT0_33 +1.05V_VTT VDDQ13 C301 C333 C326
AC29 AE10 P1
VCC37 VTT0_34 VDDQ14 22U/6.3V/X5R 22U/6.3V/X5R 330U/2V
AC28 AC10 N7
VCC38 VTT0_35 VDDQ15

CPU CORE SUPPLY


AC27 AB10 C396 C397 N4
VCC39 VTT0_36 VDDQ16

DDR3
AC26 Y10 22U/6.3V/X5R 22U/6.3V/X5R L1
VCC40 VTT0_37 VDDQ17
AA35 W10 J24 H1
VCC41 VTT0_38 VTT1_45 VDDQ18

FDI
AA34 U10 J23
VCC42 VTT0_39 VTT1_46 +1.05V_VTT
AA33 T10 H25
VCC43 VTT0_40 C413 C714 VTT1_47
AA32 J12
VCC44 VTT0_41 22U/6.3V/X5R 22U/6.3V/X5R
AA31 J11
VCC45 VTT0_42
AA30 J16 P10
C404 C454 C745 C747 C748 C433 C744 C425 VCC46 VTT0_43 VTT0_59
AA29 J15 N10
10U/6.3V_X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R 10U/6.3V/X5R VCC47 VTT0_44 VTT0_60
AA28 L10
AA27
VCC48
VCC49
(15mils) VTT0_61
VTT0_62
K10 C398 C388
AA26 +1.05V_VTT 10U/6.3V/X5R 10U/6.3V/X5R
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53

1.1V
Y32 J22
VCC54 VTT1_63
Y31 K26 J20
VCC55 VTT1_48 VTT1_64
Y30 J27 J18
VCC56 VTT1_49 VTT1_65

PEG & DMI


Y29 J26 H21 C692 C705
VCC57 C668 C393 C402 C407 VTT1_50 VTT1_66 22U/6.3V/X5R 22U/6.3V/X5R
Y28 J25 H20
VCC58 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R 22U/6.3V/X5R VTT1_51 VTT1_67
Y27 H27 H19
VCC59 VTT1_52 VTT1_68
Y26 G28
VCC60 H_PSI# VTT1_53 +1.8V_RUN
V35 AN33 H_PSI# 42 G27
VCC61 PSI# VTT1_54
V34 POWER G26
VCC62 VTT1_55
V33
VCC63 H_VID0
F26
VTT1_56 0.6A
V32 AK35 H_VID0 42 E26 L26
VCC64 VID[0] VTT1_57 VCCPLL1

1.8V
V31 AK33 H_VID1 H_VID1 42 E25 L27
VCC65 VID[1] H_VID2 VTT1_58 VCCPLL2
V30 AK34 H_VID2 42 M26
VCC66 VID[2] H_VID3 VCCPLL3 C432 C427 C746 C436 C452
V29 AL35 H_VID3 42
VCC67 VID[3]
CPU VIDS

V28 AL33 H_VID4 H_VID4 42 1U/10V/X5R 1U/10V/X5R 2.2U/10V/X5R 4.7U/10V/X5R 22U/6.3V/X5R


VCC68 VID[4] H_VID5
B V27 AM33 H_VID5 42 B
VCC69 VID[5] H_VID6 +1.5V_SUS_CPU +1.5V_SUS
V26 AM35 H_VID6 42
VCC70 VID[6] H_DPRSLPVR
U35 AM34 H_DPRSLPVR 42
VCC71 PROC_DPRSLPVR
U34
VCC72 C325 1
U33 2 0.1U 16
VCC73 Clarksfield/Auburndale
U32
VCC74 C320 1 +1.5V_SUS_CPU +1.5V_SUS S3 Power reduce
U31 G15 H_VTTVID1 27 2 0.1U 16
VCC75 VTT_SELECT
U30
VCC76 C321 1
U29 H_VTTVID1=Low, 1.1V 2 0.1U 16
VCC77 R282
U28 1 2 *0_NC
U27
VCC78 H_VTTVID1=High, 1.05V C315 1 2 0.1U 16 R280 1 805 2 *0_NC
VCC79 +VCC_CORE 805
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83 R569
R32 AN35 I_MON 42
VCC84 ISENSE +1.05V_VTT
R31
R30
VCC85
100/J_4 73
VCC86

9
8
7
6
5
R29
VCC87
SENSE LINES

R28 AJ34 VCCSENSE 42


VCC88 VCC_SENSE R272 *0_short
R27 AJ35 VSSSENSE 42 4 PS_S3CNTRL_S 7
VCC89 VSS_SENSE
R26
VCC90 R553 R554 R552 R551 R550 R548 R549 R546 R547
P35
VCC91 Q36
P34 B15 VTT_SENSE 44 1K/J_4 1K/J_4 1K/J_4 *1K/J_NC *1K/J_NC 1K/J_4 *1K/J_NC 1K/J_4 *1K/J_NC FDMS7670

3
2
1
VCC92 VTT_SENSE R568 C330
P33 A15 VSS_SENSE_VTT 44
VCC93 VSS_SENSE_VTT H_VID0
P32 100/J_4 *0.1U_NC
VCC94 H_VID1
P31 X7R
VCC95 H_VID2
P30 50 PS_S3CNTRL 7,13,43
VCC96 H_VID3
P29
VCC97

2
P28 H_VID4
VCC98 H_VID5
P27
VCC99 R285 2
P26 H_VID6 1 220 3 1
VCC100 H_DPRSLPVR
H_PSI#
A Q37 A
BSS138-7-F
R563 R564 R562 R561 R560 R558 R559 R557 R545
*1K/J_NC *1K/J_NC *1K/J_NC 1K/J_4 1K/J_4 *1K/J_NC 1K/J_4 *1K/J_NC 1K/J_4

Clarksfield/Auburndale
QUANTA
Note: Title
COMPUTER
For Validating IMVP VR R6451 should be STUFF HFM_VID : Max 1.4V ARRD/CFD 3/4
and R2N1 NO_STUFF
LFM_VID : Min 0.65V Size Document Number Rev
GM6 2B

Date: Friday, June 25, 2010 Sheet 5 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)


U46H U46I U46E

AT20 VSS1 VSS81 AE34 RSVD32 AJ13


AT17 VSS2 VSS82 AE33 RSVD33 AJ12
AR31 VSS3 VSS83 AE32 K27 VSS161
AR28 VSS4 VSS84 AE31 K9 VSS162 AP25 RSVD1
AR26 VSS5 VSS85 AE30 K6 VSS163 AL25 RSVD2 RSVD34 AH25
AR24 VSS6 VSS86 AE29 K3 VSS164 AL24 RSVD3 RSVD35 AK26
AR23 VSS7 VSS87 AE28 J32 VSS165 AL22 RSVD4
AR20 VSS8 VSS88 AE27 J30 VSS166 AJ33 RSVD5 RSVD36 AL26
AR17 VSS9 VSS89 AE26 J21 VSS167 AG9 RSVD6 RSVD_NCTF_37 AR2
D AR15 AE6 J19 M27 D
VSS10 VSS90 VSS168 RSVD7
AR12 VSS11 VSS91 AD10 H35 VSS169 L28 RSVD8 RSVD38 AJ26
AR9 VSS12 VSS92 AC8 H32 VSS170 +M_VREF_DQ_DIMM0 J17 SA_DIMM_VREF RSVD39 AJ27
AR6 VSS13 VSS93 AC4 H28 VSS171 +M_VREF_DQ_DIMM1 H17 SB_DIMM_VREF
AR3 VSS14 VSS94 AC2 H26 VSS172 G25 RSVD11
AP20 VSS15 VSS95 AB35 H24 VSS173 G17 RSVD12
AP17 VSS16 VSS96 AB34 H22 VSS174 E31 RSVD13 RSVD_NCTF_40 AP1
AP13 VSS17 VSS97 AB33 H18 VSS175 E30 RSVD14 RSVD_NCTF_41 AT2
AP10 VSS18 VSS98 AB32 H15 VSS176
AP7 VSS19 VSS99 AB31 H13 VSS177 RSVD_NCTF_42 AT3
AP4 VSS20 VSS100 AB30 H11 VSS178 RSVD_NCTF_43 AR1
AP2 VSS21 VSS101 AB29 H8 VSS179
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182 RSVD45 AL28
AN20 AB6 G31 CFG0 AM30 AL29
VSS25 VSS105 VSS183 CFG[0] RSVD46
AN17 VSS26 VSS106 AA10 G20 VSS184 AM28 CFG[1] RSVD47 AP30
AM29 VSS27 VSS107 Y8 G9 VSS185 AP31 CFG[2] RSVD48 AP32
AM27 Y4 G6 CFG3 AL32 AL27
VSS28 VSS108 VSS186 CFG4 CFG[3] RSVD49
AM25 VSS29 VSS109 Y2 G3 VSS187 AL30 CFG[4] RSVD50 AT31
AM20 VSS30 VSS110 W 35 F30 VSS188 AM31 CFG[5] RSVD51 AT32
AM17 VSS31 VSS111 W 34 F27 VSS189 AN29 CFG[6] RSVD52 AP33
AM14 W 33 F25 CFG7 AM32 AR33
VSS32 VSS112 VSS190 CFG[7] RSVD53
AM11 VSS33 VSS113 W 32 F22 VSS191 AK32 CFG[8] RSVD_NCTF_54 AT33
AM8 W 31 F19 AK31 AT34

RESERVED
VSS34 VSS114 VSS192 CFG[9] RSVD_NCTF_55
AM5 VSS35 VSS115 W 30 F16 VSS193 AK28 CFG[10] RSVD_NCTF_56 AP35
AM2 VSS36 VSS116 W 29 E35 VSS194 AJ28 CFG[11] RSVD_NCTF_57 AR35
AL34 W 28 E32 AN30 AR32
C AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W 27
W 26
E29
E24
VSS195
VSS196
VSS197
VSS AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
C

AL20 VSS40 VSS120 W6 E21 VSS198 AJ29 CFG[15] RSVD_TP_59 E15


AL17 VSS41 VSS121 V10 E18 VSS199 AJ30 CFG[16] RSVD_TP_60 F15
AL12 VSS42 VSS122 U8 E13 VSS200 AK30 CFG[17] KEY A2
AL9 VSS43 VSS123 U4 E11 VSS201 H16 RSVD_TP_86 RSVD62 D15
AL6 VSS44 VSS124 U2 E8 VSS202 RSVD63 C15
AL3 VSS45 VSS125 T35 E5 VSS203 RSVD64 AJ15 TP6
AK29 VSS46 VSS126 T34 E2 VSS204 VSS_NCTF1 AT35 RSVD65 AH15 TP5
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34 TP39 B19 RSVD15
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34 TP34 A19 RSVD16
AK17 T30 D9 B2

NCTF
VSS50 VSS130 VSS208 VSS_NCTF5 TP30
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 TP33 A20 RSVD17
AJ23 VSS52 VSS132 T28 D3 VSS210 VSS_NCTF7 A35 TP32 B20 RSVD18
AJ20 VSS53 VSS133 T27 C34 VSS211 RSVD_TP_66 AA5
AJ17 VSS54 VSS134 T26 C32 VSS212 U9 RSVD19 RSVD_TP_67 AA4
AJ14 VSS55 VSS135 T6 C29 VSS213 T9 RSVD20 RSVD_TP_68 R8
AJ11 VSS56 VSS136 R10 C28 VSS214 RSVD_TP_69 AD3
AJ8 VSS57 VSS137 P8 C24 VSS215 AC9 RSVD21 RSVD_TP_70 AD2
AJ5 VSS58 VSS138 P4 C22 VSS216 AB9 RSVD22 RSVD_TP_71 AA2
AJ2 VSS59 VSS139 P2 C20 VSS217 RSVD_TP_72 AA1
AH35 VSS60 VSS140 N35 C19 VSS218 RSVD_TP_73 R9
AH34 VSS61 VSS141 N34 C16 VSS219 RSVD_TP_74 AG7
AH33 VSS62 VSS142 N33 B31 VSS220 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
AH32
AH31
VSS63 VSS143 N32
N31
B25
B21
VSS221 13 A3 RSVD_NCTF_24
VSS64 VSS144 VSS222
AH30 VSS65 VSS145 N30 B18 VSS223 RSVD_TP_76 V4
B AH29 VSS66 VSS146 N29 B17 VSS224 RSVD_TP_77 V5 B
AH28 VSS67 VSS147 N28 B13 VSS225 RSVD_TP_78 N2
AH27 VSS68 VSS148 N27 B11 VSS226 J29 RSVD26 RSVD_TP_79 AD5
AH26 N26 B8 CFG4 R323 *3.01K/F_NC J28 AD7
VSS69 VSS149 VSS227 RSVD27 RSVD_TP_80
AH20 VSS70 VSS150 N6 B6 VSS228 RSVD_TP_81 W3
AH17 M10 B4 CFG0 R542 *3.01K/F_NC A34 W2
VSS71 VSS151 VSS229 RSVD_NCTF_28 RSVD_TP_82
AH13 VSS72 VSS152 L35 A29 VSS230 A33 RSVD_NCTF_29 RSVD_TP_83 N3
AH9 L32 A27 CFG3 R543 3.01K/F AE5
VSS73 VSS153 VSS231 RSVD_TP_84
AH6 VSS74 VSS154 L29 A23 VSS232 C35 RSVD_NCTF_30 RSVD_TP_85 AD9
AH3 L8 A9 CFG7 R544 *3.01K/F_NC B35
VSS75 VSS155 VSS233 RSVD_NCTF_31
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2 VSS AP34 TP38
AF4 VSS78 VSS158 K34
AF2 VSS79 VSS159 K33
AE35 VSS80 VSS160 K30

Clarksfield/Auburndale

Clarksfield/Auburndale Clarksfield/Auburndale

Processor Strapping
1 0
CFG4 Enabled; An external Display port
A (Display Port Disabled; No Physical Display Port device is connected to the Embedded A

Presence) attached to Embedded Diplay Port Display port


CFG0 CFG[ 1:0 ] - PCI_Epress Configuration Select
* 11= 1 x 16 PEG The Clarkfield processor's PCI Express interface may not meet
QUANTA
(PCI-Epress
Configuration Select)
Single PEG Bifurcation enabled * 10= 2 x 8 PEG PCI Express 2.0 jitter specifications. Intel recommends
placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin Title
COMPUTER
CFG3 for both rPGA and BGA components. This pull down resistor ARRD/CFD 4/4

(PCI-Epress Static Normal Operation Lane Numbers Reversed should be removed when this issue is fixed.(ES1 only)
Size Document Number Rev
Lane Reversal) GM6 2B

Date: Thursday, June 24, 2010 Sheet 6 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

+3.3V_RUN
91
IBEX PEAK-M (DMI,FDI,GPIO) IBEX PEAK-M (LVDS,DDI)
INT_DP_SCL R373 2 1 2.2K_SW
INT_DP_SDA R375 2 1 2.2K_SW
U49C
BA18 FDI_TXN0_R INT_LCD_DDCCLK R345 2 1 2.2K_SW
FDI_RXN0 FDI_TXN1_R U49D INT_LCD_DDCDAT R357 2
3 DMI_RXN0 BC24 BH17 1 2.2K_SW
DMI0RXN FDI_RXN1 FDI_TXN2_R R368 0_SW INT_BKEN INT_L_CTRL_CLK R374 10K_SW
3 DMI_RXN1 BJ22 BD16 27 PANEL_BKEN T48 BJ46
DMI1RXN FDI_RXN2 FDI_TXN3_R INT_ENVDD L_BKLTEN SDVO_TVCLKINN INT_L_CTRL_DATA R372 10K_SW
D 3 DMI_RXN2 AW20 BJ16 23 INT_ENVDD T47 BG46 D
DMI2RXN FDI_RXN3 FDI_TXN4_R L_VDD_EN SDVO_TVCLKINP
3 DMI_RXN3 BJ20 BA16
DMI3RXN FDI_RXN4 FDI_TXN5_R
BE14 23 INT_LCD_PWM Y48 BJ48
FDI_RXN5 FDI_TXN6_R L_BKLTCTL SDVO_STALLN INT_BKEN R367 2
3 DMI_RXP0 BD24 BA14 BG48 1 100K_SW
DMI0RXP FDI_RXN6 FDI_TXN7_R INT_LCD_DDCCLK AB48 SDVO_STALLP
3 DMI_RXP1 BG22 BC12 23 INT_LCD_DDCCLK
DMI1RXP FDI_RXN7 INT_LCD_DDCDAT L_DDC_CLK INT_ENVDD R366 2
3 DMI_RXP2 BA20 23 INT_LCD_DDCDAT Y45 BF45 1 100K_SW
DMI2RXP FDI_TXP0_R L_DDC_DATA SDVO_INTN
3 DMI_RXP3 BG20 BB18 BH45
DMI3RXP FDI_RXP0 FDI_TXP1_R INT_L_CTRL_CLK SDVO_INTP
BF17 AB46
FDI_RXP1 FDI_TXP2_R INT_L_CTRL_DATA L_CTRL_CLK
3 DMI_TXN0 BE22 BC16 V48
DMI0TXN FDI_RXP2 FDI_TXP3_R L_CTRL_DATA
3 DMI_TXN1 BF21 BG16
DMI1TXN FDI_RXP3 FDI_TXP4_R R334 2.37K/F
3 DMI_TXN2 BD20 AW16 AP39 T51
DMI2TXN FDI_RXP4 FDI_TXP5_R LVD_IBG SDVO_CTRLCLK
3 DMI_TXN3 BE18 BD14 AP41 T53
DMI3TXN FDI_RXP5 FDI_TXP6_R LVD_VBG SDVO_CTRLDATA
BB14
FDI_RXP6 FDI_TXP7_R
3 DMI_TXP0 BD22 BD12 AT43
DMI0TXP FDI_RXP7 LVD_VREFH
3 DMI_TXP1 BH21 AT42 BG44
DMI1TXP LVD_VREFL DDPB_AUXN
3 DMI_TXP2 BC20 BJ44
DMI2TXP FDI_INT_R R555 0_SW DDPB_AUXP
3 DMI_TXP3 BD18
DMI3TXP FDI_INT
BJ14 FDI_INT 3 DDPB_HPD
AU38 91

LVDS
RP19 0_SW AV53

DMI
FDI
23 INT_LCD_ACLKN LVDSA_CLK#
BF13 FDI_FSYNC0_R 3 4 AV51 BD42
FDI_FSYNC0 FDI_FSYNC0 3 23 INT_LCD_ACLKP LVDSA_CLK DDPB_0N
BH25 1 2 FDI_LSYNC0 3 BC42
DMI_ZCOMP FDI_FSYNC1_R DDPB_0P
BH13 23 INT_LCD_A0N BB47 BJ42
R567 49.9/F_4 DMI_ZCOMP FDI_FSYNC1 LVDSA_DATA#0 DDPB_1N
BF25 BA52 BG42

Digital Display Interface


+1.05V_PCH DMI_IRCOMP 23 INT_LCD_A1N LVDSA_DATA#1 DDPB_1P
BJ12 FDI_LSYNC0_R RP18 0_SW AY48 BB40
FDI_LSYNC0 23 INT_LCD_A2N LVDSA_DATA#2 DDPB_2N
3 4 FDI_FSYNC1 3 AV47 BA40
FDI_LSYNC1_R LVDSA_DATA#3 DDPB_2P
BG14 1 2 FDI_LSYNC1 3 AW38
FDI_LSYNC1 DDPB_3N
23 INT_LCD_A0P BB48 BA38
LVDSA_DATA0 DDPB_3P
23 INT_LCD_A1P BA50
LVDSA_DATA1
C 23 INT_LCD_A2P AY49 C
LVDSA_DATA2
AV48 Y49 INT_DP_SCL 25
LVDSA_DATA3 DDPC_CTRLCLK
AB49 INT_DP_SDA 25
DDPC_CTRLDATA

23 INT_LCD_BCLKN AP48
XDP_DBRST# PCIE_WAKE# LVDSB_CLK#
T6 J12 PCIE_WAKE# 29,31,39 23 INT_LCD_BCLKP AP47 BE44 INT_AUX_SINKN 25
SYS_RESET# WAKE# LVDSB_CLK DDPC_AUXN
BD44 INT_AUX_SINKP 25
DDPC_AUXP INT_DP_HPD_R
23 INT_LCD_B0N AY53 AV40
R403 *0_short
SYS_PWROK_R CLKRUN# LVDSB_DATA#0 DDPC_HPD
M6 Y1 CLKRUN# 27 23 INT_LCD_B1N AT49
SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA#1
23 INT_LCD_B2N AU52 BE40 INT_DP_TXN0 25
LVDSB_DATA#2 DDPC_0N
AT53 BD40 INT_DP_TXP0 25
LVDSB_DATA#3 DDPC_0P
System Power Management

R409 *0_short
PCHPWROK B17 BF41 INT_DP_TXN1 25
27 PCH_PWRGD PWROK DDPC_1N
23 INT_LCD_B0P AY51 BH41 INT_DP_TXP1 25
LVDSB_DATA0 DDPC_1P
23 INT_LCD_B1P AT48 BD38 INT_DP_TXN2 25
R404 *0_short
MEPWROK SUS_STAT# LVDSB_DATA1 DDPC_2N
K5 P8 TP25 23 INT_LCD_B2P AU50 BC38 INT_DP_TXP2 25
MEPWROK SUS_STAT# / GPIO61 LVDSB_DATA2 DDPC_2P
AT51 BB36 INT_DP_TXN3 25
LVDSB_DATA3 DDPC_3N
BA36 INT_DP_TXP3 25
RSV_ICH_LAN_RST# A10 ICH_SUSCLK DDPC_3P
F3 TP42
LAN_RST# SUSCLK / GPIO62
AA52 U50
SLP_S5#_R R410 *0_short CRT_BLUE DDPD_CTRLCLK
3 PM_DRAM_PWRGD D9 E4 SIO_SLP_S5# 27 AB53 U52
DRAMPWROK SLP_S5# / GPIO63 CRT_GREEN DDPD_CTRLDATA
AD53
CRT_RED
PCH_RSMRST# C16 H7 SLP_S4#_R TP27 BC46
27 PCH_RSMRST# RSMRST# SLP_S4# DDPD_AUXN
V51 BD46
CRT_DDC_CLK DDPD_AUXP
SLP_S3#_RR399 *0_short
V53
CRT_DDC_DATA DDPD_HPD
AT38 S3 Power reduce +5V_ALW
27 SUS_PWR_ACK M1 P12 SIO_SLP_S3# 27
SUS_PWR_DN_ACK / GPIO30 SLP_S3#
B BJ40 B
DDPD_0N
Y53 BG40

1
SLP_M#_R R385 *0_short CRT_HSYNC DDPD_0P
27 SIO_PWRBTN# P5 K8 SLP_M# 27 Y51 BJ38
PWRBTN# SLP_M# CRT_VSYNC DDPD_1N R419
BG38
DDPD_1P

CRT
BF37 10K
DDPD_2N
27 AC_PRESENT P7 N2 TP40 AD48 BH37
ACPRESENT / GPIO31 TP23 DAC_IREF DDPD_2P
AB51 BE36

2
R346 CRT_IRTN DDPD_3N PS_S3CNTRL
BD36 PS_S3CNTRL 5,13,43
PM_BATLOW# 1K/F_4 DDPD_3P
A6 BJ10 PM_SYNC 3

3
BATLOW# / GPIO72 PMSYNCH IbexPeak-M_R1P0

PM_RI# F14 F6 TP28


RI# SLP_LAN# / GPIO29 SIO_SLP_S3# Q43
2
+3.3V_RUN BSS138-7-F
IbexPeak-M_R1P0 R406
RP11 0_SW
CLKRUN# R353 8.2K FDI_TXN0_R
26 S3 Power reduce +15V_ALW
*10K_NC
3 4 FDI_TXN0 3 22

1
FDI_TXP0_R
XDP_DBRST# R350 10K RP16
1 2
0_SW
FDI_TXP0 3 91
FDI_TXN1_R
PCH_RSMRST# R608 10K FDI_TXP1_R
1
3
2
4
FDI_TXN1 3 93
FDI_TXP1 3
RP9 0_SW R421
RSV_ICH_LAN_RST# R609 10K FDI_TXN2_R 1 2 100K
FDI_TXN2 3
FDI_TXP2_R 3 4 FDI_TXP2 3
PCH_PWRGD R400 10K RP17 0_SW
FDI_TXN3_R 1 2 Q45 PS_S3CNTRL_S 5
FDI_TXN3 3
FDI_TXP3_R 3 4 BSS138-7-F
FDI_TXP3 3

3
A RP10 0_SW INT_DP_HPD_R R85 1 2 0_SW A
INT_DP_HPD 19,25
+3.3V_SUS FDI_TXN4_R
FDI_TXP4_R
1
3
2
4
FDI_TXN4 3 73
PM_RI# R405 10K FDI_TXP5_R
RP7
1 2
0_SW
FDI_TXP4 3

FDI_TXP5 3
R389
PS_S3CNTRL 2 C546
*0.01U_NC
QUANTA
100K 25
PM_BATLOW# R620 8.2K
FDI_TXN5_R

FDI_TXN6_R
RP8
3

1
4

2
0_SW
FDI_TXN5 3
Title
COMPUTER
FDI_TXN6 3

1
PCIE_WAKE# R396 1K FDI_TXP6_R 3 4 IBEX PEAK-M 1/6
FDI_TXP6 3
RP6 0_SW
FDI_TXN7_R 1 2 Size Document Number Rev
FDI_TXN7 3
FDI_TXP7_R 3 4 GM6 2B
FDI_TXP7 3
Date: Friday, June 25, 2010 Sheet 7 of 63
5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

+RTC_CELL

R613 20K
C786
15P/50V_4
C782 IBEX PEAK-M (HDA,JTAG,SATA)

2
1
1U
Y7
R600
32.768KHZ 10M/J_4 U49A
R607 20K

3
4
D C787 D
RTC_X1 B13 D33
RTCX1 FWH0 / LAD0 LPC_LAD0 27,29
C784 15P/50V_4 RTC_X2 D13 B33
RTCX2 FWH1 / LAD1 LPC_LAD1 27,29
C32 LPC_LAD2 27,29
R612 1U FWH2 / LAD2
A32 LPC_LAD3 27,29
RTC_RST# FWH3 / LAD3
1M C14
RTCRST#
C34 LPC_LFRAME# 27,29
SRTC_RST# FWH4 / LFRAME#
D17
SRTCRST#
A34 PCH_DRQ#0 TP41

RTC

LPC
SM_INTRUDER# LDRQ0#
A16 F34 PCH_DRQ#1 TP26
INTRUDER# LDRQ1# / GPIO23

+RTC_CELL R599 330K PCH_INVRMEN A14 AB9


INTVRMEN SERIRQ IRQ_SERIRQ 27

ACZ_BIT_CLK A30
HDA_BCLK
AK7 SATA_RXN0 33
ACZ_SYNC SATA0RXN
D29 AK6 SATA_RXP0 33
HDA_SYNC SATA0RXP
SATA0TXN
AK11 SATA_TXN0 33 SATA HDD
SPKR P1 AK9
37 SPKR SPKR SATA0TXP SATA_TXP0 33
INTVRMEN(Internal Voltage Regulator Enable) : ACZ_RST# C30
HDA_RST#
This signal enables the internal 1.05 V regulators. AH6 SATA_RXN1 33
R615 33 ACZ_BIT_CLK SATA1RXN
37 ICH_AZ_CODEC_BITCLK This signal must be always pulled-up to VccRTC. AH5 SATA_RXP1 33
SATA1RXP
37 PCH_AZ_CODEC_SDIN0 G30 AH9 SATA_TXN1 33 SATA ODD
HDA_SDIN0 SATA1TXN
AH8 SATA_TXP1 33
SATA1TXP
F30
C789 HDA_SDIN1
AF11
*27P_NC SATA2RXN
E32 AF9

IHDA
HDA_SDIN2 SATA2RXP
Flash Descriptor Security Override SATA2TXN
AF7
50 F32
HDA_SDIN3 SATA2TXP
AF6 Note:
AH3
SATA port2/3 may not be available on all PCH sku
ACZ_SYNC ACZ_SDOUT SATA3RXN (HM55 support 4port only)
37 ICH_AZ_CODEC_SYNC
R622 33 Low = Enabled B29 AH1
HDA_SDO SATA3RXP
GPIO33 High = Disabled SATA3TXN
AF3
R605 33 ACZ_RST# AF1
27,37 ICH_AZ_CODEC_RST# SATA3TXP
PCH_GPIO33 H32
27 PCH_GPIO33

SATA
R606 33 ACZ_SDOUT HDA_DOCK_EN# / GPIO33
37 ICH_AZ_CODEC_SDOUT AD9 SATA_RXN4 32
SATA4RXN
34 KB_LED_DET J30 AD8 SATA_RXP4 32
HDA_DOCK_RST# / GPIO13 SATA4RXP
AD6 SATA_TXN4 32 E-SATA
SATA4TXN
C Place all series terms close to PCH except for SDIN input SATA4TXP
AD5 SATA_TXP4 32
C
lines,which should be close to source.Placement of R773, R775, PCH_GPIO33 PCH_JTAG_TCK_BUF
R391 1 2 *1K_NC T36 M3 AD3
R776 & R777 should equal distance to the T split trace point. JTAG_TCK SATA5RXN
AD1
Basically, keep the same distance from T for all series PCH_JTAG_TMS SATA5RXP
T18 K3 AB3
JTAG_TMS SATA5TXN
termination resistors. SATA5TXP
AB1
T20 PCH_JTAG_TDI K1
JTAG_TDI
(Internal 20K/F pull high to +3.3V_RUN)

JTAG
T37 PCH_JTAG_TDO J2 AF16 Layout Note:
JTAG_TDO SATAICOMPO
Note : GPIO33 is a signal used for Flash T22
PCH_JTAG_RST# J4
TRST# SATAICOMPI
AF15 SATA_COMP R343 37.4/F_4 +1.05V_PCH Place this resistor close to PCH
+3.3V_RUN
Descriptor Security Override/ME Debug
No Reboot strap. Mode.This signal should be only asserted
1 2 SPKR Low = Default. lowthrough an external pull-down in 28 SPI_CLK
SPI_CLK BA2
R380 *1K_NC SPI_CLK R363 1
SPKR High = No Reboot. manufacturing or debug environments 2 10K +3.3V_RUN
SPI_CS0# AV3
ONLY. 28 SPI_CS0# SPI_CS0#
T34 SPI_CS1# AY3 T3
SPI_CS1# SATALED# SATA_ACT# 35

SPI_SI AY1 Y9 R347 1 2 10K +3.3V_RUN


28 SPI_SI SPI_MOSI SATA0GP / GPIO21

SPI
SPI_SO AV1 V1 R361 1 2 10K
28 SPI_SO SPI_MISO SATA1GP / GPIO19

IbexPeak-M_R1P0
Layout Note:JTAG
Test Pads are need to put on
the same side of mother board.

R589 51 PCH_JTAG_TCK_BUF

B B

Note : Only pop when PCH is production


stage & need "JTAG boundary Scan".
Remember to depop XDP side Res.

A A

QUANTA
Title
COMPUTER
WWW.MANUALS.CLAN.SU
IBEX PEAK-M 2/6

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 8 of 63


5 4 3 2 1
5 4 3 2 1

PEG_CLKREQ# R592 *10K/J_NC

IBEX PEAK-M (PCI,USB,NVRAM) IBEX PEAK-M (PCI-E,SMBUS,CLK)


Note:Place TX DC blocking caps close to PCH. U49B
U49E
H40 AY9 BG30 B9 RSV_SMBALERT#
AD0 NV_CE#0 30 PCIE_RXN1 PERN1 SMBALERT# / GPIO11
N34 BD1 30 PCIE_RXP1 BJ30
AD1 NV_CE#1 C468 0.1U/16V/X7R PCIE_TXN1_C PERP1 PCH_SMBCLK
C44
AD2 NV_CE#2
AP15 MiniWWAN 30 PCIE_TXN1 BF29
PETN1 SMBCLK
H14 PCH_SMBCLK 29
A38 BD8 C469 0.1U/16V/X7R PCIE_TXP1_C BH29
AD3 NV_CE#3 30 PCIE_TXP1 PETP1
C36 C8 PCH_SMBDATA
AD4 SMBDATA PCH_SMBDATA 29
J34 AV9 29 PCIE_RXN2 AW30
AD5 NV_DQS0 PERN2
A40 BG8 29 PCIE_RXP2 BA30
AD6 NV_DQS1 C474 0.1U/16V/X7R PCIE_TXN2_C PERP2 RSV_ICH_CL_RST1#
D
D45
AD7 MiniWLAN 29 PCIE_TXN2 BC30
PETN2 SML0ALERT# / GPIO60
J14
D
E36 AP7 C475 0.1U/16V/X7R PCIE_TXP2_C BD30
AD8 NV_DQ0 / NV_IO0 29 PCIE_TXP2 PETP2
H48 AP6 C6 SMB_CLK_ME0
AD9 NV_DQ1 / NV_IO1 SML0CLK
E40 AT6 AU30

SMBus
AD10 NV_DQ2 / NV_IO2 PERN3 SMB_DATA_ME0
C40 AT9 AT30 G8
AD11 NV_DQ3 / NV_IO3 PERP3 SML0DATA
M48 BB1 AU32
AD12 NV_DQ4 / NV_IO4 PETN3
M45
F53
AD13 NV_DQ5 / NV_IO5
AV6
BB3
90 AV32
PETP3
M14 LPD_SPI_INTR#
AD14 NV_DQ6 / NV_IO6 SML1ALERT# / GPIO74
M40 BA4 39 PCIE_RXN4 BA32
AD15 NV_DQ7 / NV_IO7 PERN4

NVRAM
M43 BE4 USB 3.0 BB32 E10 SMB_CLK_ME1 SML0CLK/SML0DATA:
AD16 NV_DQ8 / NV_IO8 39 PCIE_RXP4 PERP4 SML1CLK / GPIO58
J36 BB6 C801 0.1U/16V/X7R PCIE_TXN4_C BD32 DG(V1.1) P255: The 82577 SMBus
AD17 NV_DQ9 / NV_IO9 39 PCIE_TXN4 PETN4
K48 BD6 C805 0.1U/16V/X7R PCIE_TXP4_C BE32 G12 SMB_DATA_ME1 signals
AD18 NV_DQ10 / NV_IO10 39 PCIE_TXP4 PETP4 SML1DATA / GPIO75
F40 BB7 (SMB_DATA and SMB_CLK) cannot be

PCI-E*
AD19 NV_DQ11 / NV_IO11 connected to any other
C42 BC8 26 PCIE_RXN5 BF33
AD20 NV_DQ12 / NV_IO12 PERN5 devices other than the PCH.
K46 BJ8 26 PCIE_RXP5 BH33 T13
AD21 NV_DQ13 / NV_IO13 PERP5 CL_CLK1

Controller
M51 BJ6 Card Reader C464 0.1U/16V/X7R PCIE_TXN5_C BG32 Connect the SMB_DATA and SMB_CLK
AD22 NV_DQ14 / NV_IO14 26 PCIE_TXN5 PETN5
J52 BG6 C465 0.1U/16V/X7R PCIE_TXP5_C BJ32 T11 pins
AD23 NV_DQ15 / NV_IO15 26 PCIE_TXP5 PETP5 CL_DATA1
K51 to the PCH SML0DATA and SML0CLK

Link
AD24 NV_ALE pins,
L34 BD3 NV_ALE 10 31 PCIE_RXN6 BA34 T9
AD25 NV_ALE NV_CLE PERN6 CL_RST1# respectively.
F42 AY6 NV_CLE 10 31 PCIE_RXP6 AW34
AD26 NV_CLE C472 0.1U/16V/X7R PCIE_TXN6_C PERP6
J40
AD27 Giga Bit LOM 31 PCIE_TXN6 BC34
PETN6
G46 C471 0.1U/16V/X7R PCIE_TXP6_C BD34
AD28 31 PCIE_TXP6 PETP6
F44 AU2 H1 PEG_CLKREQ#
AD29 NV_RCOMP PEG_A_CLKRQ# / GPIO47 PEG_CLKREQ# 16
M47 AT34
AD30 PERN7

PCI
H36 AV7 AU34
AD31 NV_RB# PERP7
AU36 AD43 CLK_PCIE_VGAN 16
PETN7 CLKOUT_PEG_A_N
J50 AY8 AV36 AD45 CLK_PCIE_VGAP 16
C/BE0# NV_WR#0_RE# PCI-E port 7/8 are not support in HM55 . PETP7 CLKOUT_PEG_A_P
G42 AY5
C/BE1# NV_WR#1_RE#
H47 They are only in PM 55 BG34 AN4 CLK_PCIE_3GPLLN 3

PEG
C/BE2# PERN8 CLKOUT_DMI_N
G34 AV11 BJ34 AN2 CLK_PCIE_3GPLLP 3
C/BE3# NV_WE#_CK0 PERP8 CLKOUT_DMI_P
BF5 BG36
PCI_PIRQA# NV_WE#_CK1 PETN8
T21 G38 BJ36
PCI_PIRQB# PIRQA# PETP8
H51 AT1 CLK_DREFSSCLKN 3
PCI_PIRQC# PIRQB# CLKOUT_DP_N / CLKOUT_BCLK1_N
B37 H18 AT3 CLK_DREFSSCLKP 3
PCI_PIRQD# PIRQC# USBP0N CLKOUT_DP_P / CLKOUT_BCLK1_P
T41 A44
PIRQD# USBP0P
J18
A18
111 AK48
AK47
CLKOUT_PCIE0N
USBP1N CLKOUT_PCIE0P

From CLK BUFFER


PCI_REQ0# F51 C18 AW24
C REQ0# USBP1P CLKIN_DMI_N CLK_BUF_PCIE_3GPLLN 15 C
HDMI_PWR_CTRL A46 N20 CLK_PEG0_REQ# P9 BA24
24 HDMI_PWR_CTRL REQ1# / GPIO50 USBP2N USBP2- 32 PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_PCIE_3GPLLP 15
GPIO52 B45 P20 PUSB/ESATA
REQ2# / GPIO52 USBP2P USBP2+ 32
USB_MCARD1_DET# M53 J20
29 USB_MCARD1_DET# REQ3# / GPIO54 USBP3N
L20 29 CLK_PCIE_MINI1N AM43 AP3 CLK_BUF_BCLK_N 15
PCI_GNT0# USBP3P CLKOUT_PCIE1N CLKIN_BCLK_N
F48
GNT0# USBP4N
F20 USBP4- 29 MiniWLAN 29 CLK_PCIE_MINI1P AM45
CLKOUT_PCIE1P CLKIN_BCLK_P
AP1 CLK_BUF_BCLK_P 15
T19 GNT#1 K45 G20 Mini Card (WLAN)
GNT1# / GPIO51 USBP4P USBP4+ 29
T14 GNT#2 F36 A20 R586 *0_shortMINI1CLK_REQ#_R U4
GNT2# / GPIO53 USBP5N USBP5- 30 29 MINI1CLK_REQ# PCIECLKRQ1# / GPIO18
52 10 GNT3# H53
GNT3# / GPIO55 USBP5P
C20
M22
USBP5+ 30 Mini Card (WWAN) CLKIN_DOT_96N
F18
E18
CLK_BUF_DREFCLKN 15
USBP6N CLKIN_DOT_96P CLK_BUF_DREFCLKP 15
PCH_IRQH_GPIO2 USB port 6/7 are not support in HM55
94 33 PCH_IRQH_GPIO2
R8280 0 SMI#_R
B41
PIRQE# / GPIO2 USBP6P
N22 26 CLK_PCIE_CRN AM47
CLKOUT_PCIE2N
39 SMI#
BT_DET#
K53
PIRQF# / GPIO3 USBP7N
B21 They are only in PM 55 Card Reader 26 CLK_PCIE_CRP AM48
CLKOUT_PCIE2P
29 BT_DET# A36 D21 AH13 CLK_BUF_DREFSSCLKN 15
R8281 0_SW PIRQG# / GPIO4 USBP7P R382 10K/J_4 CLKIN_SATA_N / CKSSCD_N
24 INT_HDMI_HPD A48 H22 USBP8- 29 N4 AH12 CLK_BUF_DREFSSCLKP 15
PIRQH# / GPIO5 USBP8N PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P
USBP8P
J22 USBP8+ 29 BT
PCIRST#:
T17 K6
PCIRST# USB USBP9N
E22
F22 AH42 P41
USBP9P 30 CLK_PCIE_MINI3N CLKOUT_PCIE3N REFCLK14IN CLK_PCH_14M 15
DG(V1.0) P277 PCI_SERR# E44 A22 MiniWWAN AH41
SERR# USBP10N 30 CLK_PCIE_MINI3P CLKOUT_PCIE3P
Can be left unconnected. PCI_PERR# E50 C22 CLKIN_PCILOOPBACK:
PERR# USBP10P CLK_PCIE_REQ3# CLK_PCI_FB PDG (V1.1): 22 ohm series resistor
G24 USBP11- 23 A8 J42
PAR: USBP11N PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK is recommend
USBP11P
H24 USBP11+ 23 Camera
SC(V1.0) P36 PCI_IRDY# A42 L24
IRDY# USBP12N USBP12- 35
Can be left unconnected H44 M24 Touch Screen Module AM51 AH51 XTAL25_IN R582 0_DIS
PAR USBP12P USBP12+ 35 CLKOUT_PCIE4N XTAL25_IN
PCI_DEVSEL# F46 A24 AM53 AH53 XTAL25_OUT
if not using PCI. PCI_FRAME# DEVSEL# USBP13N CLKOUT_PCIE4P XTAL25_OUT
C46 C24
FRAME# USBP13P CLK_PCIE_REQ4# XCLK_RCOMP R342 90.9/F_4
M9 AF38 +1.05V_PCH
PCI_PLOCK# PCIECLKRQ4# / GPIO26 XCLK_RCOMP
D49
PLOCK# USB_BIAS
B25
PCI_STOP# USBRBIAS# R614 22.6/F CLK_FLEX0
D41 31 CLK_PCIE_LOMN AJ50 T45 T12
PME: PCI_TRDY# STOP# Layout Note : place these CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
C48
TRDY# USBRBIAS
D25 Giga Bit LOM 31 CLK_PCIE_LOMP AJ52
CLKOUT_PCIE5P
DG(V1.0) P277 resistors near to PCIe
M7 R416 *0_shortLOM_CLK_REQ#_R H6 P43 CLK_FLEX1

Clock Flex
Can be left unconnected. T16 PME# Slots 31 LOM_CLK_REQ# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 T13
USB_OC0#
PCI_PLTRST# D5
OC0# / GPIO59
N16
J16 USB_OC1#
90
PLTRST# OC1# / GPIO40 USB_OC1# 32
F16 USB_OC2# USB3.0 AK53 T42 CLK_FLEX2
OC2# / GPIO41 39 CLK_PCIE_USB30N CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T11
CLK_LPC_DEBUG R590 22/F_4 CLK_LPC_DEBUG_C N52 L16 USB_OC3# AK51
29 CLK_LPC_DEBUG CLKOUT_PCI0 OC3# / GPIO42 39 CLK_PCIE_USB30P CLKOUT_PEG_B_P
P53 E14 USB_OC4#
B CLK_PCI_8502 R378 22/F_4 CLK_PCI_8502_C CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# R8279 0 CLK_PCIE_USB30_REQ#_R CLK_FLEX3 B
27 CLK_PCI_8502 P46 G16 39 CLK_PCIE_USB30_REQ# P13 N50 T35
CLK_PCI_FB R588 22/F_4 CLK_PCI_FB_C CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67
P51 F12
CLKOUT_PCI[0..4]: CLKOUT_PCI3 OC6# / GPIO10 USB_OC7#
P48 T15
CLKOUT_PCI4 OC7# / GPIO14 IbexPeak-M_R1P0
22 ohm series resistor is recommend PCIE Clock Request
(single & double load) on PDG v1.1
IbexPeak-M_R1P0

CLKOUTFLEX[0..3]:
+3.3V_RUN CLKOUTFLEX3: PDG v1.1: 22 ohm series resistor is
+3.3V_SUS EDS(V1.0) :support 48MHz recommend (PCI & non PCI routing,
BT_DET# R604 8.2K/J_4 33MHz and 14.31818MHz.
PCH_IRQH_GPIO2 R601 8.2K/J_4
single & double load)
+3.3V_SUS GPIO52 R598 8.2K/J_4 R616 10K/J_4 CLK_PCIE_REQ3#
SMI#_R R591 8.2K/J_4 R381 10K/J_4 CLK_PEG0_REQ#
RSV_SMBALERT# 10K/F_4 R619 R417 10K/J_4 LOM_CLK_REQ#_R
RSV_ICH_CL_RST1# 10K/F_4 R418 R415 10K/J_4 CLK_PCIE_REQ4#
PCH_SMBCLK 2.2K/F_4 R627 25MHz Clock for DCI Function
PCH_SMBDATA 2.2K/F_4 R623 +3.3V_SUS
SMB_CLK_ME0 2.2K/F_4 R610 +3.3V_RUN
SMB_DATA_ME0 2.2K/F_4 R624
SMB_CLK_ME1 2.2K/F_4 R429 R587 10K/J_4 MINI1CLK_REQ#_R XTAL25_IN
SMB_DATA_ME1 2.2K/F_4 R424 +3.3V_SUS Q46

1
Reserve capacitor pads for LPD_SPI_INTR# 10K/F_4 R411 RP13 2N7002W-7-F
CLK_PCIE_USB30_REQ#_R 10K/J_4 R369 USB_OC6# 6 5
improving WWAN. USB_OC0# USB_OC4# SMB_CLK_ME1 R580
7 4 PCIECLKRQ{0,3,4,5,6,7}# should have a 1 3 SMBCLK1 27
USB_OC3# USB_OC7# 1M_SW
90 USB_OC1#
8 3
USB_OC2#
10K pull-up to +V3.3A.PCIECLKRQ{1,2}
9 2 should have a 10K pull-up to +3.3S 35 Y6

2
CLK_LPC_DEBUG 50 10 1 USB_OC5# 1 3 XTAL25_OUT
C773 *27P/50V_NC +3.3V_SUS
2 4
CLK_PCI_8502 50 10P8R-8.2K +3.3V_SUS
C520 *27P/50V_NC C772 25MHz_SW C769
22P/50V_SW 22P/50V_SW
+3.3V_RUN
RP20 R392 *1K/J_NC PCI_GNT0# Q44 50 50

2
HDMI_PWR_CTRL 6 5 R384 *1K/J_NC GNT#1 2N7002W-7-F
PCI_FRAME# 7 4 PCI_PIRQD#
A PCI_TRDY# USB_MCARD1_DET# SMB_DATA_ME1 A
Add Buffers as needed for
52 8
9
3
2 PCI_PIRQB#
1 3 SMBDAT1 27
Non-iAMT 10 1 PCI_REQ0#
Loading and fanout concerns. +3.3V_RUN
+3.3V_SUS 10P8R-8.2K Boot BIOS Strap
C522 0.047U/10V_4 PCI_GNT0# GNT#1 Boot BIOS Location
RP12
+3.3V_RUN
0 0 LPC
QUANTA
PCI_PERR# 6 5
COMPUTER
5

U32 PCI_DEVSEL# 7 4 PCI_PLOCK# 0 1 PCI


10 2 PCI_SERR# 8 3 PCI_PIRQC# Title
4 PCI_PIRQA# 9 2 PCI_IRDY# 1 0 Reserved (NAND) IBEX PEAK-M 3/6
PLTRST# 3,16,26,27,29,30,31,39
PCI_PLTRST# 1 +3.3V_RUN 10 1 PCI_STOP#
1 1 SPI Size Document Number Rev
TC7SZ32FU(T5L,F,T) 10P8R-8.2K GM6 2B

Date: Friday, June 25, 2010 Sheet 9 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

+3.3V_SUS

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD) 67


FFS_INT2 R638 *10K/J_NC
U49F
78 RSV_WOL_EN R618 10K/J_4
TS_EN R393 *10K/J_NC
SIO_GPIO Y3 AH45 TP_PCH_PCIE6N
BMBUSY# / GPIO0 CLKOUT_PCIE6N TP21
AH46 TP_PCH_PCIE6P LAN_PHY_PWR_CTRL R413 10K/J_4
CLKOUT_PCIE6P TP22
27 SIO_EXT_SMI# SIO_EXT_SMI# C38 TEST_WOOFER_EN R370 1K
TACH1 / GPIO1 GPIO57 R414 10K/J_4
27 SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6 TP_PCH_PCIE7N RST_GATE R395 10K/J_4
CLKOUT_PCIE7N AF48 TP23 S3 Power reduce

MISC
27 SIO_EXT_WAKE# SIO_EXT_WAKE# J32 AF47 TP_PCH_PCIE7P
TACH3 / GPIO7 CLKOUT_PCIE7P TP24
D RSV_WOL_EN F10 +3.3V_RUN D
GPIO8
LAN_PHY_PWR_CTRL K9 U2 SIO_A20GATE
LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE 27
WWAN_RADIO_DIS# R611 10K/J_4
38 TEST_WOOFER_EN TEST_WOOFER_EN T7 SIO_EXT_SMI# R602 10K/J_4
GPIO15 +1.05V_VTT SIO_EXT_SCI# R603 10K/J_4
16 dGPU_HOLD_RST# dGPU_HOLD_RST# AA2 AM3 SIO_EXT_WAKE# R379 10K/J_4
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLKN 3
PCIE_MCARD2_DET# R360 10K/J_4
R412 0_SW dGPU_PWROK_L F38 AM1 PCIE_MCARD1_DET# R397 10K/J_4
18,40 dGPU_PWROK TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLKP 3
WLAN_RADIO_DIS# R358 10K/J_4
PCIE_MCARD2_DET# Y7 BG10 PCH_PECI_R R556 *0_short CRB_SV_DET R386 10K/J_4
30 PCIE_MCARD2_DET# SCLOCK / GPIO22 PECI H_PECI 3

GPIO
R331 SIO_RCIN# R365 10K/J_4
29 PCIE_MCARD1_DET# PCIE_MCARD1_DET# H10 T1 SIO_RCIN# 56/F_4 SIO_A20GATE R371 10K/J_4
GPIO24 RCIN# SIO_RCIN# 27
dGPU_PWR_EN R355 10K/J
78 R356 *10K_NC GPIO27 AB12 BE10 dGPU_PRSNT# R352 *10K/J_NC
GPIO27 PROCPWRGD H_PWRGOOD 3

CPU
dGPU_HOLD_RST# R349 *10K/J_NC
35 TS_EN TS_EN V13 BD10 PCH_THRMTRIP#_R R332 56/F_4 USB_MCARD2_DET# R398 10K/J_4
GPIO28 THRMTRIP# H_THERM# 3
SIO_GPIO R348 10K/J_4
USB_MCARD2_DET# M11 dGPU_PWROK_L R401 10K/J
30 USB_MCARD2_DET# STP_PCI# / GPIO34 CPPE_N# R583 10K/J
49 dGPU_VRON R570 *0_NC GPIO35 V6 SATACLKREQ# / GPIO35
dGPU_PWR_EN AB7 BA22
Layout Note:
24,50 dGPU_PWR_EN SATA2GP / GPIO36 TP1
Place this resistors close to PCH
dGPU_PRSNT# AB13 AW22 dGPU_PRSNT# R362 10K/J
SATA3GP / GPIO37 TP2

29 WLAN_RADIO_DIS# WLAN_RADIO_DIS# V3 BB22 dGPU always exist


SLOAD / GPIO38 TP3
R390 *0_short CRB_SV_DET
67 29 BT_RADIO_DIS# P3 SDATAOUT0 / GPIO39 TP4 AY45

C WWAN_RADIO_DIS# H3 AY46 C
30 WWAN_RADIO_DIS# PCIECLKRQ6# / GPIO45 TP5

S3 Power reduce 3,13,14 RST_GATE RST_GATE F1 AV43


PCIECLKRQ7# / GPIO46 TP6
33 FFS_INT2 FFS_INT2 AB6 AV45
SDATAOUT1 / GPIO48 TP7
CPPE_N# AA4 AF13
26 CPPE_N# SATA5GP / GPIO49 TP8
GPIO57 F8 M18
GPIO57 TP9
N18
TP10
A4 AJ24
VSS_NCTF_1 TP11
A49
NCTF

VSS_NCTF_2 RSVD
A5 AK41
VSS_NCTF_3 TP12
A50
VSS_NCTF_4
A52 AK42
VSS_NCTF_5 TP13
A53
VSS_NCTF_6
B2 M32
VSS_NCTF_7 TP14
B4
VSS_NCTF_8
B52 N32
VSS_NCTF_9 TP15
B53
VSS_NCTF_10
BE1 M30
VSS_NCTF_11 TP16
BE53
VSS_NCTF_12
BF1 N30
VSS_NCTF_13 TP17
BF53
VSS_NCTF_14
BH1 H12
VSS_NCTF_15 TP18
BH2
VSS_NCTF_16
BH52 AA23
VSS_NCTF_17 TP19
BH53
VSS_NCTF_18
B BJ1
VSS_NCTF_19 NC_1
AB45 DMI Termination Voltage B
BJ2
VSS_NCTF_20
BJ4 AB38
VSS_NCTF_21 NC_2 Set to Vcc when LOW
BJ49
VSS_NCTF_22
BJ5
VSS_NCTF_23 NC_3
AB42 NV_CLE
BJ50 Set to Vcc/2 when HIGH +NVRAM_VCCQ
VSS_NCTF_24
BJ52 AB41
VSS_NCTF_25 NC_4
BJ53
VSS_NCTF_26 R565 *1K_NC
D1 T39 9 NV_ALE
VSS_NCTF_27 NC_5
D2
VSS_NCTF_28 R566 *1K_NC
D53 9 NV_CLE
VSS_NCTF_29
E1 P6
VSS_NCTF_30 INIT3_3V#
E53
VSS_NCTF_31
TP24
C10 Danbury Technology Enabled
IbexPeak-M_R1P0 High = Enable
NV_ALE
Low = Disable

R364 10K GPIO35 BMBUSY#:(Intel feedback)


R617 *1K_NC RSV_WOL_EN Follow CRB checklist, 1K is
R594 *1K/F_NC GNT3# 9 for intel BIOS validation purpose.

BMBUSY#:
A If not used, require a weak pull-up A
(8.2- KΩ to 10 kΩ) to Vcc3_3.
A16 swap override Strap/Top-Block Integrated Clock Chip Enable CRB(V1.0)P28: it has 1K PU and
100 ohm on this net for validation purpose.
Swap Override jumper
(Reserve to validate for future platforms) QUANTA
Low = A16 swap
override/Top-Block Enable when sampled low SV_SET_UP 1-X High = Strong (Default) Title
COMPUTER
GNT3# RSV_WOL_EN IBEX PEAK-M 4/6
WWW.MANUALS.CLAN.SU
Swap Override enabled Disable when sampled high
High = Default Size Document Number Rev
GM6 2B

Date: Friday, June 25, 2010 Sheet 10 of 63


5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (POWER) VCCCORE=1.524A max U49G POWER VCCADAC = 100mA max

+1.05V_PCH AB24 AE50 +3.3V_RUN


VCCCORE[1] VCCADAC[1]
AB26
VCCCORE[2]
AB28 AE52
C487 C751 VCCCORE[3] VCCADAC[2]
VCCCORE(+1.05V) = 1.432A(80mils) AD26
VCCCORE[4]

CRT
10U AD28 AF53
10 1U AF26
VCCCORE[5]
VCCCORE[6]
VSSA_DAC[1] U49J POWER

VCC CORE
805 AF28 AF51 VCCACLK= 52mA(15mils) VCCIO = 3.062A(150mils)
VCCCORE[7] VSSA_DAC[2] L49 *10uh_NC +V1.1LAN_VCCA_CLK
AF30 +1.05V_PCH AP51 V24 +1.05V_PCH
VCCCORE[8] +3.3V_RUN C762 *10U/6.3V_NC VCCACLK[1] VCCIO[5]
AF31 V26
VCCCORE[9] C761 *1U/6.3V_NC VCCIO[6] C499 1U/10V_4
AH26 AP53 Y24
VCCCORE[10] VCCACLK[2] VCCIO[7]
AH28 Y26
VCCCORE[11] R341 0_SW VCCIO[8]
AH30
VCCCORE[12]
VCCLAN = 320mA(30mils) VCCSUS3_3 = 0.163A(20mils)
AH31 AH38 R340 0_DIS +1.05V_PCH AF23 V28 +3.3V_SUS
D VCCCORE[13] VCCALVDS VCCLAN[1] VCCSUS3_3[1] D
AJ30 U28
VCCCORE[14] +1.8V_RUN VCCSUS3_3[2] C528 C512 C531
AJ31 AH39 AF24 U26
VCCCORE[15] VSSA_LVDS C519 VCCLAN[2] VCCSUS3_3[3]
U24
VCCSUS3_3[4] *0.022U/16V_NC 0.1U/16V_4 0.1U/16V_4
P28
L51 0.1uH_SW 1U/10V_4 TP_PCH_VCCDSW VCCSUS3_3[5]
AP43 Y20 P26
VCCTX_LVDS[1] DCPSUSBYP VCCSUS3_3[6]
AP45 N28
VCCTX_LVDS[2] R337 C480 C478 C770 C507 VCCSUS3_3[7]
AT46 N26

LVDS
VCCTX_LVDS[3] VCCSUS3_3[8]
+1.05V_PCH AK24 AT45 AD38 M28
VCCIO[24] VCCTX_LVDS[4] 0.01U_SW 0.01U_SW 22U_SW 0.1U/16V_4 VCCME[1] VCCSUS3_3[9]
M26
0_DIS VCCSUS3_3[10]
AD39 L28

USB
L31 *1uH_NC +V1.1LAN_VCCAPLL_EXP VCCME[2] VCCSUS3_3[11]
40mA(15mils) +1.05V_PCH BJ24 L26
VCCAPLLEXP VCCSUS3_3[12]
AB34 +3.3V_RUN AD41 J28
C473 *10U/6.3V_NC VCC3_3[2] VCCME[3] VCCSUS3_3[13]
J26
C494 VCCSUS3_3[14]
AN20
VCCIO[25] VCC3_3[3]
AB35 VCC3_3 = 0.357A max AF43
VCCME[4] VCCSUS3_3[15]
H28
AN22 H26

HVCMOS
VCCIO[26] 0.1U VCCSUS3_3[16]
AN23 AD35 VCCME(+1.05V) = 1.849A(100mils) AF41 G28
VCCIO[27] VCC3_3[4] VCCME[5] VCCSUS3_3[17]
AN24 G26
VCCIO[28] VCCSUS3_3[18]
AN26 +1.05V_PCH AF42 F28
VCCIO[29] VCCME[6] VCCSUS3_3[19]
VCCIO = 3.062A(150mils) AN28
VCCIO[30] VCCSUS3_3[20]
F26
BJ26 C755 22U/6.3V_8 V39 E28
VCCIO[31] VCCME[7] VCCSUS3_3[21]

Clock and Miscellaneous


BJ28 E26
VCCIO[32] C760 22U/6.3V_8 VCCSUS3_3[22]
AT26 V41 C28
VCCIO[33] VCCME[8] VCCSUS3_3[23]
AT28 C26
VCCIO[34] C503 1U/10V_4 VCCSUS3_3[24]
AU26 V42 B27
VCCIO[35] VCCME[9] VCCSUS3_3[25]
+1.05V_PCH AU28 A28
VCCIO[36] VCCVRM = 0.035A max C504 1U/10V_4 VCCSUS3_3[26]
C790
AV26
AV28
VCCIO[37]
AT24
Y39
VCCME[10] VCCSUS3_3[27]
A26 65
VCCIO[38] VCCVRM[2] +1.5VS_1.8VS
10U C510 C515 C501 C750 AW26 Y41 U23
10 1U 1U 1U 1U VCCIO[39] VCCDMI = 0.061A max VCCME[11] VCCSUS3_3[28]
VCCIO = 3.208A max AW28
VCCIO[40]

DMI
805 BA26 AT16 R339 0 +1.05V_VTT Y42 V23 +1.05V_PCH
VCCIO[41] VCCDMI[1] VCCME[12] VCCIO[56]
BA28 V5REF_SUS< 1mA
VCCIO[42] +V5REF_SUS R394 100/F_4
BB26 AU16 F24 +5V_SUS
C VCCIO[43] VCCDMI[2] V5REF_SUS C
BB28
VCCIO[44] +VCCRTCEXT C529 D23 RB500V-40
BC26 V9 +3.3V_SUS
VCCIO[45] DCPRTC

PCI E*
BC28 C486 C513 0.1U/16V_4 1U/16V_6
VCCIO[46] 1U/10V_4
BD26 V5REF< 1mA
VCCIO[47] +V5REF R387 100/F_4
BD28 K49 +5V_RUN
VCCIO[48] V5REF
BE26 AM16 +1.5VS_1.8VS AU24

PCI/GPIO/LPC
VCCIO[49] VCCPNAND[1] VCCVRM[3] D22 RB500V-40
BE28 AK16 +3.3V_RUN
+3.3V_RUN VCCIO[50] VCCPNAND[2] VCCPNAND = 0.156A max C524
BG26 AK20 J38
VCCIO[51] VCCPNAND[3] VCC3_3[8] 1U/16V_6
BG28 AK19 +NVRAM_VCCQ BB51
VCCIO[52] VCCPNAND[4] +1.1V_VCCADPLLA VCCADPLLA[1]
VCC3_3 = 0.357A max BH27
VCCIO[53] VCCPNAND[5]
AK15 68mA(15mils) BB53
VCCADPLLA[2] VCC3_3[9]
L38
AK13 C496
VCCPNAND[6]
AN30 AM12 M36 +3.3V_RUN
VCCIO[54] VCCPNAND[7] VCC3_3[10]

NAND / SPI
AN31 AM13 0.1U/16V_4 69mA(15mils) +1.1V_VCCADPLLB BD51
C485 VCCIO[55] VCCPNAND[8] VCCADPLLB[1]
AM15 BD53 N36 VCC3_3 = 0.357A(30mils)
VCCPNAND[9] VCCADPLLB[2] VCC3_3[11]
0.1U
AN35 +1.05V_PCH AH23 P36 C502
VCC3_3[1] VCCIO[21] VCC3_3[12] 0.1U/16V_4
AJ35
VCCIO[22]
VCCVRM = 0.035A max VCCIO = 3.062A(150mils) AH35
VCCIO[23] VCC3_3[13]
U35 Note: Place cap to J38
VCCFDIPLL = 100mA max +1.5VS_1.8VS AT22 C493 1U/10V_4
VCCVRM[1] C508 1U/10V_4 AF34
L46 *1uH_NC +1.05V_VCCFDIPLL VCCME3_3 = 0.085A max C498 1U/10V_4 VCCIO[2]
+1.05V_PCH BJ18 AM8 AD13 +3.3V_RUN
VCCFDIPLL VCCME3_3[1] VCC3_3[14]
AM9 +3.3V_RUN AH34
VCCME3_3[2] VCCIO[3]
FDI

+1.05V_PCH AM23 AP11 C526


C754 VCCIO[1] VCCME3_3[3] C484 0.1U/16V_4
AP9 AF32 31mA(15mils)
*10U_NC VCCME3_3[4] VCCIO[4]
AK3
0.1U/16V_4 C514 0.1U/16V_4 +VCCSST VCCSATAPLL[1] +V1.1LAN_VCCAPLL L48 *10uh_NC
VCCIO = 3.208A max V12 AK1 +1.05V_PCH
DCPSST VCCSATAPLL[2]
IbexPeak-M_R1P0 C758 C756
*1U/6.3V_NC *10U/6.3V_NC
+V1.1LAN_INT_VCCSUS Y22 VCCIO = 3.062A(150mils)
C511 0.1U/16V_4 DCPSUS
AH22 +1.05V_PCH
VCCME3_3: VCCIO[9]
B EDS(V1.0)P84:supply for the Intel Management Engine.This is a separate power plane B
that may or may not be powered in S3–S5 states. P18 AT20 C479
VCCSUS3_3[29] VCCVRM[4] +1.5VS_1.8VS
R338 *0_NC This plane must be on in S0 VCCSUS3_3 = 163mA(20mils) 1U/10V_4
+1.05V_PCH
and other times the Intel Management Engine is used. U19
+3.3V_SUS

SATA
VCCSUS3_3[30]

PCI/GPIO/LPC
+1.5V_RUN R335 *0_NC +1.5VS_1.8VS AH19
C516 0.1U/16V_4 VCCIO[10]
U20
R336 0 VCCSUS3_3[31]
AD20
VCCIO[11]
+1.8V_RUN U22
R330 0 VCCSUS3_3[32]
+NVRAM_VCCQ AF22
VCCIO[12]

+3.3V_RUN R329 *0_NC VCC3_3 = 0.357A(30mils) AD19


VCCIO[13]
+3.3V_RUN V15 AF20
VCC3_3[5] VCCIO[14]
PCH EDS(V1.0) P84 VCCIO[15]
AF19
+NVRAM_VCCQ: C517 V16 AH20
VCC3_3[6] VCCIO[16]
1.8 V supply for Dual Channel NAND interface. 0.1U/16V_4 Y16 AB19
This power is supplied by core VCC3_3[7] VCCIO[17]
AB20
well. If unused, this pin should VCCIO[18]
AB22
VCCIO[19]
be connected to Vcc3_3. V_CPU_IO >1mA(15mils) AD22
VCCIO[20]
+1.05V_VTT AT18
V_CPU_IO[1]
VCCME = 1.849A(100mils)
AA34

CPU
VCCME[13] +1.05V_PCH
+1.05V_PCH L47 10uH +1.1V_VCCADPLLA C470 4.7U/10V_8 Y34
C482 0.1U/16V_4 VCCME[14]
AU18 Y35
C476 0.1U/16V_4 V_CPU_IO[2] VCCME[15]
AA35
+ C757 VCCME[16]
220U C759 VCCRTC= 2mA(15mils)

RTC
3528 1U +RTC_CELL A12 L30 +3.3V_SUS
VCCRTC VCCSUSHDA

HDA
C783 C788 VCCSUSHDA= 6mA(15mils)
C785 IbexPeak-M_R1P0 C521
1U/10V_4 0.1U/16V_4 0.1U/16V_4 1U/10V_4
L45 10uH +1.1V_VCCADPLLB
A A

+ C752
220U C753
3528 1U QUANTA
Title
COMPUTER
IBEX PEAK-M 5/6

Size Document Number Rev


GM6 2B

Date: Thursday, June 24, 2010 Sheet 11 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

U49I
IBEX PEAK-M (GND) AY7
B11
VSS[159] VSS[259] H49
H5
VSS[160] VSS[260]
D B15 VSS[161] VSS[261] J24 D
B19 VSS[162] VSS[262] K11
B23 VSS[163] VSS[263] K43
B31 VSS[164] VSS[264] K47
B35 VSS[165] VSS[265] K7
B39 VSS[166] VSS[266] L14
B43 VSS[167] VSS[267] L18
B47 VSS[168] VSS[268] L2
B7 VSS[169] VSS[269] L22
BG12 VSS[170] VSS[270] L32
BB12 VSS[171] VSS[271] L36
U49H BB16 L40
VSS[172] VSS[272]
AB16 VSS[0] BB20 VSS[173] VSS[273] L52
BB24 VSS[174] VSS[274] M12
AA19 VSS[1] VSS[80] AK30 BB30 VSS[175] VSS[275] M16
AA20 VSS[2] VSS[81] AK31 BB34 VSS[176] VSS[276] M20
AA22 VSS[3] VSS[82] AK32 BB38 VSS[177] VSS[277] N38
AM19 VSS[4] VSS[83] AK34 BB42 VSS[178] VSS[278] M34
AA24 VSS[5] VSS[84] AK35 BB49 VSS[179] VSS[279] M38
AA26 VSS[6] VSS[85] AK38 BB5 VSS[180] VSS[280] M42
AA28 VSS[7] VSS[86] AK43 BC10 VSS[181] VSS[281] M46
AA30 VSS[8] VSS[87] AK46 BC14 VSS[182] VSS[282] M49
AA31 VSS[9] VSS[88] AK49 BC18 VSS[183] VSS[283] M5
AA32 VSS[10] VSS[89] AK5 BC2 VSS[184] VSS[284] M8
AB11 VSS[11] VSS[90] AK8 BC22 VSS[185] VSS[285] N24
AB15 VSS[12] VSS[91] AL2 BC32 VSS[186] VSS[286] P11
AB23 VSS[13] VSS[92] AL52 BC36 VSS[187] VSS[287] AD15
AB30 VSS[14] VSS[93] AM11 BC40 VSS[188] VSS[288] P22
AB31 VSS[15] VSS[94] BB44 BC44 VSS[189] VSS[289] P30
AB32 VSS[16] VSS[95] AD24 BC52 VSS[190] VSS[290] P32
AB39 VSS[17] VSS[96] AM20 BH9 VSS[191] VSS[291] P34
AB43 VSS[18] VSS[97] AM22 BD48 VSS[192] VSS[292] P42
C C
AB47 VSS[19] VSS[98] AM24 BD49 VSS[193] VSS[293] P45
AB5 VSS[20] VSS[99] AM26 BD5 VSS[194] VSS[294] P47
AB8 VSS[21] VSS[100] AM28 BE12 VSS[195] VSS[295] R2
AC2 VSS[22] VSS[101] BA42 BE16 VSS[196] VSS[296] R52
AC52 VSS[23] VSS[102] AM30 BE20 VSS[197] VSS[297] T12
AD11 VSS[24] VSS[103] AM31 BE24 VSS[198] VSS[298] T41
AD12 VSS[25] VSS[104] AM32 BE30 VSS[199] VSS[299] T46
AD16 VSS[26] VSS[105] AM34 BE34 VSS[200] VSS[300] T49
AD23 VSS[27] VSS[106] AM35 BE38 VSS[201] VSS[301] T5
AD30 VSS[28] VSS[107] AM38 BE42 VSS[202] VSS[302] T8
AD31 VSS[29] VSS[108] AM39 BE46 VSS[203] VSS[303] U30
AD32 VSS[30] VSS[109] AM42 BE48 VSS[204] VSS[304] U31
AD34 VSS[31] VSS[110] AU20 BE50 VSS[205] VSS[305] U32
AU22 VSS[32] VSS[111] AM46 BE6 VSS[206] VSS[306] U34
AD42 VSS[33] VSS[112] AV22 BE8 VSS[207] VSS[307] P38
AD46 VSS[34] VSS[113] AM49 BF3 VSS[208] VSS[308] V11
AD49 VSS[35] VSS[114] AM7 BF49 VSS[209] VSS[309] P16
AD7 VSS[36] VSS[115] AA50 BF51 VSS[210] VSS[310] V19
AE2 VSS[37] VSS[116] BB10 BG18 VSS[211] VSS[311] V20
AE4 VSS[38] VSS[117] AN32 BG24 VSS[212] VSS[312] V22
AF12 VSS[39] VSS[118] AN50 BG4 VSS[213] VSS[313] V30
Y13 VSS[40] VSS[119] AN52 BG50 VSS[214] VSS[314] V31
AH49 VSS[41] VSS[120] AP12 BH11 VSS[215] VSS[315] V32
AU4 VSS[42] VSS[121] AP42 BH15 VSS[216] VSS[316] V34
AF35 VSS[43] VSS[122] AP46 BH19 VSS[217] VSS[317] V35
AP13 VSS[44] VSS[123] AP49 BH23 VSS[218] VSS[318] V38
AN34 VSS[45] VSS[124] AP5 BH31 VSS[219] VSS[319] V43
AF45 VSS[46] VSS[125] AP8 BH35 VSS[220] VSS[320] V45
AF46 VSS[47] VSS[126] AR2 BH39 VSS[221] VSS[321] V46
AF49 VSS[48] VSS[127] AR52 BH43 VSS[222] VSS[322] V47
AF5 VSS[49] VSS[128] AT11 BH47 VSS[223] VSS[323] V49
B AF8 BA12 BH7 V5 B
VSS[50] VSS[129] VSS[224] VSS[324]
AG2 VSS[51] VSS[130] AH48 C12 VSS[225] VSS[325] V7
AG52 VSS[52] VSS[131] AT32 C50 VSS[226] VSS[326] V8
AH11 VSS[53] VSS[132] AT36 D51 VSS[227] VSS[327] W2
AH15 VSS[54] VSS[133] AT41 E12 VSS[228] VSS[328] W52
AH16 VSS[55] VSS[134] AT47 E16 VSS[229] VSS[329] Y11
AH24 VSS[56] VSS[135] AT7 E20 VSS[230] VSS[330] Y12
AH32 VSS[57] VSS[136] AV12 E24 VSS[231] VSS[331] Y15
AV18 VSS[58] VSS[137] AV16 E30 VSS[232] VSS[332] Y19
AH43 VSS[59] VSS[138] AV20 E34 VSS[233] VSS[333] Y23
AH47 VSS[60] VSS[139] AV24 E38 VSS[234] VSS[334] Y28
AH7 VSS[61] VSS[140] AV30 E42 VSS[235] VSS[335] Y30
AJ19 VSS[62] VSS[141] AV34 E46 VSS[236] VSS[336] Y31
AJ2 VSS[63] VSS[142] AV38 E48 VSS[237] VSS[337] Y32
AJ20 VSS[64] VSS[143] AV42 E6 VSS[238] VSS[338] Y38
AJ22 VSS[65] VSS[144] AV46 E8 VSS[239] VSS[339] Y43
AJ23 VSS[66] VSS[145] AV49 F49 VSS[240] VSS[340] Y46
AJ26 VSS[67] VSS[146] AV5 F5 VSS[241] VSS[341] P49
AJ28 VSS[68] VSS[147] AV8 G10 VSS[242] VSS[342] Y5
AJ32 VSS[69] VSS[148] AW14 G14 VSS[243] VSS[343] Y6
AJ34 VSS[70] VSS[149] AW18 G18 VSS[244] VSS[344] Y8
AT5 VSS[71] VSS[150] AW2 G2 VSS[245] VSS[345] P24
AJ4 VSS[72] VSS[151] BF9 G22 VSS[246] VSS[346] T43
AK12 VSS[73] VSS[152] AW32 G32 VSS[247] VSS[347] AD51
AM41 VSS[74] VSS[153] AW36 G36 VSS[248] VSS[348] AT8
AN19 VSS[75] VSS[154] AW40 G40 VSS[249] VSS[349] AD47
AK26 VSS[76] VSS[155] AW52 G44 VSS[250] VSS[350] Y47
AK22 VSS[77] VSS[156] AY11 G52 VSS[251] VSS[351] AT12
AK23 VSS[78] VSS[157] AY43 AF39 VSS[252] VSS[352] AM6
AK28 VSS[79] VSS[158] AY47 H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
A IbexPeak-M_R1P0 H30 AK45 A
VSS[255] VSS[355]
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
QUANTA
IbexPeak-M_R1P0
Title
COMPUTER
WWW.MANUALS.CLAN.SU
IBEX PEAK-M 6/6

Size Document Number Rev


GM6 2B

Date: Thursday, June 24, 2010 Sheet 12 of 63


5 4 3 2 1
5 4 3 2 1

+1.5V_SUS
JDIM4B

JDIM4A M_A_DQ[63:0] 4 75 VDD1 VSS16 44


4 M_A_A[15:0] 76 VDD2 VSS17 48
M_A_A0 98 5 M_A_DQ0 81 49
M_A_A1 A0 DQ0 M_A_DQ1 VDD3 VSS18
97 A1 DQ1 7 82 VDD4 VSS19 54
M_A_A2 96 15 M_A_DQ2 87 55
M_A_A3 A2 DQ2 M_A_DQ3 VDD5 VSS20
95 A3 DQ3 17 88 VDD6 VSS21 60
M_A_A4 92 4 M_A_DQ5 93 61
M_A_A5 A4 DQ4 M_A_DQ4 VDD7 VSS22
91 A5 DQ5 6 2.48A 94 VDD8 VSS23 65
M_A_A6 90 16 M_A_DQ6 +1.5V_SUS +DDR_VTTREF +SMDDR_VREF_DIMM0 99 66
M_A_A7 A6 DQ6 M_A_DQ7 VDD9 VSS24
86 A7 DQ7 18 100 VDD10 VSS25 71
D M_A_A8 89 21 M_A_DQ9 105 72 D
M_A_A9 A8 DQ8 M_A_DQ8 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


85 A9 DQ9 23 106 VDD12 VSS27 127
M_A_A10 107 33 M_A_DQ10 R260 R261 111 128
M_A_A11 A10/AP DQ10 M_A_DQ11 1K/F *0/J_NC VDD13 VSS28
84 A11 DQ11 35 112 VDD14 VSS29 133
M_A_A12 83 22 M_A_DQ12 117 134
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD15 VSS30
119 A13 DQ13 24 118 VDD16 VSS31 138
M_A_A14 80 34 M_A_DQ14 123 139
M_A_A15 A14 DQ14 M_A_DQ15 VDD17 VSS32
78 A15 DQ15 36 124 VDD18 VSS33 144
M_A_DQ16

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 VSS34 145
109 41 M_A_DQ17 199 150
4 M_A_BS#0 BA0 DQ17 +3.3V_RUN VDDSPD VSS35

1
108 51 M_A_DQ18 151
4 M_A_BS#1 BA1 DQ18 VSS36
79 53 M_A_DQ19 R255 C267 77 155
4 M_A_BS#2 BA2 DQ19 NC1 VSS37
114 40 M_A_DQ20 1K/F 0.1U/16V_4 122 156
4 M_A_CS#0

2
S0# DQ20 M_A_DQ21 NC2 VSS38
4 M_A_CS#1 121 S1# DQ21 42 16 125 NCTEST VSS39 161
101 50 M_A_DQ22 162
4 M_A_CLKP0 CK0 DQ22 VSS40
103 52 M_A_DQ23 PM_EXTTS#0 198 167
4 M_A_CLKN0 CK0# DQ23 3 PM_EXTTS#0 EVENT# VSS41
102 57 M_A_DQ29 30 168
4 M_A_CLKP1 CK1 DQ24 3,14 DDR3_DRAMRST# RESET# VSS42
104 59 M_A_DQ27 172
4 M_A_CLKN1 CK1# DQ25 VSS43
73 67 M_A_DQ25 173
4 M_A_CKE0 CKE0 DQ26 VSS44
74 69 M_A_DQ26 +SMDDR_VREF_DQ0 +SMDDR_VREF_DQ0 1 178
4 M_A_CKE1 CKE1 DQ27 VREF_DQ VSS45
115 56 M_A_DQ24 +SMDDR_VREF_DIMM0 +SMDDR_VREF_DIMM0 126 179
4 M_A_CAS# CAS# DQ28 VREF_CA VSS46
110 58 M_A_DQ28 184
4 M_A_RAS# RAS# DQ29 VSS47
113 68 M_A_DQ30 185
4 M_A_WE# WE# DQ30 VSS48
R226 10K/J_4 DIMM0_SA0 197 70 M_A_DQ31 2 189
R213 10K/J_4 DIMM0_SA1 SA0 DQ31 M_A_DQ37 VSS1 VSS49
201 SA1 DQ32 129 3 VSS2 VSS50 190
202 131 M_A_DQ32 8 195

(204P)
14,29,30,33 WLAN_SMBCLK SCL DQ33 M_A_DQ34 VSS3 VSS51
200 SDA DQ34 141 9 VSS4 VSS52 196
14,29,30,33 WLAN_SMBDATA 143 M_A_DQ35 13
C DQ35 VSS5 C
116 130 M_A_DQ33 14
4 M_A_ODT0 ODT0 DQ36 VSS6
120 132 M_A_DQ36 19
4 M_A_ODT1 ODT1 DQ37 VSS7
140 M_A_DQ38 20
4 M_A_DM[7:0] DQ38 VSS8
M_A_DM0 11 142 M_A_DQ39 25
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS9
28 DM1 DQ40 147 26 VSS10 VTT1 203 +0.75V_DDR_VTT
M_A_DM2 46 149 M_A_DQ41 31 204
M_A_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_A_DQ42 32
VSS11
VSS12
VTT2
M_A_DM4 136 159 M_A_DQ43 37 205
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS13 GND
153 DM5 DQ44 146 38 VSS14 GND 206
M_A_DM6 170 148 M_A_DQ45 43
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS15
187 DM7 DQ46 158
160 M_A_DQ47
4 M_A_DQSP[7:0] DQ47
M_A_DQSP0 12 163 M_A_DQ48 DDR3-DIMM0_H=5.2_Standard
M_A_DQSP1 DQS0 DQ48 M_A_DQ49
29 DQS1 DQ49 165
M_A_DQSP2 47 175 M_A_DQ50
M_A_DQSP3 DQS2 DQ50 M_A_DQ51
64 DQS3 DQ51 177
M_A_DQSP4 137 164 M_A_DQ52
M_A_DQSP5 154
DQS4 DQ52
166 M_A_DQ53 +1.5V_SUS +DDR_VTTREF M1 VREF
M_A_DQSP6 DQS5 DQ53 M_A_DQ54
171 DQS6 DQ54 174
M_A_DQSP7 188 176 M_A_DQ55
4 M_A_DQSN[7:0] DQS7 DQ55 +SMDDR_VREF_DQ0
M_A_DQSN0 10 181 M_A_DQ61
M_A_DQSN1 DQS#0 DQ56 M_A_DQ60 R246 R247
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58 1K/F *0/J_NC
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ56
M_A_DQSN5 DQS#4 DQ60 M_A_DQ57
152 DQS#5 DQ61 182
B M_A_DQSN6 169 192 M_A_DQ62 R203 0/J_6 B
M_A_DQSN7 DQS#6 DQ62 M_A_DQ63 R247
186 DQS#7 DQ63 194
VREF_DQ R203 R207 (+DDR_VTTREF)

1
R245
DDR3-DIMM0_H=5.2_Standard 1K/F C240 M1 Stuff X X
0.1U/16V_4

2
16 X
M3 X Stuff
Place these Caps near So-Dimm0.
+SMDDR_VREF_DIMM0
S3 Power reduce
+0.75V_DDR_VTT
+1.5V_SUS +M_VREF_DQ_DIMM0 +SMDDR_VREF_DQ0 M3 VREF
C228 C224 C227 C243 C244 C272
73
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 2.2U/6.3V_6 R256
C260 22
C225 + C290 C268 2.2U/6.3V_6 R207 *0/J_NC
330U/2V_7343 R646 *0/J_NC
PS_S3CNTRL 5,7,43
10U/6.3V_6 0.1U/16V_4
2

3
Q32 FDMS7670
C264 C226 C276 C192 C195 C266 R251 9 R647 0/J
RUN_ON# 50
10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 100K 3 8
2 7 2
1 6
1

A 5 Q34 A
+3.3V_RUN +0.75V_DDR_VTT BSS138-7-F

QUANTA
4

C259 C245 C255 C247 C237 C221 C252 1


C174
2.2U/6.3V_6
C178
0.1U/16V_4
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
RST_GATE 3,10,14
Title
COMPUTER
DDR3 DIMM-0

WWW.MANUALS.CLAN.SU
C254 1 2 0.047U 10
Size Document Number Rev
maybe can save GM6 2B

Date: Friday, June 25, 2010 Sheet 13 of 63


5 4 3 2 1
5 4 3 2 1

+1.5V_SUS
JDIM3A M_B_DQ[63:0] 4 JDIM3B
4 M_B_A[15:0]
M_B_A0 98 5 M_B_DQ0 75 44
M_B_A1 A0 DQ0 M_B_DQ1 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
M_B_A2 96 15 M_B_DQ2 81 49
M_B_A3 A2 DQ2 M_B_DQ3 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ4 87 55
M_B_A5 A4 DQ4 M_B_DQ5 +1.5V_SUS +DDR_VTTREF +SMDDR_VREF_DIMM1 VDD5 VSS20
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ6 93 61
M_B_A7 A6 DQ6 M_B_DQ7 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 89 21 M_B_DQ8 99 66
D
M_B_A9 85
A8 DQ8
23 M_B_DQ9
2.48A 100
VDD9 VSS24
71
D

M_B_A10 A9 DQ9 M_B_DQ10 R211 R206 VDD10 VSS25


107 A10/AP DQ10 33 105 VDD11 VSS26 72
M_B_A11 M_B_DQ11 1K/F *0/J_NC

PC2100 DDR3 SDRAM SO-DIMM


84 A11 DQ11 35 106 VDD12 VSS27 127
M_B_A12 83 22 M_B_DQ12 111 128
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
M_B_A14 80 34 M_B_DQ14 117 134
M_B_A15 A14 DQ14 M_B_DQ15 VDD15 VSS30
78 A15 DQ15 36 118 VDD16 VSS31 138
M_B_DQ16

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 123 VDD17 VSS32 139
109 41 M_B_DQ17 R210 124 144
4 M_B_BS#0 BA0 DQ17 VDD18 VSS33

1
108 51 M_B_DQ18 1K/F 145
4 M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ19 C199 199 150
4 M_B_BS#2 BA2 DQ19 +3.3V_RUN VDDSPD VSS35
114 40 M_B_DQ20 0.1U/16V_4 151
4 M_B_CS#0

2
S0# DQ20 M_B_DQ21 16 VSS36
4 M_B_CS#1 121 S1# DQ21 42 77 NC1 VSS37 155
101 50 M_B_DQ22 122 156
4 M_B_CLKP0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ23 125 161
4 M_B_CLKN0 CK0# DQ23 NCTEST VSS39
102 57 M_B_DQ29 162
4 M_B_CLKP1 CK1 DQ24 VSS40
104 59 M_B_DQ25 PM_EXTTS#1 198 167
4 M_B_CLKN1 CK1# DQ25 3 PM_EXTTS#1 EVENT# VSS41
73 67 M_B_DQ26 30 168
4 M_B_CKE0 CKE0 DQ26 3,13 DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ27 172
4 M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ28 173
4 M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ24 +SMDDR_VREF_DQ1 1 178
4 M_B_RAS# RAS# DQ29 +SMDDR_VREF_DQ1 VREF_DQ VSS45
113 68 M_B_DQ30 +SMDDR_VREF_DIMM1 126 179
4 M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM1 VREF_CA VSS46
R175 10K/J_4 DIMM1_SA0 197 70 M_B_DQ31 184
R176 10K/J_4 DIMM1_SA1 SA0 DQ31 M_B_DQ33 VSS47
201 SA1 DQ32 129 VSS48 185
WLAN_SMBCLK 202 131 M_B_DQ32 2 189
13,29,30,33 WLAN_SMBCLK WLAN_SMBDATA SCL DQ33 M_B_DQ34 VSS1 VSS49
200 SDA DQ34 141 3 VSS2 VSS50 190
13,29,30,33 WLAN_SMBDATA 143 M_B_DQ35 8 195

(204P)
C +3.3V_RUN DQ35 VSS3 VSS51 C
116 130 M_B_DQ36 9 196
4 M_B_ODT0 ODT0 DQ36 VSS4 VSS52
120 132 M_B_DQ37 13
4 M_B_ODT1 ODT1 DQ37 VSS5
140 M_B_DQ38 14
4 M_B_DM[7:0] DQ38 VSS6
M_B_DM0 11 142 M_B_DQ39 19
M_B_DM1 DM0 DQ39 M_B_DQ40 VSS7
28 DM1 DQ40 147 20 VSS8
M_B_DM2 46 149 M_B_DQ41 25
M_B_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_B_DQ47 26
VSS9
VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DM4 136 159 M_B_DQ43 31 204
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_B_DM6 170 148 M_B_DQ45 37 205
M_B_DM7 DM6 DQ45 M_B_DQ42 VSS13 GND
187 DM7 DQ46 158 38 VSS14 GND 206
160 M_B_DQ46 43
4 M_B_DQSP[7:0] DQ47 VSS15
M_B_DQSP0 12 163 M_B_DQ48
M_B_DQSP1 DQS0 DQ48 M_B_DQ49
29 DQS1 DQ49 165
M_B_DQSP2 47 175 M_B_DQ50 DDR3-DIMM1_H=9.2_Standard
M_B_DQSP3 DQS2 DQ50 M_B_DQ55
64 DQS3 DQ51 177
M_B_DQSP4 137 164 M_B_DQ52
M_B_DQSP5 154
DQS4 DQ52
166 M_B_DQ53 +1.5V_SUS +DDR_VTTREF M1 VREF
M_B_DQSP6 DQS5 DQ53 M_B_DQ54
171 DQS6 DQ54 174
M_B_DQSP7 188 176 M_B_DQ51 +SMDDR_VREF_DQ1
4 M_B_DQSN[7:0] DQS7 DQ55
M_B_DQSN0 10 181 M_B_DQ56
M_B_DQSN1 DQS#0 DQ56 M_B_DQ57 R174 R166
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ58 1K/F *0/J_NC
M_B_DQSN3 DQS#2 DQ58 M_B_DQ59
62 DQS#3 DQ59 193
M_B_DQSN4 135 180 M_B_DQ60
M_B_DQSN5 DQS#4 DQ60 M_B_DQ61 R178 0/J_6
152 DQS#5 DQ61 182
B M_B_DQSN6 169 192 M_B_DQ62 B
M_B_DQSN7 DQS#6 DQ62 M_B_DQ63
186 DQS#7 DQ63 194

1
R173 C175
DDR3-DIMM1_H=9.2_Standard 1K/F 0.1U/16V_4

2
16

+1.5V_SUS Place these Caps near So-Dimm1.


+SMDDR_VREF_DIMM1
C168 C170 C167 C172 C193 S3 Power reduce
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4
M3 VREF
C169 + C291 C197 C229 C198 C230
330U/2V_7343 +M_VREF_DQ_DIMM1 +SMDDR_VREF_DQ1 VREF_DQ R178 R177 R166
10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 (+DDR_VTTREF)
C265 C223 C241 C177 C176 2.2U/6.3V_6 2.2U/6.3V_6
10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 M1 Stuff X X
R177 *0/J_NC

+3.3V_RUN +0.75V_DDR_VTT M3 X Stuff X


2

R148 Q27 FDMS7670


100K 9
A C191 C201 C181 C180 C194 C183 C188 3 8 A
C173 C171 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 2 7
1

2.2U/6.3V_6 0.1U/16V_4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 1 6


5 QUANTA
COMPUTER
4

maybe can save Title


RST_GATE 3,10,13
DDR3 DIMM-1

WWW.MANUALS.CLAN.SU C156 1 2 0.047U 10 Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 14 of 63


5 4 3 2 1
5 4 3 2 1

+3.3V_RUN +1.5V_RUN
D D

L34 L33
BLM21PG600SN1D *BLM21PG600SN1D_NC
805 805

Place within 0.5" of CLKGEN


U30

40mil +3.3V_CLK_VDD 1 VDD_USB


5 VDD_LCD CPU-0 23 CLK_BUF_BCLK_P 9
17 VDD_SRC CPU-0# 22 CLK_BUF_BCLK_N 9
C533 C530 C525 C523 C532 C535 +VDDIO_CLK 24 VDD_CPU
29 20
10U/10V_8 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 15
18
VDD_REF
VDD_SRC_IO
VDD_CPU_IO
CK505 CPU-1
CPU-1# 19

9 VSS_SATA
QFN32 DOT96T_LPR 3 CLK_BUF_DREFCLKP 9
0.1uF near the every power pin. 2 4
VSS_USB DOT96C_LPR CLK_BUF_DREFCLKN 9
8 VSS_LCD
12 VSS_SRC SRC-1 13 CLK_BUF_PCIE_3GPLLP 9
21 VSS_CPU SRC-1# 14 CLK_BUF_PCIE_3GPLLN 9
26 VSS_REF
+3.3V_RUN 10
SATA CLK_BUF_DREFSSCLKP 9
SATA# 11 CLK_BUF_DREFSSCLKN 9
C C
R376 10K/J_4 16 6 CLK_VGA_27M_R R383 33
CPU_STOP# 27MHz_nonSS CLK_VGA_27M 18
CK_PWRGD_R 25 7 CLK_VGA_27M_SS_R R377 *33_NC
40 CK_PWRGD_R CK_PWRGD/PD#_3.3 27MHz_SS CLK_VGA_27M_SS 18
CLK_PCH_14M R597 33/J_4 CPU_SEL 30
9 CLK_PCH_14M REF_0/CPU_SEL
Note: Place the 33 ohm PC249
7
resistors close to the CK 505 XTAL_OUT 27 12P/50V
XTAL_IN XOUT
28 XIN
31 33
113
36,39 EC_SMBDAT2 SDATA GND
36,39 EC_SMBCLK2 32 SCLK

SLG8SP585VTR
Realtek: 0.1uFx3pcs, 22uFx1pcs
IDT: 0.1uFx2pcs, 10uFx1pcs
Y5
XTAL_IN 1 2 XTAL_OUT

14.318MHZ +3.3V_RUN +VDDIO_CLK

2
Add capacitor pads for improving WWAN. C538
C537 33P/50V_4
33P/50V_4 L32 BLM21PG600SN1D
C778 1
R359 *0/J_NC 40mil
CLK_PCH_14M 805
B
+1.05V_PCH C509 C527 C518 B

*27P/50V_NC 10U/10V_8 0.1U/16V_4 0.1U/16V_4


R351 0/J

HP: 10u x2pcs

SLG,IDT: +1.05V Place each 0.1uF cap as close as


possible to each VDD IO pin. Place
Realtek: +3.3V the 10uF caps on the VDD_IO plane.

+VDDIO_CLK:
+3.3V_RUN
SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.
Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.
2

IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.


R408
*4.7K/J_4
CPU_SEL:
SLG date sheet (V0.2) P15:
1

CPU_SEL PIN 30 CPU_0 CPU_1 High Voltage: Min 0.7V, Max 1.5V.
2

Low Voltage: Min Vss-0.3V, Max 0.35V.


A R407 0(default) 133MHz 133MHz Realtek date sheet(V1.2) P11: A
4.7K/J_4 C536
*10P/50V_4
High Voltage: Min 0.7V, Max 1.5V. QUANTA
Low Voltage: Min Vss-0.3V, Max 0.35V.
1(0.7V-1.5V) 100MHz 100MHz
COMPUTER
1

EMI Capacitor IDT date sheet(V0.7) P10:


Title
High Voltage: Min 0.7V, Max 1.5V.
Clock Generator
Low Voltage: Min Vss-0.3V, Max 0.35V.
Size Document Number Rev

WWW.MANUALS.CLAN.SU Date:
GM6

Friday, June 25, 2010 Sheet 15 of 63


2B

5 4 3 2 1
1 2 3 4 5 6 7 8

PEX_IOVDD+PEX_IOVDDQ+PEX_PLLVDD >2.2A

20
U44A
0.5A fcbga973-nvidia-n11p-es-a1
+1.05V_GFX COMMON

AK16 PEX_IOVDD_1 PEX_RX0 AP17 PEG_TXP15 3


C353 0.1u/10V/X7R AK17 AN17 PEG_TXN15 3
C359 0.1u/10V/X7R PEX_IOVDD_2 PEX_RX0*
AK21 PEX_IOVDD_3 PEX_RX1 AN19 PEG_TXP14 3
C331 1U/6.3V/X5R AK24 AP19 PEG_TXN14 3
C277 1U/6.3V/X5R PEX_IOVDD_4 PEX_RX1*
AK27 PEX_IOVDD_5 PEX_RX2 AR19 PEG_TXP13 3
A C283 4.7U/6.3V/X5R AR20 PEG_TXN13 3 A
C306 10U/6.3V/X5R PEX_RX2*
PEX_RX3 AP20 PEG_TXP12 3
C309 22U/6.3V/X5R AN20 PEG_TXN12 3
PEX_RX3*
PEX_RX4 AN22 PEG_TXP11 3
1.6A PEX_RX4* AP22 PEG_TXN11 3
+1.05V_GFX AG11 PEX_IOVDDQ_1 PEX_RX5 AR22 PEG_TXP10 3
AG12 PEX_IOVDDQ_2 PEX_RX5* AR23 PEG_TXN10 3
AG13 PEX_IOVDDQ_3 PEX_RX6 AP23 PEG_TXP9 3
C295 0.1u/10V/X7R AG15 AN23 PEG_TXN9 3
C355 0.1u/10V/X7R PEX_IOVDDQ_4 PEX_RX6*
AG16 PEX_IOVDDQ_5 PEX_RX7 AN25 PEG_TXP8 3
C358 1U/6.3V/X5R AG17 AP25 PEG_TXN8 3
C318 1U/6.3V/X5R PEX_IOVDDQ_6 PEX_RX7*
AG18 PEX_IOVDDQ_7 PEX_RX8 AR25 PEG_TXP7 3
C347 4.7U/6.3V/X5R AG22 AR26 PEG_TXN7 3
C341 10U/6.3V/X5R PEX_IOVDDQ_8 PEX_RX8*
AG23 PEX_IOVDDQ_9 PEX_RX9 AP26 PEG_TXP6 3
C281 22U/6.3V/X5R AG24 AN26 PEG_TXN6 3
PEX_IOVDDQ_10 PEX_RX9*
AG25 PEX_IOVDDQ_11 PEX_RX10 AN28 PEG_TXP5 3
CAP CLOSE TO BGA AG26 PEX_IOVDDQ_12 PEX_RX10* AP28 PEG_TXN5 3
AJ14 PEX_IOVDDQ_13 PEX_RX11 AR28 PEG_TXP4 3
AJ15 PEX_IOVDDQ_14 PEX_RX11* AR29 PEG_TXN4 3
AJ19 PEX_IOVDDQ_15 PEX_RX12 AP29 PEG_TXP3 3
AJ21 PEX_IOVDDQ_16 PEX_RX12* AN29 PEG_TXN3 3
AJ22 PEX_IOVDDQ_17 PEX_RX13 AN31 PEG_TXP2 3
AJ24 PEX_IOVDDQ_18 PEX_RX13* AP31 PEG_TXN2 3
AJ25 PEX_IOVDDQ_19 PEX_RX14 AR31 PEG_TXP1 3
AJ27 PEX_IOVDDQ_20 PEX_RX14* AR32 PEG_TXN1 3
AK18 PEX_IOVDDQ_21 PEX_RX15 AR34 PEG_TXP0 3
AK20 PEX_IOVDDQ_22 PEX_RX15* AP34 PEG_TXN0 3
AK23 PEX_IOVDDQ_23
AK26 PEX_IOVDDQ_24
B AL16 AL17 PEG_RXP15_C C332 0.1u/10V/X7R PEG_RXP15 3 B
PEX_IOVDDQ_25 PEX_TX0 PEG_RXN15_C C324 0.1u/10V/X7R
+3.3V_GFX PEX_TX0* AM17 PEG_RXN15 3
PEG_RXP14_C C292 0.1u/10V/X7R R497 *0_NC
C269 4.7U/6.3V/X5R PCI EXPRESS PEX_TX1 AM18
AM19 PEG_RXN14_C C300 0.1u/10V/X7R
PEG_RXP14 3
PEG_RXN14 3
C289 1U/6.3V/X5R PEX_TX1* PEG_RXP13_C C302 0.1u/10V/X7R
J10 VDD33_1 PEX_TX2 AL19 PEG_RXP13 3
C273 0.1u/10V/X7R J11 AK19 PEG_RXN13_C C311 0.1u/10V/X7R PEG_RXN13 3
C278 0.1u/10V/X7R VDD33_2 PEX_TX2* PEG_RXP12_C C312 0.1u/10V/X7R
J12 VDD33_3 PEX_TX3 AL20 PEG_RXP12 3
C280 0.1u/10V/X7R J13 AM20 PEG_RXN12_C C323 0.1u/10V/X7R PEG_RXN12 3
+VCC_GFX_CORE VDD33_4 PEX_TX3* PEG_RXP11_C C327 0.1u/10V/X7R
J9 VDD33_5 PEX_TX4 AM21 PEG_RXP11 3
AM22 PEG_RXN11_C C334 0.1u/10V/X7R PEG_RXN11 3
PEX_TX4* PEG_RXP10_C C346 0.1u/10V/X7R +3.3V_GFX
AD20 VDD_SENSE PEX_TX5 AL22 PEG_RXP10 3
D35 AK22 PEG_RXN10_C C356 0.1u/10V/X7R PEG_RXN10 3
NC_9/ VDD_SENSE PEX_TX5* PEG_RXP9_C C354 0.1u/10V/X7R
P7 NC_16/ VDD_SENSE PEX_TX6 AL23 PEG_RXP9 3
AM23 PEG_RXN9_C C345 0.1u/10V/X7R PEG_RXN9 3 C646 0.1u
PEX_TX6* PEG_RXP8_C C340 0.1u/10V/X7R
12~16 mils width for 110mA 24 PEX_TX7 AM24
PEG_RXN8_C C344 0.1u/10V/X7R
PEG_RXP8 3
+1.05V_GFX AD19 GND_SENSE PEX_TX7* AM25 PEG_RXN8 3

5
E35 AL25 PEG_RXP7_C C357 0.1u/10V/X7R PEG_RXP7 3 1
NC_10/ GND_SENSE PEX_TX8 PLTRST# 3,9,26,27,29,30,31,39
C287 1U/6.3V/X5R L30 R7 AK25 PEG_RXN7_C C364 0.1u/10V/X7R PEG_RXN7 3 GPU_RST# 4
C288 1U/6.3V/X5R BLM18AG121SN1D NC_17/ GND_SENSE PEX_TX8* PEG_RXP6_C C366 0.1u/10V/X7R
PEX_TX9 AL26 PEG_RXP6 3 2 dGPU_HOLD_RST# 10
AM26 PEG_RXN6_C C374 0.1u/10V/X7R PEG_RXN6 3

3
C298 0.1u/10V/X7R PEX_TX9* PEG_RXP5_C C376 0.1u/10V/X7R U42
PEX_TX10 AM27 PEG_RXP5 3

1
C286 1U/6.3V/X5R +PEX_PLLVDD AG14 AM28 PEG_RXN5_C C377 0.1u/10V/X7R PEG_RXN5 3 TC7SH08FU
C310 4.7U/6.3V/X5R PEX_PLLVDD PEX_TX10* PEG_RXP4_C C378 0.1u/10V/X7R R494
PEX_TX11 AL28 PEG_RXP4 3
AK28 PEG_RXN4_C C379 0.1u/10V/X7R PEG_RXN4 3 100K
PEX_TX11* PEG_RXP3_C C380 0.1u/10V/X7R
PEX_TX12 AK29 PEG_RXP3 3
AL29 PEG_RXN3_C C381 0.1u/10V/X7R PEG_RXN3 3

2
PEX_TX12* PEG_RXP2_C C382 0.1u/10V/X7R
12~16 mils width PEX_TX13 AM29
PEG_RXN2_C C383 0.1u/10V/X7R
PEG_RXP2 3
PEX_TX13* AM30 PEG_RXN2 3
+3.3V_GFX L27 0 +PEX_SVDD_3V3 AG19 AM31 PEG_RXP1_C C384 0.1u/10V/X7R PEG_RXP1 3
PEX_CAL_PD_VDDQ/ PEX_SVDD_3V3 PEX_TX14 PEG_RXN1_C C386 0.1u/10V/X7R
C F7 NC_12/ PEX_SVDD_3V3 PEX_TX14* AM32 PEG_RXN1 3 C
C239 1U/6.3V/X5R AN32 PEG_RXP0_C C389 0.1u/10V/X7R PEG_RXP0 3
C246 0.1u/10V/X7R PEX_TX15 PEG_RXN0_C C385 0.1u/10V/X7R
PEX_TX15* AP32 PEG_RXN0 3
C219 4.7U/6.3V/X5R

AG20 PEX_CAL_PU_GND/ NC PEX_REFCLK AR16 CLK_PCIE_VGAP 9


A2 NC_1 PEX_REFCLK* AR17 CLK_PCIE_VGAN 9
AB7 R499 1 2 100K
NC_2
AD6 NC_3
AF6 AJ17 PEX_TSTCLK R275 *200_NC
NC_4 PEX_TSTCLK_OUT PEX_TSTCLK#
AG6 NC_5 PEX_TSTCLK_OUT* AJ18
AJ5 NC_6
AK15 NC_7
AL7 AM16 VGA_RST# R500 0 GPU_RST#
NC_8 PEX_RST*
E7 NC_11
H32 AR13 PEX_CLKREQ# R501 10K +3.3V_GFX
NC_13 PEX_CLKREQ*
M7 NC_14
P6 AG21 PEX_TERMP R287 2.49K/F
NC_15 PEX_TERMP
U7 NC_18
V6 AP35 TESTMODE R518 10K
NC_19 TESTMODE
R517 *10K/F_NC
+3.3V_GFX

+3.3V_GFX
R512 10K +3.3V_SUS

PEG_CLKREQ# 9
R511

3
D 10K D

2 Q71
DTC144EUA
QUANTA
3

PEX_CLKREQ# 2 Q70
DTC144EUA
Title
COMPUTER
VGA-N11P GE/GE(PCIe)
1

Size Document Number Rev


GM6 2B

1
WWW.MANUALS.CLAN.SU 2 3 4 5 6
Date: Friday, June 25, 2010
7
Sheet 16
8
of 63
1 2 3 4 5 6 7 8

21 VMA_DQ[63..0]

U44B 21 VMA_DM[7..0] U44C

fcbga973-nvidia-n11p-es-a1 fcbga973-nvidia-n11p-es-a1
COMMON 21 VMA_WDQS[7..0] COMMON

21 VMA_CMD0 V32 21 VMA_RDQS[7..0] 22 VMC_CMD0 C17 B13 VMC_DQ0


FBA_CMD0 VMA_DQ0 FBC_CMD0 FBC_D00 VMC_DQ1
21 VMA_CMD1 W 31 FBA_CMD1 FBA_D00 L32 22 VMC_CMD1 B19 FBC_CMD1 FBC_D01 D13
U31 N33 VMA_DQ1 D18 A13 VMC_DQ2
21 VMA_CMD2 FBA_CMD2 FBA_D01 22 VMC_DQ[63..0] 22 VMC_CMD2 FBC_CMD2 FBC_D02
21 VMA_CMD3 Y32 L33 VMA_DQ2 22 VMC_CMD3 F21 A14 VMC_DQ3
FBA_CMD3 FBA_D02 VMA_DQ3 FBC_CMD3 FBC_D03 VMC_DQ4
21 VMA_CMD4 AB35 FBA_CMD4 FBA_D03 N34 22 VMC_DM[7..0] 22 VMC_CMD4 A23 FBC_CMD4 FBC_D04 C16
21 VMA_CMD5 AB34 N35 VMA_DQ4 22 VMC_CMD5 D21 B16 VMC_DQ5
FBA_CMD5 FBA_D04 VMA_DQ5 FBC_CMD5 FBC_D05 VMC_DQ6
21 VMA_CMD6 W 35 FBA_CMD6 FBA_D05 P35 22 VMC_WDQS[7..0] 22 VMC_CMD6 B23 FBC_CMD6 FBC_D06 A17
W 33 P33 VMA_DQ6 E20 D16 VMC_DQ7
A 21 VMA_CMD7 FBA_CMD7 FBA_D06 22 VMC_CMD7 FBC_CMD7 FBC_D07 A
21 VMA_CMD8 W 30 P34 VMA_DQ7 22 VMC_RDQS[7..0] 22 VMC_CMD8 G21 C13 VMC_DQ8
FBA_CMD8 FBA_D07 VMA_DQ8 FBC_CMD8 FBC_D08 VMC_DQ9
21 VMA_CMD9 T34 FBA_CMD9 FBA_D08 K35 22 VMC_CMD9 F20 FBC_CMD9 FBC_D09 B11
T35 K33 VMA_DQ9 F19 C11 VMC_DQ10
21 VMA_CMD10 FBA_CMD10 FBA_D09 22 VMC_CMD10 FBC_CMD10 FBC_D10
AB31 K34 VMA_DQ10 F23 A11 VMC_DQ11
21 VMA_CMD11 FBA_CMD11 FBA_D10 22 VMC_CMD11 FBC_CMD11 FBC_D11
21 VMA_CMD12 Y30 H33 VMA_DQ11 22 VMC_CMD12 A22 C10 VMC_DQ12
FBA_CMD12 FBA_D11 VMA_DQ12 FBC_CMD12 FBC_D12 VMC_DQ13
21 VMA_CMD13 Y34 FBA_CMD13 FBA_D12 G34 22 VMC_CMD13 C22 FBC_CMD13 FBC_D13 C8
W 32 G33 VMA_DQ13 B17 B8 VMC_DQ14
21 VMA_CMD14 FBA_CMD14 FBA_D13 22 VMC_CMD14 FBC_CMD14 FBC_D14
T10 VMA_CMD15 AA30 E34 VMA_DQ14 T8 VMC_CMD15 F24 A8 VMC_DQ15
FBA_CMD15 FBA_D14 VMA_DQ15 FBC_CMD15 FBC_D15 VMC_DQ16
21 VMA_CMD16 AA32 FBA_CMD16 FBA_D15 E33 22 VMC_CMD16 C25 FBC_CMD16 FBC_D16 E8
Y33 G31 VMA_DQ16 E22 F8 VMC_DQ17
21 VMA_CMD17 FBA_CMD17 FBA_D16 22 VMC_CMD17 FBC_CMD17 FBC_D17
21 VMA_CMD18 U32 F30 VMA_DQ17 22 VMC_CMD18 C20 F10 VMC_DQ18
FBA_CMD18 FBA_D17 VMA_DQ18 FBC_CMD18 FBC_D18 VMC_DQ19
21 VMA_CMD19 Y31 FBA_CMD19 FBA_D18 G30 22 VMC_CMD19 B22 FBC_CMD19 FBC_D19 F9
21 VMA_CMD20 U34 G32 VMA_DQ19 22 VMC_CMD20 A19 F12 VMC_DQ20
FBA_CMD20 FBA_D19 VMA_DQ20 FBC_CMD20 FBC_D20 VMC_DQ21
21 VMA_CMD21 Y35 FBA_CMD21 FBA_D20 K30 22 VMC_CMD21 D22 FBC_CMD21 FBC_D21 D8
21 VMA_CMD22 W 34 K32 VMA_DQ21 22 VMC_CMD22 D20 D11 VMC_DQ22
VMA_CMD23 V30 FBA_CMD22 FBA_D21 VMA_DQ22 VMC_CMD23 E19 FBC_CMD22 FBC_D22 VMC_DQ23
T9 FBA_CMD23 FBA_D22 H30 T6 FBC_CMD23 FBC_D23 E11
21 VMA_CMD24 U35 K31 VMA_DQ23 22 VMC_CMD24 D19 D12 VMC_DQ24
FBA_CMD24 FBA_D23 VMA_DQ24 FBC_CMD24 FBC_D24 VMC_DQ25
21 VMA_CMD25 U30 FBA_CMD25 FBA_D24 L31 22 VMC_CMD25 F18 FBC_CMD25 FBC_D25 E13
U33 L30 VMA_DQ25 C19 F13 VMC_DQ26
21 VMA_CMD26 FBA_CMD26 FBA_D25 22 VMC_CMD26 FBC_CMD26 FBC_D26
21 VMA_CMD27 AB30 M32 VMA_DQ26 22 VMC_CMD27 F22 F14 VMC_DQ27
FBA_CMD27 FBA_D26 VMA_DQ27 FBC_CMD27 FBC_D27 VMC_DQ28
21 VMA_CMD28 AB33 FBA_CMD28 FBA_D27 N30 22 VMC_CMD28 C23 FBC_CMD28 FBC_D28 F15
T33 M30 VMA_DQ28 B20 E16 VMC_DQ29
21 VMA_CMD29 FBA_CMD29 FBA_D28 22 VMC_CMD29 FBC_CMD29 FBC_D29
21 VMA_CMD30 W 29 P31 VMA_DQ29 22 VMC_CMD30 A20 F16 VMC_DQ30
FBA_CMD30 FBA_D29 VMA_DQ30 FBC_CMD30 FBC_D30 VMC_DQ31
FBA_D30 R32 FBC_D31 F17
VMA_DM0 P32 R30 VMA_DQ31 VMC_DM0 A16 D29 VMC_DQ32
VMA_DM1 FBA_DQM0 FBA_D31 VMA_DQ32 VMC_DM1 FBC_DQM0 FBC_D32 VMC_DQ33
H34 FBA_DQM1 FBA_D32 AG30 D10 FBC_DQM1 FBC_D33 F27
VMA_DM2 J30 AG32 VMA_DQ33 VMC_DM2 F11 F28 VMC_DQ34
VMA_DM3 FBA_DQM2 FBA_D33 VMA_DQ34 VMA_CMD25 R319 10K/F VMC_DM3 FBC_DQM2 FBC_D34 VMC_DQ35
P30 FBA_DQM3 FBA_D34 AH31 D15 FBC_DQM3 FBC_D35 E28
VMA_DM4 AF32 AF31 VMA_DQ35 VMC_DM4 D27 D26 VMC_DQ36
VMA_DM5 FBA_DQM4 FBA_D35 VMA_DQ36 VMA_CMD16 R536 10K/F VMC_DM5 FBC_DQM4 FBC_D36 VMC_DQ37
B AL32 FBA_DQM5 FBA_D36 AF30 D34 FBC_DQM5 FBC_D37 F25 B
VMA_DM6 AL34 AE30 VMA_DQ37 VMC_DM6 A34 D24 VMC_DQ38
VMA_DM7 FBA_DQM6 FBA_D37 VMA_DQ38 VMA_CMD0 R541 10K/F VMC_DM7 FBC_DQM6 FBC_D38 VMC_DQ39
AF35 FBA_DQM7 FBA_D38 AC32 D28 FBC_DQM7 FBC_D39 E25
AD30 VMA_DQ39 E32 VMC_DQ40
VMA_WDQS0 FBA_D39 VMA_DQ40 VMA_CMD27 R322 10K/F VMC_WDQS0 FBC_D40 VMC_DQ41
L34 FBA_DQS_W P0 FBA_D40 AN33 C14 FBC_DQS_W P0 FBC_D41 F32
VMA_WDQS1 H35 AL31 VMA_DQ41 VMC_WDQS1 A10 D33 VMC_DQ42
VMA_WDQS2 FBA_DQS_W P1 FBA_D41 VMA_DQ42 VMA_CMD28 R538 10K/F VMC_WDQS2 FBC_DQS_W P1 FBC_D42 VMC_DQ43
J32 FBA_DQS_W P2 FBA_D42 AM33 E10 FBC_DQS_W P2 FBC_D43 E31
VMA_WDQS3 N31 AL33 VMA_DQ43 VMC_WDQS3 D14 C33 VMC_DQ44
VMA_WDQS4 FBA_DQS_W P3 FBA_D43 VMA_DQ44 VMC_WDQS4 FBC_DQS_W P3 FBC_D44 VMC_DQ45
AE31 FBA_DQS_W P4 FBA_D44 AK30 E26 FBC_DQS_W P4 FBC_D45 F29
VMA_WDQS5 AJ32 AK32 VMA_DQ45 VMC_CMD25 R253 10K/F VMC_WDQS5 D32 D30 VMC_DQ46
VMA_WDQS6 FBA_DQS_W P5 FBA_D45 VMA_DQ46 VMC_WDQS6 FBC_DQS_W P5 FBC_D46 VMC_DQ47
AJ34 FBA_DQS_W P6 FBA_D46 AJ30 A32 FBC_DQS_W P6 FBC_D47 E29
VMA_WDQS7 AC33 AH30 VMA_DQ47 VMC_CMD16 R297 10K/F VMC_WDQS7 B26 B29 VMC_DQ48
FBA_DQS_W P7 FBA_D47 VMA_DQ48 FBC_DQS_W P7 FBC_D48 VMC_DQ49
FBA_D48 AH33 FBC_D49 C31
VMA_RDQS0 L35 AH35 VMA_DQ49 VMC_CMD0 R496 10K/F VMC_RDQS0 B14 C29 VMC_DQ50
VMA_RDQS1 FBA_DQS_RN0 FBA_D49 VMA_DQ50 VMC_RDQS1 FBC_DQS_RN0 FBC_D50 VMC_DQ51
G35 FBA_DQS_RN1 FBA_D50 AH34 B10 FBC_DQS_RN1 FBC_D51 B31
VMA_RDQS2 H31 AH32 VMA_DQ51 VMC_CMD27 R296 10K/F VMC_RDQS2 D9 C32 VMC_DQ52
VMA_RDQS3 FBA_DQS_RN2 FBA_D51 VMA_DQ52 VMC_RDQS3 FBC_DQS_RN2 FBC_D52 VMC_DQ53
N32 FBA_DQS_RN3 FBA_D52 AJ33 E14 FBC_DQS_RN3 FBC_D53 B32
VMA_RDQS4 AD32 AL35 VMA_DQ53 VMC_CMD28 R271 10K/F VMC_RDQS4 F26 B35 VMC_DQ54
VMA_RDQS5 FBA_DQS_RN4 FBA_D53 VMA_DQ54 VMC_RDQS5 FBC_DQS_RN4 FBC_D54 VMC_DQ55
AJ31 FBA_DQS_RN5 FBA_D54 AM34 D31 FBC_DQS_RN5 FBC_D55 B34
VMA_RDQS6 AJ35 AM35 VMA_DQ55 VMC_RDQS6 A31 A29 VMC_DQ56
VMA_RDQS7 FBA_DQS_RN6 FBA_D55 VMA_DQ56 VMC_RDQS7 FBC_DQS_RN6 FBC_D56 VMC_DQ57
AC34 FBA_DQS_RN7 FBA_D56 AF33 A26 FBC_DQS_RN7 FBC_D57 B28
AE32 VMA_DQ57 A28 VMC_DQ58
FBA_D57 VMA_DQ58 FBC_D58 VMC_DQ59
P29 FBA_W CK0 FBA_D58 AF34 G14 FBC_W CK0 FBC_D59 C28
R29 AE35 VMA_DQ59 G15 C26 VMC_DQ60
FBA_W CK0_N FBA_D59 VMA_DQ60 FBC_W CK0_N FBC_D60 VMC_DQ61
L29 FBA_W CK1 FBA_D60 AE34 G11 FBC_W CK1 FBC_D61 D25
M29 AE33 VMA_DQ61 G12 B25 VMC_DQ62
FBA_W CK1_N FBA_D61 VMA_DQ62 FBC_W CK1_N FBC_D62 VMC_DQ63
AG29 FBA_W CK2 FBA_D62 AB32 G27 FBC_W CK2 FBC_D63 A25
AH29 AC35 VMA_DQ63 G28
FBA_W CK2_N FBA_D63 FBC_W CK2_N
AD29 FBA_W CK3 G24 FBC_W CK3
+1.5V_GFX AE29 T32 +1.5V_GFX G25 E17
C FBA_W CK3_N FBA_CLK0 VMA_CLKP0 21 FBC_W CK3_N FBC_CLK0 VMC_CLKP0 22 C
FBA_CLK0* T31 VMA_CLKN0 21 FBC_CLK0* D17 VMC_CLKN0 22
FBA_CLK1 AC31 VMA_CLKP1 21 FBC_CLK1 D23 VMC_CLKP1 22
AA27 FBVDDQ_1 FBA_CLK1* AC30 VMA_CLKN1 21 N27 FBVDDQ_28 FBC_CLK1* E23 VMC_CLKN1 22
AA29 FBVDDQ_2 P27 FBVDDQ_29
AA31 FBVDDQ_3 R27 FBVDDQ_30
AB27 FBVDDQ_4 T27 FBVDDQ_31
AB29 J27 +FB_VREF1 U27
FBVDDQ_5 FB_VREF T7 FBVDDQ_32
AC27
AD27
FBVDDQ_6
15mils width
U29
V27
FBVDDQ_33 MEMORY I/F C
FBVDDQ_7 FBVDDQ_34
AE27 FBVDDQ_8 V29 FBVDDQ_35
AJ28 FBVDDQ_9 V34 FBVDDQ_36
B18 W 27 K27 FB_CAL_PD_VDDQ R289 40.2/F
FBVDDQ_10 FBVDDQ_37 FB_CAL_PD_VDDQ +1.5V_GFX
E21 FBVDDQ_11 Y27 FBVDDQ_38
G17 FBVDDQ_12
G18 L27 FB_CAL_PU_GND R290 40.2/F
FBVDDQ_13 FB_CAL_PU_GND
G22 FBVDDQ_14 103
G8
G9
FBVDDQ_15 MEMORY I/F A M27 FB_CAL_TERM_GND R291 60.4/F
FBVDDQ_16 FB_CAL_TERM_GND
H29 FBVDDQ_17 POP For Debug only
J14 FBVDDQ_18 FBA_DEBUG R292 *10K/F_NC FBC_DEBUG R279 *10K/F_NC
J15
J16
FBVDDQ_19 FBA_DEBUG T30 +1.5V_GFX 8 FBC_DEBUG G19 +1.5V_GFX
FBVDDQ_20 +1.5V_GFX
J17
J20
FBVDDQ_21 103
FBVDDQ_22 +FB_PLLAVDD L44 BLM18PG300SN1 +FB_PLLAVDD1 L53 BLM18PG300SN1
J21 FBVDDQ_23 FB_DLLAVDD0 AG27 +1.05V_GFX NC/ FB_DLLAVDD1 J19 +1.05V_GFX
J22 C296 0.1u/10V/X7R
FBVDDQ_24 C671 1
J23 FBVDDQ_25 FB_PLLAVDD0 AF27 2 10U/6.3V/X5R 15mils width C368 0.1u/10V/X7R
NC/ FB_PLLAVDD1 J18 C799 4.7U/6.3/X5R 25 15mils width
J24 C373 1U/6.3V/X5R C360 0.1u/10V/X7R C797 1U/6.3V/X5R
FBVDDQ_26 C661 0.1u/10V/X7R C361 1U/6.3V/X5R C798 0.1u/10V/X7R
J29 FBVDDQ_27
D C367 0.1u/10V/X7R D
C304 1U/6.3V/X5R
C370 0.1u/10V/X7R
24 C363 0.1u/10V/X7R
NOTE:
103 C369
C371
0.1u/10V/X7R
0.1u/10V/X7R for N11P-GE/GT require, please change
QUANTA
C342
C365
4.7U/6.3V/X5R
4.7U/6.3V/X5R
1. C296, C368, C360, C361 to 0.1U
2. C363, C369, C371 to 0.1U Title
COMPUTER
3. C365 is NC VGA-N11P GE/GT(MEM IF)

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 17 of 63


1 2 3 4 5 6 7 8

WWW.MANUALS.CLAN.SU
1 2 3 4 5 6 7 8

9
24 fcbga973-nvidia-n11p-es-a1

U44D COMMON
220 mA BLM18AG121SN1D
+1.05V_GFX L28 +IFPAB_PLLVDD AK9 AM11
IFPAB_PLLVDD IFPA_TXC EXT_LCD_ACLKP 23
IFPA_TXC* AM12 EXT_LCD_ACLKN 23
C257 1U/6.3V/X5R IFPAB(LVDS) IFPA_TXD0 AM8
AL8
EXT_LCD_A0P 23 27
IFPA_TXD0* EXT_LCD_A0N 23
C258 4.7U/6.3V/X5R
101 C455 0.1u/10V/X7R IFPA_TXD1 AM10
AM9
EXT_LCD_A1P 23
IFPA_TXD1* EXT_LCD_A1N 23 +3.3V_SUS
IFPA_TXD2 AK10 EXT_LCD_A2P 23
IFPA_TXD2* AL10 EXT_LCD_A2N 23
R267 *1K/F_NC IFPAB_RSET AJ11 AK11
A IFPAB_RSET IFPA_TXD3
AL11
GPU all PWROK A

BLM18PG181SN1 IFPA_TXD3*
200 mA L24 +IFPAB_IOVDD
AG9 IFPA_IOVDD IFPB_TXC AP13 EXT_LCD_BCLKP 23
R502
+1.8V_GFX AG10 IFPB_IOVDD IFPB_TXC* AN13 EXT_LCD_BCLKN 23 dGPU_PWROK 10,40
AN8 10K
IFPB_TXD4 EXT_LCD_B0P 23

3
C271 0.1u/10V/X7R AP8
IFPB_TXD4* EXT_LCD_B0N 23
C270 0.1u/10V/X7R AP10
IFPB_TXD5 EXT_LCD_B1P 23
C186 1U/6.3V/X5R
C182 4.7U/6.3V/X5R IFPB_TXD5* AN10
AR11
EXT_LCD_B1N 23
2 Q68
62
IFPB_TXD6 EXT_LCD_B2P 23
AR10 2N7002D
IFPB_TXD6* EXT_LCD_B2N 23
IFPB_TXD7 AN11

3
IFPB_TXD7* AP11
220 mA BLM18AG331SN1D

1
+3.3V_GFX L26 +IFPCD_PLLVDD AJ9 AN3 EXT_HDMI_SDA EXT_HDMI_SDA 24 +1.8V_GFX 2
IFPCD_PLLVDD/ I2CW _SDA/ IFPC_AUX_N EXT_HDMI_SCL
IFPC_PLLVDD I2CW _SCL/ IFPC_AUX AP2 EXT_HDMI_SCL 24
C238 0.1u/10V/X7R AC6 AR2 EXT_HDMI_TXCN_C C253 0.1U/10V/X7R
DACB_VDD/ IFPC_L3_N EXT_HDMI_TXCN 24
C242 1U/6.3V/X5R AP1 EXT_HDMI_TXCP_C C251 0.1U/10V/X7R Q69
EXT_HDMI_TXCP 24

1
C231 0.1u/10V/X7R IFPD_PLLVDD IFPC_L3 EXT_HDMI_TXN0_C C185 0.1U/10V/X7R PDTC143TT
IFPC_L2_N AM4 EXT_HDMI_TXN0 24
C232 0.1u/10V/X7R IFPC AM3 EXT_HDMI_TXP0_C C184 0.1U/10V/X7R
IFPC_L2 EXT_HDMI_TXP0 24
C200 4.7U/6.3V/X5R AM5 EXT_HDMI_TXN1_C C190 0.1U/10V/X7R
IFPC_L1_N EXT_HDMI_TXN1 24
AL5 EXT_HDMI_TXP1_C C189 0.1U/10V/X7R
IFPC_L1 EXT_HDMI_TXP1 24
AM6 EXT_HDMI_TXN2_C C204 0.1U/10V/X7R
IFPC_L0_N EXT_HDMI_TXN2 24
AM7 EXT_HDMI_TXP2_C C203 0.1U/10V/X7R
IFPC_L0 EXT_HDMI_TXP2 24
R492 1K/F IFPC_RSET AK7 AN4
R234 1K/F IFPD_RSET IFPCD_RSET/ IFPC_RSET I2CX_SDA/ IFPD_AUX_N
AB6 DACB_RSET/ IFPD_RSET I2CX_SCL/ IFPD_AUX AP4
IFPD_L3_N AR4
IFPCD IFPD_L3 AR5
AP5
BLM18AG221SN1 IFPD_L2_N
285 mA L29 +IFPCD_IOVDD
AJ8 IFPC_IOVDD IFPD IFPD_L2 AN5 TMDS channel two
B +1.05V_GFX AK8 IFPD_IOVDD IFPD_L1_N AN7 B
IFPD_L1 AP7
C261 0.1u/10V/X7R AR7
C262 0.1u/10V/X7R IFPD_L0_N
IFPD_L0 AR8
C263 1U/6.3V/X5R
C279 4.7U/6.3V/X5R AE4
I2CY_SCL/ IFPE_AUX EXT_DP_AUXDP 25
I2CY_SDA/ IFPE_AUX* AD4 EXT_DP_AUXDN 25
IFPE_L0 AH6 EXT_DPTXP0 25
R491 1K/F IFPEF_RSET AL1 AH5
IFPEF_RSET IFPE_L0* EXT_DPTXN0 25
IFPE_L1 AH4 EXT_DPTXP1 25

220 mA BLM18AG331SN1D IFPEF IFPE_L1* AG4


AF4
EXT_DPTXN1 25
EXT_DPTXP2 25
L41 +IFPEF_PLLVDD IFPE_L2
+3.3V_GFX AJ6 IFPEF_PLLVDD IFPE_L2* AF5 EXT_DPTXN2 25
AE7 IFPE_IOVDD IFPE_L3 AE6 EXT_DPTXP3 25
C222 0.1u/10V/X7R AD7 AE5
IFPF_IOVDD IFPE_L3* EXT_DPTXN3 25
C637 1U/6.3V/X5R AF3
C236 0.1u/10V/X7R I2CZ_SCL/ IFPF_AUX
I2CZ_SDA/ IFPF_AUX* AF2
C205 0.1u/10V/X7R AL2
C636 4.7U/6.3V/X5R IFPF_L0
IFPF_L0* AL3
285 mA BLM18AG221SN1 AJ3
L42 +IFPEF_IOVDD IFPF_L1
+1.05V_GFX IFPF_L1* AJ2
IFPF_L2 AJ1
C642 0.1u/10V/X7R AH1
C644 0.1u/10V/X7R IFPF_L2*
IFPF_L3 AH2
C641 1U/6.3V/X5R AH3
C640 4.7U/6.3V/X5R IFPF_L3*
R269 10K AJ12 AM15
DACA_VDD DACA_RED
DACA(CRT) AM14
DACA_GREEN
C C
DACA_BLUE AL14
R214 *0_NC
+3.3V_GFX 1 2 DACA_HSYNC AM13
AL13 +3.3V_GFX
DACA_VSYNC EXT_DP_AUXDP R232
AK12 DACA_VREF 2 1 100K_DIS
EV_CRTDCLK
11 AK13 DACA_RSET I2CA_SCL G1
G4 EV_CRTDDAT EXT_DP_AUXDN R233 2 1 100K_DIS
I2CA_SDA R237 4.7K EV_CRTDCLK
R225 10K +DACB_VDD AG7 AK4 XTAL_SSIN R249 10K
DACC_VDD/ /DACC_RED R239 4.7K EV_CRTDDAT
AK6
DACB_VDD DACC(CRT2) DACB_RED
AL4 BXTALOUT R184 10K
DACC_VREF/ /DACC_GREEN
DACB_VREF DACB_GREEN XTALI_27M R202 *10K/F_NC
AH7 DACC_RSET/ /DACC_BLUE AJ4
R490 2.2K EXT_HDMI_SDA
DACB_RSET DACB_BLUE +3.3V_GFX
DACB_HSYNC/ DACC_HSYNC AM1
AM2 R488 2.2K EXT_HDMI_SCL
DACB_VSYNC/ DACC_VSYNC
G3 I2CB_SCL R236 2.2K
I2CB_SCL I2CB_SDA R215 2.2K
I2CB_SDA G2
24 AA4
NC/ DACB_RED
103 AC5
DACB(TV) NC/ DACB_GREEN AB4
Y4
DACB_VREF/ NC NC/ DACB_BLUE DACB_CSYNC R205 10K
CEC/ DACB_CSYNC AB5
60mA L25 BLM18PG300SN1 +NV_PLLVDD AE9 D2 XTAL_SSIN R235 *22_NC
+1.05V_GFX PLLVDD XTAL_SSIN CLK_VGA_27M_SS 15
D1 BXTALOUT
C274 0.1u/10V/X7R XTAL_OUTBUFF
AD9 VID_PLLVDD
D C206 0.1u/10V/X7R B1 XTALI_27M R227 0 CLK_VGA_27M 15 D
C275 0.1u/10V/X7R XTAL_IN
XTAL_PLL B2 XTALO_27M 2 1
C196 1 XTAL_OUT
2 10U/6.3V/X5R
C234 Y4
*27MHZ_NC
C233 QUANTA
45mA
+1.05V_GFX L43 BLM18PG300SN1

C459
+NV_SPPLLVDD

0.1u/10V/X7R
AF9 SP_PLLVDD
*18P/50V_NC *18P/50V_NC

Title
COMPUTER
C648 1U/6.3V/X5R VGA-N11P GE/GT(Display)

C647 1 2 10U/6.3V/X5R Size Document Number Rev


GM6 2B

1
WWW.MANUALS.CLAN.SU 2 3 4 5 6
Date: Friday, June 25, 2010
7
Sheet 18
8
of 63
1 2 3 4 5 6 7 8

Logical Logical Logical Logical


Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
120mA U44E
fcbga973-nvidia-n11p-es-a1
COMMON
XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE
ROM_SO NB10X 0001
+3.3V_GFX R258 *0_NC P9 N1
MIOA_VDDQ_1 MIOA_D0
R9 MIOA_VDDQ_2 MIOA MIOA_D1 P4 ROM_SCLK PCI_DEVIDE[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM X010
T9 MIOA_VDDQ_3 MIOA_D2 P1
U9 MIOA_VDDQ_4 MIOA_D3 P2 ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] XXXX
10 R263 P3
MIOA_D4
MIOA_D5 T3 STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] XXXX
10K T2
MIOA_D6
MIOA_D7 T1 STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 1110
U4
MIOA_D8
U5
MIOA_CAL_PD_VDDQ MIOA_D9
U1 STRAP0 USER[3] USER[2] USER[1] USER[0] 1111
U2
A MIOA_D10 A
U3
MIOA_D11
T5
MIOA_CAL_PU_GND MIOA_D12
R6 39 VRAM Configuration Table
T6
MIOA_D13
MIOX_VDDQ should pop MIOA_D14
N6 RAMCFG
3.3V for N11P-GE1,but [3:0] DESCRIPTION Quanta PN(Q buy) Quanta PN(W buy) Vendor PN
N5 P5
MIOA_VREF MIOA_CTL3
pull down 10k for N11P-GT MIOA_HSYNC
N3 0x3(0011) 800MHz 512MB(64M*16) Samsung AKD5LGGT502 AKD5LGGT505 K4W1G1646E-HC12
MIOA_VSYNC
L3 0x2(0010) 800MHz 512MB(64M*16) Hynix AKD5LZGTW00 AKD5LZGTW03 H5TQ1G63BFR-12C
MIOA_DE
N2 0x6(0110) 800MHz 1GB(128M*16) Hynix AKD5MGGTW00 AKD5MGGTW01 H5TQ2G63BFR-12C
0x7(0111) 800MHz 1GB(128M*16) Samsung AKD5MGGT505 K4W2G1646C-HC12
R4
MIOA_CLKOUT
MIOA_CLKOUT* T4
MIOA_CLKIN
120mA MIOA_CLKIN N4
R242 10K
+3.3V_GFX R259 *0_NC AA9 Y1
MIOB_VDDQ_1 MIOB_D0
AB9 MIOB_VDDQ_2 MIOB MIOB_D1 Y2
+3.3V_GFX +3.3V_GFX
W9 MIOB_VDDQ_3 MIOB_D2 Y3 ROM_SI Strap Bit for RAM Mapping
R264
Y9 MIOB_VDDQ_4 MIOB_D3 AB3 80
MIOB_D4 AB2 PU PD
10 10K MIOB_D5 AB1 2
MIOB_D6 AC4 5K 1000 0000
MIOB_D7 AC1 80 107
MIOB_D8 AC2 10K 1001 0001
AA7 MIOB_CAL_PD_VDDQ MIOB_D9 AC3
AE3 15K 1010 0010 R185 R193 R228 R231 R224 R223
MIOB_D10 *20K/F_NC *4.99K/F_NC 15K/F 45.3K/F *35.7K/F_NC *35.7K/F_NC
MIOB_D11 AE2
AA6 U6 ROM_SI STRAP0
MIOB_CAL_PU_GND MIOB_D12 20K 1011 0011 ROM_SO STRAP1
MIOB_D13 W6
ROM_SCLK STRAP2
MIOB_D14 Y6
STRAP0
25K 1100 0100
STRAP0 W5
STRAP1
AF1 MIOB_VREF STRAP1 W7
STRAP2
30K 1101 0101
STRAP2 V7
B R186 R192 R248 R250 R244 R243 B
35K 1110 0110 15K/F 10K/F *15K/F_NC *2K/F_NC 10K/F
MIOB_CTL3 W3
W1 45K 1111 0111 35.7K/F
MIOB_HSYNC
MIOB_VSYNC W2
MIOB_DE Y5
STRAP2 ROM_SCLK
MIOB_CLKOUT V4
W4 100K R489
SUNSUNG OR HYNI N11P-ES DevID is 0x0DFE, so pull up
MIOB_CLKOUT* MIOB_CLKIN 2
AE1 1 ROM_SCLK with 15Kohm and STRAP2
MIOB_CLKIN
N11P-GE PD 10K PU 15K pull up 35Kohm
20 VGA_THERMDN B4
THERMDN GPIO0
K1
K2 HDMI_HPD_S
T28 104
GPIO1 EXT_LCD_PWM
K3 EXT_LCD_PWM 23
GPIO2 EXT_LVDS_VDDEN
20 VGA_THERMDP B5 H3 EXT_LVDS_VDDEN 23
THERMDP GPIO3 EXT_LVDS_BLON +3.3V_GFX
H2 EXT_LVDS_BLON 27 N11P-GT PD 15K PU 15K
GPIO4 GPU_VID1
H1 GPU_VID1 49
JTAG_TCK GPIO5 GPU_VID2
JTAG_TCK MISC1
AP14 H4 GPU_VID2 49
JTAG_TMS GPIO6 GPU_VID3
T31 AR14 H5 GPU_VID3 49
JTAG_TDI JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7 dGPU_GPIO8
T33 AN14 H6
JTAG_TDO JTAG_TDI GPIO8 HDCP_SCL R218 10K
T32 AN16 J7 THERMAL_INT# 20,27
JTAG_TRST# JTAG_TDO GPIO9 HDCP_SDA R240 10K
AP16 K4

I2CS_SCL E2
JTAG_TRST* GPIO10
GPIO11
GPIO12
K5
H7
J4
GPIO12
T30
T29
GPU_VID2
GPU_VID1
GPU_VID3
R217
R189
R485
*10K_NC
10K/F
*10K/F_NC
GPIO ASSIGNMENTS
I2CS_SDA I2CS_SCL GPIO13 JTAG_TMS R504 *10K/F_NC
R197 33 I2CC_SCL_G
E1
I2CS_SDA GPIO14
J6
INT_DP_HPD_S JTAG_TDI R505 *10K/F_NC
114
23 EXT_LCD_DDCCLK
R199 33 I2CC_SDA_G
E3
E4
I2CC_SCL GPIO15
L1
L2 GPIO12 R584 10K/F
GPIO I/O ACTIVE USAGE
23 EXT_LCD_DDCDAT I2CC_SDA GPIO16
F4 L4
I2CD_SCL/ NC GPIO17 DGPU_IDLE#_S DGPU_IDLE#_S R220 *10K/F_NC
G5
D5
I2CD_SDA/ NC GPIO18
M4
L7
T4 I2CS_SCL R188 2.2K
0 N/A N/A
I2CE_SCL/ NC GPIO19 I2CS_SDA R187 2.2K
E5
I2CE_SDA/ NC GPIO20
L5
K6 I2CC_SCL_G R195 2.2K
1 IN N/A Hot plug detect for IFP link C
C GPIO21 I2CC_SDA_G R198 2.2K C
GPIO22
L6
M6 ROM_CS# R229 10K
2 OUT HIGH PANEL BACKLIGHT PWM
GPIO23 dGPU_GPIO8 R219 10K
J26 C3 ROM_CS# 3 OUT HIGH PANEL POWER ENABLE
BBIASN_NC ROM_CS* ROM_SI
J25
BBIASP_NC MISC2(ROM) ROM_SI
D3
ROM_SO 4 OUT HIGH PANEL BACKLIGHT ENABLE
C4
ROM_SO ROM_SCLK
D7
D6
HDA_BCLK/ NC ROM_SCLK
D4 38 5 OUT N/A NVVDD VID0
HDA_RST*/ NC HDCP_SCL
C7
B7
HDA_SDI/ NC I2CH_SCL
F6
G6 HDCP_SDA JTAG_TRST# R506 1K/F
6 OUT N/A NVVDD VID1
HDA_SDO/ NC I2CH_SDA JTAG_TCK R503 10K
A7
HDA_SYNC/ NC
A5 HDMI_HPD_S R204 100K
114 7 OUT N/A NVVDD VID2
R266 40.2K/F STRAP_REF_3V3 SPDIF GPU_VID1 R190 *10K_NC
N9 8 I/O LOW OVERT
R257 40.2K/F STRAP_REF_MIOB STRAP_REF_3V3/ MULTI_STRAP_REF0_GND GPU_VID2 R216 10K/F
M9 A4
STRAP_REF_MIOB/ MULTI_STRAP_REF1_GND BUFRST* GPU_VID3 R482 10K/F
NC
C5 26 INT_DP_HPD_S R221 100K
9 I/O LOW ALERT
EXT_LCD_PWM R212 10K
GND
AK14
K9
52 DGPU_IDLE#_S R241 10K
10 OUT N/A FBVREF SELECT
GND/ NC EXT_LVDS_VDDENR238 10K
91 EXT_LVDS_BLON R209 10K
11 OUT N/A SLI SYNC0
92 12 IN N/A PWR_LEVEL
13 OUT N/A MEM_VID or power supply control
14 OUT N/A PS CONTROL
N11P-GT/GE Table
HDMI_HPD_S R194 0
EXT_HDMI_HPD 24

Quanta PN DESCRIPTION Vendor PN


D D
AJ0N11P0T25 IC CTRL(973P) N11P-GT-A1 (BGA) N11P-GT-A1

AJ0N11P0T26 IC CTRL(973P) N11P-GE-A1 (BGA) N11P-GE-A1


INT_DP_HPD_S R388 0_DIS
QUANTA
INT_DP_HPD 7,25

Title
COMPUTER
VGA-N11P GE/GT(GPIO/STRAP)

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 19 of 63


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VCC_GFX_CORE +VCC_GFX_CORE
U44F U44G

AB11 VDD_001 VDD_057 P21 AA11 GND_1 GND_096 E15


AB13 VDD_002 VDD_058 P23 AA12 GND_2 GND_097 E18
AB15
AB17
VDD_003 NVVDD VDD_059 P25
R11
AA13
AA14
GND_3 GND_098 E24
E27
A
AB19
VDD_004 VDD_060
R12 AA15
GND_4 GROUND GND_099
E30
A
VDD_005 VDD_061 GND_5 GND_100
AB21 VDD_006 VDD_062 R13 AA16 GND_6 GND_101 E6
AB23 VDD_007 VDD_063 R14 AA17 GND_7 GND_102 E9
AB25 VDD_008 VDD_064 R15 AA18 GND_8 GND_103 F2
AC11 VDD_009 VDD_065 R16 AA19 GND_9 GND_104 F31
AC12 VDD_010 VDD_066 R17 AA2 GND_10 GND_105 F34
AC13 VDD_011 VDD_067 R18 AA20 GND_11 GND_106 F5
AC14 VDD_012 VDD_068 R19 AA21 GND_12 GND_107 J2
AC15 VDD_013 VDD_069 R20 AA22 GND_13 GND_108 J31
AC16 VDD_014 VDD_070 R21 AA23 GND_14 GND_109 J34
AC17 VDD_015 VDD_071 R22 AA24 GND_15 GND_110 J5
AC18 VDD_016 VDD_072 R23 AA25 GND_16 GND_111 L9
AC19 VDD_017 VDD_073 R24 AA34 GND_17 GND_112 M11
AC20 VDD_018 VDD_074 R25 AA5 GND_18 GND_113 M13
AC21 VDD_019 VDD_075 T12 AB12 GND_19 GND_114 M15
AC22 VDD_020 VDD_076 T14 AB14 GND_20 GND_115 M17
AC23 VDD_021 VDD_077 T16 AB16 GND_21 GND_116 M19
AC24 VDD_022 VDD_078 T18 AB18 GND_22 GND_117 M2
AC25 VDD_023 VDD_079 T20 AB20 GND_23 GND_118 M21
AD12 VDD_024 VDD_080 T22 AB22 GND_24 GND_119 M23
AD14 VDD_025 VDD_081 T24 AB24 GND_25 GND_120 M25
AD16 VDD_026 VDD_082 V11 AC9 GND_26 GND_121 M31
AD18 VDD_027 VDD_083 V13 AD11 GND_27 GND_122 M34
AD22 VDD_028 VDD_084 V15 AD13 GND_28 GND_123 M5
AD24 VDD_029 VDD_085 V17 AD15 GND_29 GND_124 N11
L11 VDD_030 VDD_086 V19 AD17 GND_30 GND_125 N12
L12 VDD_031 VDD_087 V21 AD2 GND_31 GND_126 N13
L13 V23 AD21 N14 +3.3V_GFX
VDD_032 VDD_088 GND_32 GND_127
B L14 VDD_033 VDD_089 V25 AD23 GND_33 GND_128 N15 B
L15 VDD_034 VDD_090 W 11 AD25 GND_34 GND_129 N16
L16 W 12 AD31 N17 +3.3V_GFX
VDD_035 VDD_091 GND_35 GND_130
L17 VDD_036 VDD_092 W 13 AD34 GND_36 GND_131 N18
L18 VDD_037 VDD_093 W 14 AD5 GND_37 GND_132 N19

2
L19 VDD_038 VDD_094 W 15 AE11 GND_38 GND_133 N20
L20 W 16 AE12 N21 Q29
VDD_039 VDD_095 GND_39 GND_134 THERMAL MONITOR

1
L21 VDD_040 VDD_096 W 17 AE13 GND_40 GND_135 N22 27,36 SMBCLK2 3 1
L22 VDD_041 VDD_097 W 18 AE14 GND_41 GND_136 N23
L23 W 19 AE15 N24 R208 R201 31
VDD_042 VDD_098 GND_42 GND_137 2N7002W-7-F 4.7K 4.7K
L24 VDD_043 VDD_099 W 20 AE16 GND_43 GND_138 N25
L25 W 21 AE17 P12 +3.3V_GFX

2
VDD_044 VDD_100 GND_44 GND_139
M12 VDD_045 VDD_101 W 22 AE18 GND_45 GND_140 P14
U23
M14 VDD_046 VDD_102 W 23 AE19 GND_46 GND_141 P16 VGA_THERMDP 19

2
M16 VDD_047 VDD_103 W 24 AE20 GND_47 GND_142 P18 8 SCLK VDD 1

1
M18 W 25 AE21 P20 Q30
VDD_048 VDD_104 GND_48 GND_143 C187
M20 VDD_049 VDD_105 Y12 AE22 GND_49 GND_144 P22 27,36 SMBDAT2 3 1 7 SDATA D+ 2
M22 Y14 AE23 P24 2N7002W-7-F 2200P/50V/X7R

2
VDD_050 VDD_106 GND_50 GND_145 THERMAL_INT# 50
M24 VDD_051 VDD_107 Y16 AE24 GND_51 GND_146 R2 19,27 THERMAL_INT# 6 ALERT# D- 3 VGA_THERMDN 19
P11 VDD_052 VDD_108 Y18 AE25 GND_52 GND_147 R31
P13 Y20 AG2 R34 5 4 MB_THERM#_L
VDD_053 VDD_109 GND_53 GND_148 GND THERM#
P15 VDD_054 VDD_110 Y22 AG31 GND_54 GND_149 R5

1
P17 Y24 AG34 T11 ADM1032ARMZ-1 C202
VDD_055 VDD_111 GND_55 GND_150 0.1U/10V/X7R
P19 VDD_056 AG5 GND_56 GND_151 T13
AK2 T15

2
GND_57 GND_152 10
AK31 GND_58 GND_153 T17
+VCC_GFX_CORE AK34 T19
GND_59 GND_154 MB_THERM#_L R191 2
AK5 GND_60 GND_155 T21 1 10K +3.3V_GFX
AL12 GND_61 GND_156 T23
C C179 0.047U/16V/X7R AL15 T25 THERMAL_INT# R196 2 1 10K C
C163 0.047U/16V/X7R GND_62 GND_157 +3.3V_GFX
AL18 GND_63 GND_158 U11
23 C158 0.047U/16V/X7R AL21 U12
C453 0.01u/25V/X7R GND_64 GND_159
AL24 GND_65 GND_160 U13
101 C348 0.01u/25V/X7R AL27 U14 37 D35 2 1 *RB751V40T1G_NC
C316 0.01u/25V/X7R GND_66 GND_161
AL30 GND_67 GND_162 U15
C319 0.01u/25V/X7R AL6 U16
C339 0.01u/25V/X7R GND_68 GND_163 PR221 0
AL9 GND_69 GND_164 U17
C285 0.01u/25V/X7R AN2 U18
GND_70 GND_165

1
PLACE UNDER BALLS C282 0.01u/25V/X7R AN34 U19 C461
C308 0.01u/25V/X7R GND_71 GND_166 *0.1U/10V/X7R_NC
AP12 GND_72 GND_167 U20
C317 0.022U/16V/X7R AP15 U21

2
C313 0.022U/16V/X7R GND_73 GND_168 10
AP18 GND_74 GND_169 U22
C337 0.022U/16V/X7R AP21 U23
GND_75 GND_170

2
C349 0.1u/10V/X7R AP24 U24
C338 0.1u/10V/X7R GND_76 GND_171 Q31
AP27 GND_77 GND_172 U25
C350 1U/10V/X7R AP3 V12 MB_THERM#_L 1 3 MB_THERM#
C352 0.22u/6.3V/X5R GND_78 GND_173
AP30 GND_79 GND_174 V14
C299 0.22u/6.3V/X5R AP33 V16
C351 0.22u/6.3V/X5R GND_80 GND_175 2N7002W-7-F
AP6 GND_081 GND_176 V18
AP9 GND_082 GND_177 V2
B12 GND_083 GND_178 V20
B15 GND_084 GND_179 V22
B21 GND_085 GND_180 V24
+VCC_GFX_CORE
B24
B27
GND_086 GND_181 V31
V5
96 MB_THERM# PR116 *0_NC
3
GND_087 GND_182
B3 GND_088 GND_183 V9
B30 GND_089 GND_184 Y11
B33 Y13 PR110 0
GND_090 GND_185 3 PM_THRMTRIP#
D PLACE NEAR BALLS B6 GND_091 GND_186 Y15 D
C297 4.7U/6.3V/X5R B9 Y17
GND_092 GND_187 THERM# 46
C329 10U/6.3V/X5R C2 Y19 PR111 0
GND_093 GND_188 27,36 THERM_STP#
C294 10U/6.3V/X5R C34 Y21
C83
C8196
22U/25V/X7R
47U/4V_8
E12
GND_094
GND_095
GND_189
GND_190 Y23
Y25 35 3.3V_ALW_ON
PR109 0
QUANTA
GND_191

Title
COMPUTER
VGA-N11P GE/GT(POWER/THM)

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 20 of 63


1 2 3 4 5 6 7 8

WWW.MANUALS.CLAN.SU
1 2 3 4 5 6 7 8

17 VMA_DQ[63..0]
17 VMA_DM[7..0]
17 VMA_WDQS[7..0]
17 VMA_RDQS[7..0] CHANNEL A: 512MB/1024MB DDR3
U27 U48 U28 U47

VREFC_VMA1 M8 E3 VMA_DQ17 VREFC_VMA1 M8 E3 VMA_DQ28 VREFC_VMA3 M8 E3 VMA_DQ44 VREFC_VMA3 M8 E3 VMA_DQ60


VREFD_VMA1 VREFCA DQL0 VMA_DQ23 VREFD_VMA1 VREFCA DQL0 VMA_DQ25 VREFD_VMA3 VREFCA DQL0 VMA_DQ41 VREFD_VMA3 VREFCA DQL0 VMA_DQ61
H1 F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 VMA_DQ18 VREFDQ DQL1 VMA_DQ24 VREFDQ DQL1 VMA_DQ45 VREFDQ DQL1 VMA_DQ58
F2 F2 F2 F2
VMA_CMD7 DQL2 VMA_DQ22 VMA_CMD7 DQL2 VMA_DQ27 VMA_CMD22 DQL2 VMA_DQ42 VMA_CMD22 DQL2 VMA_DQ59
17 VMA_CMD7 N3 F8 N3 F8 N3 F8 N3 F8
VMA_CMD20 A0 DQL3 VMA_DQ19 VMA_CMD20 A0 DQL3 VMA_DQ30 VMA_CMD4 A0 DQL3 VMA_DQ47 VMA_CMD4 A0 DQL3 VMA_DQ63
17 VMA_CMD20 P7 H3 P7 H3 P7 H3 P7 H3
VMA_CMD4 A1 DQL4 VMA_DQ20 VMA_CMD4 A1 DQL4 VMA_DQ31 VMA_CMD20 A1 DQL4 VMA_DQ40 VMA_CMD20 A1 DQL4 VMA_DQ62
17 VMA_CMD4 P3 H8 P3 H8 P3 H8 P3 H8
VMA_CMD14 A2 DQL5 VMA_DQ16 VMA_CMD14 A2 DQL5 VMA_DQ26 VMA_CMD9 A2 DQL5 VMA_DQ46 VMA_CMD9 A2 DQL5 VMA_DQ56
17 VMA_CMD14 N2 G2 N2 G2 N2 G2 N2 G2
VMA_CMD17 A3 DQL6 VMA_DQ21 VMA_CMD17 A3 DQL6 VMA_DQ29 VMA_CMD6 A3 DQL6 VMA_DQ43 VMA_CMD6 A3 DQL6 VMA_DQ57
A
17 VMA_CMD17 P8 H7 P8 H7 P8 H7 P8 H7 A
VMA_CMD6 A4 DQL7 VMA_CMD6 A4 DQL7 VMA_CMD17 A4 DQL7 VMA_CMD17 A4 DQL7
17 VMA_CMD6 P2 P2 P2 P2
VMA_CMD26 A5 VMA_CMD26 A5 VMA_CMD3 A5 VMA_CMD3 A5
17 VMA_CMD26 R8 R8 R8 R8
VMA_CMD3 A6 VMA_DQ7 VMA_CMD3 A6 VMA_DQ15 VMA_CMD26 A6 VMA_DQ33 VMA_CMD26 A6 VMA_DQ51
17 VMA_CMD3 R2 D7 R2 D7 R2 D7 R2 D7
VMA_CMD1 A7 DQU0 VMA_DQ2 VMA_CMD1 A7 DQU0 VMA_DQ8 VMA_CMD1 A7 DQU0 VMA_DQ39 VMA_CMD1 A7 DQU0 VMA_DQ53
17 VMA_CMD1 T8 C3 T8 C3 T8 C3 T8 C3
VMA_CMD10 A8 DQU1 VMA_DQ5 VMA_CMD10 A8 DQU1 VMA_DQ14 VMA_CMD5 A8 DQU1 VMA_DQ32 VMA_CMD5 A8 DQU1 VMA_DQ50
17 VMA_CMD10 R3 C8 R3 C8 R3 C8 R3 C8
VMA_CMD21 A9 DQU2 VMA_DQ0 VMA_CMD21 A9 DQU2 VMA_DQ10 VMA_CMD19 A9 DQU2 VMA_DQ38 VMA_CMD19 A9 DQU2 VMA_DQ52
17 VMA_CMD21 L7 C2 L7 C2 L7 C2 L7 C2
VMA_CMD5 A10/AP DQU3 VMA_DQ6 VMA_CMD5 A10/AP DQU3 VMA_DQ12 VMA_CMD10 A10/AP DQU3 VMA_DQ36 VMA_CMD10 A10/AP DQU3 VMA_DQ48
17 VMA_CMD5 R7 A7 R7 A7 R7 A7 R7 A7
VMA_CMD22 A11 DQU4 VMA_DQ1 VMA_CMD22 A11 DQU4 VMA_DQ9 VMA_CMD7 A11 DQU4 VMA_DQ37 VMA_CMD7 A11 DQU4 VMA_DQ54
17 VMA_CMD22 N7 A2 N7 A2 N7 A2 N7 A2
VMA_CMD18 A12/BC DQU5 VMA_DQ4 VMA_CMD18 A12/BC DQU5 VMA_DQ13 VMA_CMD29 A12/BC DQU5 VMA_DQ34 VMA_CMD29 A12/BC DQU5 VMA_DQ49
17 VMA_CMD18 T3 B8 T3 B8 T3 B8 T3 B8
VMA_CMD29 A13 DQU6 VMA_DQ3 VMA_CMD29 A13 DQU6 VMA_DQ11 VMA_CMD18 A13 DQU6 VMA_DQ35 VMA_CMD18 A13 DQU6 VMA_DQ55
17 VMA_CMD29 T7 A3 T7 A3 T7 A3 T7 A3
VMA_CMD30 A14 DQU7 VMA_CMD30 A14 DQU7 VMA_CMD13 A14 DQU7 VMA_CMD13 A14 DQU7
17 VMA_CMD30 M7 M7 M7 M7
A15 A15 A15 A15

VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2


17 VMA_CMD12 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMA_CMD9 N8 D9 VMA_CMD9 N8 D9 VMA_CMD14 N8 D9 VMA_CMD14 N8 D9
17 VMA_CMD9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMA_CMD13 M3 G7 VMA_CMD13 M3 G7 VMA_CMD30 M3 G7 VMA_CMD30 M3 G7
17 VMA_CMD13 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMA_CLKP0 J7 N9 VMA_CLKP0 J7 N9 VMA_CLKP1 J7 N9 VMA_CLKP1 J7 N9
17 VMA_CLKP0 CK VDD#N9 CK VDD#N9 17 VMA_CLKP1 CK VDD#N9 CK VDD#N9
VMA_CLKN0 K7 R1 VMA_CLKN0 K7 R1 VMA_CLKN1 K7 R1 VMA_CLKN1 K7 R1
17 VMA_CLKN0 CK VDD#R1 +1.5V_GFX CK VDD#R1 17 VMA_CLKN1 CK VDD#R1 CK VDD#R1 +1.5V_GFX
VMA_CMD0 K9 R9 VMA_CMD0 K9 R9 VMA_CMD27 K9 R9 VMA_CMD27 K9 R9
17 VMA_CMD0 CKE VDD#R9 CKE VDD#R9 +1.5V_GFX17 VMA_CMD27 CKE VDD#R9 +1.5V_GFX CKE VDD#R9

VMA_CMD25 K1 A1 VMA_CMD25 K1 A1 VMA_CMD16 K1 A1 VMA_CMD16 K1 A1


17 VMA_CMD25 ODT VDDQ#A1 ODT VDDQ#A1 17 VMA_CMD16 ODT VDDQ#A1 ODT VDDQ#A1
VMA_CMD2 L2 A8 VMA_CMD2 L2 A8 VMA_CMD11 L2 A8 VMA_CMD11 L2 A8
17 VMA_CMD2 CS VDDQ#A8 CS VDDQ#A8 17 VMA_CMD11 CS VDDQ#A8 CS VDDQ#A8
VMA_CMD24 J3 C1 VMA_CMD24 J3 C1 VMA_CMD24 J3 C1 VMA_CMD24 J3 C1
17 VMA_CMD24 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
VMA_CMD8 K3 C9 VMA_CMD8 K3 C9 VMA_CMD8 K3 C9 VMA_CMD8 K3 C9
17 VMA_CMD8 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
VMA_CMD19 L3 D2 VMA_CMD19 L3 D2 VMA_CMD21 L3 D2 VMA_CMD21 L3 D2
17 VMA_CMD19 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_WDQS2 F3 H2 VMA_WDQS3 F3 H2 VMA_WDQS5 F3 H2 VMA_WDQS7 F3 H2
VMA_RDQS2 DQSL VDDQ#H2 VMA_RDQS3 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
G3 H9 G3 H9 G3 H9 G3 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
B B

VMA_DM2 E7 A9 VMA_DM3 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


VMA_DM0 DML VSS#A9 VMA_DM1 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS0 C7 J2 VMA_WDQS1 C7 J2 VMA_WDQS4 C7 J2 VMA_WDQS6 C7 J2
VMA_RDQS0 DQSU VSS#J2 VMA_RDQS1 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 VSS#M1 VSS#M1 VSS#M1
M9 M9 M9 M9
VSS#M9 VSS#M9 VSS#M9 VSS#M9
P1 P1 P1 P1
VMA_CMD28 T2 VSS#P1 VMA_CMD28 VSS#P1 VMA_CMD28 VSS#P1 VMA_CMD28 VSS#P1
17 VMA_CMD28 P9 T2 P9 T2 P9 T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
VMA_ZQ1 VSS#T1 VMA_ZQ2 VSS#T1 VMA_ZQ3 VSS#T1 VMA_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% B1 Ohms +-1% B1 Ohms +-1% B1 Ohms +-1% B1
VSSQ#B1 VSSQ#B1 VSSQ#B1 VSSQ#B1
B9 B9 B9 B9
VSSQ#B9 VSSQ#B9 VSSQ#B9 VSSQ#B9
D1 D1 D1 D1
R301 VSSQ#D1 R540 VSSQ#D1 R321 VSSQ#D1 R523 VSSQ#D1
D8 D8 D8 D8
240/F VSSQ#D8 240/F VSSQ#D8 240/F VSSQ#D8 240/F VSSQ#D8
E2 E2 E2 E2
VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
J1 E8 J1 E8 J1 E8 J1 E8
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
L1 F9 L1 F9 L1 F9 L1 F9
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 G1 J9 G1 J9 G1 J9 G1
NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
L9 G9 L9 G9 L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TQ1G63BFR-12C H5TQ1G63BFR-12C H5TQ1G63BFR-12C H5TQ1G63BFR-12C

+1.5V_GFX
39 +1.5V_GFX

+1.5V_GFX +1.5V_GFX

1
1
C R534 C
R537 4.99K/F
1

4.99K/F
R539 R318 +1.5V_GFX

2
4.99K/F 4.99K/F

2
VREFD_VMA3
VREFC_VMA3
2

1
VREFC_VMA1 VREFD_VMA1

1
C743 *10u/6.3V/X5R_NC R303 C447

1
R302 C446 4.99K/F 0.1U/10V/X7R
1

4.99K/F 0.1U/10V/X7R 10

2
1

R524 C399 R525 C441 10

2
4.99K/F 0.1U/10V/X7R 4.99K/F 0.1U/10V/X7R

2
10 10
2

2
2

+1.5V_GFX
80 C424 1U/6.3V/X5R
C435 1U/6.3V/X5R
C440 1U/6.3V/X5R
Placement has to be close to VRAM C718 1U/6.3V/X5R
+1.5V_GFX +1.5V_GFX C693 1U/6.3V/X5R

C706 1U/6.3V/X5R C734 1U/6.3V/X5R


VMA_CLKP0 +1.5V_GFX C423 1U/6.3V/X5R C723 1U/6.3V/X5R
C450 1U/6.3V/X5R C731 1U/6.3V/X5R C442 0.1u/10V/X5R
R320 C439 1U/6.3V/X5R C438 1U/6.3V/X5R C422 1U/6.3V/X5R C448 0.1u/10V/X5R
162/F C437 1U/6.3V/X5R C719 1U/6.3V/X5R C727 1U/6.3V/X5R C428 0.1u/10V/X5R
C710 1U/6.3V/X5R C735 0.1u/10V/X5R
VMA_CLKN0 C741 1U/6.3V/X5R C728 0.1u/10V/X5R
C724 1U/6.3V/X5R
C434 0.1u/10V/X5R C736 0.1u/10V/X5R
VMA_CLKP1 C699 0.1u/10V/X5R C738 0.1u/10V/X5R
D D
C711 0.1u/10V/X5R C740 0.1u/10V/X5R
R535 C742 0.1u/10V/X5R C443 0.1u/10V/X5R C687 0.1u/10V/X5R
162/F C732 0.1u/10V/X5R C698 0.1u/10V/X5R C445 0.1u/10V/X5R
C449 0.1u/10V/X5R
VMA_CLKN1 C707 0.1u/10V/X5R
C429 0.1u/10V/X5R
QUANTA
COMPUTER
WWW.MANUALS.CLAN.SU
Title
VGA-N11P GE/GT(VRAM-1)
GE1 FOR 243 BUT GT/E REQUIRE CHECK FAE Size Document Number Rev
GM6 2B

Date: Friday, June 25, 2010 Sheet 21 of 63


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

17 VMC_DQ[63..0]
17 VMC_DM[7..0]
17 VMC_WDQS[7..0]
17 VMC_RDQS[7..0] CHANNEL B: 512MB/1024MB DDR3
U43
U24 U26 U45
VREFC_VMC1 M8 E3 VMC_DQ27
VREFC_VMC1 VMC_DQ5 VREFD_VMC1 VREFCA DQL0 VMC_DQ26 VREFC_VMC3 VMC_DQ36 VREFC_VMC3 VMC_DQ55
M8 E3 H1 F7 M8 E3 M8 E3
VREFD_VMC1 VREFCA DQL0 VMC_DQ0 VREFDQ DQL1 VMC_DQ24 VREFD_VMC3 VREFCA DQL0 VMC_DQ33 VREFD_VMC3 VREFCA DQL0 VMC_DQ49
H1 F7 F2 H1 F7 H1 F7
VREFDQ DQL1 VMC_DQ1 VMC_CMD7 DQL2 VMC_DQ31 VREFDQ DQL1 VMC_DQ39 VREFDQ DQL1 VMC_DQ52
F2 N3 F8 F2 F2
VMC_CMD7 DQL2 VMC_DQ3 VMC_CMD20 A0 DQL3 VMC_DQ28 VMC_CMD22 DQL2 VMC_DQ32 VMC_CMD22 DQL2 VMC_DQ48
17 VMC_CMD7 N3 F8 P7 H3 N3 F8 N3 F8
VMC_CMD20 A0 DQL3 VMC_DQ4 VMC_CMD4 A1 DQL4 VMC_DQ29 VMC_CMD4 A0 DQL3 VMC_DQ38 VMC_CMD4 A0 DQL3 VMC_DQ54
17 VMC_CMD20 P7 H3 P3 H8 P7 H3 P7 H3
VMC_CMD4 A1 DQL4 VMC_DQ6 VMC_CMD14 A2 DQL5 VMC_DQ25 VMC_CMD20 A1 DQL4 VMC_DQ34 VMC_CMD20 A1 DQL4 VMC_DQ50
17 VMC_CMD4 P3 H8 N2 G2 P3 H8 P3 H8
VMC_CMD14 A2 DQL5 VMC_DQ7 VMC_CMD17 A3 DQL6 VMC_DQ30 VMC_CMD9 A2 DQL5 VMC_DQ37 VMC_CMD9 A2 DQL5 VMC_DQ53
17 VMC_CMD14 N2 G2 P8 H7 N2 G2 N2 G2
VMC_CMD17 A3 DQL6 VMC_DQ2 VMC_CMD6 A4 DQL7 VMC_CMD6 A3 DQL6 VMC_DQ35 VMC_CMD6 A3 DQL6 VMC_DQ51
17 VMC_CMD17 P8 H7 P2 P8 H7 P8 H7
VMC_CMD6 A4 DQL7 VMC_CMD26 A5 VMC_CMD17 A4 DQL7 VMC_CMD17 A4 DQL7
A
17 VMC_CMD6 P2 R8 P2 P2 A
VMC_CMD26 A5 VMC_CMD3 A6 VMC_DQ13 VMC_CMD3 A5 VMC_CMD3 A5
17 VMC_CMD26 R8 R2 D7 R8 R8
VMC_CMD3 A6 VMC_DQ20 VMC_CMD1 A7 DQU0 VMC_DQ10 VMC_CMD26 A6 VMC_DQ44 VMC_CMD26 A6 VMC_DQ61
17 VMC_CMD3 R2 D7 T8 C3 R2 D7 R2 D7
VMC_CMD1 A7 DQU0 VMC_DQ21 VMC_CMD10 A8 DQU1 VMC_DQ15 VMC_CMD1 A7 DQU0 VMC_DQ45 VMC_CMD1 A7 DQU0 VMC_DQ58
17 VMC_CMD1 T8 C3 R3 C8 T8 C3 T8 C3
VMC_CMD10 A8 DQU1 VMC_DQ23 VMC_CMD21 A9 DQU2 VMC_DQ8 VMC_CMD5 A8 DQU1 VMC_DQ40 VMC_CMD5 A8 DQU1 VMC_DQ62
17 VMC_CMD10 R3 C8 L7 C2 R3 C8 R3 C8
VMC_CMD21 A9 DQU2 VMC_DQ19 VMC_CMD5 A10/AP DQU3 VMC_DQ12 VMC_CMD19 A9 DQU2 VMC_DQ47 VMC_CMD19 A9 DQU2 VMC_DQ59
17 VMC_CMD21 L7 C2 R7 A7 L7 C2 L7 C2
VMC_CMD5 A10/AP DQU3 VMC_DQ18 VMC_CMD22 A11 DQU4 VMC_DQ9 VMC_CMD10 A10/AP DQU3 VMC_DQ42 VMC_CMD10 A10/AP DQU3 VMC_DQ60
17 VMC_CMD5 R7 A7 N7 A2 R7 A7 R7 A7
VMC_CMD22 A11 DQU4 VMC_DQ17 VMC_CMD18 A12/BC DQU5 VMC_DQ14 VMC_CMD7 A11 DQU4 VMC_DQ46 VMC_CMD7 A11 DQU4 VMC_DQ56
17 VMC_CMD22 N7 A2 T3 B8 N7 A2 N7 A2
VMC_CMD18 A12/BC DQU5 VMC_DQ22 VMC_CMD29 A13 DQU6 VMC_DQ11 VMC_CMD29 A12/BC DQU5 VMC_DQ41 VMC_CMD29 A12/BC DQU5 VMC_DQ63
17 VMC_CMD18 T3 B8 T7 A3 T3 B8 T3 B8
VMC_CMD29 A13 DQU6 VMC_DQ16 VMC_CMD30 A14 DQU7 VMC_CMD18 A13 DQU6 VMC_DQ43 VMC_CMD18 A13 DQU6 VMC_DQ57
17 VMC_CMD29 T7 A3 M7 T7 A3 T7 A3
VMC_CMD30 A14 DQU7 A15 VMC_CMD13 A14 DQU7 VMC_CMD13 A14 DQU7
17 VMC_CMD30 M7 M7 M7
A15 A15 A15
VMC_CMD12 M2 B2
VMC_CMD12 VMC_CMD9 BA0 VDD#B2 VMC_CMD12 VMC_CMD12
17 VMC_CMD12 M2 BA0 VDD#B2 B2 N8 BA1 VDD#D9 D9 M2 BA0 VDD#B2 B2 M2 BA0 VDD#B2 B2
VMC_CMD9 N8 D9 VMC_CMD13 M3 G7 VMC_CMD14 N8 D9 VMC_CMD14 N8 D9
17 VMC_CMD9 BA1 VDD#D9 BA2 VDD#G7 BA1 VDD#D9 BA1 VDD#D9
VMC_CMD13 M3 G7 K2 VMC_CMD30 M3 G7 VMC_CMD30 M3 G7
17 VMC_CMD13 BA2 VDD#G7 VDD#K2 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K8 K8 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#N1 N1 VDD#K8 K8 VDD#K8 K8
N1 VMC_CLKP0 J7 N9 N1 N1
VMC_CLKP0 VDD#N1 VMC_CLKN0 CK VDD#N9 VMC_CLKP1 VDD#N1 VMC_CLKP1 VDD#N1
17 VMC_CLKP0 J7 CK VDD#N9 N9 K7
CK VDD#R1 R1 17 VMC_CLKP1 J7 CK VDD#N9 N9 J7 CK VDD#N9 N9
VMC_CLKN0 K7 R1 VMC_CMD0 K9 R9 VMC_CLKN1 K7 R1 VMC_CLKN1 K7 R1
17 VMC_CLKN0 CK VDD#R1 +1.5V_GFX CKE VDD#R9 +1.5V_GFX17 VMC_CLKN1 CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX
VMC_CMD0 K9 R9 VMC_CMD27 K9 R9 VMC_CMD27 K9 R9
17 VMC_CMD0 CKE VDD#R9 17 VMC_CMD27 CKE VDD#R9 CKE VDD#R9
VMC_CMD25 K1 A1
VMC_CMD25 VMC_CMD2 ODT VDDQ#A1 VMC_CMD16 VMC_CMD16
17 VMC_CMD25 K1 ODT VDDQ#A1 A1 L2
CS VDDQ#A8 A8 17 VMC_CMD16 K1 ODT VDDQ#A1 A1 K1 ODT VDDQ#A1 A1
VMC_CMD2 L2 A8 VMC_CMD24 J3 C1 VMC_CMD11 L2 A8 VMC_CMD11 L2 A8
17 VMC_CMD2 CS VDDQ#A8 RAS VDDQ#C1 17 VMC_CMD11 CS VDDQ#A8 CS VDDQ#A8
VMC_CMD24 J3 C1 VMC_CMD8 K3 C9 VMC_CMD24 J3 C1 VMC_CMD24 J3 C1
17 VMC_CMD24 RAS VDDQ#C1 CAS VDDQ#C9 RAS VDDQ#C1 RAS VDDQ#C1
VMC_CMD8 K3 C9 VMC_CMD19 L3 D2 VMC_CMD8 K3 C9 VMC_CMD8 K3 C9
17 VMC_CMD8 CAS VDDQ#C9 WE VDDQ#D2 CAS VDDQ#C9 CAS VDDQ#C9
VMC_CMD19 L3 D2 E9 VMC_CMD21 L3 D2 VMC_CMD21 L3 D2
17 VMC_CMD19 WE VDDQ#D2 VDDQ#E9 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#F1 F1 VDDQ#E9 E9 VDDQ#E9 E9
F1 VMC_WDQS3 F3 H2 F1 F1
VMC_WDQS0 VDDQ#F1 VMC_RDQS3 DQSL VDDQ#H2 VMC_WDQS4 VDDQ#F1 VMC_WDQS6 VDDQ#F1
F3 DQSL VDDQ#H2 H2 G3
DQSL VDDQ#H9 H9 F3 DQSL VDDQ#H2 H2 F3 DQSL VDDQ#H2 H2
VMC_RDQS0 G3 H9 VMC_RDQS4 G3 H9 VMC_RDQS6 G3 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
VMC_DM3 E7 A9
B
VMC_DM0 VMC_DM1 DML VSS#A9 VMC_DM4 VMC_DM6 B
E7 DML VSS#A9 A9 D3 DMU VSS#B3 B3 E7 DML VSS#A9 A9 E7 DML VSS#A9 A9
VMC_DM2 D3 B3 E1 VMC_DM5 D3 B3 VMC_DM7 D3 B3
DMU VSS#B3 VSS#E1 DMU VSS#B3 DMU VSS#B3
VSS#E1 E1 VSS#G8 G8 VSS#E1 E1 VSS#E1 E1
G8 VMC_WDQS1 C7 J2 G8 G8
VMC_WDQS2 VSS#G8 VMC_RDQS1 DQSU VSS#J2 VMC_WDQS5 VSS#G8 VMC_WDQS7 VSS#G8
C7 DQSU VSS#J2 J2 B7
DQSU VSS#J8 J8 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2
VMC_RDQS2 B7 J8 M1 VMC_RDQS5 B7 J8 VMC_RDQS7 B7 J8
DQSU VSS#J8 VSS#M1 DQSU VSS#J8 DQSU VSS#J8
VSS#M1 M1 VSS#M9 M9 VSS#M1 M1 VSS#M1 M1
M9 P1 M9 M9
VSS#M9 VMC_CMD28 VSS#P1 VSS#M9 VSS#M9
P1 T2 P9 P1 P1
VMC_CMD28 VSS#P1 RESET VSS#P9 VMC_CMD28 VSS#P1 VMC_CMD28 VSS#P1
17 VMC_CMD28 T2 P9 T1 T2 P9 T2 P9
RESET VSS#P9 VMC_ZQ2 VSS#T1 RESET VSS#P9 RESET VSS#P9
T1 L8 T9 T1 T1
VMC_ZQ1 VSS#T1 ZQ VSS#T9 VMC_ZQ3 VSS#T1 VMC_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 VSSQ#B1
B1 Should be 240 Should be 240
Ohms +-1% B1 Ohms +-1% B9 Ohms +-1% B1 Ohms +-1% B1
VSSQ#B1 VSSQ#B9 VSSQ#B1 VSSQ#B1
B9 D1 B9 B9
VSSQ#B9 VSSQ#D1 VSSQ#B9 VSSQ#B9
D1 D8 D1 D1
R270 VSSQ#D1 R498 VSSQ#D8 R294 VSSQ#D1 R515 VSSQ#D1
D8 E2 D8 D8
240/F VSSQ#D8 240/F VSSQ#E2 240/F VSSQ#D8 240/F VSSQ#D8
E2 J1 E8 E2 E2
VSSQ#E2 NC#J1 VSSQ#E8 VSSQ#E2 VSSQ#E2
J1 E8 L1 F9 J1 E8 J1 E8
NC#J1 VSSQ#E8 NC#L1 VSSQ#F9 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
L1 F9 J9 G1 L1 F9 L1 F9
NC#L1 VSSQ#F9 NC#J9 VSSQ#G1 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 G1 L9 G9 J9 G1 J9 G1
NC#J9 VSSQ#G1 NC#L9 VSSQ#G9 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
L9 G9 L9 G9 L9 G9
NC#L9 VSSQ#G9 96-BALL NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL SDRAM DDR3 96-BALL 96-BALL
SDRAM DDR3 H5TQ1G63BFR-12C SDRAM DDR3 SDRAM DDR3
H5TQ1G63BFR-12C H5TQ1G63BFR-12C H5TQ1G63BFR-12C

39 +1.5V_GFX
+1.5V_GFX

1
C +1.5V_GFX +1.5V_GFX C

1
R299
R293 4.99K/F
4.99K/F
1

2
R265 R252 +1.5V_GFX

2
4.99K/F 4.99K/F VREFD_VMC3
VREFC_VMC3
15 mil width and <500 mil
2

1
1

1
VREFC_VMC1 VREFD_VMC1 R298 C372

1
C701 *10u/6.3V/X5R_NC R514 C375 4.99K/F 0.1U/10V/X7R
4.99K/F 0.1U/10V/X7R 10

2
1

10

2
1

R507 C284 R495 C649

2
4.99K/F 0.1U/10V/X7R 4.99K/F 0.1U/10V/X7R
10 10
2

2
2

+1.5V_GFX
80 C215 1U/6.3V/X5R
C212 1U/6.3V/X5R
C213 1U/6.3V/X5R
C401 1U/6.3V/X5R
Placement has to be close to VRAM C638 1U/6.3V/X5R
+1.5V_GFX +1.5V_GFX

C645 1U/6.3V/X5R C656 1U/6.3V/X5R


VMC_CLKP0 +1.5V_GFX C444 1U/6.3V/X5R C653 1U/6.3V/X5R C211 0.1u/10V/X5R
C739 1U/6.3V/X5R C214 1U/6.3V/X5R C650 0.1u/10V/X5R
R254 C249 1U/6.3V/X5R C217 1U/6.3V/X5R C387 1U/6.3V/X5R C643 0.1u/10V/X5R
162/F C639 1U/6.3V/X5R C216 1U/6.3V/X5R C391 1U/6.3V/X5R C209 0.1u/10V/X5R
C737 1U/6.3V/X5R C677 0.1u/10V/X5R
VMC_CLKN0 C654 1U/6.3V/X5R
C336 1U/6.3V/X5R
D D
C335 0.1u/10V/X5R C210 0.1u/10V/X5R
C208 0.1u/10V/X5R C256 0.1u/10V/X5R
VMC_CLKP1 C405 0.1u/10V/X5R C400 0.1u/10V/X5R
C664 0.1u/10V/X5R C305 0.1u/10V/X5R C390 0.1u/10V/X5R
R295 C248 0.1u/10V/X5R C207 0.1u/10V/X5R C416 0.1u/10V/X5R
162/F C250 0.1u/10V/X5R

VMC_CLKN1
C362
C218
0.1u/10V/X5R
0.1u/10V/X5R
QUANTA
COMPUTER
WWW.MANUALS.CLAN.SU
Title
VGA-N11P GE/GT(VRAM-2)

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 22 of 63


1 2 3 4 5 6 7 8
5 4 3 2 1

J3
+15V_ALW +3.3V_RUN +LCDVCC 40
Q54 40 +LCDVCC
39
FDC655BN 39 +LCDVCC +3.3V_RUN
38 +3.3V_RUN
38
6 37 LCD_TST 27
37

2
5 4 36 LCD_DDCCLK
R461 36 LCD_DDCDAT
2 35
35
330K 1 34 LCD_A0-
34

1
33 LCD_A0+
33

2
R458 32 C606 C602 C599

3
47 C600 C607 32 LCD_A1- 0.1U 0.047U 0.1U
31

2
LCDVCC_ON 805 22U/10V/Y5V 0.01U/25V/X7R 31 LCD_A1+
30

1
1206 30 16 10 16
29

1
29

1
10 25 28 LCD_A2-
28

2
27 LCD_A2+
R457 C610 27
26 26
*100K_NC 0.01U/25V/X7R 25 LCD_ACLK-

1
25 LCD_ACLK+
24

2
25 24
23 23
22 LCD_B0-
+3.3V_SUS 22 LCD_B0+
21 21

3
D
20 20 D
2 2 19 LCD_B1- Adress : A9H --Contrast
Q59 19 LCD_B1+
63 18 18
AAH --Backlight

1
Q58 2N7002W-7-F 17

1
R464 2N7002W-7-F 17 LCD_B2- +3.3V_RUN
16 16
47K 15 LCD_B2+
D30 SSM34PT 15
14 14

1
2 1 13 LCD_BCLK-
19 EXT_LVDS_VDDEN

2
13 LCD_BCLK+
12 12
11 BL_PWM L36
D29 11 BLM11A05S
10 10 LCD_BAK 27

3
1 9 0603
7 INT_ENVDD 9 +GFX_PWR_SRC
8

2
EN_LCDVCC Q60 8
3 2
DDTC124EUA-7-F
41
42
41 7 7
6
120
42 6 USBP11+ 9
27 LCDVCC_TST_EN 2 43 43 5 5 USBP11- 9
1 4 CAM_VCC
4
1

BAT54C T/R
82 R467
44
45
44 3 3
2
DMIC_DATA 37
45 2 DMIC_CLK 37
10K_DIS 1 1

1
FOX_GS12407-11141-9H
2

C601 C605
10U *0.1U_NC

2
10 10
X5R X7R

+3.3V_RUN +PWR_SRC +GFX_PWR_SRC


GPU_BLON
97 40mil EC LCD_BAK#
40mil 6 PCH_BLON
4 5
5

U37 2
19 EXT_LCD_PWM 1 2 2 1
1

1
R468 *0_NC 4 BL_PWM

2
1 Q55 C611 C608 PCH_PWM

3
R456 C598 FDC658AP 0.1U/25V/Y5V 0.1U/25V/Y5V GPU_PWM OR PWM

2
*TC7SZ32FU(T5L,F,T)_NC 100K 0.1U/25V/Y5V 603 603 EC

1
603 25 25
2

C C
25

+3.3V_RUN
2

Shunt capacitors on LVDS for improving WWAN.


R455
1

+3.3V_RUN 100K LCD_ACLK-


R462

2
*10K_NC
3 1
5

2
U38 113
2 R84 C72
27 PWM_VADJ
2

4 BL_PWM 2 Q56 *0_NC 3.3P/50V/NPO


40,43,44,45,48,50 RUN_ON

1
1 2 1 2N7002W-7-F
7 INT_LCD_PWM

1
LCD_ACLK+
1

R463 0_SW TC7SZ32FU(T5L,F,T)


R466 1 2 *0_NC
R460
10K_DIS R465 1 2 *0_NC LCD_BCLK-

2
R83 C71
*0_NC 3.3P/50V/NPO

1
1
LCD_BCLK+

91
93
93

R671 2 1 0_DIS LCD_A2+ R703 2 1 0_DIS LCD_DDCCLK


18 EXT_LCD_A2P 19 EXT_LCD_DDCCLK
R672 2 1 0_DIS LCD_A2- R704 2 1 0_DIS LCD_DDCDAT
18 EXT_LCD_A2N 19 EXT_LCD_DDCDAT
R673 2 1 0_DIS LCD_A1+
18 EXT_LCD_A1P
R674 2 1 0_DIS LCD_A1-
18 EXT_LCD_A1N
R705 2 1 0_SW
7 INT_LCD_DDCCLK
B R675 2 1 0_DIS LCD_A0+ R706 2 1 0_SW B
18 EXT_LCD_A0P 7 INT_LCD_DDCDAT
R676 2 1 0_DIS LCD_A0-
18 EXT_LCD_A0N
R677 2 1 0_DIS LCD_ACLK+
18 EXT_LCD_ACLKP
R678 2 1 0_DIS LCD_ACLK-
18 EXT_LCD_ACLKN

R687 2 1 0_SW
7 INT_LCD_A2P
R688 2 1 0_SW
7 INT_LCD_A2N
R689 2 1 0_SW
7 INT_LCD_A1P
R690 2 1 0_SW
7 INT_LCD_A1N
R691 2 1 0_SW
7 INT_LCD_A0P
R692 2 1 0_SW
7 INT_LCD_A0N
R693 2 1 0_SW
7 INT_LCD_ACLKP
R694 2 1 0_SW
7 INT_LCD_ACLKN
93
R685 2 1 0_DIS LCD_B2+
18 EXT_LCD_B2P
R686 2 1 0_DIS LCD_B2-
18 EXT_LCD_B2N
R679 2 1 0_DIS LCD_B1+
18 EXT_LCD_B1P
R680 2 1 0_DIS LCD_B1-
18 EXT_LCD_B1N
R682 2 1 0_DIS LCD_B0+
18 EXT_LCD_B0P
R681 2 1 0_DIS LCD_B0-
18 EXT_LCD_B0N
R684 2 1 0_DIS LCD_BCLK+
18 EXT_LCD_BCLKP
R683 2 1 0_DIS LCD_BCLK-
18 EXT_LCD_BCLKN

R695 2 1 0_SW
7 INT_LCD_B2P
R696 2 1 0_SW
7 INT_LCD_B2N
R697 2 1 0_SW
7 INT_LCD_B1P
R698 2 1 0_SW
7 INT_LCD_B1N
R699 2 1 0_SW
7 INT_LCD_B0P
R700 2 1 0_SW
54
7 INT_LCD_B0N
R701 2 1 0_SW
81
7 INT_LCD_BCLKP
R702 2 1 0_SW
A 7 INT_LCD_BCLKN 120 A

QUANTA
Title
COMPUTER
LCD CONN

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 23 of 63


5 4 3 2 1
5 4 3 2 1

+3.3V_RUN

1
L12
BLM18PG181SN1

U7

2
+VCC_HDMI 2
VCC
11
VCC

1
C48 15
D
1U/6.3V/X5R C67
0.1U/16V_4
C57 C63
0.1U/16V_4 0.01U/25V/X7R
21
26
VCC
VCC HDMI D

2
6.3 VCC
33
VCC +3.3V_RUN +5V_RUN
40
VCC POWER CN5
46
VCC
64 SHELL1
20

2
EQUALIZATION SETTING SHELL2
21
39 22 HDMI_CLK+_C D26 HDMI_TX2+ 1
PC1:PC0=0:0 8dB 18 EXT_HDMI_TXCP IN_D1+ OUT_D1+ HDMI_CLK-_C D2+
18 EXT_HDMI_TXCN 38 23 RB501V-40 2
PC1:PC0=0:1 4dB Recommanded IN_D1- OUT_D1- HDMI_TX2- D2 Shield
91 3
D2-

1
PC1:PC0=1:0 12dB 42 19 HDMI_TX0+_C HDMI_TX1+ 4

1
18 EXT_HDMI_TXP0 IN_D2+ OUT_D2+ D1+
PC1:PC0=1:1 0dB 41 20 HDMI_TX0-_C R454 0 5
18 EXT_HDMI_TXN0 IN_D2- OUT_D2- D1 Shield
R453 R450 HDMI_TX1- 6
HDMI_TX1+_C *4.7K_NC *4.7K_NC HDMI_TX0+ D1-
18 EXT_HDMI_TXP1 45 16 7
IN_D3+ OUT_D3+ D0+

1
44 17 HDMI_TX1-_C 8

2
18 EXT_HDMI_TXN1 IN_D3- OUT_D3- D0 Shield
SCLZ/SDAZ Low-level input/output Voltage Q53 *FDV301N_NC HDMI_TX0- 9
HDMI_TX2+_C R448 R449 HDMI_CLK+ D0-
CFG01:CFG00=0:0 VIL:<0.4V VOL:0.6V (Default) 18 EXT_HDMI_TXP2 48 13 10
IN_D4+ OUT_D4+ HDMI_TX2-_C HDMI_SCL 2.2K 2.2K CK+
18 EXT_HDMI_TXN2 47 14 1 3 11
CGF01:CGF00=0:1 VIL:<0.36V VOL:0.55V IN_D4- OUT_D4- HDMI_CLK- CK Shield
12

2
CGF01:CGF00=1:0 VIL:<0.44V VOL:0.65V HDMI_SCL_R R52 CK-
18 EXT_HDMI_SCL 9 28 1 2 0 HDMI_SCL 13
SCL SCL_SINK CE Remote
CGF01:CGF00=1:1 VIL:<0.36V VOL:0.6V 14

2
HDMI_SDA_R R51 NC
18 EXT_HDMI_SDA 8 29 1 2 0 HDMI_SDA +3.3V_RUN HDMI_CLK 15
SDA SDA_SINK HDMI_DAT DDC CLK
16
DDC DATA

2
INT_HDMI_HPD 7 30 HDMI_DET_L R42 1K HDMI_DET 17
9 INT_HDMI_HPD HPD HPD_SINK GND
18
HDMI_SDA HDMI_DET +5V
1 3 19
+3.3V_RUN R44 4.7K DDC_EN HP DET
+3.3V_RUN 32 22
R71 *4.7K_NC PC0 DDC_EN SHELL3
3 1 23
R73 4.7K PC1 PC0 GND Q52 *FDV301N_NC SHELL4
4 5
PC1 GND
1

CFG00 34 12 +5V_RUN R447 *0_NC LTS_ABA-HDM-024-P05


R53 DDCBUF_EN GND
35 18
CFG GND R451 0
100K/J_4 24

1
GND
27
C *0_NC GND HDMIF1 C576 C577 C
10 31 29
2

R49 OE# RT_EN# GND 1206L110WR *0.1U_NC 0.1U


9 HDMI_PWR_CTRL 1 2 25 36

2
R74 2 OE# GND
1 3.9K 6 37 72 10
REXT GND
R72 *4.7K_NC PC0
GND GND
43
CONTROL EPAD
49
1

R55 2 HDMI_DET R50 4.7K CFG00


*0/J_4
PQ3
SN75DP139RGZR
1

2N7002W-7-F
2

+3.3V_RUN 52
HDMI Switch Reserve for EMI and close to HDMI CONN

5
INT_HDMI_HPD EXC24CG900U EXC24CG900U
72 2
4 HDMI_TX2+_C 4 3 HDMI_TX2+ HDMI_TX0+_C 2 1 HDMI_TX0+
EXT_HDMI_HPD 19
91 1 HDMI_TX2-_C 1 2 HDMI_TX2- HDMI_TX0-_C 3 4 HDMI_TX0-
10,50 dGPU_PWR_EN

1
R354 U50 L3 L6

3
100K/J 74AHC1G08GW

2
B EXC24CG900U EXC24CG900U B
HDMI_TX1+_C 1 2 HDMI_TX1+ HDMI_CLK+_C 1 2 HDMI_CLK+
HDMI_TX1-_C 4 3 HDMI_TX1- HDMI_CLK-_C 4 3 HDMI_CLK-

L4 L5
66

28
120

A A

QUANTA
Title
COMPUTER
HDMI CONN

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 24 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
A B C D E

+3.3V_RUN
DISPLAY PORT Re-driver

2
R39
100K C31
1U/6.3V/X5R
4 +3.3V_RUN
MINI DISPLAY PORT CONNECTOR

1
+3.3V_RUN
29

DP_TXN0_R
DP_TXP0_R
C32 0.1U/10V/X7R DPF1
DP_S_TXP0 1 2 DP_TXP0_L 1206L150-C

1
DP_S_TXN0 1 2 DP_TXN0_L C25 C20
C34 0.1U/10V/X7R 0.1U/10V/X7R 1U/6.3V/X5R

2
SHIELD1 21
4 +3.3V_RUN 4

1
SHIELD3 23 C3 C575
C35 CN6 SHIELD4
4 0.01U C39
24
220P 10U

36

35

34

33

32

31

30

29

28

2
25 1000P/50V/X7R
PWR 20

VCC

GND

VCC
CAD_INV
IN0n

IN0p

LP#

OUT0p

OUT0n
20
PWR_RET 19
19
DP_HPD 2 HPD
18
1 27
C37 0.1U/10V/X7R GND HPD_INV MUX_AUX_N AUXN
17
GND
18 16
14
DP_S_TXP1 1 2 DP_TXP1_L 2 26 DP_TXP1_R MUX_AUX_P 16 AUXP
IN1p OUT1p 15
CONFIG1 CAD_SINK
14 4 T26
DP_S_TXN1 1 2 DP_TXN1_L 3 25 DP_TXN1_R CONFIG2 6 CONFIG2
IN1n OUT1n 13 T27
C38 0.1U/10V/X7R DP_TXN3_R C9 1 2 0.1U/10V/X7R DP_TXN3_C 12 LANE_3N
12
4 U5 24 DP_TXP3_R 1 2 DP_TXP3_C 10 LANE_3P GND 13
C40 0.1U/10V/X7R VCC VCC C8 0.1U/10V/X7R
11

10
DP_S_TXP2 1 2 DP_TXP2_L 5 23 DP_TXP2_R DP_TXN2_R C11 1 2 0.1U/10V/X7R DP_TXN2_C 17 LANE_2N
IN2p SN75DP120 OUT2p DP_TXP2_R 1 2 DP_TXP2_C 15 LANE_2P
8
9
GND 8
DP_S_TXN2 1 2 DP_TXN2_L 6 22 DP_TXN2_R C10 0.1U/10V/X7R
C41 0.1U/10V/X7R IN2n OUT2n DP_TXN1_R C7 DP_TXN1_C
7
1 2 0.1U/10V/X7R 11 LANE_1N
6
7 21 DP_TXP1_R 1 2 DP_TXP1_C 9 LANE_1P GND 7
C42 0.1U/10V/X7R GND GND C6 0.1U/10V/X7R
5

4
DP_S_TXP3 1 2 DP_TXP3_L 8 20 DP_TXP3_R DP_TXN0_R C5 1 2 0.1U/10V/X7R DP_TXN0_C 5 LANE_0N
IN3p OUT3p DP_TXP0_R DP_TXP0_C LANE_0P
3
GND
1 2 3 2 1
DP_S_TXN3 1 2 DP_TXN3_L 9 19 DP_TXN3_R C4 0.1U/10V/X7R
C43 0.1U/10V/X7R IN3n OUT3n 1

CAD_SINK

HPD_SINK
HPD_SRC

CAD_SRC

AUX_INp

AUX_INn
dp-3v112mc-r1td1-7h-20p-v SHIELD2 22

GND
VDD

VCC
For Mini DP to HDMI and DVI dongle,
10

11

12

13

14

15

16

17

18
4
SINK(Pin13)=Low, the others is high.
+3.3V_RUN +3.3V_RUN
R711 *0_NC
7,19 INT_DP_HPD
C33 CAD_SINK_R 1 2
1U
CAD_SINK C30
DP_HPD R709 1U/6.3V/X5R
R58 100K
51
+3.3V_RUN +3.3V_RUN 1 R710 1 2 DP_HPD

1
R635 1M
1 2 CAD_SINK
1

R38 R35
2

3 *100K_NC 100K 0 0 3
2
2

MUX_AUX_N
MUX_AUX_P
1

R37
100K
R34
*100K_NC
5
2

U8 U10
7 INT_AUX_SINKP C69 1 2 INT_AUX_SINKP_C2 3 INT_SINK_P_R 3 2 INT_DP_SCL 7
0.1U/10V/X7R_SW 1A 1B 1B 1A
0.1U/10V/X7R_SW
7 INT_AUX_SINKN C68 1 2 INT_AUX_SINKN_C5 6 INT_SINK_N_R 6 5 INT_DP_SDA 7
2A 2B 2B 2A

+5V_RUN 8 8 +5V_RUN
VCC VCC

1
C77 1 CAD_SINK CAD_SINK_R 1 C74
1OE CAD_SINK CAD_SINK_R 1OE
4 7 7 4
0.1U/10V/X7R_SW GND 2OE 2OE GND 0.1U/10V/X7R_SW
93

2
SN74CBTD3306CPWR_SW
SN74CBTD3306CPWR_SW

R629 2 1 0_DIS DP_S_TXP2


18 EXT_DPTXP2
R631 2 1 0_DIS DP_S_TXN2
18 EXT_DPTXN2
R637 2 U9
18 EXT_DPTXP1 1 0_DIS DP_S_TXP1
R656 2 1 0_DIS DP_S_TXN1 EXT_DP_AUXDP_L 3 2 EXT_DP_AUXDP EXT_DP_AUXDP 18
18 EXT_DPTXN1 1B 1A
R657 2 1 0_DIS DP_S_TXP0
18 EXT_DPTXP0
R658 2 1 0_DIS DP_S_TXN0 EXT_DP_AUXDN_L 6 5 EXT_DP_AUXDN EXT_DP_AUXDN 18
18 EXT_DPTXN0 2B 2A
R659 2 1 0_DIS DP_S_TXP3 8 +5V_RUN
18 EXT_DPTXP3 VCC
R660 2 1 0_DIS DP_S_TXN3
18 EXT_DPTXN3

1
CAD_SINK_R 1 C73
CAD_SINK_R 1OE
7 4
2OE GND 0.1U/10V/X7R_DIS

2
SN74CBTD3306CPWR_DIS
R661 2 1 0_SW
7 INT_DP_TXP2
R662 2 1 0_SW
7 INT_DP_TXN2
R663 2 1 0_SW
7 INT_DP_TXP1
2 R664 2 1 0_SW C79 0.1U/10V/X7R_DIS 2
7 INT_DP_TXN1
EXT_DP_AUXDN_L 1 2 EXT_DP_AUXDN
R665 2 1 0_SW EXT_DP_AUXDP_L 1 2 EXT_DP_AUXDP
7 INT_DP_TXP0
R667 2 1 0_SW C60 0.1U/10V/X7R_DIS
7 INT_DP_TXN0
R666 2 1 0_SW
7 INT_DP_TXP3
R668 2 1 0_SW
7 INT_DP_TXN3

93
EXT_DP_AUXDN_L R632 2 1 0_DIS MUX_AUX_N
EXT_DP_AUXDP_L R633 2 1 0_DIS MUX_AUX_P

INT_SINK_N_R R669 2 1 0_SW


INT_SINK_P_R R670 2 1 0_SW

OE Output

1 L A=B 1

H Z

QUANTA
COMPUTER
WWW.MANUALS.CLAN.SU
Title
Display Port CONN

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 25 of 63


A B C D E
A B C D E

+CR_PWR +3.3V_CARD +DVDD18 +APVDD +3.3V_CARD +3.3V_CARD


(>40mil) 2.2uF cap is no more than
250mils away from the power

1
pin and a have a min trace C574
2.2U/6.3V
(>20mil) width of 40mils. CC0603 19

2
R440 *0_short CON5
R443 SD_MS_XD-D2 1 24
*0_short SD_MS_XD-D3 SD-9(D2) SD(SW.COM) SD_CD#
2 SD-1(D3) SD(SW.CD) 25
SD_MS_XD-D4 3 26
SD-CMD_MS-BS_XD-WE# MMC-10(D4) XD-1(CDSW) XD_CD#
4 27
SD_MS_XD-D5 SD-2(SD_CMD) XD-0(GND) XD-R/B#
5 28
1 +3.3V_RUN +VDD33 MMC-11(D5) XD-2(R/-B) XD-RE# 1
(>40mil) 6
SD-3(VSS) XD-3(RE)
29
SD-CLK_MS-CLK_XD-CE#
7 30
SD-4(VDD) XD-4(CE) XD-CLE
8 31
C541 C539 MS-10(VSS) XD-5(CLE) XD-ALE
9 32
22U/6.3V_8 0.1U SD-CLK_MS-CLK_XD-CE# MS-9(VCC) XD-6(ALE) SD-CMD_MS-BS_XD-WE#
10 33
R438 *0_short SD_MS_XD-D3 MS-8(SCLK) XD-7(WE) SD-WP_XD-WP#
11 34
MS_CD# MS-7(D3) XD-8(-WP)
12 35
SD_MS_XD-D2 MS-6(INS) XD-9(GND) SD_MS_XD-D0
13 36
SD_MS_XD-D0 MS-5(D2) XD-10(D0) SD_MS_XD-D1
14 37
SD_MS_XD-D1 MS-4(D0) XD-11(D1) SD_MS_XD-D2
15 38
SD-CMD_MS-BS_XD-WE# MS-3(D1) XD-12(D2) SD_MS_XD-D3
16 39
MS-2(BS) XD-13(D3) SD_MS_XD-D4
17 MS-1(VSS) XD-14(D4) 40
SD-CLK_MS-CLK_XD-CE# 18 41 SD_MS_XD-D5
+DVDD18 +VDD33 SD_MS_XD-D6 SD-5(CLK) XD-15(D5) SD_MS_XD-D6
19 MMC-12(D6) XD-16(D6) 42
20 43 SD_MS_XD-D7
SD_MS_XD-D7 SD-6(GND) XD-17(D7)
21 MMC-13(D7) XD-18(VCC) 44
SD_MS_XD-D0 22 45 SD-WP_XD-WP#
SD-7(D0) SD(SW.WP)

1
SD_MS_XD-D1 23 C571 C781
SD-8(D1) *270P/25V_NC *270P/25V_NC

1
C572 ALPS

2
C559 C558 C560 C557 C776 C777 5in1-5-250907001000-9-45p
0.1U 0.1U 0.1U 0.1U 270P/25V *10P_NC *10P_NC

2
SD_MS_XD-D1 R435 1 2 *0_NC

C552
*10P_NC

2 2

SD_MS_XD-D4
SD_MS_XD-D5
SD_MS_XD-D6
SD_MS_XD-D7
+3.3V_CARD

XD-RE#
+VDD33
R445 10K SD-WP_XD-WP#

R442 1K XD-R/B# U35 +3.3V_SUS

36
35
34
33
32
31
30
29
28
27
26
25
MIDO Single End = 50 ohm

SPI_SI
SPI_SO
TAV33

MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
SPI_SCK
SPI_CSN
GND
GND
37 24 SD-WP_XD-WP#
+3.3V_RUN +DVDD18 DV18 MDIO6
38 23 XD-R/B# R444
GND MDIO13 XD-ALE *10K_NC
39 22
XD-CLE TXIN MDIO14
40 21
R437 10K XD-CLE SD-CMD_MS-BS_XD-WE# MDIO7 CR1_LEDN
41 20
SD-CLK_MS-CLK_XD-CE# R436 0 SD-CLK_MS-CLK_XD-CE#_R42 MDIO4
MDIO5
JMB389 DV33
DV33
19
+VDD33
43 18 +DVDD18
R446 200K XD-ALE SDDV33_18 DV18
+VDD33 44 17 +CR_PWR CPPE_N# 10
C551 SD_MS_XD-D3 DV33 CR1_PCTLN SD_CD#
45 16
3 22P/50V_4 SD_MS_XD-D2 MDIO3 CR1_CD0N MS_CD# 3
46 15
MDIO2 CR1_CD1N

3
C555 SD_MS_XD-D1 47 14 XD_CD#
2.2U SD_MS_XD-D0 MDIO1 CR1_CD2N CPPE_N#_C
48 13 2
MDIO0 CPPE_N
APREXT
APCLKN
APCLKP

APGND
APVDD

APRXN
APRXP
XRSTN

APTXN
APTXP
XTEST

APV18

C573 Q51

1
*2N7002W-7-F_NC
10U Needs close to Pin17: 12mil/<250mil
MIDO[0..5] Single Skew JMB389-LGAZ0C Layout Note:
1
2
3
4
5
6
7
8
9
10
11
12

Card Reader interface signal mapping


Should be smaller +/- 100 mil Place this cap close to pin 18 PIN Default SD / MMC MS XD
for SDA3.Application
12K

MDIO00 SD/MMC/MS/xD SD_D0 MS_D0 XD_D0


+APV18

MDIO01 SD_D1 MS_D1 XD_D1


MDIO02 SD_D2 MS_D2 XD_D2
R441

R434 *0_short MDIO03 SD_D3 MS_D3 XD_D3


3,9,16,27,29,30,31,39 PLTRST# MDIO04 SD_CMD MS_BS XD_WE#
MDIO05 SD_CLK MS_CLK XD_CE#
MDIO06 SD_WP XD_WP#
9 CLK_PCIE_CRN MDIO07 XD_CLE
9 CLK_PCIE_CRP MDIO08 MMC_D4 MS_D4 XD_D4
C556
*0.1U_NC MDIO09 MMC_D5 MS_D5 XD_D5
10 +APVDD +APVDD MDIO10 MMC_D6 MS_D6 XD_D6
X7R MDIO11 MMC_D7 MS_D7 XD_D7
(20mil) MDIO12 XD_RE#
+APV18 MDIO13 XD_R/B#
MDIO14 XD_ALE
CR1_LEDN SD_LED# MS_LED# XD_LED#
C567 C564 C568 C566 C565 CR1_PCTLN SD_PWR# MS_PWR# XD_PWR#
CR1_CD0 SD_CD#
10U 0.1U 1000P 0.1U 10U CR1_CD1 MS_CD#
CR1_CD2 XD_CD#

4 4

PCIE_TXP5
9 PCIE_TXP5 PCIE_TXN5
9 PCIE_TXN5
QUANTA
9 PCIE_RXN5
9 PCIE_RXP5
C569
C570
0.1U/10V_4
0.1U/10V_4
PCIE_RXN5_C
PCIE_RXP5_C
Title
COMPUTER
Card Reader 8 IN 1

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 26 of 63


A B C D E
5 4 3 2 1

U18
84 +RTC_CELL
34 KSO[0..16] +3.3V_ALW
3 R96 1 2 *0_short
34 KSI[0..7] ITE8502E VBAT1
VCC 11 +3.3V_RUN
SMBDAT0 4 3 RP5
SMBCLK0 2 1 2.2KX2
LQFP-128L

2
57 KSO17/GPC5 VSTBY1 26 +3.3V_ALW
KSO16 56 50 C104 SMBDAT1 4 3 RP4
KSO15 KSO16/GPC3 VSTBY2 0.1U/16V_4 SMBCLK1
55 92 2 1 2.2KX2

1
KSO14 KSO15 VSTBY3
54 KSO14 VSTBY4 114
+3.3V_ALW KSO13 53 121 16 SMBDAT2 4 3 RP3
KSO12 KSO13 VSTBY5 SMBCLK2
52 KSO12/SLCT VSTBY6 127 2 1 2.2KX2
KSO11 51
KSO10 KSO11/ERR
46
KSO9 KSO10/PE +3.3V_RUN
45
KSO9/BUSY
2

2
KSO8 44 66
D KSO8/ACK ADC0/GPI0 HWPG 40,42 D
C145 C102 C620 C105 C161 KSO7 43 67
KSO6 KSO7/PD7 ADC1/GPI1 SUS_PWR_ACK IMVP6_PROCHOT# 42 IRQ_SERIRQ
10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 42 68 R100 1 2 10K/F_4
1

1
KSO5 KSO6/PD6 ADC2/GPI2 SUS_PWR_ACK 7
603 41 KEYBOARD 69 EXT_LVDS_BLON 19
6.3 16 16 16 16 KSO4 KSO5/PD5 ADC3/GPI3 LED_WLAN_OUT# LED_WLAN_OUT# R161 1
40 70 LED_WLAN_OUT# 29 2 10K/F_4
KSO3 KSO4/PD4 ADC4/GPI4
39 71 PBAT_PRES# 51
KSO2 KSO3/PD3 ADC5/GPI5 +3.3V_SUS
38 72 IINP 41
KSO1 KSO2/PD2 ADC6/GPI6
Layout Note: Place these caps close to ITE8502 37
KSO1/PD1 ADC/DAC ADC7/GPI7
73 SIO_SLP_S5# 7
KSO0 36
KSO0/PD0 SUS_PWR_ACK R160 10K/J_4
76 USBP0_BUS_SW_CB0 32
KSI7 DAC0/GPJ0 AC_PRESENT R475 10K/J_4
KSI6
65
64
KSI7 DAC1/GPJ1
77
78
SIO_EXT_WAKE# 10 117 TS_PD# R713 10K/J_4
KSI5 KSI6 DAC2/GPJ2
63 KSI5 DAC3/GPJ3 79 LAN_PCIE_PWR_CTRL# 31
KSI4 62 80
KSI3 KSI4 DAC4/GPJ4 PCH_RSMRST# 7
61 81 1 2 SIO_PWRBTN# 7
KSI2 KSI3/SLIN DAC5/GPJ5 SUS_ON R149 2
60 KSI2/INT 1 100K/J_4
KSI1 59 D18 RB751V40T1G IMVP_VR_ON R159 *100K/J_NC
KSI0 KSI1/AFD GPC4 R90 100K/J
58 KSI0/STB
PWM0/GPA0 24 BREATH_LED# 35
PWM1/GPA1 25 BAT2_LED 35
R97 1 2 *0_short22 28
3,9,16,26,29,30,31,39 PLTRST# CLK_PCI_8502 LPCRST/WUI4/GPD2 PWM2/GPA2 FAN1_PWM 36
9 CLK_PCI_8502 13
6
LPCCLK PWM3/GPA3 29
30
PWM_VADJ 23 109
8,29 LPC_LFRAME# LFRAME PWM4/GPA4 BAT1_LED 35
8,29 LPC_LAD0 10 LAD0 PWM5/GPA5 31 KB_BACKLITE_EN 34
8,29 LPC_LAD1 9 LAD1 PWM PWM6/GPA6 32 USB_CHG_DET#_R 35
8,29 LPC_LAD2 8 LAD2 PWM7/GPA7 34 BEEP 37
8,29 LPC_LAD3 7 LAD3
TACH0/GPD6 47 FAN1_TACH 36
SERIRQ 93 48
SC(V1.0)P38: 7 CLKRUN# IRQ_SERIRQ CLKRUN/GPH0/ID0 TACH1/GPD7 PANEL_BKEN 7
8 IRQ_SERIRQ
5 SERIRQ LPC
8.2-k pull-up to +V3.3S D13 2 RB751V40T1G
1 15 120 GPC4 1 2
CRB uses a 10-k pull-up to +V3.3S. 10 SIO_EXT_SMI# ECSMI/GPD4 TMRI0/WUI2/GPC4 THERMAL_INT# 19,20
D14 2 RB751V40T1G
1 23 124
10 SIO_EXT_SCI# ECSCI/GPD3 TMRI1/WUI3/GPC6 SIO_SLP_S3# 7
D19 2 RB751V40T1G
1 126 D12 RB751V40T1G
C 10 SIO_A20GATE GA20/GPB5 C
17 LPCPD/WUI6/GPE6
23 LCD_TST
D20 2 RB751V40T1G
1 4 108
10 SIO_RCIN# WRST# KBRST/GPB6 RXD/GPB0 TP_LED2 34
14 WRST TXD/GPB1 109 H_CPUDET# 3
16 119 CPU_TYPE
23 LCD_BAK PWUREQ/GPC7 GPC0 CPU_TYPE 44
IR/UART CTX0/GPB2 123 RUN_ON_1 40 117
19 94 TS_PD#
37,38 NB_MUTE# L80HLAT/GPE0 CRX1/GPH1/ID1 TS_PD# 35
R98 *0_short 20 95 IMVP_VR_ON
8,37 ICH_AZ_CODEC_RST# L80LLAT/WUI7/GPE7 CTX1/GPH2/ID2 IMVP_VR_ON 42

SMBCLK0 110
41,51 SMBCLK0 SMCLK0/GPB3
SMBDAT0 111 100 SUS_ON
41,51 SMBDAT0 SMDAT0/GPB4 FLFRAME/GPG2/LF SUS_ON 43,50
FLRST/GPG0/TM 106 KB_DET# 34
SMBCLK1 115 104
9 SMBCLK1 SMBDAT1 SMCLK1/GPC1 FLAD3/GPG6 SLP_M# 7
9 SMBDAT1 116
SMDAT1/GPC2 SMBUS LPC/FWH
103 EC_FLASH_SPI_DO
SMBCLK2 117
FLASH FLAD2/SO
102 EC_FLASH_SPI_DIN EC_FLASH_SPI_DO 28
20,36 SMBCLK2 SMBDAT2 SMCLK2/GPF6 FLAD1/SI EC_FLASH_SPI_CS# EC_FLASH_SPI_DIN 28
20,36 SMBDAT2 118 101 EC_FLASH_SPI_CS# 28
SMDAT2/GPF7 FLAD0/SCE EC_FLASH_SPI_CLK
105 EC_FLASH_SPI_CLK 28
FLCLK
PC169 12P/50V Layout Note: Place PC169 close to ITE8502 Board ID Straps
8 PCH_GPIO33 85
GPU_TYPE PS2CLK0/GPF0
86 82 PCH_PWRGD 7
PS2DAT0/GPF1 EGAD/GPE1 +3.3V_ALW +3.3V_ALW
EGPC EGCS/GPE2
83 ALW_ON 35,46
51 PS_ID 87 84 PC_BEEP_EN 37,38
PS2CLK1/GPF2 EGCLK/GPE3
34 LID_SW# 88
PS2DAT1/GPF3 PS/2
36 74
34 CLK_TP_SIO 89
PS2CLK2/GPF4 108

1
90 96 BID1
34 DAT_TP_SIO PS2DAT2/GPF5 GPH3/ID3 USB_BACK_EN#
97 R478 R156 R163 R158
GPH4/ID4 Config_0 USB_BACK_EN# 32
GPIO 98 10K/J *10K/J_NC *10K/J_NC 10K/J
GPH5/ID5 Config_1
B
VGA Strap GPH6/ID6
99
B
ITE8502_XTAL1 128 107

2
CK32K GPG1/ID7
+3.3V_ALW ITE8502_XTAL2 2 R95 *100K/J_NC
53
CK32KE +3.3V_ALW
ITE8502IX_JX 12 18 Config_0 USB_BACK_EN#
VCORE RI1/WUI0/GPD0 MEDIA_INT# 39
1 21 2 1 ACAV_IN 35,41
VSS1 RI2/WUI1/GPD1
1

27 35 RB751V40T1G D15
VSS3 WUI5/GPE5 IMVP_PWRGD 36,42
R165 49
VSS4 AC_PRESENT Config_1 BID1
N11P-GT *10K/J_NC 91
VSS5 RING/PWRFAIL/LPCRST/GPB7
112 AC_PRESENT 7
113
+3.3V_ALW VSS6
122 125
2

VSS7 PWRSW/GPE4 SYS_PWR_SW# 35


L23 BLM11A05S
GPU_TYPE 74 33
AVCC GINT/GPD5 LCDVCC_TST_EN 23

2
603 75
AVSS
2

C162
1

N11P-GE 0.1U/16V_4 ITE8502E R477 R155 R162 R157


R164 L22 lqfp128-16x16-4 *10K/J_NC 10K/J_4 10K/J *10K/J_4_NC
1

10K/J_4 16

1
603
BLM11A05S
2

ITE8502IX_JX
2

32KHz Clock. C91


0.1U/16V_4 CHECK MAIL 11/25 1101
ITE8502_XTAL2 +3.3V_ALW USB_BACK_EN# BID1 GM6/GM6B
1

+3.3V_ALW 16 0 0 SSI (X00)


Config_0 Config_1 GM6/GM6B 0 1 PT (X01)

1
0 0 UMA 1 0 ST (X02)
2

R172 0 1 Studio Swtichable 1 1 QT (A00)


CLK_PCI_8502 10K 1 0 Studio Discrete 0 0 (A01)
A W3 A
R94
100K/J_4 4 1 ITE8502_XTAL1 input H level =1.05V for ARD CPU_TYPE
3 2

R99 input L level=0V for CFD


1

D16 3 2 10/J_4 H:CFD


1 2 WRST# 1 2 2 Q28
20,36 THERM_STP#
*RB751V40T1G_NC
C622 32.768KHZ
18P/50V_4
C621
18P/50V_4
5 H_VTTVID1
R179 10K
UMT3904 L:ARD QUANTA
1
1

C103
1U/10V_6
603
50 50
C90
2.2P/50V_4
R167
100K Title
COMPUTER
2

10 Ultra I/O Controller ECE5028

WWW.MANUALS.CLAN.SU 50
1

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 27 of 63


5 4 3 2 1
5 4 3 2 1

For EC 8Mbit (1M Byte) RTC BATTERY


+3.3V_ALW +3.3V_ALW

+RTC_CELL
57

1
+3.3V_RTC
R483

1
10K/J_4
R479
100 100 U41 10K/J_4
1
D34
2

2
1 8 RB751V40T1G
27 EC_FLASH_SPI_CS# CE# VDD
27 EC_FLASH_SPI_CLK 6

2
D
R484 1 SCK D
27 EC_FLASH_SPI_DIN 2 15/J_4 EC_FLASH_SPI_DIN_R 5 SI
R481 1 2 15/J_4 EC_FLASH_SPI_DO_R 2 7 +3.3V_ALW +PWR_SRC
27 EC_FLASH_SPI_DO SO HOLD#

2
3 W P# VSS 4
C625
MX25L8005M2C-15G 0.1U/16V_4 U34

1
1 2 3 OUT IN 1
16 D25 4
RB751V40T1G 5/3#

1
C553 2 GND C554
2.2U/6.3V/0603 SHDN 5 *1U_NC
603 *MAX1615EUK-T+_NC 805

2
6.3 25

RTCBT1
1 2 +RTC_1 1 2 +RTC 1 2
RTCD1 RTCR1 1K
For PCH 32Mbit (4M Byte) AAA-BAT-054-K01

2
C561 RB751V40T1G
1U
603

1
10
0
RTC-BATTERY
16
+3.3V_RUN +3.3V_RUN
87
C C

R426
10K/J_4
R423
U33 10K/J_4 +3.3V_RUN
iTPM ENABLE/DISABLE
SPI_CS0# R420 15/J_4 SPI_CS0#_R 1 8
8 SPI_CS0# CE# VDD
SPI_CLK R425 15/J_4 SPI_CLK_R 6
8 SPI_CLK SCK
SPI_SI R427 15/J_4 SPI_SI_R 5 R428 *1K_NC SPI_SI
8 SPI_SI SI
SPI_SO R422 15/J_4 SPI_SO_R 2 7
8 SPI_SO SO HOLD#
C548 3 4
22P/50V_4 W P# VSS C545 TPM Function R428
W25Q64BVSSIG 0.1U/10V_4
50 Enable Mount
10
Disable NC
(Default)

B B

A A

QUANTA
Title
COMPUTER
FLASH/RTC

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 28 of 63


5 4 3 2 1
1 2 3 4 5 6 7 8

MiniCard WLAN connector 55


81
120
+3.3V_RUN +3.3V_RUN +1.5V_RUN

J12 It is for debug only


A it can remove at QT. A
7,31,39 PCIE_WAKE# 1 W AKE# 3.3V_1 2
COEX2_WLAN_ACTIVE 3 4
COEX1_BT_ACTIVE_MINI RESERVED_1 GND0
5 RESERVED_2 1.5V_1 6
MINI1CLK_REQ# MINI1CLK_REQ# 7 8 R575 1 2 0
9 MINI1CLK_REQ# CLKREQ# UIM_PW R LPC_LFRAME# 8,27
9 10 R576 1 2 0
GND1 UIM_DATA LPC_LAD3 8,27
1

11 12 R577 1 2 0
9 CLK_PCIE_MINI1N REFCLK- UIM_CLK LPC_LAD2 8,27
C775 13 14 R578 1 2 0
9 CLK_PCIE_MINI1P REFCLK+ UIM_RESET LPC_LAD1 8,27
*220P_NC 15 16 R579 1 2 0
LPC_LAD0 8,27
2

GND2 UIM_VPP
It is for debug only
50 it is can remove at QT.
R595 1 2 *0_short 17 18
3,9,16,26,27,30,31,39 PLTRST# R596 1 CLK_LPC_DEBUG_R UIM_C8 GND3 WLAN_RADIO_OFF#
9 CLK_LPC_DEBUG 2 *0_short 19 UIM_C4 W _DISABLE# 20
21 GND4 PERST# 22 PLTRST# 3,9,16,26,27,30,31,39
9 PCIE_RXN2 23 PERn0 3.3VAUX1 24 +3.3V_RUN
9 PCIE_RXP2 25 PERp0 GND5 26
27 GND6 1.5V_2 28
29 30 WLAN_SMBCLK_C R572 1 2WLAN_SMBCLK
*0_short
GND7 SMB_CLK
PCI-Express TX and RX 9 PCIE_TXN2 31 PETn0 SMB_DATA 32 WLAN_SMBDATA_C R573 1 *0_short
2WLAN_SMBDATA
direct to connector 33 34 +3.3V_RUN
9 PCIE_TXP2 PETp0 GND8
35
37
GND9 USB_D- 36
38
USBP4- 9 120
10 PCIE_MCARD1_DET# RESERVED_3 USB_D+ USBP4+ 9
39 RESERVED_4 GND10 40 USB_MCARD1_DET# 9

4
2
41 RESERVED_5 LED_W W AN# 42
43 RESERVED_6 LED_W LAN# 44 LED_WLAN_OUT# 27
45 46 RP14
T38 PAD RESERVED_7 LED_W PAN# 2.2KX2
Non-iAMT T39 PAD 47
49
RESERVED_8 1.5V_3 48
50 Q50
T40 PAD RESERVED_9 GND11

2
51 52 2N7002W-7-F

3
1
RESERVED_10 3.3V_2
B B
WLAN_SMBCLK 1 3 PCH_SMBCLK 9
13,14,30,33 WLAN_SMBCLK
LTS_AAA-PCI-092-K01

1 2
Suport for WoW Q8 R433 *0_NC
+1.5V_RUN +3.3V_RUN Place caps close to connector.
WLAN_RADIO_OFF# +3.3V_RUN
WLAN_RADIO_DIS# 10
D33 Q48

2
RB751V40T1G 2N7002W-7-F
1

2
+ C481
1 2 Prevent backdrive when C766 C768 C765 C764 C767 C771 C763 *330U/6.3V_NC WLAN_SMBDATA 1 3
13,14,30,33 WLAN_SMBDATA PCH_SMBDATA 9
R571 *0_NC 0.047U 0.047U 0.1U 0.047U 0.1U 0.047U 4.7U 7343
WoW is enabled.
2

2
805 6.3
10 10 16 10 16 10 10

1 2
R432 *0_NC

Support Dell BT375 (Little Stone) module (XPS) W TO B


59 +3.3V_RUN
C C
55
J9
120 81
USB_DP 12
11
USBP8+ 9 120
USB_DN USBP8- 9
GND 10
VMAIN 9
8 COEX2_WLAN_ACTIVE
COEX2_W LAN_ACT
RADIO_DIS 7 BT_RADIO_DIS# 10
LINK_IND 6
BT_PRI_STATUS 5
BT_COEX_STATUS2 4
3 COEX1_BT_ACTIVE_MINI
COEX1_BT_ACTIVE
MOD_DET 2 BT_DET# 9
GND 1

50208-01201-001
2
1

C112 R113 C128 C617 C616


0.1U 10K 33P 100P 0.1U
2

2
1

D D

QUANTA
Title
COMPUTER
WLAN

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 29 of 63


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A A

MiniCard WWAN connector


+3.3V_RUN +3.3V_RUN +3.3V_RUN +1.5V_RUN

J13

R439 1K 1 2
W AKE# 3.3V_1
T24 PAD 3 RESERVED_1 GND0 4
T25 PAD 5 RESERVED_2 1.5V_1 6
7 8 UIM_PWR
CLKREQ# UIM_PW R UIM_DATA
9 GND1 UIM_DATA 10
11 12 UIM_CLK
9 CLK_PCIE_MINI3N REFCLK- UIM_CLK UIM_RESET
9 CLK_PCIE_MINI3P 13 REFCLK+ UIM_RESET 14
15 16 UIM_VPP
For TVT20-J Card GND2 UIM_VPP

83 55
1 2 17
19
UIM_C8 GND3 18
20
81
R655 0/J UIM_C4 W _DISABLE# WWAN_RADIO_DIS# 10
B 21
23
GND4 PERST# 22
24
PLTRST# 3,9,16,26,27,29,31,39 120 B
9 PCIE_RXN1 PERn0 3.3VAUX1 +3.3V_RUN
9 PCIE_RXP1 25 PERp0 GND5 26
27 GND6 1.5V_2 28
29 GND7 SMB_CLK 30 WLAN_SMBCLK 13,14,29,33
PCI-Express TX and RX 9 PCIE_TXN1 31 PETn0 SMB_DATA 32 WLAN_SMBDATA 13,14,29,33
direct to connector 9 PCIE_TXP1 33 PETp0 GND8 34
35 GND9 USB_D- 36 USBP5- 9
10 PCIE_MCARD2_DET# 37
39
RESERVED_3 USB_D+ 38
40
USBP5+ 9 120
RESERVED_4 GND10 USB_MCARD2_DET# 10
41 RESERVED_5 LED_W W AN# 42 PAD T42
43 RESERVED_6 LED_W LAN# 44
45 RESERVED_7 LED_W PAN# 46
47 RESERVED_8 1.5V_3 48
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52

LTS_AAA-PCI-092-K01

JSIM3 ESD4 +1.5V_RUN +3.3V_RUN Note:Place caps close to connector.


UIM_PWR UIM_RESET UIM_VPP UIM_PWR
1 VCC GND 5 1
2
1 6 6
5 UIM_PWR
33
UIM_RESET UIM_VPP UIM_CLK 2 5 UIM_DATA
2 RST VPP 6 3 3 4 4
2

1
UIM_CLK 3 7 UIM_DATA C612 C603 C613 C604 C609 C795 C793 C791 C563 C792 C794 + C562
CLK DATA 33P 33P 33P 33P 1U 0.047U 33P 33P 0.047U 33P 0.047U 100U
C
IP4220CZ6 C
4 8 603
1

2
Case_GND Case_GND 50 50 50 50 10 10 50 50 10 50 10 6.3
Lotes_YCA-MSD-004-K01

Place as close as possible to JSIM3 connector

D D

QUANTA
Title
COMPUTER
WWAN

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 30 of 63


1 2 3 4 5 6 7 8
5 4 3 2 1

+1.05V_LAN_S
+3.3V_LAN +3.3V_LAN
+1.05V_LAN

L20
R146 *0_short +3.3V_LAN +3.3V_SUS
C147 C151
D D
4.7uH_680mA_DCR=0.12 @7.96MHz C101 C92 C93 C134 C94 C120 4.7U 0.1U
C150 C99 C96 C95 C107 C126 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 6.3 10
C148 C152 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 10 10 10 10 10 10 X5R X7R
4.7U 0.1U 10 10 10 10 10 10 R91 *0_short X7R X7R X7R X7R X7R X7R
6.3 10 X7R X7R X7R X7R X7R X7R
X5R X7R 603

Place Close to LAN chip, pin 34 and 35


Place Close to LAN chip, pin 12, 27, 39, 42, 47 48
For L50, C420, C62 need to check layout guild Close to pin 3, 6, 9, 13, 29, 41 and 45

+1.05V_LAN +3.3V_LAN +1.05V_LAN +3.3V_LAN +3.3V_LAN


LAN_XTALO
R107 0 RJ-45 Connector 1
Y3 CON3 ALLTOP_C100A3
R103 2.49K/F LAN_XTALI 1 3
2 4

25MHz

LAN_XTALO
+3.3V_LAN RJ45-TX3- 8

LAN_XTALI
C111 C110 RJ45-TX3+ 8
7
R132 1K 27P 27P RJ45-TX1- 7
6
50 50 RJ45-TX2- 6
5
NPO NPO RJ45-TX2+ 5
4
RJ45-TX1+ 4
3
RJ45-TX0- 3
9 VIA ON CHIP SET, FOOTPRINT UPDATE 2
2
U15 RJ45-TX0+

48
47
46
45
44
43
42
41
40
39
38
37
1
+1.05V_LAN_S +3.3V_LAN 1

AVDD33

AVDD1
CKXTAL2
CKXTAL1

LED0
VDD3
RSET

GPO/SMBALERT
AVDD33(NC)

AVDD3(AVDD1)
VDD1(NC)

LED1/EESK
49
GND +3.3V_LAN
C +3.3V_LAN +1.05V_LAN O G C
R144
TRD0+ 1 36 0
MDIP0 SROUT1

CHSGND1
CHSGND2
TRD0- 2 35
MDIN0 VDDSR
3 34
TRD1+ AVDD1(NC) VDDSR Enable +1.05VLAN_S R145 *0_NC
4 33
TRD1- MDIP1 ENSR
5 32 2 1
MDIN1 EEDI/SDA R143 10K
6 31
TRD2+ AVDD1(NC) LED3/EDO
7 RTL8111E-VB-GR 30 2 1

9
10
TRD2- MDIP2(NC) EECS/SCL R142 10K
8 29 +1.05V_LAN
MDIN2(NC) DVDD1
9 28 PCIE_WAKE# 7,29,39
TRD3+ AVDD1(NC) LANWAKEB
10 27 +3.3V_LAN
TRD3- MDIP3(NC) VDD3 ISOLATE#
11 26
MDIN3(NC) ISOLATEB
SMBDATA(NC)

12 25 R136 *0_short
AVDD3(NC) PERSTP PLTRST# 3,9,16,26,27,29,30,39
SMBCLK(NC)

REFCLK_M
REFCLK_P
CLKREQB

Wait for Connector list to update


GNDTX
DVDD1

EVDD1

HSON
HSOP
HSIN
HSIP

+1.05V_LAN
13
14
15
16
17
18
19
20
21
22
23
24

69 +3.3V_RUN

R104 2 1 10K
+1.05V_LAN
R644 0 R140
Check point:
9 LOM_CLK_REQ# 1. LOM_CLK_REQ# and PCIE_WAKE# needs to be pull up by PCH side
*1K/F_NC
R121 *0_short
2. PCIE_TX must have AC cap at PCH side
9 PCIE_TXP6
9 PCIE_TXN6
C130 C129 R139 100/F
1U 0.1U ISOLATE#
9 CLK_PCIE_LOMP LAN_PCIE_PWR_CTRL# 27
6.3 10
9 CLK_PCIE_LOMN
X5R X7R
C135 0.1U/16V/X7R PCIE_RXP6_C 2 1 Isolate# is for power saving.
9 PCIE_RXP6
C140 0.1U/16V/X7R PCIE_RXN6_C R141
B 9 PCIE_RXN6 It needs to pull low when system state in S3, S4, and S5. B
*15K/F_NC D17 *RB501V-40_NC
pull high when system at S0 state

L35
95 +3.3V_LAN 24 TXCT0
TDCT MCT0
1
ESD6 TCT0 RJ45-TX0+
23
TRD2- TRD3+ TRD0+ TX0+
1 6 2
R19 75/F TXCT0 1 6 TD0+ RJ45-TX0-
2 5 22
R18 75/F TXCT1 TRD2+ 2 5 TRD3- TRD0- TX0-
3 4 3
R17 75/F TXCT2 3 4 C149 TD0- TXCT1
21
R16 75/F TXCT3 SRV05-4.TCT 0.1U MCT1
4
10 TCT1 RJ45-TX1+
20
X7R TRD1+ TX1+
5
C582 TD1+ RJ45-TX1-
19
1000P TRD1- TX1-
6
3KV TD1- TXCT2
18
1808 MCT2
7
TCT2 RJ45-TX2+
17
TRD2+ TX2+
8
+3.3V_LAN TD2+ RJ45-TX2-
124 TRD2- 9
TX2-
16

ESD5 TD2- TXCT3


15
TRD0- TRD1+ MCT3
1 6 10
1 6 TCT3 RJ45-TX3+
2 5 14
TRD0+ 2 5 TRD1- C597 TRD3+ TX3+
3 4 11
3 4 C146 0.01U TD3+ RJ45-TX3-
13
SRV05-4.TCT 0.1U TRD3- TX3-
12
10 25 TD3-
X7R LFE9276C-R

A A

QUANTA
Title
COMPUTER
WWW.MANUALS.CLAN.SU
Reserver for EMI Size
LAN

Document Number Rev


GM6 2B

Date: Saturday, June 26, 2010 Sheet 31 of 63


5 4 3 2 1
1 2 3 4 5 6 7 8

ESATA + USB Conn + Power Share


+5V_ALW
FS5 *455/5A_NC
1 2
+USB_BACK_PWR

R452 0_0805 U36 CN7 This pin connects to 3VALW ON POWER LOGIC
A
1 2 2 IN GND 1 15 GND GND 14 A
11 13 USB_CHG_DET#
GND DETECT USB_CHG_DET# 35
USBP2+_R 10 12
USBP2-_R D+ GND
27 USB_BACK_EN# 3 EN1# OUT1 7 9 D- GND 17
8 +USB_BACK_PWR 8 4
OC1# USB_OC1# 9 VBUS GND ESATA_TX4-_C C585 0.01U/25V ESATA_TX4-_R
7 GND A- 3
4 6 ESATA_RX4+_R C586 0.01U/25V ESATA_RX4+_C 6 2 ESATA_TX4+_C C587 0.01U/25V ESATA_TX4+_R
1 EN2# OUT2 B+ A+

1
C588 C583 5 ESATA_RX4-_R C584 0.01U/25V ESATA_RX4-_C 5 1
*10U_NC 0.1U/10V OC2# B- GND
16 GND
805 10
2

2
6.3 TPS2062DR FOX_3Q38131-R33C1B-8H

USB_BACK_EN# needs to be low when system S3 and S5 for USB charge

+USB_BACK_PWR
+USB_BACK_PWR 55
120
1

ESD3
1

1
+ C581 C580 C578 C579 USBP2-_R 1 6 L7
150U/6.3V/73 10U 0.1U/10V 0.1U/10V 1 6 USBP2+_L USBP2+_R
2 2 5 5 2 1
USBP2+_R 3 4 USBP2-_L 3 4 USBP2-_R
2

2
3 4
*SRV05-4.TCT_NC DLP11SN900HL2L

B B

+USB_BACK_PWR
E-SATA Re-driver
+5V_ALW
Layout Note: Please put those on the same side of MB PCB
C12 0.1U +3.3V_RUN Note: Boost:5dB, Standard SATA:0dB
R21 *0_short 1 2
EN D0 D1 CH : 0 CH : 1
2

R12 R14 0 X X Standby Standby


*75K_F_NC *43.2K_F_NC U3 C15 C17 C19 +3.3V_RUN
7 1U 0.1U/ 10V 0.01U 1 0 0 Standard SATA Standard SATA
VCC USBP2+_L 25
2
1

RES_DIV_D+ DP USBP2-_L
5 RDP DM 3 1 1 0 Boost Standard SATA
RES_DIV_D- 6 RDM
1 0 1 Standard SATA Boost
2

9 USBP2+ 9 TDP
1 1 1 Boost Boost

20

10

16

24

25

26
9 USBP2- 8 TDM

6
R11 R15 U4
0 *49.9K_F_NC 1

VCC

VCC

VCC

VCC

GND

GND

GND
27 USBP0_BUS_SW_CB0 CB0
10 4
1

CB1 GND C21 0.01U/16V ESATA_TX4+_L ESATA_TX4+_R


8 SATA_TXP4 1 RX_0P TX_0P 15

MAX14550E C22 0.01U/16V ESATA_TX4-_L 2 14 ESATA_TX4-_R


C 8 SATA_TXN4 RX_0N TX_0N C

EC needs to drive CB0/CB1 pins to low C23 0.01U/16V ESATA_RX4-_L 4 12 ESATA_RX4-_R


8 SATA_RXN4 TX_1N RX_1N +3.3V_RUN
when system S3/S5 and dirve high when system S0. 8 SATA_RXP4
C24 0.01U/16V ESATA_RX4+_L 5 TX_1P RX_1P 11 ESATA_RX4+_R

U49 PN and Footprint needs to double check +3.3V_RUN R32 1 2 *100K_NC 7 9 R24 *4.7K_NC
EN D0

GND

GND

GND

GND

GND

GND

GND

GND
CB0 CB1 Function 8 R28 *4.7K_NC
D1
R15 needs to be 49.9K_F if we use external resisters. SN75LVCP412
0 0 Auto Detection active

17

19

18

13

21

22

23

2
1 1 USB Function only R27 R29
*0_NC *0_NC

(5V)-43.2K-(D-)-49.9K-GND (about 2.68V)

1
(5V)-75.0K-(D+)-49.9K-GND (about 2.00V)

D D

QUANTA
Title
COMPUTER
Right PUSB/ESATA

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 32 of 63


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CON4
SATA Connector. DG: Place TX cap close to connector ODD Connector
GND1 1
RXP 2 SATA_TXP0_C C497 0.01U/16V SATA_TXP0 8 CN12
DG: Place TX cap close to connector
3 SATA_TXN0_C C489 0.01U/16V SATA_TXN0 8
RXN S1
60 GND2 4
5 SATA_RXN0_C C506 0.01U/16V GND1 1
2 SATA_TXP1_C C779 0.01U/16V
TXN SATA_RXN0 8 TXP SATA_TXP1 8
6 SATA_RXP0_C C505 0.01U/16V 14 3 SATA_TXN1_C C780 0.01U/16V SATA_TXN1 8
TXP SATA_RXP0 8 14 TXN
GND3 7 GND2 4
5 SATA_RXN1_C C495 0.01U/16V
RXN SATA_RXN1 8
6 SATA_RXP1_C C500 0.01U/16V
RXP SATA_RXP1 8
A 3.3V_0 8 +3.3V_RUN GND3 7 A
9 S7
3.3V_1 P1
3.3V_2 10 DP 8
GND4 11 +5V 9
GND5 12 +5V 10 +5V_RUN
GND6 13 15 15 MD 11
5V_0 14 +5V_RUN GND 12
5V_1 15 GND 13
16 P6
5V_2 48325-1106
GND7 17
18 FFS_INT2_R
RSVD
GND8 19
12V_0 20
12V_1 21
12V_2 22

67492-1441

+5V_RUN
Layout Note:Place caps close to connector.

C483 C488 C492 C491 C490

B *10U/10V/0805_NC 1U/10V/0603 0.1U/16V 0.1U/16V 1000P B


+5V_RUN

Layout Note:Place caps close to connector.

C543 C540 C542 C550 C549 C547

10U 1U/10V/0603 0.1U/16V 0.1U/16V 0.1U/16V 1000P

C C

3-axis Fall Sensor (HDD data protector)


+3.3V_RUN U20 +3.3V_RUN +5V_RUN

1 VDD_IO SCL 14 WLAN_SMBCLK 13,14,29,30


1

1
C166 C165 2 13
GND1 SDA WLAN_SMBDATA 13,14,29,30
10U 0.1U/10V
603 3 12 R431
2

6.3 Reserved1 SDO 100K

2
4 11 67

2
GND2 Reserved2
5 10 FFS_INT2 1 3 1 2 FFS_INT2_R
GND3 GND4 D24 RB751V40T1G
6 9 R150 *0_short FFS_INT2 Q49
VDD INT2 FFS_INT2 10
2N7002W-7-F
DE351DL is ST vender for DELL Part Number 7 8 R151 *0_short
Vender PN: LIS302DLTR CS INT1 PCH_IRQH_GPIO2 9
Quanta PN: AL000302A00
DE351DLTR

D D

QUANTA
Title
COMPUTER
SATA (HDD&CD_ROM)

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 33 of 63


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

KEYBOARD CONNECTOR
Touch Pad 116 R469 1 2 10K/J_4
17
+3.3V_SUS
27 KSO[0..16] JKB3
+5V_RUN ON:White light on
OFF:Amber light on 27 KSI[0..7] 27 KB_DET# 1 1
KSI7 2
KSI6 2
3 3
KSI4 4 4

1
3
+3.3V_SUS +3.3V_SUS KSI2 5
KSI5 5
6 6
RP15 KSI1 7
A
4.7KX2 KSI3 7 A
8 8

1
KSI0 9
KSO5 9
10
2
4 10
R154 KSO4 11
100K KSO7 11
12 12
KSO6 13

2
KSO8 13
CN4 14 14
KSO3 15
27 LID_SW# KSO1 15
8 16 16
L40 1 2 BLM18AG601SN1D TP_CLK KSO2 17
27 CLK_TP_SIO 7 17
603 KSO0 18
L39 6 18
27 DAT_TP_SIO 1 2 BLM18AG601SN1D TP_DATA
5
KSO12 19 19
603 KSO16 20
4 KSO15 20
+5V_RUN 3 21 21
TP_LED2_AMBER KSO13 22
2 22

1
KSO14 23
1 23

1
C634 C635 KSO9 24 24
1

10P 10P C220 C235 KSO11 25

2
C632 C633 0.1U 0.047U ACS_88513-0841 KSO10 25
26

2
26

1
10P 10P 27
2

27

1
C160 28
0.047U C630 28
29 31

2
0.1U 29 31
30 32

2
30 32

FH28-60(30)SB-1SH(86)

CP7 *100PX4_NC CP3 *100PX4_NC


B C615 *100P/50V_NC KSI7 8 7 KSO13 8 7 KSO10 B
50 6 5 KSO15 6 5 KSO11
53 4 3 KSO16 4 3 KSO9
2 1 KSO12 2 1 KSO14

1206 50 1206 50

TP_LED2_AMBER R486 2 1 220

CP5 *100PX4_NC CP6 *100PX4_NC


8 7 KSO8 8 7 KSO0

3
6 5 KSO6 6 5 KSO2
2 Q65 4 3 KSO7 4 3 KSO1
27 TP_LED2
2N7002W-7-F 2 1 KSO4 2 1 KSO3

1
1206 50 1206 50

CP8 *100PX4_NC CP4 *100PX4_NC


8 7 KSI6 8 7 KSO5
6 5 KSI2 6 5 KSI0
4 3 KSI5 4 3 KSI3
2 1 KSI4 2 1 KSI1
1206 50 1206 50

Layout Note: 100P CAPS CLOSE TO JKB3

C C

Key board illumination

+KB_LED
+KB_LED power trace width >10 mil +KB_LED
J8
R316 100K 1 1
8 KB_LED_DET 1 2 2 2

1
+5V_RUN +KB_LED 3 3
1

1206L050YR LED_PWM 4 C417


4 0.1U/16V_4
1 2

2
FS3 1206 R317 88513-044N
200K 16
Q39 18
2

NTR4503NT1G

LED_PWM 3 1

D D
2

27 KB_BACKLITE_EN
QUANTA
Title
COMPUTER
TOUCH PAD, BULE TOOTH & FIR

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 34 of 63


1 2 3 4 5 6 7 8
A B C D E

Touch Screen Module HDD activity LED.


+3.3V_RUN +5V_RUN

+3.3V_SUS
55 Power button for Engineer
118 81
36
120

1
R76 0
77 SW3

2
98 603
117 J4
61 47K
Q63 POWER_ SW_IN0# 1 2
1

+3.3V_TS DDTA114YUA-7-F
4
C806 C75
120 1 8 SATA_ACT# 1 3 2 3 4 4
9 USBP12- 2 10K
10U 0.1U 9 USBP12+ DHPSKRBAA00
2

6.3 10 R712 0 3 Q62


27 TS_PD# 4
X5R 2N7002W-7-F

3
5 R472 220
HDD_LED 39
ACS_88460-0501

75

+3.3V_ALW
3VALW ON POWER LOGIC
118
+5V_SUS
+3.3V_ALW
78 U53

2
4 VPP PGOOD 1
R57
2 6 +3.3V_TS 100K
10 TS_EN VEN VO
3 D5

1
VIN

2
8 +5V_ALW2
GND
ADJ

9 5 R64
GND NC 32 USB_CHG_DET# USB_CHG_DET#_R 27
R654 C803 100K
C802 C804 *RT9025-25GSP_NC *31.6K/F_NC *10U_NC
7

*10U_NC *1U_NC 6.3 BAS316

1
6.3 10 X5R

2
X5R X5R 1 2
R636 *10K/F_NC R65 R56
D10
3 100K 100K 3
SYS_PWR_SW# 27

1
BAS316

1
C56
0.1U
Battery status.

2
POWER_ SW_IN0# 16
+5V_ALW2 39 POWER_ SW_IN0# 3.3V_ALW_ON 20
+3.3V_ALW +3.3V_ALW
1

D9
1

3
R77
100K 2 Q9
2

47K 2N7002W-7-F
2

1
BAS316

1
1 3 2 D6
10K C53
Q13 *0.1U_NC

2
3

2N7002W-7-F Q16 10
2 DDTA114YUA-7-F
68
27 BAT1_LED
3

BAS316
Q18
1

3
2N7002W-7-F 2 1 RBAT1_LED 39
R79 *0_short 2 Q11
27,46 ALW_ON
2N7002W-7-F

1
3
109 +3.3V_ALW +3.3V_ALW 2 Q12
27,41 ACAV_IN
2
2N7002W-7-F 2

1
1

R200
100K
47K
2

2
10K
3

Q15
2 DDTA114YUA-7-F
27 BAT2_LED
3

Q41
1

2N7002W-7-F 2 1 RBAT2_LED 39
R78 *0_short +3.3V_ALW

BREATH_LED# C84 *100P_NC 50

2
POWER_ SW_IN0# C70 *100P_NC 50
*DA204U_NC
D11
+3.3V_SUS +5V_SUS +5V_SUS BR_LED 39

3
POWER_ SW_IN0#

R88
100K
2

1 1

1 3 2 4 BR_LED R89 1 2 100 BREATH_PWRLED BREATH_PWRLED 39


27 BREATH_LED#
Q20
2N7002W-7-F
U11
TC7SZ04FU(T5L,F,T)
QUANTA
3

Title
COMPUTER
SWITCH, KEYBOARD & LED&Touch Screen Module

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 35 of 63


A B C D E
1 2 3 4 5 6 7 8

+5V_RUN +5V_RUN

D32
*SSM34PT_NC
1 2

2
J11
+5V_FAN *DA204U_NC C623
1 D31 1U/10V_6
A 2 A
U40

3
3

1
C629 C628 MLX_53398-0371 1 8
2.2U 0.1U VEN GND
1 2 7

2
805 +5V_FAN VIN GND
3 VO GND 6
16 16 R476 180K 4 5
27 FAN1_PWM SET GND

G990P11U
+5V_RUN R480 4.7K C624
FAN1_TACH 27
1000P/50V_4

+3.3V_RUN

2
B B

4
2
Q75
1 3 SMBCLK2 20,27
RP21
2.2KX2
2N7002W-7-F +3.3V_RUN

3
1

2
EC_SMBCLK2
15,39 EC_SMBCLK2
Note:Place under CPU 10/20mils Q76
EC_SMBDAT2 1 3
15,39 EC_SMBDAT2 SMBDAT2 20,27
REM_DIODE1_P 2N7002W-7-F
+3.3V_RUN
U29
3

C674 C477 1 8 EC_SMBCLK2


Q72 *2200P_NC 2200P VDD SCL
2
MMST3904-7-F 2 7 EC_SMBDAT2
2

DP SDA
1

50 REM_DIODE1_N 50 3 6 THERM_ALERT#
DN ALERT#
4 SYS_SHDN# GND 5

1.Place C477 close to EMC1422 EMC1422-1-ACZL-TR


2.Place C674 to be close to Q72
1

Total capacitance between D+/D- is 2200pF(max)


C774
if use 2200pF for C477, then C674 should be dummy 0.1U SYS_SHDN#
2

C C
10

OTP 85 degree C
27,42 IMVP_PWRGD
R333 1 2 10K/F THERM_ALERT#
14 +3.3V_RUN
2

R593 1 2 6.8K/F SYS_SHDN#

1 3 THERM_STP# 20,27

Q74
2N7002W-7-F

D D

QUANTA
Title
COMPUTER
FAN & THERMAL

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 36 of 63


1 2 3 4 5 6 7 8
A B C D E

AUD_HP2_L
>20mil
R101 0 AUD_HP1_L
0603 Need close to +5V_RUN R75 *0_short +5V_AVDD +3.3V_RUN R59 *0_short DVDD_IO
R67 0 AUD_HP2_R 0603 0603
0603 ALC665
R130 0 AUD_HP1_R
0603 C62 C45 C51 C52
58 R80 0 10U 0.1U 10U 0.1U
0603 0805 0805
R222 0 +5V_AVDD
0603
R61 1 2 0 C54 C65 C61 Close to pin 25
2.2U 10U 0.1U

SENSEB
C50 0805
Tied at one point only under the 2.2U
ALC665 or near the ALC665
+3.3V_RUN +3.3V_RUN
DMIC_CLK_L
U6 76

36

35

34

33

32

31

30

29

28

27

26

25
+5V_AVDD
DMIC_DATA_L
15

Sense B

MIC2-OUT-L

LINE2-OUT-L

MIC2-OUT-R

LINE2-OUT-R

CPVEE

CBN

CBP

MIC1-VREFO

VREF

AVSS1

AVDD1
C544 0.1U
R630 10 X7R
38 MONO_OUT 37 24 AUD_MIC_R C47 10K
Mono-out LINE1-R(PORT-C-R) C36
38 23 AUD_MIC_L *22P/50V_NC *22P/50V_NC
AVDD2 LINE1-L(PORT-C-L)

5
D3 U52
38 AUD_SPKR_L 39 SURR-L(PORT-A-L) MIC1-R(PORT-B-R) 22 27,38 NB_MUTE# 1 2 RB751V40T1G 2
4 AMP_SHUTDOWN#
AMP_SHUTDOWN# 38
R45 20K/F 40 21 D4 1
JDREF MIC1-L(PORT-B-L) EAPD# 1 2 RB751V40T1G
38 AUD_SPKR_R 41 20 TC7SZ32FU(T5L,F,T)
SURR-R(PORT-A-R) LINE2-VREFO
42 AVSS2 MIC2-VREFO 19 56
43 18 AUD_MIC1_VREF
NC LINE1-VREFO 27,38 PC_BEEP_EN
44 DMIC-CLK3/4 MIC2-IN-R(PORT-F-IN-R) 17

45 SPDIFO2 MIC2-IN-L(PORT-F-IN-L) 16

D7
R41 22 DMIC_CLK_L 46 15 AUD_PC_BEEP R87 49.9K 1 2
GPIO0/DMIC-1/2

GPIO1/DMIC-3/4

23 DMIC_CLK DMIC-CLK1/2 LINE2-IN-R(PORT-E-IN-R) 38 AUD_PC_BEEP BEEP 27


RB751V40T1G
38 EAPD# EAPD# 47
SDATA-OUT
14
EAPD LINE2-IN-L(PORT-E-IN-L) D8

SDATA-IN

DVDD-IO

PCBEEP
RESET#
SPDIF_OUT BIT-CLK SENSEA R92
48 13 1 2
DVDD1

DVSS1

DVSS2
SPDIFO Sense A SPKR 8

SYNC
1K RB751V40T1G
+3.3V_RUN
ALC665
Analog
1

10

11

12
R43 *0_short
Digital *47K_NC
DVDD_IO

0805 C55 *0.1U_NC R62 1 2 AUD_PC_BEEP


C44 C46 10 X7R
10U 0.1U R63 *4.7K_NC
0805 ICH_AZ_CODEC_BITCLK SENSEB
1
ICH_AZ_CODEC_RST# 8,27
JACK SENSE 1

ICH_AZ_CODEC_SYNC 8
AZ_CODEC_SDIN0 R60 22
PCH_AZ_CODEC_SDIN0 8
ICH_AZ_CODEC_BITCLK
ICH_AZ_CODEC_BITCLK 8
R54 R46 R47
ICH_AZ_CODEC_SDOUT 8
DMIC_DATA_L R48 22 *22_NC 39.2K/F 20K/F
DMIC_DATA 23

HP1_JD HP2_JD

C49 SENSEA
C58 270P 50 X7R C59 *100P_NC 50 NPO *1P_NC
CN10 50
5 C64 270P 50 X7R C66 *100P_NC 50 NPO COG
3 R66
2 AUD_HP1_L2 L10 AUD_HP1_L1 R68 56 AUD_HP1_L 10K/F
4 AUD_HP1_R2 L11 BLM18BD601SN1D AUD_HP1_R1 R70 56 AUD_HP1_R
6 1 HP1_JD BLM18BD601SN1D Reserve for EMI MIC1_JD
3

FOX_JAS333L-BD4T0-7F 74
2 JK_MUT 2 JK_MUT
R648 1K R649 1K
JACK1(HP1) 112 Q14 Q10
1

MMST3904-7-F MMST3904-7-F SPDIF Control


C27 C29 C26 *100P_NC 50 NPO +3.3V_RUN +3.3V_RUN
CN9 270P 270P
X7R X7R C28 *100P_NC 50 NPO
10 4
5 HP2_JD 50 50
99

1
2 AUD_HP2_L2 L8 AUD_HP2_L1 R33 56 AUD_HP2_L
3 AUD_HP2_R2 L9 BLM18BD601SN1D AUD_HP2_R1 R36 56 AUD_HP2_R SPDIF_VCC 3 1
9 1 JACK_DET# BLM18BD601SN1D R508
+3.3V_RUN Q8 220K
3

6 SPDIF_OUT AO3413 Q17

1
IC SPDIF_VCC JK_MUT JK_MUT C796 R152 R585 10K
DRIVE
7
8
2
R650 1K
2
R651 1K
74 79 0.22U 100K AMP_SHUTDOWN# 2 1 2 MMST3906-7-F
Q6 Q5 25
112
1

FOX_2FKT411-2195B-7H MMST3904-7-F MMST3904-7-F X5R

3
R230 R153 R69 1K JK_MUT
JACK2(HP2) 100K 100K
C13 C16

1
CN8 270P 270P C76

3
5 X7R X7R 10U
3 50 50 HP2_JD 2 Q61 603

2
2 AUD_MIC_L2 R25 75/F AUD_MIC_L1 C14 4.7U 6.3 X5R AUD_MIC_L 2N7002W-7-F 6.3
4 AUD_MIC_R2 R30 75/F AUD_MIC_R1 C18 4.7U 6.3 X5R AUD_MIC_R

1
6 1 MIC1_JD
3

FOX_JAS333L-BD4T0-7F
QUANTA
3

JK_MUT JK_MUT
2
R652 1K
2
R653 1K
74 JACK_DET# 2 Q73
JACK3(MIC) Q3 Q4 2N7002W-7-F
COMPUTER
1

MMST3904-7-F MMST3904-7-F
1

Title
Audio CODEC
R31 4.7K D27 BAS316 AUD_MIC1_VREF

WWW.MANUALS.CLAN.SU R26 4.7K D28 BAS316


Size Document Number
GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 37 of 63


A B C D E
1 2 3 4 5 6 7 8

Main Speaker AMP 2*3W/4ohm LC Filter need close to


C121 C127 0.1U Io=0.866A connector
+PWR_SRC 1U 50 X7R >40mil
25
X7R
U17

22

21
3
L19
27 2 AMP_SPKL- AMP_SPK_JK_L-

C1N
BOOT

C1P
PVDD OUTL- HCB1608KF-601T10
30 PVDD OUTL- 1

A C100 A
C123 C109 C119 C113 330P
22U 22U 0.1U 0.1U 50
25 25 50 50 X7R
32
X7R X7R X7R X7R 28 PGND
29 L17 L54
PGND AMP_SPKL+ AMP_SPK_JK_L+
OUTL+ 32
HCB1608KF-601T10 LQH55PN220MR0L
AUD_SPKR_L2 R128 16.5K/F AUD_SPKR_L2_FBL 31
OUTL+
R133 100K 5 C88
FBL 330P
AUD_SPKR_L C139 0.033U AUD_SPKR_L1 R123 16.5K/F C137 3300P AUD_SPKR_L3 C141 0.1U AUD_SPKR_L4 6 7 50
10 X7R 10 X5R 10 X5R INL N.C. X7R J6
8 1
R135 20K/F N.C. 1
2
AUD_PC_BEEP C143 0.1U AUD_PC_BEEP_L R137 182K/F 2
17 3
10 X7R
AUD_SPKR_R2 R129 16.5K/F AUD_SPKR_R2_FBL
MAX9736AETJ+ N.C.

EPAD
33
4
3
4
R134 100K 19
FBR 1775295-4
AUD_SPKR_R C136 0.033U AUD_SPKR_R1 R122 16.5K/F C138 3300P AUD_SPKR_R3 C142 0.1U AUD_SPKR_R4 18
10 X7R 10 X5R 10 X5R INR
L15 L55
R131 20K/F 26 AMP_SPKR+ AMP_SPK_JK_R+
AUD_PC_BEEP C144 0.1U AUD_PC_BEEP_R R138 182K/F OUTR+ HCB1608KF-601T10 LQH55PN220MR0L
10 X7R 25
C154 1U OUTR+
16
10 X7R VS C82
330P
13 50
AGND X7R
14
AGND
AUD_PC_BEEP L14
37 AUD_PC_BEEP
C155 1U 15 24 AMP_SPKR- AMP_SPK_JK_R-
AUD_SPKR_L 10 X7R REG OUTR- HCB1608KF-601T10

REGEN
B B

MONO
37 AUD_SPKR_L

MUTE
SHDN
C153 1U 12 23

MOD
AUD_SPKR_R 10 X7R COM OUTR- C78
37 AUD_SPKR_R
330P
AMP_SHUTDOWN# 50

10

11

20

4
37 AMP_SHUTDOWN#
X7R
MONO_OUT
37 MONO_OUT
PC_BEEP_EN AMP_SHUTDOWN#
27,37 PC_BEEP_EN

SPK_MUTE# R117 0/F +5V_RUN


R115 0

SUBWOOFER AMP 0603

C98 0.1U
4W/4ohm LC Filter need close to
+PWR_SRC C106 50 X7R Io=1A connector
1U >40mil
25
X7R U14

22

21
3
27 2 SUB_OUT- L18 SUB_OUT_JK-

C1N
BOOT

C1P
PVDD OUTL- PBY201209T-601Y-N
30 1
PVDD OUTL- CN11
C97
C81 C80 C87 C86 330P 2
22U 22U 0.1U 0.1U 50 2
1
25 25 50 50 X7R 1
X7R X7R X7R X7R 28
PGND MLX_53398-0271
29
PGND SUB_OUT+ L16 SUB_OUT_JK+
32
SUB_FB_L2 R105 10K/F SUB_FB_L4 OUTL+ PBY201209T-601Y-N
C C
31
OUTL+
SUB_FB_L R628 0 SUB_FB_L1 R109 10K/F R707 1 2 0 SUB_FB_L3 R708 1 2 0 R110 1 2 *100K/F_NC 5 C85
0603 FBL 330P
R116 *20K/F_NC SUB_IN_L 6 7 50
INL N.C. X7R
8
N.C.
AUD_SPKR_L C125 0.47U SUB_R R120 7.15K/F R106 3.01K/F SUB_FB_L 17
AUD_SPKR_R C117
6.3 X5R
0.47U SUB_L R111 7.15K/F
MAX9736AETJ+ N.C.

EPAD
33
6.3 X5R SUB_R1 R112 9.09K/F SUB_R2 C116 0.022U 19
MONO_OUT R119 FBR
1 2 *0_NC 16 X7R
18
C124 INR
0.068U
10 26
X5R OUTR+
25
C133 1U OUTR+
16
10 X7R VS
+5V_RUN SUBWOOFER TEST 13
AGND
14
R126 AGND
R147 R127 100K R125 R124
100K 100K 100K 100K C132 1U 15 24
10 X7R REG OUTR-
REGEN

MONO
MUTE
SHDN

C131 1U
76 12 23

MOD
SPK_MUTE# WOOFER_MUTE# 10 X7R COM OUTR-
3

10

11

20

4
Q26 2 2
3

2N7002W-7-F Q22
1

D 2PC_BEEP_EN 2N7002W-7-F EAPD# NB_MUTE# TEST_WOOFER_EN SPK_MUTE# WOOFER_MUTE# AMP_SHUTDOWN# D

Q80 0 0 0 L L
1
3

2N7002W-7-F
2 2 0 0 1 L L WOOFER_MUTE# R102 0/F +5V_RUN
27,37 NB_MUTE# TEST_WOOFER_EN 10
Q25 Q23 0 1 0 L L
1

2N7002W-7-F 2N7002W-7-F
0 1 1 L L QUANTA
3

37 EAPD# 2
1 0 0 L L
COMPUTER
WWW.MANUALS.CLAN.SU 1 0 1 L(Disable SPK) H(Test Woofer) Title
Q24 AUDIO AMP
1

2N7002W-7-F 1 1 0 H(Test SPK) L(Disable Woofer)


Size Document Number Rev
1 1 1 H H GM6 2B

Date: Friday, June 25, 2010 Sheet 38 of 63


1 2 3 4 5 6 7 8
5 4 3 2 1

J7
71
85
+5V_ALW 1
2
1 110
2 LED5
3
4
3 90
4 R40
5 5 111 1 2 499 2 1
D
6 6 D
White
68 7
8
7
R639 8
35 RBAT1_LED 1 2 499 9 9
LED4
R640 1 2 330 10
35 RBAT2_LED 10
11 R13 1 2 499 2 1
35 HDD_LED 11
12 12
13 White
13
14 14
15 LED3
15
16 16
17 R23 1 2 499 2 1
17 35 BR_LED
18 18
19 White
19
20 20
21 21
9 PCIE_RXN4 22 22 41 41
9 PCIE_RXP4 23 23 42 42
24 24
9 PCIE_TXN4 25 25
9 PCIE_TXP4 26 26
27 27
9 CLK_PCIE_USB30N 28 28
9 CLK_PCIE_USB30P 29 29
30 30
9 SMI# 31 31
9 CLK_PCIE_USB30_REQ# 32 32
7,29,31 PCIE_WAKE# 33 33
3,9,16,26,27,29,30,31 PLTRST# 34 34
35 35
C +3.3V_SUS 36 36
C
37 37
38 38
+1.5V_SUS 39 39
40 40

HRS_FH28-40S-0.5SH(05)
70

+3.3V_RUN +5V_RUN

B B
J5
12
11 14
15,36 EC_SMBCLK2 10 13
15,36 EC_SMBDAT2 9
27 MEDIA_INT# 8
35 BREATH_PWRLED 7
R641 1 2 499 6
35 RBAT1_LED
R642 1 2 330 5
35 RBAT2_LED
35 POWER_ SW_IN0# 4
3
2
68 1

PTI_AF712L-N2G1Z

A A

QUANTA
Title
COMPUTER
Left USB / MMB CONN

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 39 of 63


5 4 3 2 1
1 2 3 4 5 6 7 8

A A

+3.3V_SUS

C534
0.1U

5
42 VR_PWRGD_CLKEN# 2 4 R402 *0_short
CK_PWRGD_R 15
U31
TC7SZ04FU(T5L,F,T)

3
B +3.3V_ALW B

+3.3V_SUS U13

5
74AHC1G08GW
43 1.5V_DDR_PWRGD 2
R183 0 4
44 1.05V_VTT_PWRGD RUN_ON 23,43,44,45,48,50
27 RUN_ON_1 1
R181
100K

3
R168 0
45 1.05V_PWRGD

R169 0_DIS HWPG


10,18 dGPU_PWROK HWPG 27,42
R114 *0_NC

R180 0
47 iGFX_CORE_PWRGD
+3.3V_RUN
R108 *10K_NC RUN_ON

R170 0
48 1.8V_RUN_PWRGD
R118 *10K_NC RUN_ON_1
R171
2K/F
C C

1 2 H_VTTPWRGD
H_VTTPWRGD 3
D21 RB751V40T1G

VTTPWRGOOD
R182 SC(V1.0)P18:
1K/F VTT_1.1 VR power good signal
to processor. Signal voltage level
is 1.1 V.

D D

QUANTA
Title
COMPUTER
System Reset Circuit

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 40 of 63


1 2 3 4 5 6 7 8
A B C D E

40

1 +PWR_SRC 1

PQ32
FDS6679AZ
40
1 8
2 7
PQ35 3 6
FDS6679AZ 5
PJP13
8 1 PR160

1 4
+DC_IN_SS 7 2 2 1 1 2 CHGR_IN +DC_IN_SS
+DC_IN_SS 2 1
6 3 4 4 3 3
5
0.01_3720 POWER_JP PR3

4
470K

2
CSSN_1
CSSP_1
1 2 1 2
3 PR166 10K PR167 100K

2
PR155 PR153
PQ36 10/F 10/F
1

2N7002W-7-F

PC153
+DC_IN_SS 2 1
2 0.1U/10V 2
Place these CAPs

CSSN
CSSP
close to MOSFETs
PR8 49.9/F_0603

PC140
1

1U/25V_0805
PR161 PC144 PC8 PC7 PC145
215K/F PR147 0_0603 86

2200P/50V

0.1U_25V_0603
28

27
2

10U/25V_1206
*10U/25V_1206_NC
PR158
+VCHGR

CSSP
NC

CSSN
2

LDO 49.9K/F 22 PC136 1U/10V_0603


DCIN LDO
2 1 2 1 Fs=400K
1

1
8731_ACIN 25 BST
2 1 2
ACIN BST
PC141 Max : 4.5A

5
6
7
8
PR146 PC159 0.01U/25V PR144 0.1U_25V_0603

1
10K/F 4.7/F_0603 PQ33
21 4 SI4128DY
2

LDO PC146 1U/10V_0603 PR157


27,35 ACAV_IN 13

2
ACOK PL5 0.01_3720
26 2 1 PJP12
VCC
1

+3.3V_ALW 11 4.7UH 20% 5.6A_7x7_MPLC0730L4R7

1
2
3
VDD DHI CHG_CS1 +VCHGR_P
24
PR148 DHI 10*10.1 1 2 2 2 1 +VCHGR 51
1 2 3 3
4 4

5
6
7
8

2
15.8K/F PC147 0.1U/10V 23 LX PC4
LX 1000P/50V PC10 PC11 PC12 POWER_JP
2

DLO CSIP_1 CSIN_1

*3300P/50V_NC

*1000P/50V_NC

*2200P/50V_NC
10 20 4

2 1
27,51 SMBCLK0 SCL DLO

1
9 PC13
27,51 SMBDAT0 SDA

0.1U/25V_0603
14 19 PC161 PC156
PR216 0 NC PGND PR10

1
2
3

2
10U/25V_1206

10U/25V_1206
IINP_R 8 18 PQ29 1 PR163 PR162
27 IINP IINP CSIP
12H
Adress :

SI4128DY 10/F 10/F

2
17

1
3 CSIN 3

2
41 8731CCV 6 PC137
CCV

1
2 1 SJ10
PR159 CSIP close to

1
PR145
2

2.21K/F 5 15 FBSA 2 1 0.1U/10V output Cap


NC FBSA CSIN
100
16
8731CCS FBSB
4
CCS
GND
1

NC

3
REF
1

PC154 PC157 PC160 ISL88731A


7

12
1

0.1U/10V 0.01U/25V 0.01U/25V PC248 PU7


*0.01U/25V_NC
2

FBSA_1
SJ9
1 2
1 2
+VCHGR
GNDA_CHG Control IC: ISL88731A
H/S MOSFET: FDS8884(Fairchild), Qg=13nC, Rds(on)=30mohm, PD:2.5W
L/S MOSFET: FDS8884(Fairchild), Qg=13nC, Rds(on)=30mohm, PD:2.5W
Inductor: 5.8UH +-30% 5.5A SDSL10D40F-5R8Y(TTA), DCR=21mohm
Output Cap: 2*10U 25V(+-10%,X6S,1206)

4 4

QUANTA
Title
COMPUTER
Charger (ISL88731)

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 41 of 63


A B C D E
5 4 3 2 1

+PWR_SRC PJP6

+CPU_PWR_SRC

PJP7
PC168 PC167 PC166
+ + +

100U/25V

100U/25V
*100U/25V_NC
+CPU_PWR_SRC
119
+VCC_CORE
TDC:40A
D D
Max current: 52A

1
PC87 PC89 PC220 PC77 PC208
PC88

2200P/50V

10U/25V/1206

10U/25V/1206

10U/25V/1206
1U/25V

0.1U/50V/0603
2

2
50
603
PQ18

5
6
7
8
9
NTMFS4943N

3212_DH1 4
+5V_SUS

+VCC_CORE

1
2
3
1 2 PL12 0.36uH_30A_ETQP4LR36WFC
2 1+VCC_CORE
PR198 10_0603
PC100

3
PC222 PQ53
PR102 *0_NC 1U/6.3V 3212_LX1 PC217

330U/2V/ESR6
5

1
H_DPRSLPVR
27,40 HWPG NTMFS4935N 1000P/50V/0805 + + PC93

5
6
7
8
9
PC90

330U/2V/ESR6_DIS
0.1U/16V/0603
27 IMVP_VR_ON

2
5
H_PSI#
GND_VHCORE 3212_DL1 4
+3.3V_RUN PR217 0 +5V_SUS PR196 PR82
1_1206 10_F_0603
42

1
2
3
5

5
H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6
PR95

PR93

PR89

PR87
PR203 PR204

PR222
1.91K/F 1.91K/F PR103
40 VR_PWRGD_CLKEN# *47K_NC
+CPU_PWR_SRC

0_0603
PR85
*0_NC
+1.05V_PCH 0 0
27,36 IMVP_PWRGD
0_4

0_4
PR205 CPU_BST1

1
*0_NC GND_VHCORE PC209 PC78 PC97 PC207 PC96
48

47

46

45

44

43

42

41

40

39

38

37

2200P/50V

10U/25V/1206

10U/25V/1206

10U/25V/1206
0.1U/50V/0603
5C I_MON

2
C
VID0

VID1

VID2

VID3

VID4

VID5

VID6

DPRSLP

PH0

PH1
PSI

VCC
PC98 PQ17
48 PR206 0.22U/25V_0603
2

5
6
7
8
9
GND_VHCORE

5.1K/F 1 36 NTMFS4943N

2
PC229 EN BST1
0.068U/10V/0603 2 35 3212_DH1 3212_DH2 4
PWRGD DRVH1
3 34 3212_LX1
1

IMON SW1 +VCC_CORE

1
2
3
PC225 PR83 PL11 0.36uH_30A_ETQP4LR36WFC
4 33
1000P/50V CLKEN SWFB1 +5V_SUS 3212_LX2
100/F 2 1 +VCC_CORE
5 32
FBRTN PU5 PVCC

3
PC228 150P/50V ADP3212MNR2G 3212_DL1 PC221
6
FB DRVL1
31 PQ52
1 2
7 30 NTMFS4935N PC213

5
6
7
8
9

1
PC227 150P/50V PC226 COMP PGND 4.7U/6.3V_0603 1000P/50V/0805 + PC206
PR208 PR210
12P/50V 8 29 3212_DL2 PC91

*330U/2V/ESR6_NC
TRDET DRVL2 3212_DL2 4

0.1U/16V/0603
1.65K/F 39.2K/F

2
PR84 PR81
9 28
VARFR SWFB2 PR193 10_F_0603
100/F
10 27 3212_LX2 1_1206

1
2
3
+5V_SUS VRTT SW2
PR202 11 26 3212_DH2
+3.3V_SUS 5.1K_F TTSNS DRVH2
12 25
CSCOMP

AGND BST2
CSSUM

SWFB3
CSREF
GND_VHCORE

PWM3
RAMP

1
LLINE

49 PC99
IREF

RPM

OD3
ILIM

GND
RT

0.22U/25V_0603
PR211 PR101 PR86
0 100K 0_0603 +5V_SUS
13

14

15

16

17

18

19

20

21

22

23

24

+CPU_PWR_SRC
2

27 IMVP6_PROCHOT# CPU_BST2 PC76


PR106
PR88 3212_CS_PH3 PC201 0.22U/25V_0603
0
3

2
100/F

1
2

4.7U/6.3V_0603

1
PQ19 PC80 PC79 PC95 PC94 PC219

1
NOTE: *2N7002W-7-F_NC PR72
1

2200P/50V
0_0603

10U/25V/1206

10U/25V/1206

10U/25V/1206
0.1U/50V/0603
PR192 is reserved for loop gain

2
PR100

2
measurement purpose.
1

PR105 PR104 105K/F PR98 PR90 PQ16

5
B 80.6K/F 562K/F 2.1K/F PR91 PU11 B
1000P/50V
47.5K/F

5
6
7
8
9
+5V_SUS PC101 PC102 78.7K/F PR197 1 10 NTMFS4943N

VCC
120P/50V/0603 1500P/50V 220K_NCP18WM224J03RB IN BST
VCCSENSE 2 9 3212_DH3 4
2

VCCSENSE 5 SD DRVH
VSSSENSE 3
VSSSENSE 5 DRVLSD +VCC_CORE
PC103

8
GND_VHCORE

GND_VHCORE

GND_VHCORE

1
2
3
PR96 SW PL9 0.36uH_30A_ETQP4LR36WFC
Place close to 4
CROWBAR
PR99 165K/F 3212_LX3 2 1 +VCC_CORE
Phase1 output
1K/F 47 6
GND
PR201 PR92 140K/F_0603 inductor. DRVL
GND_VHCORE

3
NOTE: 7.32K/F PQ46
De-populate PR164 and PR165
7

PR94 140K/F_0603 ADP3611 NTMFS4935N PC210


when CPU is present

5
6
7
8
9

1
1000P/50V/0805 + PC218
3212_CS_PH3 PC92

330U/2V/ESR6
+CPU_PWR_SRC

PR97 140K/F_0603 3212_DL3 4

0.1U/16V/0603
2
+VCC_CORE PR80
PR200 *100_0603_NC PR190 10_F_0603
1_1206

1
2
3
2

PR199 *100_0603_NC PR207 PC224


*0_NC
1

0.01U/16V

3212_CS_PH3
1

GND_VHCORE

Thermistor PR42 PR209


should be placed *220K_NCP18WM224J03RB_NC
close to the hot
2

spot of VR.
PC223
1U/6.3V

GND_VHCORE
A A

SJ14
2 1
2 1
QUANTA
Jump20X10

GND_VHCORE Title
COMPUTER
WWW.MANUALS.CLAN.SU Size
CPU_CORE

Document Number
GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 42 of 63


5 4 3 2 1
5 4 3 2 1

D D

Place these CAPs +PWR_SRC


close to MOSFETs PJP10
+1.5V_PWR_SRC 1 2
+1.5V_SUS
TDC : 15.5A
POWER_JP
PC151 PC150 PC148 PC149
Peak current : 22.1A
2200P/50V 0.1U_25V_0603 PC152 OCP: 26.5A

*10U/25V_1206_NC
1U/25V

10U/25V_1206
50
603 Frequency : 400KHz
+1.5V_SUS PJP14

5
6
7
8
9
1 2
POWER_JP PC143 10U/10V_0805
PJP11 +1.5V_DH 4 POWER_JP
2 1 +0.75V_DDR_VTT_P PR151 0_0603 PC155 PQ31
+0.75V_DDR_VTT

RT8207A_BST
BST1 0.1U_25V_0603 FDMS7692 PL4 PJP15

1
2
3
PC139 +1.5V_LX +1.5V_SUS_P 1 2 +1.5V_SUS
PC138 10U/10V_0805 0.56U +-20% 21A
10U/10V_0805 +1.5V_DL
POWER_JP

5
6
7
8
9
PC162

2
1000P/50V
25

24

23

22

21

20

19
4

2
VTT

VBST
GND

VLDOIN

DRVH

LL

DRVL

1
PQ34 PC163 PC158 SJ12 SJ11
FDMS0310S + +

1
2
3

1
PR164 PC15 close to
C C
1 0.1U/10V

330U/2V/ESR9

330U/2V/ESR9
output Cap
1 VTTGND PGND 18

2 17
VTTSNS NC PR13 13.7K/F 115
3 RT8207AGQW 16 CS
GND PU8 CS
4 15
MODE V5IN PR15 5.1_0603
+DDR_VTTREF 5 14 DDR V5FILT +5V_ALW
VTTREF V5FILT
DDR V5FILT 6 13
COMP PGOOD
VDDQSNS

VDDQSET

PC9 PC14
PC135 1U/10V_0603 1U/10V_0603
0.047U/25V
TON

PR14 100K
NC

S3

S5

+3.3V_ALW
7

10

11

12

1.5V_DDR_PWRGD 40
PR156
620K
TON +1.5V_PWR_SRC
S3 Power reduce PR11
73 S5_1.5V PR154 0 SUS_ON 27,50 73
PR152 *100K_NC S3_1.5V PR150 0
2 1 S3_1.5V 0 RUN_ON 23,40,44,45,48,50
40 1.5V_DDR_PWRGD

RT8207A_FB
PQ30 RT8207A_FB1
3

*BSS138-7-F_NC
B B
+1.5V_SUS
2 PC142 PR149 Control IC: RT8207A
5,7,13 PS_S3CNTRL
*18P/50V_NC *75K/F_NC
H/S MOSFET: FDMS8692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
L/S MOSFET: FDMS7670(Fairchild), Qg=24nC, Rds(on)=5mohm, PD:2.5W
RT8207A_FB2 Inductor: 0.56U +-20% 21A(ETQP4LR56WFC)(Panasonic), DCR=1.6mohm
VOUT = (1+PR67/PR68)*0.75
1

Output Cap: 2*330U 2.5V(20%,ESR15,7343,H1.9),ripple current 2700mA

PR12
*75K/F_NC

VDDQ and VTT discharge control VDDQ output voltage selection Outputs Management by S3, S5 control

MODE pin Discharge mode VDDQSET VDDQ(V) VTTREF and VTT NOTE State S3 S5 VDDQ VTTREF VTT

V5IN No discharge GND 1.5V VDDQSNS/2 DDR3 S0 HI HI On On On

VDDQ Tracking discharge V5IN 1.8V VDDQSNS/2 DDR2 S3 LO HI On On Off (Hi-Z)

S4/GND Non-tracking discharge FB Resistors Adjusting VDDQSNS/2 1.5V < VVDDQ < 3V S4/S5 LO LO On (discharge) Off (discharge) Off (discharge)

A A

QUANTA
COMPUTER
WWW.MANUALS.CLAN.SU
Title
1.5V_SUS & 0.75_DDR_VTT (RT8207)

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 43 of 63


5 4 3 2 1
5 4 3 2 1

+1.05V_VTT_VSENSE-
+1.05V_VTT ( VT357FCX-ADJ )

PR51
23.7K/F
PC53
PR173 2200P/50V
6.49K/F
PR177 PR172
D D
44.2K/F 16.5K/F

+1.05V_VTT_VDES
+1.05V_VTT_RSEL
+1.05V_VTT_BIAS
0 +1.05V_VTT
PR169 +1.05_VTT
+1.05V_VTT_OE TDC : 12.64A
RUN_ON 23,40,43,45,48,50
+3.3V_ALW Peak Current : 18.06A
OCP :21.6A

1
A1

A2

A3

A5
PC180
PC185 PR183
PU9 0.01U/25V PJP20 PJP18
POWER_JP POWER_JP

R_SEL
BIAS

VDES

OE
PR178
PR171 44.2K/F *1000P/50V_NC *1_NC

2
*100K_NC +1.05V_VTT_IRIPL B2
IRIPL
B4 D1 PL6
TEMP VX 0.2UH (MPC0730LR20C)
D2
VX +1.05V_VTT_VX +1.05V_VTT_P
40 1.05V_VTT_PWRGD B5
STAT VT357FCX-ADJ VX
D3
D4
VX
E5 D5 SJ4
VDD VX
PJP17 C5
+5V_ALW VDD +1.05V_VTT_VSENSE+
C4 A4 2 1
+1.05V_VTT_VDD VDD VSENSE+ 2 1
2 1 E4
VDD

AGND
AVDD

GND
GND
GND
GND
GND
GND
PC205 PC204 PC71 PC67 PC70 PC200 PC68 PC64 PC195 PC72 PC193 PC202 PC198 PC203
POWER_JP 6800P/25V 0.1U/10V 22U/4V/0805 22U/4V/0805

22U/4V/0805

22U/4V/0805
*22U/6.3V/0805_NC

*22U/6.3V/0805_NC

*22U/6.3V/0805_NC

*22U/6.3V/0805_NC

*22U/6.3V/0805_NC

*22U/6.3V/0805_NC

*22U/6.3V/0805_NC

*22U/6.3V/0805_NC
VTT_SENSE 5

B3

B1
C1
C2
C3
E1
E2
E3
PC55 PC54 PC52 PC183 PC182 PC181 PR52
0.1U/10V 10/0603 *0_NC
0.33U/10V

1U/10V/0603
22U/6.3V/0805

22U/6.3V/0805

PR62
*22U/6.3V/0805_NC

+1.05V_VTT_AVDD

SJ5
PC179 +1.05V_VTT_VSENSE- 1 2
0.22U/10V/0603 1 2
C C

1 2
1 2
SJ3 VSS_SENSE_VTT 5
*0_NC
AGND_1P05V_VTT PR63

Route +1.05V_VTT_VSENSE+ and +1.05V_VTT_VSENSE-


as differential pair

+3.3V_ALW
PR57 316K/F
+1.05V_VTT_VDES

PR58
PR53 549K/F
100K
3

5
6

27 CPU_TYPE 2 PQ14A
PQ14B 2N7002DW-7-F
2N7002DW-7-F
1
1

PC56
*0.01U_NC
2

25
CPU_TYPE Vout
+1.05V_VTT_VSENSE-
B B

L 1.05V(ARD)

H 1.1V(CFD)

A A

QUANTA
Title
COMPUTER
WWW.MANUALS.CLAN.SU Size
1.05V_VTT

Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 44 of 63


5 4 3 2 1
5 4 3 2 1

D D

+1.05V_PCH ( VT356FCX-ADJ ) PJP27 +5V_ALW


+1.05V_VDD 2 1

POWER_JP
PR127
10/0603 PC239 PC241 PC119 PC243
0.1U/10V 1U/10V/0603 10U/10V/0805 10U/10V/0805
+1.05V_AVDD
+1.05 V_PCH
+1.05V_IRIPL +1.05V_PCH
Thermal Design Current : 7.19A
PC236
+3.3V_ALW 0.22U/10V/0603 Peak Current : 10.28A 46
PC115 PR125

1
PR119
20.5K/F
OCP :12.3A PJP29
POWER_JP
*1000P/50V_NC *1_NC

C5

C4
B4

B2

B3

2
PR213 PL13
*100K_NC 0.2UH (MPC0730LR20C)

TEMP

IRIPL

AVDD

VDD

VDD
D1 +1.05V_VX +1.05V_PCH_P
VX

VX D2

2
40 1.05V_PWRGD B5 STAT
C D3 SJ6 C

2
VX
A5 OE
23,40,43,44,48,50 RUN_ON

1
PU12 D4
0 +1.05V_BIAS VT356FCX-ADJ VX PC232 PC231 PC117 PC238 PC118 PC108 PC230 PC111
A1

1
PR124 BIAS 6800P/25V 0.1U/10V 22U/6.3V/0805 22U/4V/0805

22U/4V/0805

22U/4V/0805
D5

*22U/6.3V/0805_NC

*22U/6.3V/0805_NC
+1.05V_RSEL VX
A2 R_SEL/ILOAD
A4 +1.05V_VSENSE+
VSENSE+
A3 +1.05V_VDES
VDES

AGND

GND

GND

GND
PC235 PR118 PR122
0.01U/25V 44.2K/F 6.49K/F
B1

C3

C2

C1
PR120 PC233
38.3K/F 2200P/50V

SJ8
1 2
Route +1.05V_VSENSE+ and +1.05V_VSENSE-
1 2
as differential pair
PR219
AGND_1P05V 44 750

+1.05V_VSENSE- 1 2
1 2
SJ7

B B

A A

QUANTA
Title
COMPUTER
1.05V_PCH

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 45 of 63


5 4 3 2 1
5 4 3 2 1

PJP9 PR126
1 2 ISL6237_ONLOD
PR129 0
POWER_JP PD12 390K PR128
1 2 150K/F
603
PJP8 *UDZSTE-175.6B_NC
1 2 +DC1_PWR_SRC
D +PWR_SRC D

+5V_ALW2 PR214 +5V_VCC1 +3.3V_ALW


POWER_JP *10/0603_NC
PC244 PC245 PC246 Fs=300K
10U 10U PC124 PC125 PC127 PC128 PC126 10U
1206 1206 0.1U 2200P PC242 0.1U 2200P 1U/25V 1206
TDC : 8.27A
25 25 25 50 4.7U 25 50 50 25 Peak :10.1A
+5V_ALW 603 10 603 603
OCP: 12.12A
Fs=400K 57 1206
PC123
TDC : 10.46A +3.3V_RTC
PR130
0.1U
+3.3V_ALW

ISL6237_ONLOD
Peak current : 14.9A PC120 PC121 *0_NC PC122
1U
0.1U
+5V_ALW
OCP:17.8A 25 1U/25V
603
10
603 PR131

5
6
7
8
50

2
603 PQ57
4 FDS6298 106 PJP28
*0_NC POWER_JP

42
8
7
6
5
4
3
2
1

1
2
3

1
2

9
8
7
6
5
41 PL15

PAD
LDOREFIN

VIN
RTC

VCC
TON
REF
LDO

ONLDO
PJP26 PJP25 PAD 2.2UH +-20%
40
PQ56 +5V_DH PAD +3.3V_LX +3.3V_ALWP
POWER_JP POWER_JP 4 39
FDMS7692 PAD
38
+5V_ALWP PAD PR133 169K/F
9 32
1

PL14 BYP REFIN2 PC134


10 31

3
2
1
FDVE1040-H-1R5M=P3 OUT1 ILIM2 1000P/50V
11 30
+5V_ALWP +5V_LX FB1 PU6 OUT2 PR135
12 29

5
6
7
8
PR136 169K/F POK1 ILIM1 SKIP# POK2 0 50 + PC247
13
PGOOD1 TPS51427A PGOOD2
28
PC133 +5V_EN1 14 27 +3.3V_EN2 PC131 150U
PR134 1000P/50V ON1 ON2 +3.3V_DH 0.1U
15 26 4 6.3
DH1 DH2 PR143 603
*0_NC 16 25

9
8
7
6
5

9
8
7
6
5
+ PC234 + PC237 50 LX1 LX2 1 25 3528
37
PC240 PAD
150U 150U 36 PQ55 0805

1
2
3
PAD

AGND
PGND
0.1U +5V_DL PC130

BST1

BST2
C 6.3 6.3 4 4 C

VDD
PAD
PAD
PAD

DL1

DL2
603 PR142 PC129

NC
3528 3528 0.1U FDS6676AS
25 1 25 0.1U
PR132 0805 25

3
2
1

3
2
1

35
34
33

17
18
19
20
21
22
23
24
0 PQ54 PQ28 603
FDMS0310S *FDMS0310S_NC PR139 603 1 603
PR140 +3.3V_DL
1 603

SECFB
+5V_ALW2 PR215

+3.3V_ALWP +3.3V_ALWP
Short Jump +5V_ALW2

PC132 PR141
1U *0_NC
603 SECFB PR138 PR137
10 100K 100K

BAT54S-7-F
+5V_ALWP 1 POK2
PC109 3V_ALW_PWRGD
PD10 3 POK1
PC116 5V_ALW_PWRGD
2
0.1U
25 PC110
PQ23 0.1U 603 0.1U
50 1
DDTA114YUA-7-F 25
603
+15V_ALW PD11 603
3

3 1 +15V_ALWP 2
47K
10K

BAT54S-7-F
+5V_ALW2
PC114
2

B B
0.1U
PR115 25
3

*39K/F_NC 603
2 PQ22
2N7002W-7-F
96
1

+3.3V_EN2 PR113 0 PR212 0


THERM# 20

PR114 200K PD9 *BAS316_NC


+5V_EN1
27,35 ALW_ON

PR112 *0_NC

A A

QUANTA
Title
COMPUTER
WWW.MANUALS.CLAN.SU Size
3.3V_ALW / 5V_ALW(TPS51427A)

Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 46 of 63


5 4 3 2 1
5 4 3 2 1

PJP16
POWER_JP
+5V_SUS
3211_VIN 2 1 +PWR_SRC

PR49
10_0603_SW

2
PC51 SJ13 PC177 PC176 PC174 PC173 PC175
PU3 1 2 2200P_SW 0.1U/25V_0603_SW10U/25V_1206_SW 1U/25V_SW

*10U/25V_1206_NC
D D

1
ADP3211A_SW 1 2
50 50
1U/6.3V_SW
PR50 0_SW 603
GFXVR_EN_R 32 24 3211_VCC
5 GFXVR_EN EN VCC

5
6
7
8
9
PR43 PC48 0.22U/25V/0603_SW
GFX_VID0 31 23 3211_BST 3211_BST1 2 1 PQ39 PJP19
5 GFX_VID0 VID0 BST 0_0603_SW 4 POWER_JP
GFX_VID1 30 22 3211_DRVH NTMFS4943NT1G_SW
+3.3V_SUS 5 GFX_VID1 VID1 DRVH
2 1
GFX_VID2 29 21 3211_SW
5 GFX_VID2

1
2
3
VID2 SW
43 GFX_VID3
5 GFX_VID3 28 VID3 PVCC 20 +5V_SUS
PJP22
GFX_VID4 27 19 3211_DRVL POWER_JP
5 GFX_VID4 VID4 DRVL
PR218 PL7 0.36uH_30A_ETQP4LR36WFC_SW
*100K_NC GFX_VID5 26 18 PC37 2 1 +VCC_iGPU_CORE_P 2 1 +VCC_iGPU_CORE
5 GFX_VID5 VID5 PGND 2.2U/6.3V/0603_SW
GFX_VID6 25 17
5 GFX_VID6

3
VID6 AGND

5
6
7
8
9
40 iGFX_CORE_PWRGD 1 16 CSCOMP PC178
PW RGD CSCOMP 1000P/50V_SW PC190 + PC188 + PC59
PR48 10K_SW 2 15 4 *330U/ESR9_NC

330U/ESR9_SW
5 GFXVR_IMON IMON CSFB
2 1

0.1U/25V_0603_SW
+3.3V_SUS 2
PC46 3 14 PQ40
T5 PAD CLKEN# CSREF 7343
50 0.068U/16V_SW NTMFS4935NT1G_SW PR170

1
2
3
PR40 4 13 CSCOMP 1_0805_SW
C 6.8K/F_SW FBRTN LLINE +VCC_iGPU_CORE C
5 FB RAMP 12 Fs=400K
PC39 6 COMP RT 11 TDC : 12A
3211_VCC 7 10 Peak Current : 22A

GNDEP
GPU RPM
PC42
1000P/50V_SW
220P/50V_SW PC40
47P/50V_SW
8 ILIM IREF 9 OCP:26.4A

33
PR39 PC41
PR38

1K/F_SW 20K/F_SW PR34


470P/50V_SW 10.7K/F_SW

CSCOMP

PR41 PR42
0_SW 0_SW

B B

VCC_AXG_SENSE 5

VSS_AXG_SENSE 5 PR28
PR31 PR29 340K/F_0603_SW PR181 220K_NCP18WM224J03RB_SW
80.6K/4_SW
Place close to CPU socket 237K/F_0603_SW
VCC_AXG_SENSE & VSS_AXG_SENSE pins PR27 78.7K/F_SW

+VCC_iGPU_CORE
PR195 100/F_SW
PR26
PC28 PC31 165K/F_SW
PR194 100/F_SW PR30 1500P/50V_SW 120P/50V_SW
422K/F_SW

Place close to PR140, PR141 49 PR24


36.5K/F_SW
+GFX_VCORE pins 3211_VIN PR25 1K/F_SW

+VCC_GFX_CORE
Control IC: ADP3211 PC30 PC29
A 1000P/50V_SW 1000P/50V_SW A
H/S MOSFET: FDMS7692(Fairchild), Qg=7nC, Rds(on)=13mohm, PD:2.5W
L/S MOSFET: FDMS0310S(Fairchild), Qg=15nC, Rds(on)=5.15mohm, PD:2.5W
Inductor: 0.56UH +-20% 25A(MPO104-R56)(Delta), DCR=1.6mohm
Output Cap: 1*390U,2.5V(20%,105C,6.3*5.8),ESR=10mohm
QUANTA
Title
COMPUTER
VCC_iGPU_CORE

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 47 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

+5V_ALW

+1.8V_RUN

2
D
PJP3 TDC:1.29A D
+1.8V_RUN
POWER_JP Peak current:1.85A

2
PC43 PC44 PC45 PJP4

*10U/25V/1206_NC
POWER_JP
0.1U/25V/0603

10U/25V/1206
PU4 HPA00835RTER
16 10

1
VIN PH PL3 1UH+-20%10.4A(FDV0620-H-1R0M=P3)
1 11 +1.8V_RUN_P
VIN PH
2 VIN PH 12

PR37 0 54418_EN 15 13
23,40,43,44,45,50 RUN_ON EN BOOT PR35 0 PC32 0.1U/50V PR44
54418_VFB 6 14 20K/F PC33 PC35 PC34
VSNS PW RGD 1.8V_RUN_PWRGD 40

0.1U/50V/0603

22U/6.3V/0805

*22U/6.3V/0805_NC
7 3 54418_VFB VFB=0.8V
COMP GND
8 RT/CLK GND 4 +3.3V_SUS
RT/CLK PR227 = 182K 45 PR36 *100K_NC

PAD
PAD
PAD
PAD
PAD
PAD
PR46 9 5 PR45
SS AGND 15.8K/F
24.9K/F
FREQ 1000K PC49

22
21
20
19
18
17
C *100P_NC PR47 PC47 C
182KF 1U/6.3V
PC50
1200P

86

+1.8V_GFX
+5V_ALW2 +15V_ALW +1.8V_RUN PQ41 +1.8V_GFX
SI4128DY Current : 0.3A
8 3
B
7 2 B
PR186 PR184 6 1
100K 100K 5

PC186
4

1.8V_GFX_ENABLE 0.1U
603
25
3

1.8V_GFX_ON# 5
6

49,50 dGFX_PWGD 2
4

PQ42B PQ42A PC187


2N7002DW-7-F 2N7002DW-7-F 4700P
1

25

A A

QUANTA
Title
COMPUTER
1.8V_RUN & 1.8V_RUN_GFX

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 48 of 63


5 4 3 2 1
5 4 3 2 1

+5V_SUS +PW R_SRC +VCC_GFX_CORE


TP29 MAX17007_DH1 PR68 Fs=300K
10/0603
MAX17007_DL1 MAX17007_VCC PJP21 TDC : 20.3A
TP31
jumper Peak current : 29A
TP3 MAX17007_DH2
OCP:34.8A

1
PC63 GFX_PW R_SRC +VCC_GFX_CORE
TP4 MAX17007_DL2 2.2U/6.3V
4 18 PC66 PC82 PC84 PC199

2
VCC VDD

10U/25V/1206

0.1U/50V/0603

10U/25V/1206
PC60 PC65
D D

2200P/50V
1U/10V PR189 1U/25V
0/0603 50
16 15 MAX17007_BST1
603

1
GND BST1
PJP30 PJP24 PJP23 PJP5
11 PC196 POW ER_JP POW ER_JP POW ER_JP POW ER_JP
10 dGPU_VRON

5
6
7
8
EN1 0.22U/50V
25 PQ47

2
PR61 0 EN2 MAX17007_DH1
+3.3V_GFX DH1 13 4 FDMC7692
PC58 PL10
*0.1U/6.3V_NC
105 0.47U20%20.8A(FDVE0630-H-R47M)

1
2
3
14 MAX17007_LX1 2 1 +VCC_GFX_CORE_P
PR64 LX1
100K MAX17007_VCC PR220 *0/F_NC PC81

5
6
7
8
1000P/50V
PR77
MAX17007_REF PR179 *0/F_NC 2 17 MAX17007_DL1 4 1.5K/F
ILIM1 DL1 PC212 + PC85 + PC86
+VCC_GFX_CORE_P PC184 180P/50V 3 ILIM2

0.1U/50V/0603

330U/2.5V/E9/3528

330U/2.5V/E9/3528
PQ49 PR76 PR78

1
2
3
20 FDMC7672 1/0805 10K/NTC/0603
MAX17007_REF PR180 *0_NC PGND PC189 0.1U/25V/0603
5
SKIP
+3.3V_SUS PR79
10 MAX17007_CSP1 2.4K/F
CSH1 MAX17007_CSL1
CSL1 9
GT GE PR187 PR185
C 100K PC192 10/0603 C
34.8K 32.4K MAX17007A 1000P/16V
PR60
CS33482FB22 CS33242FB19 48,50 dGFX_PW GD 12 PGOOD1
6 PR182 180K/F GFX_PW R_SRC
TON1
24 PGOOD2
7 PR70 180K/F
TON2 PC83 PC74 PC73 PC69
392K 210K

10U/25V/1206

2200P/50V

0.1U/50V/0603

10U/25V/1206
PR55 PR188
CS43922FB17 CS42102FB00 21 MAX17007_BST2 0/0603
BST2

5
6
7
8
95.3K 121K MAX17007_REF 1 PC197
REF 0.22U/50V
PR54 PQ44
CS39532FB03 CS41212FB11 23 MAX17007_DH2 4 FDMC7692
DH2
PC57 PL8
PR59 2200P/50V 0.47U20%20.8A(FDVE0630-H-R47M)

1
2
3
76.8K 90.9K 34K/F 22 MAX17007_LX2 2 1
LX2
PR56 50 PC75
CS37682FB00 CS39092FB11

5
6
7
8
1000P/50V

19 MAX17007_DL2 4
DL2 PR71 PC216 + PC215
1.5K/F
3

0.1U/50V/0603

330U/2.5V/E9/3528
PR55 PQ45 PR73

1
2
3
210K/F FDMC7672 1/0805 PR74
10K/NTC/0603
B B
2 PC194 0.1U/25V/0603
19 GPU_VID1
PQ13
BSS138-7-F 88 PR75
26 MAX17007_CSP2 2.4K/F
CSP2 MAX17007_CSL2
27
1

CSN2
PR67
PR54 MAX17007_REFIN1 8 PC191 10/0603
REFIN1
3

121K/F 1000P/16V TON1 PR211 = 200K

19 GPU_VID2
PQ12
2
FB2
28 MAX17007_VCC FREQ 297K
BSS138-7-F

PU10
1

PR56
3

90.9K/F
For GT For GE
19 GPU_VID3 2
PQ11 PR60 GPU_VID1 GPU_VID2 GPU_VID3 Voltage GPU_VID1 GPU_VID2 GPU_VID3 Voltage
BSS138-7-F 32.4K/F

PR176 PR175 PR174 0 0 0 0.99V 0 0 0 0.95V


1

*20K_NC *20K_NC *20K_NC

A
104 1 0 0 0.96V 1 0 0 0.9V A

0 1 0 0.85V 0 1 0 0.85V
PR66 QUANTA
0 0 1 0.8V 0 0 1 0.8V
Short Jump
Title
COMPUTER
VGA N11P
GND_GFXCORE
Size Document Number Rev
GM6 2B

WWW.MANUALS.CLAN.SU
Date: Friday, June 25, 2010 Sheet 49 of 63
5 4 3 2 1
1 2 3 4 5

+5V_RUN +3.3V_SUS
86 +5V_ALW2 +15V_ALW +3.3V_ALW PQ21 +3.3V_SUS
+5V_ALW2 +15V_ALW +5V_ALW PQ26 +5V_RUN current : 2.52A 86 SI4128DY current : 0.57A
SI4128DY
8 3
8 3 7 2
7 2 PR107 PR108 6 1
PR121 6 1 100K 100K 5
PR123 100K 5
100K PC105

4
PC106 SUS_3.3V_ENABLE 0.1U

4
RUN_ENABLE_5V 0.1U 603
603 25

3
25
RUN_ON# 5 SUS_ON_3.3V# 5

6
A A

6
2

4
27,43 SUS_ON
2 PQ27A PC113 PQ20B PQ20A PC104
23,40,43,44,45,48 RUN_ON
PQ27B 2N7002DW-7-F 4700P 2N7002DW-7-F 2N7002DW-7-F 4700P

1
1 2N7002DW-7-F 25 25

73
+5V_SUS
+3.3V_RUN +15V_ALW +5V_ALW PQ6 +5V_SUS
SI4128DY current : 2.1A
13 RUN_ON# current : 6.02A 86
8 3
7 2
+15V_ALW +3.3V_ALW PQ24 +3.3V_RUN 6 1
FDS8880_NL PR16 5
100K
8 3 PC27

4
7 2 0.1U
6 1 SUS_ENABLE_5V 603
PR117 5 25

3
100K
PC112 SUS_ON_3.3V# 2

4
0.1U PC23
RUN_ENABLE_3.3V 603 PQ5 4700P

1
25 2N7002W-7-F 25
3

RUN_ON# 2
PC107
PQ25 4700P
+3.3V_GFX
1

2N7002W-7-F 25
86 current: 1.14A

+5V_ALW2 +15V_ALW +3.3V_ALW PQ10 +3.3V_GFX


B
+1.5V_RUN SI4128DY B
current : 0.8A
86 8
7
3
2
PR32 PR33 6 1
+15V_ALW +1.5V_SUS PQ38 +1.5V_RUN 100K 100K
SI4128DY 122 5

PC36

4
8 3 3.3V_GFX_ENABLE 0.1U
7 2 603
6 1 +3.3V_RUN R471 10K_DIS 25

3
PR168 5
100K 3.3V_GFX_ON# 5

6
PC171
4

0.1U R470 0_SW 2

4
10,24 dGPU_PWR_EN
RUN_ENABLE_1.5V 603 PQ9B PQ9A PC38
25 2N7002DW-7-F 2N7002DW-7-F 4700P

1
3

RUN_ON# 2
25 +1.05V_GFX
PC172
PQ37 4700P
current : 3.26A
1

2N7002W-7-F 25
+1.05V_PCH +1.05V_GFX
+15V_ALW PQ43
+1.5V_SUS +1.5V_GFX FDS8880_NL
PQ51
FDS6298 +1.5V_GFX 8 3
8
7
3
2
current : 8A 7
6
2
1
6 1 PR69 5
5 100K
PC61

4
0.1U
4

1.05V_GFX_ENABLE 603
25

3
3.3V_GFX_ON# 2
C PC62 C
+15V_ALW PQ15
102 0.033U

1
+5V_ALW2 PQ50 2N7002W-7-F 25
FDS6298
8 3
7 2
PR192 6 1
100K 5
PR191
100K PC214
4

RUN_ENABLE_1.5V_GFX 0.1U
603
25
3

dGFX_PWGD# 5
6

PC211
4

2 PQ48A 0.047U
48,49 dGFX_PWGD
PQ48B 2N7002DW-7-F 25
2N7002DW-7-F
1

Reserve discharge path

+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +0.75V_DDR_VTT


+1.5V_SUS +5V_SUS +3.3V_SUS

R430 R493 R487 R459


R621 *10_NC *1K_NC *1K_NC *1K_NC R86 R93 R344
D 47 *30/F_NC *1K_NC *1K_NC D
3

RUN_ON# 2 2 2 2 2
Q77 SUS_ON_3.3V# 2 2 2
Q47 Q67 Q66 Q57
1

2N7002W-7-F *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC Q19 Q21 Q40


QUANTA
1

*2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC

COMPUTER
WWW.MANUALS.CLAN.SU
Title
RUN / SUS POWER SW

Size Document Number Rev


GM6 2B

Date: Friday, June 25, 2010 Sheet 50 of 63


1 2 3 4 5
A B C D E

+3.3V_ALW

2
PC3 1 2 2200P 50

PC5 1 2 1000P 50 +3.3V_ALW

PD5 PD4 PD6 PD3

3
1 1
PC6 *DA204U_NC *DA204U_NC *DA204U_NC *DA204U_NC
1 2 0.1U 25
+VCHGR 41

2
603
PR9
JBAT3 10K
BATT1+ 1 SMBUS Address 16
2 PR7 100
Adress : 16H

1
BATT2+
SMB_CLK 3 1 2 SMBCLK0 27,41
SMB_DAT 4 1 2 SMBDAT0 27,41
5 PR6 100 PR5 100
BATT_PRES#
SYSPRES# 6 1 2 PBAT_PRES# 27
BATT_VOLT 7 1 2 PBAT_ALARM#
8 PR4 *100_NC
BATT1-
BATT2- 9

200045MR009H579ZL

+5V_ALW2

+3.3V_ALW

1
PD8
DA204U PR23
2.2K
34

3
2 2
PQ7

2
FL4 FDV301N
J10 BLM11B102SPT PR22 33
DB_PSID DOCK_PSID 3 1 1 2 PS_ID 27
Adapter1- 1

2
Adapter2- PR18 +5V_ALW2

1
3 100K/F
Adapter3- PC26
4 100P

2
Adapter4-

2
50
5 PD7 PR21
PSID

3
*BAS316_NC 10K
Adapter1+ 6 2

1
7 +DCIN_JACK

1
Adapter2+

1
PQ8
8 +DCIN_JACK PR20 MMST3904-7-F
Adapter3+ 15K/F
2

MLX_87437-0843

2
PC17 PC18 PC19 PC22 PC21 PC20
1

100P 4700P 0.01U


2200P
50
1000P
50
0.1U
25 50 25 25 12
603

FL1
3 3
HI1206T161R-10(160,6A) 40
1 2

PQ4
+DC_IN FDS6679AZ +DC_IN_SS
+DCIN_JACK FL3
HI1206T161R-10(160,6A) 1 8
+DCIN_JACK 2 7
3 6

1
5
1

1
PC24 PC25 PR17
0.1U 0.47U 240K PC165 PR165 PC164 PC16

4
603 805 0.01U 10K/F 0.1U 10U
2

2
25 25 603 603 1206

2
25 25 25

2
PRV3
2

*VZ0603M260APT_NC PR19
47K
1

4 4

QUANTA
Title
COMPUTER
DCIN,BATT CONNECTOR

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Friday, June 25, 2010 Sheet 51 of 63


A B C D E
1 2 3 4 5 6 7 8

H31
H-GM6-3
H-GM6-3

1
A A

H18 H9 H11 H14 H7 H5 H15


H-C295D118P2 H-C295D118P2 H-C295D118P2 H-C295D118P2 H-C295D118P2 H-C126D126N H-C197D197N
h-c394d118p2 H-TC394BC295D118P2 H-TC394BC295D118P2 H-TC394BC295D118P2 H-C295D118P2 H-C126D126N H-O157X126D157X126N
1

1
H21 H16
H35 H34 H25 H19 H-C177D177N H-C177D177N
H-C295D118P2 H-C295D118P2 H-C295D118P2 H-C295D118P2 H-TC197BC157D157P2 H-TC197BC154D154P2
H-TC355BC295D118P2 H-TC354BC295D118P2 H-TC295BC276D118P2 H-C295D118P2

1
1

1
H32
H-O126X149D126X149N
H-O126X149D126X149N
B H17 H10 H4 H12 H8 B
H-C295D118P2 H-C295D118P2 H-C295D118P2 H-C295D118P2 H-C295D118P2
H-TC394BC295I126D126 H-C295D118P2 H-C295D118P2 H-C295D118P2 H-C295D118P2

1
1

1
H13 H6
O-GM6-1 O-GM6-2
O-GM6-3-1 O-GM6-4

For CPU Use

1
H20
123
2

H-C283D146P2
INTEL-CPU-BRACKET
4 3

H30 H33
H36 H37 H-C295D118P2 H-C295D118P2
1

h-gm6b-a h-bsd217n H-TC354BC295D118P2 H-C295D118P2


h-gm6b-a h-bsd217n

1
1

1
H29 H27 H28
C C
H-C217D118P2 H-C189D91P2 H-C189D91P2
H-TC118BC217D118P2 H-C189D91P2 H-C189D91P2
PTH-top non PTH-bot
1

H24 H26
89
H-C197D63P2 H-C197D63P2
30
H-TC118BC256D63P2 H-TC118BC256D63P2
121
123
1

H22 H23
H-GM6-1 H-GM6-2
H-GM6B-2 H-TE550X260BE251X181P2
1

D D

QUANTA
Title
COMPUTER
PAD & SCREW

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Thursday, June 24, 2010 Sheet 52 of 63


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_SUS
+3.3V_RUN
202
2.2K 2.2K 200 SO-DIMM
2.2K 2.2K
+3.3V_RUN
H14 ICH_SMBCLK WLAN_SMBCLK 30
7002 MINICARD-
C8 ICH_SMBDATA WLAN_SMBDATA 32 (WLAN/WWAN)
A 7002 A

+3.3V_RUN 9
+3.3V_SUS CCD
10
(ALS+Human Presense)

13
2.2K 2.2K 14
G-Sensor

G6 SMB_CLK_ME0
G8 SMB_DATA_ME0

+3.3V_SUS
PCH +3.3V_ALW

10K 10K
2.2K 2.2K
+3.3V_SUS
E10 SMB_CLK_ME1 SMBCLK1 115
7002
G12 SMB_DATA_ME1 SMBDAT1 116 EC
7002
+3.3V_SUS

B B

+3.3V_ALW

2.2K 2.2K

110 SMBCLK0 9
111 SMBDAT0 10 CHARGER

100
4
3 BATTERY
100

+3.3V_ALW
SIO
+3.3V_SUS
ITE8502
C 2.2K 2.2K 2.2K 2.2K C

+3.3V_SUS
115 SMBCLK1 SMB_CLK_ME1 115
7002
116 SMBDAT1 SMB_DATA_ME1 116 PCH
7002
+3.3V_ALW +3.3V_SUS

+3.3V_ALW
+3.3V_ADM1032A

4.7K 4.7K
2.2K 2.2K
+3.3V_ADM1032A
117 SMBCLK2 8
7002
118 SMBDAT2 7 VGA THERMAL
7002
+3.3V_ADM1032A +3.3V_RUN
32
2.2K 2.2K 31 CLOCK
+3.3V_RUN
8
7002
7 THERMAL(EMC1422)
D D

7002
+3.3V_RUN

MMB

QUANTA
Title
COMPUTER
WWW.MANUALS.CLAN.SU
SMBUS BLOCK

Size Document Number Rev


GM6 2B

Date: Thursday, June 24, 2010 Sheet 53 of 63


1 2 3 4 5 6 7 8
5 4 3 2 1

VCC
REM_DIODE1_P
(OPT) (REMOTE - 1)
REM_DIODE1_N
SMBus EC Fan PWM FAN
D
CPU Fan SIG. connector D

H_THERMTRIP#
EMC1422-1-ACZL-TR
THERM_STP# THERM_ALERT#

3/5V DC/DC
3/5V EN

C
VGA_THERMDP C
D+
D- VGA_THERMDN SMBus
GPU
ADM1032ARMZ-1
ALERT#
For Discrete Only
MB_THERM#

B B

A A

QUANTA
Title
COMPUTER
THERMAL MAP

WWW.MANUALS.CLAN.SU Size Document Number


GM6
Rev
2B

Date: Thursday, June 24, 2010 Sheet 54 of 63


5 4 3 2 1
5 4 3 2 1

VER : 1A

Adapter
D D

PWR_SRC
Charger
ISL88731A

Battery
TI TI ON Volterra Volterra ON MAXIM
TPS51427A RT8207AGQW LDO ADP3212MNR2G VT358 VT356 ADP3211A MAX17007A

SUS_ON 1.5V_DDR_PWRGD
+5V_ALW2 ALW_ON
+1.5V_SUS
+15V_ALW +3.3V_ALW +5V_ALW +1.5V_SUS
+0.75V_DDR_VTT

C C

IMVP_VR_ON RUN_ON RUN_ON GFXVR_EN dGPU_VRON

+VCC_CORE +1.05V_VTT +1.05V_PCH +VCC_iGPU_CORE +VCC_GFX_CORE

Fairchild Fairchild Fairchild Fairchild Fairchild Fairchild Fairchild


SI4800BDY FDS8880 SI4800BDY SI4800BDY SI4800BDY SI4800BDY FDS6298 *2
dGPU_PWR_EN RUN_ON SUS_ON RUN_ON SUS_ON RUN_ON dGFX_PWGD Fairchild
FDS8880
+3.3V_GFX +3.3V_RUN +3.3V_SUS +5V_RUN +5V_SUS +1.5V_RUN +1.5V_GFX dGPU_PWR_EN

+1.05V_GFX
B B

TI
HPA00835RTER
RUN_ON

+1.8V_RUN

Fairchild
SI4800BDY
dGFX_PWGD

A
+1.8V_GFX A

QUANTA
Title
COMPUTER
Power Block Diagram

Size Document Number Rev


GM6 2B

Date: Thursday, June 24, 2010 Sheet 55 of 63


5 4 3 2 1

WWW.MANUALS.CLAN.SU
5 4 3 2 1

Optimus
DIS only
FM9 Power Design Block Diagram 2009/12/28
(1) (1) AC : DC_IN -> DC_IN_SS -> +PWR_SRC
+5V_VCC1 (from +5V_ALW2 for Max so;ution) Bat : +VCHGR -> +PWR_SRC,+5V_ALW2,
(1) (1) for TI solution, IC can supply 5V by itself. (2) (2) SYS_PWR_SW#
+DC_IN_SS +PWR_SRC +5V_ALW2 (3) (3) 3.3V_ALW_ON, ALW_ON
Power Jack LDO (1)
SYSTEM POWER (4) (4) +3.3V_ALW, +5V_ALW, +15V_ALW
+3.3V_ALW
Adapter input +3.3V_ALW_ON(From (4) (5) (5) SUS_ON
SI4835 3V_ALW ON POWER LOGIC) +5V_ALW +5V_ALW +15V_ALW (6) (6) +5V_SUS, +3.3V_SUS, +1.5V_SUS, 1.5V_DDR_PWRGD
(3) (4) (4)
Diode & Cap (4)
ALW_ON(For +5V_ALW and
TPS51427A VR (7) (7) PCH_RSMRST#
Page 46
Charger (3) turn on +15V_ALW) (8) (8) SIO_PWRBTN#
Page 46 (9) (9) SIO_SLP_S5#, SIO_SLP_S3#
D ISL88731 (10) (10) GFXVR_EN
D

3V_ALW_PWRGD
Page 41 (11) (11) +VCC_iGPU_CORE, iGFX_CORE_PWRGD
5V_ALW_PWRGD
+5V_ALW (12) (12) RUN_ON_1(RUN_ON)
(13) (13) +0.75V_DDR_VTT
+VCHGR (1) +1.5V_SUS
(1) VRAM DDR3 POWER (6) (14) (14) +3.3V_RUN, +5V_RUN,
+PWR_SRC (5) SUS_ON VR 1.5V_DDR_PWRGD +1.05V_VTT,+1.05V_PCH, +1.8V_RUN, +1.5V_RUN,
Battery (6) (19) (15) HWPG, H_VTTPWRGD
RT8207AGQW (20) (16) IMVP_VR_ON
(12) RUN_ON
SI4835 +0.75V_DDR_VTT (21) (17) +VCC_CORE, IMVP_PWRGD, VR_PWRGD_CLKEN#
Page 43 LDO (13)
(22) (18) PCH_PWRGD
(4) +5V_ALW SI4800 +5V_SUS
(6) (23) (19) PM_DRAM_PWRGD
Page 50 (24) (20) CLK_CPU_BCLK(PCH to CPU)
+5V_ALW
(25) (21) H_PWRGOOD
(5) SUS_ON
CPU Memory Control (26) (22) PLTRST#(PCI_PLTRST#)
& I/O Power +1.05V_VTT
(23) dGPU_PWR_EN(PCH GPIO 56)
(12) RUN_ON VT358 VR 1.05V_VTT_PWRGD (14) (15) (24) +3.3V_GFX, +1.05V_GFX
(4) +3.3V_ALW SI4800 +3.3V_SUS
(6) (25) dGPU_VRON(PCH GPIO 35)
Page 44
Page 50 (16) (26) +VCC_GFX_CORE, dGFX_PWGD
(17) (27) +1.5V_GFX , +1.8V_GFX
(5) SUS_ON
(18) (27) dGPU_PWROK
+5V_SUS

+VCC_GFX_CORE
(4) +5V_ALW SI4800 +5V_RUN GFX CORE POWER
(14) VR
dGFX_PWGD (26)
Page 50 (25) dGPU_VRON
MAX17007A (16)
C
(12) RUN_ON (15) +3.3V_GFX C

Page 49
(4) +3.3V_ALW FDS8880 +3.3V_RUN
(14)
Page 50

(12) RUN_ON

+3.3V_GFX
(4) +3.3V_ALW SI4800 (24)
(15) +5V_SUS +3.3V_SUS +5V_ALW (4)
Page 50

(23) dGPU_PWR_EN CPU CORE POWER PCH core power +1.05V_PCH


+3.3V_RUN +VCC_CORE (14)
(14) (16) IMVP_VR_ON ADP3212MNR2G (12) RUN_ON VT356 VR 1.05V_PWRGD
VR
+1.5V_RUN (20) IMVP_PWRGD
(6) +1.5V_SUS SI4800BDY (14) Three PHASE (17) Page 45
SOLUTION Reset Circuit (21)
VR_PWRGD_CLKEN#
Page 50 (21) (21) Page 40 (17)
Page 42 +5V_ALW (4)
(17) VR_PWRGD_CLKEN# CK_PWRGD_R
(12) RUN_ON Inverter
CPU VCCPLL
1.5V_DDR_PWRGD
+1.05V_GFX (12) RUN_ON HPA00835RTER VR (6) RUN_ON (12)
+1.05V_PCH FDS8880 (24) AND Gate
(14) RUN_ON_1
(15) Page 44 (12)
Page 52 +1.8V_GFX
+1.8V_RUN SI4800BDY (27)
(14) 1.05V_VTT_PWRGD
(23) dGPU_PWR_EN (17) +1.8V_RUN (14) (19)
Page 48
B +3.3V_RUN 1.05V_PWRGD HWPG (15) B
(14) 1.8V_RUN_PWRGD (14) (14)
(26) dGFX_PWGD
FDS6298 +1.5V_GFX dGPU_PWROK
+1.5V_SUS (27) (16) (18) (27) (15) (19)
(14) x2
(17) +5V_SUS (4) iGFX_CORE_PWRGD H_VTTPWRGD
Page 50 (11) Wire AND
1.8V_RUN_PWRGD
(26) dGFX_PWGD +VCC_iGPU_CORE (14)
(17)
(16) CLK GEN Page 40
CK_PWRGD_R GFXVR_EN ADP3211A VR

Page 15 (10) Page 47

+VCC_iGPU_CORE
(2)
SYS_PWR_SW# 3.3V_ALW_ON iGFX_CORE_PWRGD (11)
(3)
ALW_ON
(3)
SUS_ON
EC (5) PM_DRAM_PWRGD (19) (23)
PCH
IT8512 SIO_PWRBTN# (8) (10)
CLK_CPU_BCLK (20) (24) GFXVR_EN
PCH_RSMRST# (7) CPU
H_PWRGOOD (21) (25)
Page 7~12
SIO_SLP_S5# (9)
PLTRST#(PCI_PLTRST#) Page 3~6
(21) (17) IMVP_PWRGD (22) (26)
SIO_SLP_S3# (9)

Page 27 (22) (18) PCH_PWRGD


(19) (15)
(19) (15) HWPG
RUN_ON_1 H_VTTPWRGD
(12)
IMVP_VR_ON
(16) (20)
A A

QUANTA
WWW.MANUALS.CLAN.SU Title

Size
COMPUTER
Power sequence Block

Document Number Rev


GM6 2B

Date: Thursday, June 24, 2010 Sheet 56 of 63


5 4 3 2 1

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