Mini Report1

Design and Implementation of SEPIC converter
Chapter 1
INTRODUCTION
DC-to-DC converters convert electrical power provided from a source at a certain voltage
to electrical power at a different dc voltage. Electrical energy, though available extensively from
storage sources such as batteries, or from primary converters such as solar cells, distributed ac
mains, is hardly ever used as such at the utilization end. The electrical energy is converted at the
utilization end to forms of energy as required (thermal, chemical, light, mechanical and so on).
Electrical power converter interfaces between the available source of electrical power and the
utilization equipment (heaters, storage battery chargers, lamps, motors and so on) with its
characteristics demands of electrical power. The need for this interface arises on account of the
fact that in most situations the source of available power and the conditions under which the load
Demands power is incompatible with each other.
DC-to-DC power converters form a subset of electrical power converters. Both the output
and input power specifications of dc-to-dc converters are in dc. Most dc loads require a well-
stabilized dc voltage capable of supplying a range of required current, or a variable dc current or
pulsating dc current rich in harmonics. The dc-to-dc converter has to provide a stable dc voltage
with low output impedance over a wide frequency range. These features of the dc-to-dc converter
are known through the output regulation and the output impedance of the converter. Most dc
sources are either batteries or derived by rectifying the ac mains. The source voltage may vary as
much as 40% in the case of batteries. It may contain substantial superimposed voltage ripple in the
case of rectified supplies. Most dc sources also exhibit a finite source impedance (against the ideal
of zero source impedance). The dc-to-dc converter must maintain integrity of the output power in
the presence of these non-ideal source characteristics. This capability of the dc-to-dc converters is
known through the line regulation, ripple susceptibility, and the input impedance of the converter.
Converters may be classified as two types as isolated converters and non isolated
converters. Isolated converters are fly-back converters, forward converters, push-pull converters,
and half-full bridge converters. Non isolated converters are mainly classified as 5 types. These are
buck converters, boost converters, buck-boost converters, cuk converters, and SEPIC converters.
1.1 Types of DC-to-DC Converters
Department of Electrical Engineering, UVCE Page 1

1. Buck converter.
2. Boost converter.
3. Buck-boost converter.
4. CUK converter.
5. SEPIC converter.
1.1.1 Buck converter
Buck converter which gives the output voltage lesser than the input voltage without polarity
reversal. It can operate both continuous conduction mode and discontinuous conduction mode.
The output voltage of the buck converter is depends on the input voltage and duty ratio of the
converter.
Vo = Vs. D (1.1)
Figure 1-a Buck converter circuit diagram

Figure 1-b buck converter waveforms (a) Inductor voltage (b) Inductor current
The advantages of buck converter are
1. The gain is less than unity.

2. The gain is independent of the switching frequency as long as Ts<<To.
3. The ideal efficiency is unity, when the non idealities as considered the efficiency
degrade.
1.1.2 Boost converter
Boost converter which gives the output voltage greater than the input voltage without
polarity reversal. It can operate both continuous conduction mode and discontinuous conduction
mode. The output voltage of the boost converter depends on the input voltage and duty ratio of
the converter.
Vs
Vo = (1.2)
(1−D)

Figure 1-c Boost converter circuit diagram.
(b)
Figure 1-d Waveforms of boost converter (a) Inductor voltage (b) Inductor current
The advantages of boost converter are
1. The gain is more than unity.

2. The gain is independent of the switching frequency so long as Ts<<Rc.

1.1.3 Buck-boost converter
Which gives the output voltage lesser or greater than that of the input voltage, depending
on the duty ratio of the switch. If D> 0.5, the output voltage greater than the input voltage, if D<
0.5, the output voltage lesser than the input voltage. The polarity reversal on the output voltage
may be a disadvantage in some applications of buck-boost converter. It can operate both
continuous conduction mode and discontinuous conduction mode.
D
Vo = -Vs (1.3)
(1−D)
The advantages of buck-boost converter are
1. The gain may be set to below or above unity. The output polarity is opposite to the input
polarity.
2. The gain is independent of switching frequency so long as Ts << Rc.
1.1.4 CUK converter
Which gives the output voltage lesser or greater than that of the input voltage, depending
on the duty ratio of the switch. If D> 0.5, the output voltage greater than the input voltage, if D<
0.5, the output voltage lesser than the input voltage. There is a polarity reversal in the output
voltage. It can operate both continuous conduction mode and discontinuous conduction mode. The
input side acts as a filter to reduce large harmonic component. Unlike previous converters were
energy transferred through the inductor.
D
Vo = -Vs (1.4)
(1−D)
1.1.5 SEPIC converter
The single ended primary inductance converter gives the output voltage lesser or greater
than that of the input voltage without polarity reversal. The output voltage depending on the duty
ratio of the switch. If D> 0.5, the output voltage greater than the input voltage, if D< 0.5, the output
voltage lesser than the input voltage. The main advantage of this converter is non-inverted output.

Certain applications only need to buck or boost the input voltage such cases we can use buck-boost
converter it is better to use, but the converter produces high input current ripple this ripple can
create harmonics. Cuk converters can solve this problem. Where this converters uses extra
capacitor and inductor. Both the cuk and buck-boost converter operation cause large amounts of
electrical stress on the components. This can cause failure of devices. SEPIC converters solve both
of these problems.
D
Vo = Vs (1.5)
(1−D)

Chapter 2
The Single Ended Primary Inductance Converter (SEPIC)
The converter is similar to cuk and buck-boost converter as shown in circuit diagram
figure(2.a).the SEPIC converter can produce an output voltage that is either lesser or greater than
the input voltage without the polarity reversal. This operates in both continuous and discontinuous
conduction mode. The SEPIC converter that operates in continuous conduction mode proposed in
this project.
To derive the relationship between input and output voltages, these initial assumptions are made:
1. Both inductors are very large and the currents in them are constant.
2. Both capacitors are very large and the voltages across them are constant.
3. The circuit is operating in the steady state, meaning that voltage and current waveforms are
periodic.
4. For a duty ratio of D, the switch is closed for time DT and open for (1 -D)T.
5. The switch and the diode are ideal.
All the dc-dc converters operate by turning on and off switching device, generally with a high
frequency pulse.
Figure 2-a SEPIC circuit diagram

2.1 Working of SEPIC converter
Figure 2-a show a simple circuit diagram of SEPIC converter, consisting of coupled
inductors L1 and L2, and coupling capacitors C1 and C2, a power MOSFET Q, and a diode D1.
For a duty ratio of D, the switch is closed for time DT and open for (1 -D)T. The inductor current
and capacitor voltage restrictions will be removed later to investigate the fluctuations in currents
and voltages. The inductor currents are assumed to be continuous in this analysis. Other
observations are that the average inductor voltages are zero and that the average capacitor currents
are zero for steady-state operation. This converter operates in two modes namely mode 1 in the
time interval DT when switch is on and mode 2 in the interval when switch is off.
2.1.1 Modes of operation
This converter operates in two modes namely mode 1 in the time interval DT when Switch
is on and mode 2 in the interval when switch is off.
Mode 1 (0< t < DT):-
Figure 2-b SEPIC Circuit with the switch closed
When the switch is closed, the diode is off and capacitor supplies the power to load connected
across the output terminal .The voltage across VL1 for the interval DT is given by
VL1 = VS (2-1)

Mode 2 (DT<t< (1-D) T)
Figure 2-c SEPIC Circuit with the switch open
When the switch is open, the diode is on, and the circuit is as shown in Fig. 2(c)
Kirchhoff’s voltage law around the outermost path gives
-VS + VL1 + Vc1 + V0 = 0 (2-2)
Assuming that the voltage across C1 remains constant at its average value of VS
-VS + VL1 + VS + V0 = 0 (2-3)
VL1 = -V0 (2-4)
Since the average voltage across an inductor is zero for periodic operation, equations (2-1) and (2-
4) are combined to get
Vs (DT) + Vo (1-D) T=0 (2-5)
The output voltage is expressed as
D
Vo = Vs (2.6)
(1−D)
This result is similar to that of the buck-boost and CUK converter equations, with the important
distinction that there is no polarity reversal between input and output voltages. The ability to have
an output voltage greater or less than the input without polarity reversal makes this converter
suitable for many applications.

2.2 Expected waveforms of SEPIC converter
Figure 2-d Currents in the SEPIC converter. (a) L1; (b) L2 ;( c) C1; (d) C2; (e) switch; (f) diode.

Chapter 3
Design of SEPIC Converter
In this proposed work SEPIC converter is designed for continuous-current operation. As

the switching frequency increases, the minimum size of the inductor to produce continuous current
and the minimum size of the capacitor to limit output ripple both decrease. Therefore, high
switching frequencies are desirable to reduce the size of both the inductor and the capacitor. The
tradeoff for high switching frequencies is increased power loss in the switches. Increased power
loss in the switches means that heat is produced. This decreases the converter’s efficiency and may
require a large heat sink, offsetting the reduction in size of the inductor and capacitor. Typical
switching frequencies are above 20 kHz to avoid audio noise, and they extend well into the 100’s
of kilohertz and into the megahertz range.
3.1 Design Considerations

The inductor value should be larger than Lmin in to ensure continuous current operation.
In this proposed work the inductor value is 25 percent larger than Lmin.. A smaller ΔiL results in
lower peak and rms inductor currents and a lower rms capacitor current but requires a larger
inductor. The inductor wire must be rated at the rms current, and the core should not saturate for
peak inductor current. The capacitor must be selected to limit the output ripple to the design
specifications, to withstand peak output voltage, and to carry the required rms current. The switch
(usually a MOSFET with a low RDSon) and diode (or second MOSFET for synchronous
rectification) must withstand maximum voltage stress when off and maximum current when on.
The temperature ratings must not be exceeded, often requiring a heat sink. Assuming ideal
switches and an ideal inductor in the initial design is usually reasonable. However, the ESR of the
capacitor should be included because it typically gives a more significant output voltage ripple
than the ideal device and greatly influences the choice of capacitor size.

3.2 Designing of Inductor and Capacitance value

For continuous current in the inductors, the average current must be greater than one-half
the change in current. Minimum inductor sizes for continuous current are
(1−𝐷)2 R
L1min = L2min = . 2𝑓 (3-1)
𝐷
In this proposed work the inductance value is taken as 1.25 times of the minimum inductor value
so
L1 = L2 = 1.25 * L1min (3-2)
The capacitor value can be determined using the following formula by considering the minimum
ripple voltage
𝐷
C1 = C2 = ∆V0 (3-3)
R( )f
Vo
3.3 Design Parameters
Parameters Values
Input voltage, Vs 16v
Output voltage, Vo 24v
Duty ratio , D 60%
Resistance ,R 20Ω
Switching frequency , fs 25kHZ
Inductor, L1 =L2 133μH
Capacitor, C1 =C2 120μF
Table 1

Chapter 4
RESULTS
Simulation is carried out in Matlab with the design parameters from table 1, the simulated results
is as follows
4.1 Open Loop Simulation Result
Figure 4-a Simulation of open loop SEPIC converter

4.2 Closed Loop Simulation Result
Figure 4-b Simulation of closed loop SEPIC converter

Figure 4-c Input voltage (Vi) vs time Waveform
Figure 4-d Gate signal to Mosfet with duty cycle 60% vs time waveform

Figure 4-e Output voltage (Vo) vs time waveform
Figure 4-f Voltage across inductor1 vs time waveform

Figure 4-g Current in the inductor1 vs time waveform
Figure 4-h Current in the inductor2 vs time waveform

Figure 4-i Current in the capacitor1 vs time waveform
Figure 4-j Current in the capacitor2 vs time waveform

Figure 4-k Current in the diode vs time waveform
Figure 4-l Current in the mosfet2 vs time waveform

Figure 4-m voltage across switch vs time waveform
4.2 Experimental Results

Fig 4.2(a) . Pulse Generation
Fig 4.2(b) . Output Waveform

Chapter 5
Conclusions
In this present work SEPIC converter is operated in continuous conduction mode with frequency
25kHZ. All the specifications and values of passive components for designing of SEPIC converter
is determined. Matlab simulation is done using the design values in closed loop system and
corresponding waveforms are obtained. Hardware design of SEPIC converter is done for open loop
system with frequency 25kHZ and corresponding waveforms are obtained. The main features of
SEPIC converter includes high efficiency, low voltage stress on semiconductor devices and

simplicity of the design, these advantages are desirable features for low voltage power supply
applications.
References:
[1] Dr. Ridly, Ray. “Analyzing the Sepic Converter” 2006, Ridley Engineering. March 2014
[2] Robert W,Erickson and Dragan Maksimovic,”Fundamentals of power
Electronics,”springer,2001
[3] Falin, Jeff. “Designing DC/DC converters based on SEPIC topology” 2008, Texas Instruments.
[4]Ben Schaefer and deniss gilbert,” Analysis of sepic converter”,feb 2010

[5] M.R shaid AHM yatim and T.taufik “A new dc dc converter using bridgeless sepic’’ 2010 pp
286-290
[6] Daniel Hart, POWER ELECTRONICS , Published by McGraw-Hill, a business unit of The
McGraw-Hill Companies, Inc., 1221
Appendix
1) IRF540

Description
This MOSFET series realized with STMicroelectronics unique Strip FET process has specifically
been designed to minimize input capacitance and gate charge. It is therefore suitable as primary
switch in advanced high efficiency, high-frequency isolated DC-DC converters for Telecom and
Computer applications. It is also intended for any applications with low gate drive requirements.
Applications
 High-efficiency dc-dc converters
 UPS and motor control
2) 1N4007

Features
• Low forward voltage drop
• Low leakage current
• High forward surge capability
• Solder dip 275 °C max. 10 s, per JESD 22-B106
• Compliant to RoHS Directive 2002/95/EC and in accordance to WEEE 2002/96/EC
3) 555 Timer

Description:-
The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional
terminals are provided for triggering or resetting if desired. In the time delay mode of operation,
the time is precisely controlled by one external resistor and capacitor. For a stable operation as an
oscillator, the free running frequency and duty cycle are accurately controlled with two external
resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the
output circuit can source or sink up to 200mA or drive TTL circuits.
Astable Operation
If the circuit is connected as shown in figure (pins 2 and 6 connected) it will trigger itself and free
run as a multivibrator. The external capacitor charges through RA + RB and discharges through
RB. Thus the duty cycle may be precisely set by the ratio of these two resistors. In this mode of
operation, the capacitor charges and discharges between 1/3 VCC and 2/3 VCC. As in the triggered
mode, the charge and discharge times, and therefore the frequency are independent of the supply
voltage.

Figure. Astable mode 555timer
Astable mode 555timer waveforms
Features
 Timing from Microseconds through Hours
 Operates in Both Astable and Monostable Modes
 Adjustable Duty Cycle
 Output Can Source or Sink 200 mA
 Output and Supply TTL Compatible
 Temperature Stability Better than 0.005% per °C
 Normally On and Normally Off Output

VyIy
Vx
∆iLs
Iy

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Design and Implementation of SEPIC converter

1.1 Types of DC-to-DC Converters

Department of Electrical Engineering, UVCE Page 1

1.1.1 Buck converter

Figure 1-a Buck converter circuit diagram

Department of Electrical Engineering, UVCE Page 2

The advantages of buck converter are

1. The gain is less than unity.

1.1.2 Boost converter

Department of Electrical Engineering, UVCE Page 3

Figure 1-c Boost converter circuit diagram.

The advantages of boost converter are

1. The gain is more than unity.

Department of Electrical Engineering, UVCE Page 4

1.1.3 Buck-boost converter

The advantages of buck-boost converter are

1.1.4 CUK converter

1.1.5 SEPIC converter

Department of Electrical Engineering, UVCE Page 5

Department of Electrical Engineering, UVCE Page 6

The Single Ended Primary Inductance Converter (SEPIC)

Figure 2-a SEPIC circuit diagram

Department of Electrical Engineering, UVCE Page 7

2.1 Working of SEPIC converter

2.1.1 Modes of operation

Mode 1 (0< t < DT):-

Figure 2-b SEPIC Circuit with the switch closed

Department of Electrical Engineering, UVCE Page 8

Mode 2 (DT<t< (1-D) T)

Figure 2-c SEPIC Circuit with the switch open

-VS + VL1 + Vc1 + V0 = 0 (2-2)

-VS + VL1 + VS + V0 = 0 (2-3)

VL1 = -V0 (2-4)

The output voltage is expressed as

Department of Electrical Engineering, UVCE Page 9

2.2 Expected waveforms of SEPIC converter

Department of Electrical Engineering, UVCE Page 10

Design of SEPIC Converter

In this proposed work SEPIC converter is designed for continuous-current operation. As

3.1 Design Considerations

Department of Electrical Engineering, UVCE Page 11

3.2 Designing of Inductor and Capacitance value

3.3 Design Parameters

Department of Electrical Engineering, UVCE Page 12

4.1 Open Loop Simulation Result

Figure 4-a Simulation of open loop SEPIC converter

Department of Electrical Engineering, UVCE Page 13

4.2 Closed Loop Simulation Result

Figure 4-b Simulation of closed loop SEPIC converter

Department of Electrical Engineering, UVCE Page 14

Figure 4-c Input voltage (Vi) vs time Waveform

Department of Electrical Engineering, UVCE Page 15

Figure 4-e Output voltage (Vo) vs time waveform

Figure 4-f Voltage across inductor1 vs time waveform

Department of Electrical Engineering, UVCE Page 16

Figure 4-g Current in the inductor1 vs time waveform

Figure 4-h Current in the inductor2 vs time waveform

Department of Electrical Engineering, UVCE Page 17

Figure 4-i Current in the capacitor1 vs time waveform

Figure 4-j Current in the capacitor2 vs time waveform

Department of Electrical Engineering, UVCE Page 18

Figure 4-k Current in the diode vs time waveform

Figure 4-l Current in the mosfet2 vs time waveform