5 4 3 2 1

Kona SVT-NCS Schematic Block Diagram

D D

3V/5V

PAGE 27

DDR3L DDR3L Channel A & B EDP

LCD
PAGE 13-15 1333/1600MHz PAGE 16
1.05V
LPC SPI
80 Port PAGE 17
SPI BIOS PAGE 5
PAGE 25

0.68V/1.35V
Left IO Board USB2.0
CAMERA PAGE 16
SATA PAGE 28
SSD
USB2.0
TOUCHPANEL 1.5V
USB3.0 PAGE 16
USB3.0
PAGE 26

Haswell MCP
HDMI
C
HDMI PS8407A PAGE 2--11 SWITCH POWER C

Right IO Board PAGE 30

USB2.0 HDA ALC283-CG

CARD READER RTS5176-GR PAGE 19
HP/MIC COMBO JACK
WALKPORT

Sensor Board PCIE for WiFi & USB2.0 for BT

WiFi/BT Module PAGE 31

e-Compass/Gyro I2C USB2.0

MCU
USB2.0 CPU_CORE
PAGE 21 USB Charge USB2.0
PAGE 32
G-Sensor I2C

LPC BUS CHARGER

ALS I2C PAGE 29

EC SMBUS
B
FAN PAGE 22 B

PAGE 20

Battery PAGE 17

KB
PAGE 17
LED DRIVER PAGE 23

PS2
TOUCH PAD PAGE 23

A A

www.vinafix.com
LENOVO.CRDN
Title
Block Diagram
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 1 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

+VCCIOA_OUT

Haswell MCP (DDI,EDP) EDP_COMP R1 1 2 24.9_0402_1%

D D

TESTPAD_16 TPF114

U60A HASWELL_MCP_E

C54 C45
17 HDMI_DATA2_N DDI1_TXN0 EDP_TXN0 EDP_TX0_DN 16
17 HDMI_DATA2 C55 B46
B58 DDI1_TXP0 EDP_TXP0 A47 EDP_TX0_DP 16
17 HDMI_DATA1_N DDI1_TXN1 EDP_TXN1 EDP_TX1_DN 16
17 HDMI_DATA1 C58 B47
DDI1_TXP1 EDP_TXP1 EDP_TX1_DP 16
B55
17 HDMI_DATA0_N DDI1_TXN2
A55 C47
17 HDMI_DATA0 DDI1_TXP2 EDP_TXN2 EDP_TX2_DN 16
17 HDMI_CLK_N A57 C46
B57 DDI1_TXN3 EDP_TXP2 A49 EDP_TX2_DP 16
17 HDMI_CLK DDI1_TXP3 DDI EDP EDP_TXN3 EDP_TX3_DN 16
B49
EDP_TXP3 EDP_TX3_DP 16
C51
C50 DDI2_TXN0 A45
DDI2_TXP0 EDP_AUXN EDP_AUX_DN 16
C53 B45
B54 DDI2_TXN1 EDP_AUXP EDP_AUX_DP 16
C49 DDI2_TXP1 D20 EDP_COMP
B50 DDI2_TXN2 EDP_RCOMP A43
A53 DDI2_TXP2 EDP_DISP_UTIL
B53 DDI2_TXN3
DDI2_TXP3

R2 1 2 0_0402_5%
Rev0p7 LCD_PWM_BKLT 16
C 1 OF 19 @ C

2
R4
0_0402_5%
@

1
HASWELL_MCP_E
U60I

16 LCD_BL_PWM_PCH B8 B9
EDP_BKLCTL DDPB_CTRLCLK HDMI_DDC_CLK 17
A9 C9
16,20 LCD_BL_EN EDP_BKLEN DDPB_CTRLDATA HDMI_DDC_DATA 17
C6 eDP SIDEBAND D9
16 EDP_VDD_EN EDP_VDDEN DDPC_CTRLCLK D11
DDPC_CTRLDATA

U6
17 MPCIE_RST_N P4 PIRQA/GPIO77 C5
PCI_PIRQB_N
PCI_PIRQC_N N4 PIRQB/GPIO78 DISPLAY DDPB_AUXN B6
6 PCI_PIRQC_N N2 PIRQC/GPIO79 DDPC_AUXN B5
6 PCI_PIRQD_N PIRQD/GPIO80 DDPB_AUXP
PCI_PME_N AD4 A6
TESTPAD TP1 PME GPIO DDPC_AUXP
TESTPAD TP40 U7
L1 GPIO55
16 TOUCH_RST_N_GYRO_INT1 2R162 10_0402_5% L3 GPIO52 C8
GPIO54
7,17 NGFF_SLTA_WIFI_WAKE_N GPIO54 DDPB_HPD HDMI_HPD 17
R5 A8
B 17 RF_KILL_N_WIFI_NGFF GPIO51 DDPC_HPD B
L4 D6
17 HDMI_PWR_EN GPIO53 EDP_HPD EDP_HPD 16

9 OF 19 Rev0p7

+3V

RP1

1 8
2 7 CK_REQ_WLAN_N 6,17
PCI_PIRQB_N
3 6 GPIO54
4 5
PCIECLKREQ4_N 6
10K_8P4R_5%

R657 1 @ 2 10K_0402_5% MPCIE_RST_N

A A

LENOVO.CRDN
Title
Haswell MCP (DDI,EDP)
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 2 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP (MISC,THERMAL,JATG)

D D

+VCCIO_OUT
HASWELL_MCP_E
U60B

TESTPAD TP2
@ TP_SKTOCC_N D61
R10 2 1 49.9_0402_1% H_CATERR_N K61 PROC_DETECT MISC
N62 CATERR J62
20 PECI_EC PECI PRDY TP75 TESTPAD
K62
PREQ TP115 TESTPAD
JTAG E60
PROC_TCK XDP_TCK 12
E61
1 2 K63 PROC_TMS E59 XDP_TMS_CPU 12
R12 56_0402_5% H_PROCHOT_R_N
20,29,32 H_PROCHOT_N PROCHOT PROC_TRST XDP_TRST_CPU_N 5
THERMAL F63
PROC_TDI F62 XDP_TDI_CPU 12
PROC_TDO XDP_TDO_CPU 12
TPF1 TESTPAD_16
+1.35V_CPU H_CPUPWRGD C61
PROCPWRGD TPF4 TESTPAD_16 TPF2 TESTPAD_16
PWR
TPF5 TESTPAD_16 TPF3 TESTPAD_16
J60 TP48 TESTPAD
BPM#0

1
H60
BPM#1 TP79 TESTPAD
R17 H61
BPM#2 H62
470_0402_5% BPM#3
SM_RCOMP_0 AU60 K59
SM_RCOMP_1 AV60 SM_RCOMP0 DDR3 BPM#4 H63
SM_RCOMP1 BPM#5

2
SM_RCOMP_2 AU61 K60
1 2 AV15 SM_RCOMP2 BPM#6 J61
13,14 DDR3_DRAMRST_N SM_DRAMRST BPM#7
1 AV61
C616 R51 0_0402_5% SM_PG_CNTL1
@
DDR_PG_CTRL_R 1 2 DDR_PG_CTRL

1U_0402_10V6K
2 OF 19 Rev0p7
2
R18 0_0402_5%

2
C R19 @ C
0_0402_5%

1
+1.05V_VCCST

XDP_TDO_CPU R20 1 @ 2 51_0402_5%

+1.35VSUS
+3V

2
2

C11 @
U2 R25 XDP_TCK R23 1 2 51_0402_5%
1 6 0.1u_0201_10V6K 220K_0402_5%
NC1 Vcc 1 XDP_TRST_CPU_N R24 1 @ 2 51_0402_5%
DDR_PG_CTRL_R 2 5
A NC2
1

3 4
GND Y DDR_VTT_PG_CTRL 25,28

74AUP1G07GF_SOT891-6_1X1
2

@
R26
2M_0402_5%
1

B B

Processor Pull-ups DDR3 Compensation Signal

SM_RCOMP_2
+1.05V_VCCST
SM_RCOMP_1 H_CPUPWRGD

SM_RCOMP_0
1

R28
R29 R30 R31

2
62_0402_1% 200_0402_1% 121_0402_1% 100_0402_1%
R32
2

100K_0402_5%
1

A H_PROCHOT_N A

LENOVO.CRDN
Title
Haswell MCP (MISC,THERMAL,JATG)
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 3 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP(LPDDR3)

D D

HASWELL_MCP_E
U60D
Left pins name Right pins name
14 M_B_DQ[63:0] Option A/Option B/Option C/Option D Option D/Option C/Option B/Option A
HASWELL_MCP_E
U60C
13 M_A_DQ[63:0] Left pins name Right pins name M_B_DQ0 AY31 4 memory types: AM38
AW31 SA_DQ32/SA_DQ32/SB_DQ0/SB_DQ0 SB_CK#0 AN38 M_B_CLK_DDR_N0 14,15
Option A/Option B/Option C/Option D Option D/Option C/Option B/Option A M_B_DQ1 Option A: DDR3L Interleaved
SA_DQ33/SA_DQ33/SB_DQ1/SB_DQ1 SB_CK0 M_B_CLK_DDR0 14,15
M_A_DQ0 AH63 AU37 M_B_DQ2 AY29 Option B: LP-DDR3 Interleaved AK38
AH62 SA_DQ0 SA_CLK#0 AV37 M_A_CLK_DDR_N0 13,15 AW29 SA_DQ34/SA_DQ34/SB_DQ2/SB_DQ2 SB_CK#1 AL38
M_A_DQ1 4 memory types: M_B_DQ3 Option C: DDR3L Non-Interleaved
SA_DQ1 SA_CLK0 M_A_CLK_DDR0 13,15 SA_DQ35/SA_DQ35/SB_DQ3/SB_DQ3 SB_CK1
M_A_DQ2 AK63 Option A: DDR3L Interleaved AW36 M_B_DQ4 AV31 Option D: LP-DDR3 Non-Interleaved
M_A_DQ3 AK62 SA_DQ2 Option B: LP-DDR3 Interleaved SA_CLK#1 AY36 M_B_DQ5 AU31 SA_DQ36/SA_DQ36/SB_DQ4/SB_DQ4 AY49
AH61 SA_DQ3 SA_CLK1 AV29 SA_DQ37/SA_DQ37/SB_DQ5/SB_DQ5 SB_CKE0 AU50 M_B_CKE0 14,15
M_A_DQ4 Option C: DDR3L Non-Interleaved M_B_DQ6
SA_DQ4 SA_DQ38/SA_DQ38/SB_DQ6/SB_DQ6 SB_CKE1 M_B_CKE1 14,15
M_A_DQ5 AH60 Option D: LP-DDR3 Non-Interleaved AU43 M_B_DQ7 AU29 AW49
AK61 SA_DQ5 SA_CKE0 AW43 M_A_CKE0 13,15 AY27 SA_DQ39/SA_DQ39/SB_DQ7/SB_DQ7 SB_CKE2 AV50
M_A_DQ6 M_B_DQ8
SA_DQ6 SA_CKE1 M_A_CKE1 13,15 SA_DQ40/SA_DQ40/SB_DQ8/SB_DQ8 SB_CKE3
M_A_DQ7 AK60 AY42 M_B_DQ9 AW27
M_A_DQ8 AM63 SA_DQ7 SA_CKE2 AY43 M_B_DQ10 AY25 SA_DQ41/SA_DQ41/SB_DQ9/SB_DQ9 AM32
AM62 SA_DQ8 SA_CKE3 AW25 SA_DQ42/SA_DQ42/SB_DQ10/SB_DQ10 SB_CS#0 AK32 M_B_DIM0_CS0_N 14,15
M_A_DQ9 M_B_DQ11
SA_DQ9 SA_DQ43/SA_DQ43/SB_DQ11/SB_DQ11 SB_CS#1 M_B_DIM0_CS1_N 14,15
M_A_DQ10 AP63 AP33 M_B_DQ12 AV27
AP62 SA_DQ10 SA_CS#0 AR32 M_A_DIM0_CS0_N 13,15 AU27 SA_DQ44/SA_DQ44/SB_DQ12/SB_DQ12 AL32
M_A_DQ11 M_B_DQ13 TP70 TESTPAD
SA_DQ11 SA_CS#1 M_A_DIM0_CS1_N 13,15 SA_DQ45/SA_DQ45/SB_DQ13/SB_DQ13 SB_ODT0
M_A_DQ12 AM61 M_B_DQ14 AV25
M_A_DQ13 AM60 SA_DQ12 AP32 TP69 TESTPAD M_B_DQ15 AU25 SA_DQ46/SA_DQ46/SB_DQ14/SB_DQ14 AM35
AP61 SA_DQ13 SA_ODT0 AM29 SA_DQ47/SA_DQ47/SB_DQ15/SB_DQ15 SB_CAB3/SB_RAS#/SB_CAB3/SB_RAS# AK35 M_B_RAS_N 14,15
M_A_DQ14 M_B_DQ16
SA_DQ14 SB_DQ32/SB_DQ32/SB_DQ16/SB_DQ16 SB_CAB2/SB_WE#/SB_CAB2/SB_WE# M_B_WE_N 14,15
M_A_DQ15 AP60 AY34 M_B_DQ17 AK29 AM33
AP58 SA_DQ15 SA_CAB3/SA_RAS#/SA_CAB3/SA_RAS# AW34 M_A_RAS_N 13,15 AL28 SB_DQ33/SB_DQ33/SB_DQ17/SB_DQ17 SB_CAB1/SB_CAS#/SB_CAB1/SB_CAS# M_B_CAS_N 14,15
M_A_DQ16 M_B_DQ18
SB_DQ0/SB_DQ0/SA_DQ16/SA_DQ16 SA_CAB2/SA_WE#/SA_CAB2/SA_WE# M_A_WE_N 13,15 SB_DQ34/SB_DQ34/SB_DQ18/SB_DQ18
M_A_DQ17 AR58 AU34 M_B_DQ19 AK28 AL35
SB_DQ1/SB_DQ1/SA_DQ17/SA_DQ17 SA_CAB1/SA_CAS#/SA_CAB1/SA_CAS# M_A_CAS_N 13,15 SB_DQ35/SB_DQ35/SB_DQ19/SB_DQ19 SB_CAB4/SB_BA0/SB_CAB4/SB_BA0 M_B_BS0 14,15
M_A_DQ18 AM57 M_B_DQ20 AR29 AM36
AK57 SB_DQ2/SB_DQ2/SA_DQ18/SA_DQ18 AU35 AN29 SB_DQ36/SB_DQ36/SB_DQ20/SB_DQ20 SB_CAB6/SB_BA1/SB_CAB6/SB_BA1 AU49 M_B_BS1 14,15
M_A_DQ19 M_B_DQ21
SB_DQ3/SB_DQ3/SA_DQ19/SA_DQ19 SA_CAB4/SA_BA0/SA_CAB4/SA_BA0 M_A_BS0 13,15 SB_DQ37/SB_DQ37/SB_DQ21/SB_DQ21 SB_CAA5/SB_BA2/SB_CAA5/SB_BA2 M_B_BS2 14,15
M_A_DQ20 AL58 AV35 M_B_DQ22 AR28
AK58 SB_DQ4/SB_DQ4/SA_DQ20/SA_DQ20 SA_CAB6/SA_BA1/SA_CAB6/SA_BA1 AY41 M_A_BS1 13,15 AP28 SB_DQ38/SB_DQ38/SB_DQ22/SB_DQ22 AP40 M_B_A[15:0] 14,15
M_A_DQ21 M_B_DQ23 M_B_A0
SB_DQ5/SB_DQ5/SA_DQ21/SA_DQ21 SA_CAA5/SA_BA2/SA_CAA5/SA_BA2 M_A_BS2 13,15 SB_DQ39/SB_DQ39/SB_DQ23/SB_DQ23 SB_CAB9/SB_MA0/SB_CAB9/SB_MA0
M_A_DQ22 AR57 M_B_DQ24 AN26 AR40 M_B_A1
SB_DQ6/SB_DQ6/SA_DQ22/SA_DQ22 M_A_A[15:0] 13,15 SB_DQ40/SB_DQ40/SB_DQ24/SB_DQ24 SB_CAB8/SB_MA1/SB_CAB8/SB_MA1
M_A_DQ23 AN57 AU36 M_A_A0 M_B_DQ25 AR26 AP42 M_B_A2
M_A_DQ24 AP55 SB_DQ7/SB_DQ7/SA_DQ23/SA_DQ23 SA_CAB9/SA_MA0/SA_CAB9/SA_MA0 AY37 M_A_A1 M_B_DQ26 AR25 SB_DQ41/SB_DQ41/SB_DQ25/SB_DQ25 SB_CAB5/SB_MA2/SB_CAB5/SB_MA2 AR42 M_B_A3
M_A_DQ25 AR55 SB_DQ8/SB_DQ8/SA_DQ24/SA_DQ24 SA_CAB8/SA_MA1/SA_CAB8/SA_MA1 AR38 M_A_A2 M_B_DQ27 AP25 SB_DQ42/SB_DQ42/SB_DQ26/SB_DQ26 NOT USED/SB_MA3/NOT USED/SB_MA3 AR45 M_B_A4
C C
M_A_DQ26 AM54 SB_DQ9/SB_DQ9/SA_DQ25/SA_DQ25 SA_CAB5/SA_MA2/SA_CAB5/SA_MA2 AP36 M_A_A3 M_B_DQ28 AK26 SB_DQ43/SB_DQ43/SB_DQ27/SB_DQ27 NOT USED/SB_MA4/NOT USED/SB_MA4 AP45 M_B_A5
M_A_DQ27 AK54 SB_DQ10/SB_DQ10/SA_DQ26/SA_DQ26 NOT USED/SA_MA3/NOT USED/SA_MA3 AU39 M_A_A4 M_B_DQ29 AM26 SB_DQ44/SB_DQ44/SB_DQ28/SB_DQ28 SB_CAA0/SB_MA5/SB_CAA0/SB_MA5 AW46 M_B_A6
M_A_DQ28 AL55 SB_DQ11/SB_DQ11/SA_DQ27/SA_DQ27 NOT USED/SA_MA4/NOT USED/SA_MA4 AR36 M_A_A5 M_B_DQ30 AK25 SB_DQ45/SB_DQ45/SB_DQ29/SB_DQ29 SB_CAA2/SB_MA6/SB_CAA2/SB_MA6 AY46 M_B_A7
M_A_DQ29 AK55 SB_DQ12/SB_DQ12/SA_DQ28/SA_DQ28 SA_CAA0/SA_MA5/SA_CAA0/SA_MA5 AV40 M_A_A6 M_B_DQ31 AL25 SB_DQ46/SB_DQ46/SB_DQ30/SB_DQ30 SB_CAA4/SB_MA7/SB_CAA4/SB_MA7 AY47 M_B_A8
M_A_DQ30 AR54 SB_DQ13/SB_DQ13/SA_DQ29/SA_DQ29 SA_CAA2/SA_MA6/SA_CAA2/SA_MA6 AW39 M_A_A7 M_B_DQ32 AY23 SB_DQ47/SB_DQ47/SB_DQ31/SB_DQ31 SB_CAA3/SB_MA8/SB_CAA3/SB_MA8 AU46 M_B_A9
M_A_DQ31 AN54 SB_DQ14/SB_DQ14/SA_DQ30/SA_DQ30 SA_CAA4/SA_MA7/SA_CAA4/SA_MA7 AY39 M_A_A8 M_B_DQ33 AW23 SA_DQ48/SA_DQ48/SB_DQ32/SB_DQ32 SB_CAA1/SB_MA9/SB_CAA1/SB_MA9 AK36 M_B_A10
M_A_DQ32 AY58 SB_DQ15/SB_DQ15/SA_DQ31/SA_DQ31 SA_CAA3/SA_MA8/SA_CAA3/SA_MA8 AU40 M_A_A9 M_B_DQ34 AY21 SA_DQ49/SA_DQ49/SB_DQ33/SB_DQ33 SB_CAB7/SB_MA10/SB_CAB7/SB_MA10
DDR CHANNEL B AV47 M_B_A11
M_A_DQ33 AW58 SA_DQ16/SA_DQ16/SA_DQ32/SA_DQ32 SA_CAA1/SA_MA9/SA_CAA1/SA_MA9 AP35 M_A_A10 M_B_DQ35 AW21 SA_DQ50/SA_DQ50/SB_DQ34/SB_DQ34 SB_CAA7/SB_MA11/SB_CAA7/SB_MA11 AU47 M_B_A12
M_A_DQ34 AY56 SA_DQ17/SA_DQ17/SA_DQ33/SA_DQ33 SA_CAB7/SA_MA10/SA_CAB7/SA_MA10 AW41 M_A_A11 M_B_DQ36 AV23 SA_DQ51/SA_DQ51/SB_DQ35/SB_DQ35 SB_CAA6/SB_MA12/SB_CAA6/SB_MA12 AK33 M_B_A13
M_A_DQ35 AW56 SA_DQ18/SA_DQ18/SA_DQ34/SA_DQ34 SA_CAA7/SA_MA11/SA_CAA7/SA_MA11
DDR CHANNEL A AU41 M_A_A12 M_B_DQ37 AU23 SA_DQ52/SA_DQ52/SB_DQ36/SB_DQ36 SB_CAB0/SB_MA13/SB_CAB0/SB_MA13 AR46 M_B_A14
M_A_DQ36 AV58 SA_DQ19/SA_DQ19/SA_DQ35/SA_DQ35 SA_CAA6/SA_MA12/SA_CAA6/SA_MA12 AR35 M_A_A13 M_B_DQ38 AV21 SA_DQ53/SA_DQ53/SB_DQ37/SB_DQ37 SB_CAA9/SB_MA14/SB_CAA9/SB_MA14 AP46 M_B_A15
M_A_DQ37 AU58 SA_DQ20/SA_DQ20/SA_DQ36/SA_DQ36 SA_CAB0/SA_MA13/SA_CAB0/SA_MA13 AV42 M_A_A14 M_B_DQ39 AU21 SA_DQ54/SA_DQ54/SB_DQ38/SB_DQ38 SB_CAA8/SB_MA15/SB_CAA8/SB_MA15
M_A_DQ38 AV56 SA_DQ21/SA_DQ21/SA_DQ37/SA_DQ37 SA_CAA9/SA_MA14/SA_CAA9/SA_MA14 AU42 M_A_A15 M_B_DQ40 AY19 SA_DQ55/SA_DQ55/SB_DQ39/SB_DQ39 AW30
AU56 SA_DQ22/SA_DQ22/SA_DQ38/SA_DQ38 SA_CAA8/SA_MA15/SA_CAA8/SA_MA15 AW19 SA_DQ56/SA_DQ56/SB_DQ40/SB_DQ40
SB_DQSN0/SB_DQSN0/SA_DQSN4/SA_DQSN4 AV26 M_B_DQS_DN0 14
M_A_DQ39 M_B_DQ41
SA_DQ23/SA_DQ23/SA_DQ39/SA_DQ39 SA_DQ57/SA_DQ57/SB_DQ41/SB_DQ41
SB_DQSN1/SB_DQSN1/SA_DQSN5/SA_DQSN5 M_B_DQS_DN1 14
M_A_DQ40 AY54 AJ61 M_B_DQ42 AY17 AN28
AW54 SA_DQ24/SA_DQ24/SA_DQ40/SA_DQ40 SA_DQSN0 AN62 M_A_DQS_DN0 13 AW17 SA_DQ58/SA_DQ58/SB_DQ42/SB_DQ42
SB_DQSN2/SB_DQSN2/SB_DQSN4/SB_DQSN4 AN25 M_B_DQS_DN2 14
M_A_DQ41 M_B_DQ43
SA_DQ25/SA_DQ25/SA_DQ41/SA_DQ41 SA_DQSN1 M_A_DQS_DN1 13 SA_DQ59/SA_DQ59/SB_DQ43/SB_DQ43
SB_DQSN3/SB_DQSN3/SB_DQSN5/SB_DQSN5 M_B_DQS_DN3 14
M_A_DQ42 AY52 AM58 M_B_DQ44 AV19 AW22
SA_DQ26/SA_DQ26/SA_DQ42/SA_DQ42 SA_DQSN2/SA_DQSN2/SB_DQSN0/SB_DQSN0 M_A_DQS_DN2 13 SA_DQ60/SA_DQ60/SB_DQ44/SB_DQ44
SB_DQSN4/SB_DQSN4/SA_DQSN6/SA_DQSN6 M_B_DQS_DN4 14
M_A_DQ43 AW52 AM55 M_B_DQ45 AU19 AV18
AV54 SA_DQ27/SA_DQ27/SA_DQ43/SA_DQ43 SA_DQSN3/SA_DQSN3/SB_DQSN1/SB_DQSN1 AV57 M_A_DQS_DN3 13 AV17 SA_DQ61/SA_DQ61/SB_DQ45/SB_DQ45
SB_DQSN5/SB_DQSN5/SA_DQSN7/SA_DQSN7 AN21 M_B_DQS_DN5 14
M_A_DQ44 M_B_DQ46
SA_DQ28/SA_DQ28/SA_DQ44/SA_DQ44 SA_DQSN4/SA_DQSN4/SA_DQSN2/SA_DQSN2 M_A_DQS_DN4 13 SA_DQ62/SA_DQ62/SB_DQ46/SB_DQ46 SB_DQSN6 M_B_DQS_DN6 14
M_A_DQ45 AU54 AV53 M_B_DQ47 AU17 AN18
AV52 SA_DQ29/SA_DQ29/SA_DQ45/SA_DQ45 SA_DQSN5/SA_DQSN5/SA_DQSN3/SA_DQSN3 AL43 M_A_DQS_DN5 13 AR21 SA_DQ63/SA_DQ63/SB_DQ47/SB_DQ47 SB_DQSN7 M_B_DQS_DN7 14
M_A_DQ46 M_B_DQ48
SA_DQ30/SA_DQ30/SA_DQ46/SA_DQ46 SA_DQSN6/SA_DQSN6/SB_DQSN2/SB_DQSN2 M_A_DQS_DN6 13 SB_DQ48
M_A_DQ47 AU52 AL48 M_B_DQ49 AR22 AV30
SA_DQ31/SA_DQ31/SA_DQ47/SA_DQ47 SA_DQSN7/SA_DQSN7/SB_DQSN3/SB_DQSN3 M_A_DQS_DN7 13 SB_DQ49 SB_DQSP0/SB_DQSP0/SA_DQSP4/SA_DQSP4 M_B_DQS_DP0 14
M_A_DQ48 AK40 M_B_DQ50 AL21 AW26
AK42 SB_DQ16/SB_DQ16/SA_DQ48/SA_DQ48 AJ62 AM22 SB_DQ50 SB_DQSP1/SB_DQSP1/SA_DQSP5/SA_DQSP5 AM28 M_B_DQS_DP1 14
M_A_DQ49 M_B_DQ51
SB_DQ17/SB_DQ17/SA_DQ49/SA_DQ49 SA_DQSP0 M_A_DQS_DP0 13 SB_DQ51 SB_DQSP2/SB_DQSP2/SB_DQSP4/SB_DQSP4 M_B_DQS_DP2 14
M_A_DQ50 AM43 AN61 M_B_DQ52 AN22 AM25
AM45 SB_DQ18/SB_DQ18/SA_DQ50/SA_DQ50 SA_DQSP1 AN58 M_A_DQS_DP1 13 AP21 SB_DQ52 SB_DQSP3/SB_DQSP3/SB_DQSP5/SB_DQSP5 AV22 M_B_DQS_DP3 14
M_A_DQ51 M_B_DQ53
SB_DQ19/SB_DQ19/SA_DQ51/SA_DQ51SA_DQSP2/SA_DQSP2/SB_DQSP0/SB_DQSP0 M_A_DQS_DP2 13 SB_DQ53 SB_DQSP4/SB_DQSP4/SA_DQSP6/SA_DQSP6 M_B_DQS_DP4 14
M_A_DQ52 AK45 AN55 M_B_DQ54 AK21 AW18
SB_DQ20/SB_DQ20/SA_DQ52/SA_DQ52SA_DQSP3/SA_DQSP3/SB_DQSP1/SB_DQSP1 M_A_DQS_DP3 13 SB_DQ54 SB_DQSP5/SB_DQSP5/SA_DQSP7/SA_DQSP7 M_B_DQS_DP5 14
M_A_DQ53 AK43 AW57 M_B_DQ55 AK22 AM21
AM40 SB_DQ21/SB_DQ21/SA_DQ53/SA_DQ53SA_DQSP4/SA_DQSP4/SA_DQSP2/SA_DQSP2 AW53 M_A_DQS_DP4 13 AN20 SB_DQ55 SB_DQSP6 AM18 M_B_DQS_DP6 14
M_A_DQ54 M_B_DQ56
SB_DQ22/SB_DQ22/SA_DQ54/SA_DQ54SA_DQSP5/SA_DQSP5/SA_DQSP3/SA_DQSP3 M_A_DQS_DP5 13 SB_DQ56 SB_DQSP7 M_B_DQS_DP7 14
M_A_DQ55 AM42 AL42 M_B_DQ57 AR20
AM46 SB_DQ23/SB_DQ23/SA_DQ55/SA_DQ55SA_DQSP6/SA_DQSP6/SB_DQSP2/SB_DQSP2 AL49 M_A_DQS_DP6 13 AK18 SB_DQ57
M_A_DQ56 M_B_DQ58
SB_DQ24/SB_DQ24/SA_DQ56/SA_DQ56SA_DQSP7/SA_DQSP7/SB_DQSP3/SB_DQSP3 M_A_DQS_DP7 13 SB_DQ58
M_A_DQ57 AK46 M_B_DQ59 AL18
M_A_DQ58 AM49 SB_DQ25/SB_DQ25/SA_DQ57/SA_DQ57 AP49 M_B_DQ60 AK20 SB_DQ59
AK49 SB_DQ26/SB_DQ26/SA_DQ58/SA_DQ58 SM_VREF_CA AR51 +V_DDR_CA_VREF01_DIMM 15 AM20 SB_DQ60
M_A_DQ59 M_B_DQ61
SB_DQ27/SB_DQ27/SA_DQ59/SA_DQ59 SM_VREF_DQ0 +V_DDR_WR_VREF00_DIMM 15 SB_DQ61
M_A_DQ60 AM48 AP51 M_B_DQ62 AR18
AK48 SB_DQ28/SB_DQ28/SA_DQ60/SA_DQ60 SM_VREF_DQ1 +V_DDR_WR_VREF01_DIMM 15 AP18 SB_DQ62
M_A_DQ61 M_B_DQ63
M_A_DQ62 AM51 SB_DQ29/SB_DQ29/SA_DQ61/SA_DQ61 SB_DQ63
B
M_A_DQ63 AK51 SB_DQ30/SB_DQ30/SA_DQ62/SA_DQ62 B
SB_DQ31/SB_DQ31/SA_DQ63/SA_DQ63

4 OF 19 Rev0p7

3 OF 19 Rev0p7

A A

LENOVO.CRDN
Title
Haswell MCP(LPDDR3)
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 4 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP (RTC,AUDIO,JTAG,SATA,LPC,SPI,SMBUS)

+1.05VAUX

+3VALW XDP_TMS R33 1 2 51_0402_5%

D D
2 1 XDP_TDI R34 1 2 51_0402_5%
D1
SDM10U45LP-7_DFN1006-2-2 VCCRTC PCH_JTAG_TDO R35 1 2 51_0402_5%
C12 10P_0402_50V8J
BAT_D 2 1 1 2 XDP_TCK_JTAGX @ R36 2 1 1K_0402_5%
D2 1
SDM10U45LP-7_DFN1006-2-2 C13

2
2
1U_0402_10V6K R38
2
2

2
Y1 10M_0402_5% HASWELL_MCP_E
R37 R40 32.768KHZ_9PF_CM8V-T1A U60E
1K_0402_5% R39 1 2 20K_0402_1% 1M_0402_5%

1
1
R41 1 2 C14 C15 10P_0402_50V8J RTC_X1 AW5
RTCX1
1

1
20K_0402_1% 1 2 RTC_X2 AY5 +3V
1U_0402_10V6K SM_INTRUDER_N AU6 RTCX2 J5
RTC_VCC TPF29 TESTPAD_16 2 INTRUDER SATA_RN0/PERN6_L3
@ R42 2 1 330K_0402_5% INTVRMEN AV7 RTC H5
SRTC_RST_N AV6 INTVRMEN SATA_RP0/PERP6_L3 B15
RTC_RST_N AU7 SRTCRST SATA_TN0/PETN6_L3 A15
RTCRST SATA_TP0/PETP6_L3 KBSMI_N R43 1 2 10K_0402_5%
1
J8
SATA_RN1/PERN6_L2 H8 SATA_RXN1 17 1 2
INTVRMEN C16 SATA1GP R45 10K_0402_5%
SATA_RP1/PERP6_L2 SATA_RXP1 17
1U_0402_10V6K A17 SATA2GP R46 1 2 10K_0402_5%
2 SATA_TN1/PETN6_L2 B17 SATA_TXN1 17 1 2
SATA3GP R47 10K_0402_5%
SATA_TP1/PETP6_L2 SATA_TXP1 17
1

R545 R295 1 2 10_0402_5% AW8 J6

19 HDA_BCLK_24M R293 1 2 10_0402_5% AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6
330K_0402_5% 19 HDA_SYNC_CODEC HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1
R292 1 2 10_0402_5% AU8 B14
19 HDA_RST_N AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15
19 HDA_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1
2

AU12 AUDIO SATA

R297 1 2 10_0402_5% AU11 HDA_SDI1/I2S1_RXD F5
1 19 HDA_SDOUT HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0
C328 AW10 E5
@ AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17
10P_0201_50V8F 1K_0402_5% 2 1 R21 AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17
2 +1.5V_AUD I2S1_SCLK SATA_TP3/PETP6_L0

GND V1
SATA0GP/GPIO34 KBSMI_N 20
C U1 SATA1GP C
SATA1GP/GPIO35 V6 SATA2GP
+3VAUX +3V +3VAUX_S5_S0 SATA2GP/GPIO36 AC1 SATA3GP +1.05V_ASATA3PLL
AU62 SATA3GP/GPIO37
@ 3 XDP_TRST_CPU_N AE62 PCH_TRST A12
12 PCH_JTAG_TCK PCH_TCK SATA_IREF TPF20 TESTPAD_16
L18 1 2 BLM15BD221SN1D_2P AD61 L11
12 XDP_TDI AE61 PCH_TDI RSVD K10 2 1 3.01K_0402_1%
R52
12 PCH_JTAG_TDO PCH_TDO RSVD

2
L19 1 2 BLM15BD221SN1D_2P AD62 JTAG C12 2
12 XDP_TMS PCH_TMS SATA_RCOMP
@ AL11 U3 R54 1 2 10K_0402_5%
RSVD SATALED +3V
R53 AC4 C21
51_0402_5% AE63 RSVD 0.01U_0201_10V6K
12 XDP_TCK_JTAGX AV2 JTAGX 1
RSVD
1

+3VAUX

5 OF 19 Rev0p7

SML0_CLK R320 1 2 1K_0402_1%

SML0_DATA R682 1 2 1K_0402_1%
HASWELL_MCP_E
U60G

AU14 AN2 SMB_ALERT_N RP4

17,20 LPC_AD0 AW12 LAD0 SMBALERT/GPIO11 AP2 SMB_ALERT_N
1 7
2
SMB_CLK @
17,20 LPC_AD1 LAD1 SMBCLK PCH_SMB_CLK 23
AY12 LPC AH1 SMB_DATA R687 1 @ 20_0402_5% SMB_CLK 8 1
17,20 LPC_AD2 AW11 LAD2 SMBDATA AL2 PCH_SMB_DATA 23 7 2
R688 0_0402_5% EC_SMB_CLK1
17,20 LPC_AD3 LAD3 SML0ALERT/GPIO60 USB_CR_PWREN 17
AV12 SMBUS AN1 SML0_CLK SMB_DATA 6 3
17,20 LPC_FRAME_N LFRAME SML0CLK AK1 SML0_DATA EC_SMB_DAT1 5 4
SML0DATA AU4
SML1ALERT/PCHHOT/GPIO73 SML1_ALERT_N 5
AU3 2.2K_0804_5%
SML1CLK/GPIO75 AH3 EC_SMB_CLK1 20
SML1DATA/GPIO74 EC_SMB_DAT1 20
PCH_SCK AA3
PCH_SCE0_N Y7 SPI_CLK AF2 TP39 TESTPAD
TESTPAD TP8 PCH_SCE1_N Y4 SPI_CS0 CL_CLK AD2 TP62 TESTPAD
TESTPAD TP9 PCH_SCE2_N AC2 SPI_CS1 SPI C-LINK CL_DATA AF4 TP63 TESTPAD R106 2 1 1M_0402_5%
AA2 SPI_CS2 CL_RST 6,20 SUS_PWR_ACK_R
PCH_SI RP7
PCH_SO AA4 SPI_MOSI
B
PCH_WP_N R354 2 1 100_0402_5% Y6 SPI_MISO USB_OC_N2 1 8 B
SPI_IO2 7,17 USB_OC_N2
PCH_HOLD_N R451 2 1 100_0402_5% AF1 2 7
SPI_IO3 3 6
5 SML1_ALERT_N 4 5
+3VAUX_SPI

10K_8P4R_5%
7 OF 19 Rev0p7

R57 1 2 20K_0402_1%
2
2

R58 C22
20K_0402_1% 0.1u_0201_10V6K
U3 1
1 8
20 PCH_SCE0_N CS VCC
1

2 R59 1 100_0402_5% PCH_SO_R 2 7 PCH_HOLD_N

20 PCH_SO DO HOLD
PCH_WP_N 3 6 PCH_SCK_R R60 2 1 100_0402_5%
WP CLK PCH_SCK 20
PCH_SPI_GND 4 5 PCH_SI_R R61 2 1 100_0402_5%
GND DI PCH_SI 20
2

@ @ W25Q64FVSSIG_SO8 @
R62 R65 R64 R63
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
1

+5VAUX +3VAUX_SPI
2

A PCH_SPI_GND A
R67
@ 10K_0402_5% 6 3 LENOVO.CRDN
2

@ Q4A @ Title
1

AO5804EL_SC89-6 P05--MCP (RTC,AUDIO,SATA)

SPI_FLASH_PWREN 2 SPI_FLASH_PWREN 5 Q4B R69
0_0402_5% Size Document Number
Rev V1.0
2

AO5804EL_SC89-6 C Kona
1

1 R68 4 Date: Tuesday, August 06, 2013 Sheet 5 of 34

+3VAUX_S5_S0 0_0402_5% "PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
1

or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP (Clock,PM)

D D
R70 2 1 1M_0402_5%

4
Y2
XTAL24_IN 1 3 XTAL24_OUT
HASWELL_MCP_E
U60F
24MHZ_6PF_XRCGB24M000F3M00R0

2
+3V

1
C23 C24
RP5 6P_0402_50V8D 6P_0402_50V8D
1 8 PCIECLKREQ2_N C43 A25 XTAL24_IN
17 CK_WLAN_DN CLKOUT_PCIE_N0 XTAL24_IN

2
2 7 PCIECLKREQ1_N C42 B25XTAL24_OUT
3 6 H_RCIN_N 17 CK_WLAN_DP U2 CLKOUT_PCIE_P0 XTAL24_OUT +1.05V_AXCK_LCPLL
H_RCIN_N 7,20 2,17 CK_REQ_WLAN_N PCIECLKRQ0/GPIO18
4 5 PCI_PIRQC_N K21
PCI_PIRQC_N 2 B41 RSVD M21
10K_8P4R_5% A41 CLKOUT_PCIE_N1 RSVD C26 R71 2 1 3.01K_0402_1%
PCIECLKREQ1_N Y5 CLKOUT_PCIE_P1 DIFFCLK_BIASREF
PCIECLKRQ1/GPIO19 2
C35 MCP_TESTLOW1
RP8 C41 CLOCK TESTLOW_C35 C34 MCP_TESTLOW2 C25
1 8 B42 CLKOUT_PCIE_N2 TESTLOW_C34 AK8 MCP_TESTLOW3 0.01U_0201_10V6K
PCI_PIRQD_N 2 CLKOUT_PCIE_P2 TESTLOW_AK8 1
2 7 PCIECLKREQ3_N PCIECLKREQ2_N AD1 SIGNALS AL8 MCP_TESTLOW4
3 6 PCIECLKRQ2/GPIO20 TESTLOW_AL8
INT_SERIRQ 7,17,20
4 5 PCIECLKREQ5_N B38 AN15 CK_LPC_0_R
R72 1 2 22_0402_5% RP9
CLKOUT_PCIE_N3 CLKOUT_LPC_0 CLK_PCI_LPC 20
C37 AP15 R73 1 2 22_0402_5%
N1 CLKOUT_PCIE_P3 CLKOUT_LPC_1 CLK_PCI_LPC_DEBUG 17 1 8
10K_8P4R_5% PCIECLKREQ3_N MCP_TESTLOW1
PCIECLKRQ3/GPIO21 B35 MCP_TESTLOW2 2 7
CLKOUT_ITPXDP TP113 TESTPAD
A39 A35 MCP_TESTLOW3 3 6
CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P TP114 TESTPAD
B39 MCP_TESTLOW4 4 5
PCIECLKREQ4_N U5 CLKOUT_PCIE_P4
2 PCIECLKREQ4_N PCIECLKRQ4/GPIO22 10K_8P4R_5%
B37
A37 CLKOUT_PCIE_N5
PCIECLKREQ5_N T2 CLKOUT_PCIE_P5
PCIECLKRQ5/GPIO23

C 6 OF 19 Rev0p7 C

HASWELL_MCP_E
U60H VCCRTC +3V
@
R78 1 2 0_0402_5%
1 2 3.01K_0402_1% 20 PCH_SUSACK_N
+3V R82 SYS_RESET_N SYSTEM POWER MANAGEMENT
SUS_PWR_ACK R79 1 2 0_0402_5% AK2 AW7 DSWODVREN R77 2 1 330K_0402_5% PM_CLKRUN_N R81 2 1 8.2K_0402_5%
SYS_RESET_N AC3 SUSACK DSWVRMEN AV5 DPWROK
R83 1 2 0_0402_5% AG2 SYS_RESET DPWROK AJ5 R95 1 2 0_0402_5%
20 SYS_PWROK SYS_PWROK WAKE PCIE_WAKE_N 17,20
R84 1 2 0_0402_5% AY7
20 PM_PCH_PWROK PCH_PWROK
@ R85 1 2 0_0402_5% AB5
R141 1 2 0_0402_5% AG7 APWROK V5 +3VAUX
8,12 1.05V_PWRGD_R PLTRST CLKRUN/GPIO32 AG4 PM_CLKRUN_N 17,20
17,20 PLT_RST_N SUS_STAT/GPIO61 SUS_STAT_N 17,20
100K_0402_5% 1 2 R98 AE6
B SUSCLK/GPIO62 SUS_CK 17 B
AP5 PM_BATLOW_N_R R86 2 1 8.2K_0402_5%
SLP_S5/GPIO63 TP11 TESTPAD
AW6
20 PM_RSMRST_N RSMRST
1 2 SUS_PWR_ACK AV4
5,20 SUS_PWR_ACK_R R88 0_0402_5% AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6 PCIE_WAKE_N R89 1 2 10K_0402_5%
20 PCH_PWRBTN_N PWRBTN SLP_S4 SUSC_N 20
AJ8 AT4 R91 1 2 0_0402_5%
20 AC_PRESENT_R ACPRESENT/GPIO31 SLP_S3 SUSB_N 20
AN4 AL5
20 PM_BATLOW_N_R BATLOW/GPIO72 SLP_A TP12 TESTPAD +3VAUX
1 2 AF3 AP4 1 @ 2
7,17,20 PM_SLP_S0_N @ R92 0_0402_5% AM5 SLP_S0 SLP_SUS AJ7 TP13 R93 43.2K_0402_5% SLP_SUS_N 20
SLP_WLAN/GPIO29 SLP_LAN TESTPAD AC_PRESENT_R R94 2 11M_0402_5%
20 PCH_SLP_WLAN_N

8 OF 19 Rev0p7

DPWROK R74 1 2 0_0402_5% PM_RSMRST_N R97 1 2 47K_0402_5%

PM_PCH_PWROK R126 1 2 100K_0402_5%

SYS_PWROK @ R221 1 2 10K_0402_5%

SUS_CK @ R147 2 1 1K_0402_5%

A A

LENOVO.CRDN
Title
Haswell MCP (Clock,PM)
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 6 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

+3VAUX

Haswell MCP (GPIO,USB,PCIE)

@ U22

6
USB_CHR_EN 17

Vcc
2
20 WALKPORT_EN_D A 4
USB_CHR_EN_D 1 Y +3VAUX

GND
B

2
5 @
+1.05V_VCCST NC R175
220K_0402_5%

3
@ U23

6
74AUP1G32GF_SOT891-6_1X1

1
HASWELL_MCP_E
U60J R101

Vcc
1K_0402_1% 2
A 4
D Y WALKPORT_EN 31 D
USB30_PWREN 1

GND
B

2
5 @
R160 @ PCH_AUDIO_PWR P1 D60 H_THRMTRIP_N NC R174
2 1 AU2 BMBUSY/GPIO76 THRMTRIP V4
2,17 NGFF_SLTA_WIFI_WAKE_N GPIO8 RCIN/GPIO82 H_RCIN_N 6,20 220K_0402_5%

3
TP15 TESTPAD AM7 T4
LAN_PHY_PWR_CTRL/GPIO12 SERIRQ INT_SERIRQ 6,17,20
0_0402_5% HOST_ALERT1_R_N AD6 CPU/ AW15 R104 2 1 49.9_0402_1% 74AUP1G32GF_SOT891-6_1X1
GPIO15 PCH_OPI_COMP

1
BOARD_ID0 Y1 MISC AF20
BOARD_ID1 T3 GPIO16 RSVD AB21 R272 2 10_0402_5% USB30_PWREN
AD5 GPIO17 RSVD 20,23,25,28 SUSON
TP68 TESTPAD WALKPORT_EN_D R222 2 10_0402_5% USB_CHR_EN
SMC_WAKE_SCI_N AN5 GPIO24 WALKPORT_EN R280 2 10_0402_5% USB_CHR_EN
20 SMC_WAKE_SCI_N GPIO27
+3VAUX GPIO28 AD7
GPIO26 AN3 GPIO28
GPIO26 R6 R275 2 @ 1 0_0402_5%
GSPI0_CS/GPIO83 NGFF_WIFI_PWR_EN 7,17,20
R547 2 @ 1 100K_0402_5% USB30_PWREN TP86 TESTPAD AG6 L6 BOARD_ID3
PCH_GPIO57 AP1 GPIO56 GSPI0_CLK/GPIO84 N6 2 1 +3VDX_TOUCHPANEL
GPIO57 GSPI0_MISO/GPIO85 TP89 TESTPAD PM_SLP_S0_N 6,17,20
TP88 TESTPAD AL4 L8 GPIO86 R168 2 @ 10_0402_5% 0_0402_5% R145
2 1 100K_0402_5% AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 SATA_PWR_EN 7,17
R99 @ USB_CHR_EN_D TP106 TESTPAD
GPIO59 GSPI1_CS/GPIO87 RF_KILL_N_BT_NGFF 17
TOUCHPAD_EN 1R137 20_0402_5% AK4 L5 GPIO88 2 @ 1 Touch Panel
PCH_GPIO47 AB6 GPIO44 GPIO GSPI1_CLK/GPIO88 N7 0_0402_5% R96 TOUCHPAD_EN 23
GPIO47 GSPI1_MISO/GPIO89 TOUCHPANEL_EN 30
R223 1 2 10K_0402_5% PCH_GPIO47 U4 K2 GPIO90 R169 2 @ 10_0402_5%
16 FPBACK GPIO48 GSPI_MOSI/GPIO90 NGFF_SLTA_WIFI_RST_N 17
TP107 TESTPAD Y3 J1 I2C1_SCL R581 2 @ 1 2.2K_0402_5%
P3 GPIO49 UART0_RXD/GPIO91 K3 CD_N 17
R172 2 10_0402_5%
16 TOUCH_PANEL_INTR_N GPIO50 UART0_TXD/GPIO92 KBLED_PWR_EN 7,23 SATA_PWR_EN 7,17
R224 1 2 10K_0402_5% PCH_GPIO45 MPHY_PWREN Y2 J2 I2C1_SDA R582 2 @ 1 2.2K_0402_5%
AT3 HSIOPC/GPIO71 UART0_RTS/GPIO93 G1 RST_SENSOR_HUB_N 21
USB_CHR_EN_D LPIO
TP90 TESTPAD
AH4 GPIO13 UART0_CTS/GPIO94 K4
20 EC_SENSOR_INT_N GPIO14 UART1_RXD/GPIO0 TP102 TESTPAD
R709 2 1 100K_0402_5% PCH_GPIO9 AM4 G2
TP103 TESTPAD
30 CAM_PWR_EN AG5 GPIO25 UART1_TXD/GPIO1 J3
PCH_GPIO45 TP104 TESTPAD
AG3 GPIO45 UART1_RST/GPIO2 J4
7,30 SENSHUB_PWR_EN GPIO46 UART1_CTS/GPIO3 TP105 TESTPAD
R171 1 2 10K_0402_5% SMC_WAKE_SCI_N F2 I2C0_SDA
I2C0_SDA/GPIO4 I2C0_SDA 20
PCH_GPIO9 AM3 F3 I2C0_SCL
GPIO9 I2C0_SCL/GPIO5 I2C0_SCL 20
AM2 G4 I2C1_SDA
7,20 SCI_N GPIO10 I2C1_SDA/GPIO6
R710 2 1 100K_0402_5% PCH_GPIO57 P2 F1 I2C1_SCL +3VDX_SENSORHUB
21 PUR_PCH_TRIG DEVSLP0/GPIO33 I2C1_SCL/GPIO7
R165 2 @ 10_0402_5%C4 E3 TP91 TESTPAD
7,17,20 NGFF_WIFI_PWR_EN L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4
7,17 SATA1_DEVSLP DEVSLP1/GPIO38 SDIO_CMD/GPIO65 TP93 TESTPAD
@ R539 2 1 1K_0402_5% HOST_ALERT1_R_N BOARD_ID2 N5 D3 TP94 TESTPAD
V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4
7,19 PCH_BEEP SPKR/GPIO81 SDIO_D1/GPIO67 TP97 TESTPAD
C3 I2C0_SDA R670 2 @ 1 2.2K_0402_5%
SDIO_D2/GPIO68 TP100 TESTPAD
C @ R552 2 1 100K_0402_5% GPIO28 E2 TP101 TESTPAD I2C0_SCL R671 2 @ 1 2.2K_0402_5% C
SDIO_D3/GPIO69
@ R553 2 1 100K_0402_5% GPIO26 10 OF 19 Rev0p7

+3V

@ R722 1 2 10K_0402_5%
KBLED_PWR_EN 7,23

R721 1 @ 2 10K_0402_5% NGFF_WIFI_PWR_EN

+3V

R720 1 2 10K_0402_5% TOUCHPANEL_EN

1
HASWELL_MCP_E
U60K
R108 2 1 100K_0402_5% @ @ @
MPHY_PWREN 7,30
R314 R503 R369 R584
F10 AN8 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
PERN5_L0 USB2N0 USB_PN0 17
R535 1 2 10K_0402_5% CAM_PWR_EN E10 AM8 USB2.0 port (RIO)
PERP5_L0 USB2P0 USB_PP0 17

2
BOARD_ID0
C23 AR7 BOARD_ID1
PETN5_L0 USB2N1 USB_PN1 17
R100 2 1 100K_0402_5% C22 AT7 USB3.0 port (LIO) BOARD_ID2
PCH_AUDIO_PWR 30 PETP5_L0 USB2P1 USB_PP1 17
BOARD_ID3
F8 AR8
PERN5_L1 USB2N2 USB_PN2 17

1
@ R249 1 2 10K_0402_5% E8 AP8 cardreader @
SATA1_DEVSLP 7,17 PERP5_L1 USB2P2 USB_PP2 17
R366 R512 R372 R598
B23 AR10 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
PETN5_L1 USB2N3 USB_PN3 17
@ R125 2 1 1K_0402_5% A23 AT10 Blue Tooth
PCH_BEEP 7,19 PETP5_L1 USB2P3 USB_PP3 17

2
H10 AM15
@ R705 1 2 8.2K_0402_5% GPIO86 G10 PERN5_L2 USB2N4 AL15
PERP5_L2 USB2P4
B21 AM13
PETN5_L2 USB2N5 USB_PN5 18,21
@ R554 2 1 100K_0402_5% TOUCH_PANEL_INTR_N C21 AN13 TI Sensor Hub
PETP5_L2 USB2P5 USB_PP5 18,21
E6 AP11
PERN5_L3 USB2N6 USB_PN6 16
R723 1 2 10K_0402_5% SATA_PWR_EN F6 AN11 Touch Panel
PERP5_L3 USB2P6 USB_PP6 16
B B
B22 AR13 BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0 Description
PETN5_L3 USB2N7 USB_PN7 16
R109 2 1 100K_0402_5% A21 AP13 Camera
SENSHUB_PWR_EN 7,30 PETP5_L3 USB2P7 USB_PP7 16
G11
R730 1 2 10K_0402_5% TOUCHPAD_EN F11 PERN3 G20 NCS SIT Elpida 8G
PERP3 USB3RN0 H20 0 0 0 1
C29 USB3RP0
B30 PETN3 PCIe USB C33
PETP3 USB3TN0 B34 1 0 0 1 NCS SIT Elpida 4G
F13 USB3TP0
@ R278 2 1 100K_0402_5% GPIO90 G13 PERN4 E18
PERP4 USB3RN1 USB3_RX2_N 17
F18
USB3RP1 USB3_RX2_P 17
B29 0 0 1 1 NCS SIT Hynix 8G
@ R111 2 1 1K_0402_5% A29 PETN4 B33
SENSHUB_PWR_EN 7,30 PETP4 USB3TN1 USB3_TX2_N 17
A33 USB3_TX2_P 17
G17 USB3TP1 1 1 0 1 NCS SIT Hynix 4G
17 PCIE1_WLAN_RX_DN PERN1/USB3RN2
@ R110 2 1 100K_0402_5% F17
MPHY_PWREN 7,30 17 PCIE1_WLAN_RX_DP PERP1/USB3RP2
C30
17 PCIE1_WLAN_TX_DN PETN1/USB3TN2
@ R540 2 1 1K_0402_5% PCH_GPIO9 C31 AJ10 1 0 1 1 NCS SIT Micron 8G
17 PCIE1_WLAN_TX_DP PETP1/USB3TP2 USBRBIAS AJ11
F15 USBRBIAS AN10
@ R699 2 1 1K_0402_5% GPIO86 G15 PERN2/USB3RN3 RSVD AM10 NCS SIT Micron 4G
PERP2/USB3RP3 RSVD 0 1 1 1

2
B31
A31 PETN2/USB3TN3 R112
PETP2/USB3TP3 AL3
OC0/GPIO40 USB_OC_N0 17 22.6_0402_1%
AT1 USB_OC_N1
+1.05V_AUSB3PLL OC1/GPIO41 AH2
OC2/GPIO42 USB_OC_N2 5,17

1
E15 AV3 R361 1 @ 2 0_0402_5%
RSVD OC3/GPIO43 USB30_PWREN 17
E13
R113 2 1 3.01K_0402_1% PCIE_RCOMP A27 RSVD
B27 PCIE_RCOMP
PCIE_IREF

11 OF 19 Rev0p7
A A
+3VAUX

LENOVO.CRDN
RP11
Title
7,20 SCI_N
1 8 Haswell MCP (GPIO,USB,PCIE)
2 7
5 SMB_ALERT_N Size Document Number
USB_OC_N1 3 6
4 5 C Rev V1.0
USB_OC_N0 Kona
10K_8P4R_5% Date: Saturday, August 10, 2013 Sheet 7 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP (Power)

D D

+1.35VSUS +1.35V_CPU

PJ17

1 1 1 1
PJ_43x79_6 1 1 1 1 1 1 C27 C28 C29 C30

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
C37 C38 C39 C40 C41 C42
2 2 2 2
2 2 2 2 2 2
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CPU_CORE
CPU_CORE
HASWELL_MCP_E
U60L
+1.35V_CPU
L59 C36
RSVD VCC

2
J58 C40
R114 RSVD VCC C44
100_0402_1% AH26 VCC C48
VDDQ VCC 1 1 1 1 1 1 1 1 1 1
AJ31 C52 C45 C50 C46 C51 C47 C52 C48 C53 C70 C71
AJ33 VDDQ VCC C56
VDDQ VCC

1
R115 1 2 AJ37 E23

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
0_0402_5%
32 VCC_SENSE AN33 VDDQ VCC E25 2 2 2 2 2 2 2 2 2 2
VDDQ VCC
2

AP43 E27
@ AR48 VDDQ VCC E29
C C
R116 AY35 VDDQ VCC E31
VDDQ VCC
0_0402_5% AY40
AY44 VDDQ
VDDQ
VCC
VCC
E33
E35 Bottom Side
1

AY50 E37
VDDQ VCC E39
VCC
+1.05V
VR12.6_GND
+1.05V_VCCST
F59
N58 VCC
RSVD
VCC
VCC
E41
E43 Top Side
@ @ AC58 E45 1 3 1 3 1 3 1 3
L21 1 2 L22 1 2 RSVD VCC E47 @ @ @
BLM15BD221SN1D_2P BLM15BD221SN1D_2P +VCCIO_OUT E63 VCC E49 C57 C77 C61 C66
AB23 VCC_SENSE VCC E51

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V
A59 RSVD VCC E53 1 3 1 3 1 3 1 3 1 3 2 4 2 4 2 4 2 4
+1.05V_VCCST E20 VCCIO_OUT VCC E55 @
1 VCCIOA_OUT VCC
@ AD23 E57 C55 C56 C59 C58 C82
+VCCIOA_OUT RSVD VCC
AA23 F24

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V
C65
4.7U_0402_6.3V6M AE59 RSVD VCC F28 2 4 2 4 2 4 2 4 2 4
2 RSVD VCC F32
TESTPAD_16 TPF105 VCC
H_CPU_SVIDALRT_N L62 F36
H_CPU_SVIDCLK N63 VIDALERT VCC F40
VIDSCLK VCC
2

H_CPU_SVIDDAT L63 F44

R117 R118 1 2 0_0402_5% H_VCCST_PWRGD_MCP B59 VIDSOUT HSW ULT POWER VCC F48
8 H_VCCST_PWRGD VCCST_PWRGD VCC
10K_0402_5% @ H_VR_ENABLE F60 F52
32 H_VR_ENABLE H_VR_READY C59 VR_EN VCC F56
VR_READY VCC
2

G23
VCC
1

R119 D63 G25

32 IMVP_VR_CPU_OK VSS VCC
10K_0402_5% FIVR_EN H59
P62 PWR_DEBUG
VSS
VCC
VCC
G27
G29 Bottom Side
TP16 TESTPAD P60 G31
RSVD_TP VCC
1

R120 1 2 0_0402_5% TP17 TESTPAD P61 G33 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3

TP18 TESTPAD N59 RSVD_TP VCC G35
TP19 TESTPAD N61 RSVD_TP VCC G37 C63 C60 C78 C62 C68 C64 C79 C67 C76 C69 C74 C75
T59 RSVD_TP VCC G39

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V

220P_0603_3_16V
AD60 RSVD VCC G41 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4
AD59 RSVD VCC G43
AA59 RSVD VCC G45
AE60 RSVD VCC G47
AC59 RSVD VCC G49
B
AG58 RSVD VCC G51 B

+1.05V +1.05V_VCCST U59 RSVD VCC G53

+1.05V_VCCST V59 RSVD VCC G55
L51 RSVD VCC G57
1 2 AC22 VCC H23 +3VAUX
AE22 VCCST VCC J23
VCCST VCC
2

BLM15PX121SN1D_2P AE23 K23

@ CPU_CORE VCCST VCC K57
1 1 VCC
R161 C80 C81 AB57 L22 2
150_0402_5% AD57 VCC VCC M23 C396 +1.05V_VCCST
AG57 VCC VCC M57
22U_0603_4V6M

1U_0402_10V6K

0.1u_0201_10V6K
VCC VCC
1

2 2 C24 P57
VCC VCC 1

2
FIVR_EN C28 U57
C32 VCC VCC W57 2 @ 1 R678 U7 R170
VCC VCC 20,26 ALL_SYS_PWRGD
1 6 10K_0402_5%
12 OF 19 Rev0p7 0_0402_5% NC1 Vcc
1.05V_PWRGD_R 2 1 R679 2 5
A NC2

1
+1.05VAUX
0_0402_5% 3 4
GND Y H_VCCST_PWRGD 8
+1.05V_VCCST
1 74AUP1G07GF_SOT891-6_1X1

2
@
2

C366
R546 R16 10U_0402_6.3V6M
75_0402_1% 10K_0402_1% 2

1
1

H_CPU_SVIDALRT_N R121 2 1 43_0402_5% R666 1 @ 2 0_0402_5%

VR_SVID_ALERT_N 32 1.05VAUX_PWRGD 25,26
2 2
R15 C219
U76 100K_0402_1% 0.068U_0201_10V6K
R656 1 2 0_0402_5% 1.05V_PWRGD_LMV 4 3 1
6,12 1.05V_PWRGD_R VOUT -IN
1

R122 1 2 0_0402_5% H_CPU_SVIDCLK

32 VR_SVID_CLK 2
+3VAUX GND
A A
5 1 +1.05V
V+ +IN
+1.05V_VCCST LMV7271MG-NOPB_SC70-5 R13 2 1 1K_0402_5% LENOVO.CRDN
1
C215 Title
1

Haswell MCP (Power)

2.2U_0402_6.3V6M

R123
2 Size Document Number
C Rev V1.0
130_0402_1% Kona
1
2

Date: Saturday, August 10, 2013 Sheet 8 of 34

R124 1 2 0_0402_5% H_CPU_SVIDDAT C214 "PROPERTY NOTE: this document contains information confidential and
32 VR_SVID_DATA property to LENOVO PND and shall not be reproduced or transferred to other documents
1U_0402_10V6K
2 or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP (Power2)

D D

+1.05VDX_MODPHY

1 1
C83 C84

1U_0402_10V6K

1U_0402_10V6K
VCCRTC
2 2

1 2 2
C85 C86 C87

1U_0402_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
2 1 1
+1.05V

HASWELL_MCP_E
1 U60M
@
C101 K9
1U_0402_10V6K L10 VCCHSIO
+1.05V_AUSB3PLL 2 M9 VCCHSIO
N8 VCCHSIO mPHY AH11 +V3.3A_DSW_PRTCSUS
+1.05V_ASATA3PLL P9 VCCIO RTC VCCSUS3_3 AG10
B18 VCCIO VCCRTC AE7
VCCUSB3PLL DCPRTC 2
B11
VCCSATA3PLL +3VAUX C88
0.1u_0201_10V6K
+1.05V_APLLOPI Y20 SPI Y8 R337 1 20_0402_5% 1
TESTPAD_16 TPF128 VCCAPLL VCCSPI
AA21 OPI
2 +3V
W21 VCCAPLL +1.05V @
VCCAPLL AG14 C90 R342 1 @ 20_0402_5%
+1.05VAUX VCCASW AG13 0.1u_0201_10V6K
VCCASW 1
L23 1 2 +V1.05A_DCPSUS J13 USB3 PCH_VCCDSW
BLM15BD221SN1D_2P DCPSUS3 J11 +V1.05S_CORE_PCH
C C
VCC1P05 H11
1 1 1 VCC1P05 1
C108 C109 C92 VCCHDA AH14 AXALIA/HDA H15
VCCHDA VCC1P05 AE8 C91
C102 1 2 VCC1P05 AF22
10U_0402_6.3V6M

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K
2 2 2 L24 1 2 1U_0402_10V6K AH13 VRM/USB2/AZALIA VCC1P05 AG19 PCH_VCCDSW +1.05V 2
BLM15BD221SN1D_2P DCPSUS2 CORE DCPSUSBYP AG20
+3VAUX DCPSUSBYP AE9 +3VALW
VCCASW AF9
AC9 VCCASW AG8
VCCSUS3_3 VCCASW 1 1
+3V AA9 AD10 +V1.05A_DCPSUS @ @
+V3.3A_DSW_P AH10 VCCSUS3_3 DCPSUS1 AD8 C93 C94 L29 1 2
V8 VCCDSW3_3 GPIO/LCC DCPSUS1 +1.5V 1U_0402_10V6K 22U_0603_4V6M BLM15BD221SN1D_2P
W9 VCC3_3 +3V 2 2
1 VCC3_3
C95 J15 +3VAUX
22U_0603_4V6M THERMAL SENSOR VCCTS1_5 K14
VCC3_3 K16 L25 1 2
2 VCC3_3 2
+1.05V_AXCK_DCB BLM15BD221SN1D_2P
+1.05V_AXCK_LCPLL C96 +V3.3A_DSW_P
J18 0.1u_0201_10V6K 2 1
K19 VCC1P05 SDIO/PLSS U8 +V3.3S_1.8S_SDIO 1 @
A20 VCC1P05 VCCSDIO T9 C89 C97
VCC_CLK1 J17 VCCACLKPLL VCCSDIO 0.1u_0201_10V6K 1U_0402_10V6K
VCC_CLK2 R21 VCCCLK 1 2
T21 VCCCLK LPT LP POWER
K18 VCCCLK SUS OSCILLATOR AB8 +V1.05A_AOSCSUS +3VAUX
M20 VCCCLK DCPSUS4
V21 VCCCLK L28 1 2
+3VAUX AE20 VCCCLK AC20 +1.05V BLM15BD221SN1D_2P
AE21 VCCSUS3_3 VCCAPLL AG16 +V3.3A_DSW_PRTCSUS
VCCSUS3_3 USB2 VCCIO AG17
1 VCCIO 1
C100 1
22U_0603_4V6M C103
C104 1U_0402_10V6K
2 13 OF 19 Rev0p7 1U_0402_10V6K 2
2
+3V
B B

+1.05VDX_MODPHY L31 1 2 BLM15BD221SN1D_2P

C652
+1.05V_AUSB3PLL @
L1 1 2 +V3.3A_DSW_P 2 1 PCH_VCCDSW +V3.3S_1.8S_SDIO
1
2.2UH_CIG10W2R2MNC_20% 1 1 1
@ C129 C107 0.47U_0402_6.3V6K C105
C106 1U_0402_10V6K
47U_0805_6.3V6-M 47U_0805_6.3V6-M 1U_0402_10V6K 2
2 2 2 +1.05V

+1.05V_ASATA3PLL L26 1 2 VCC_CLK1

L2 1 2 +1.5V_AUD BLM15BD221SN1D_2P

2.2UH_CIG10W2R2MNC_20% 1 1
C111 L27 1 2 VCC_CLK2
C110 L32 1 2 VCCHDA BLM15BD221SN1D_2P 1 1
47U_0805_6.3V6-M 1U_0402_10V6K BLM15BD221SN1D_2P 1
2 2 C120 C98 C99
+1.05V 1U_0402_10V6K 1U_0402_10V6K
1U_0402_10V6K 2 2
+1.05V_AXCK_DCB 2
L4 1 2

2.2UH_CIG10W2R2MNC_20% 1 1 1
C117
C116 C130
47U_0805_6.3V6-M 47U_0805_6.3V6-M 1U_0402_10V6K
2 2 2 +1.05V

+1.05V_AXCK_LCPLL L52 1 2 +V1.05S_CORE_PCH

L5 1 2 +1.05VAUX
BLM15PX121SN1D_2P 1
2.2UH_CIG10W2R2MNC_20% 2 1 1 1
C118 C119 C113 C114 C115 @
A +V1.05A_AOSCSUS L3 1 2 A
2
10U_0402_6.3V6M

1U_0402_10V6K

1U_0402_10V6K

100U_1206_6.3V6M 1U_0402_10V6K 2.2UH_CIG10W2R2MNC_20%

1 2 2 2
1 1 1
LENOVO.CRDN
C112 C133 C609
@ +1.05V_APLLOPI 1U_0402_10V6K 47U_0805_6.3V6-M 47U_0805_6.3V6-M L33 1 2 Title
L6 1 2 2 2 2 BLM15BD221SN1D_2P Haswell MCP (Power2)
2.2UH_CIG10W2R2MNC_20% 1 1 1 Size Document Number
C122 C Rev V1.0
Kona
C121 C131
L34 1 2 47U_0805_6.3V6-M 47U_0805_6.3V6-M 1U_0402_10V6K Date: Tuesday, August 06, 2013 Sheet 9 of 34
BLM15BD221SN1D_2P 2 2 2 "PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP (VSS)

D D

HASWELL_MCP_E HASWELL_MCP_E
U60N U60O U60P HASWELL_MCP_E
H17
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59
A28 VSS VSS AJ45 AP3 VSS VSS AW33 D38 VSS VSS J63
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
A44 VSS VSS AJ54 AP48 VSS VSS AW40 D43 VSS VSS L15
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17
A52 VSS VSS AJ58 AP54 VSS VSS AW44 D46 VSS VSS L18
A56 VSS VSS AJ60 AP57 VSS VSS AW47 D47 VSS VSS L20
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF12 VSS VSS AL36 AT40 VSS VSS AY53 F26 VSS VSS U22
C C
AF14 VSS VSS AL39 AT42 VSS VSS AY57 F30 VSS VSS U61
AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62 R130 1 2 0_0402_5%
AH24 VSS VSS AN23 AU33 VSS VSS C11 VSS VSS_SENSE AH16 VSS_SENSE 32
VSS VSS VSS VSS 16 OF 19 Rev0p7 VSS

2
AH28 AN31 AU51 C14
AH30 VSS VSS AN32 AU53 VSS VSS C18 @
AH32 VSS VSS AN35 AU55 VSS VSS C20 R131 R132
AH34 VSS VSS AN36 AU57 VSS VSS C25 100_0402_1% 0_0402_5%
AH36 VSS VSS AN39 AU59 VSS VSS C27
VSS VSS VSS VSS

1
AH38 AN40 AV14 C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
AH57 VSS VSS AN52 AV39 VSS VSS D23
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31
B VSS VSS VSS 15 OF 19 Rev0p7 VSS
B

14 OF 19 Rev0p7

A A

LENOVO.CRDN
Title
Haswell MCP (VSS)
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 10 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

Haswell MCP (OTHER)

D D

HASWELL_MCP_E
U60Q

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP21 TESTPAD
TP22 TP_DC_TEST_AY60 AY60
TESTPAD DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_AY60 A60 TP_DC_TEST_A60
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP23 TESTPAD
DC_TEST_AY62_AW62 AY62 A61 DC_TEST_A61_B61
TP24 TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62
DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 TP25 TESTPAD
TESTPAD DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1
DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP26 TESTPAD
DC_TEST_A61_B61 B61 AW1 TP_DC_TEST_AW1 TP27 TESTPAD
DC_TEST_B62_B63 B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 DC_TEST_AY2_AW2
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW3
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW61
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW62
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 TP_DC_TEST_AW63 TP28 TESTPAD
17 OF 19 Rev0p7DAISY_CHAIN_NCTF_AW63

HASWELL_MCP_E
U60R

C N23 C
RSVD R23
RSVD T23
AT2 RSVD
RSVD U10
AU44 RSVD
AV44 RSVD
D15 RSVD
RSVD AL1
RSVD AM11
RSVD AP7
F22 RSVD
RSVD AU10
H22 RSVD
RSVD AU15
J21 RSVD
RSVD AW14
RSVD AY14
RSVD

18 OF 19 Rev0p7

U60S HASWELL_MCP_E

AC60 AV63
TESTPAD TP49 CFG0 RSVD_TP TP29 TESTPAD
AC62 AU63
TESTPAD TP51 CFG1 RSVD_TP TP30 TESTPAD
TESTPAD TP54 AC63
AA63 CFG2
TESTPAD TP59 CFG3
AA60 C63 TP31 TESTPAD
12 CFG4 CFG4 RSVD_TP
Y62 C62
TESTPAD TP80 CFG5 RSVD_TP TP32 TESTPAD
Y61 B43
TESTPAD TP82 CFG6 EDP_SPARE TP52 TESTPAD
TESTPAD TP81 Y60
V62 CFG7 A51
TESTPAD TP83 CFG8 RSVD_TP TP33 TESTPAD
V61 B51 TP34 TESTPAD
B 12 CFG9 CFG9 RSVD_TP B
V60
TESTPAD TP84 CFG10
U60 L60
TESTPAD TP92 CFG11 RSVD_TP TP35 TESTPAD
TESTPAD TP96 T63 RESERVED
T62 CFG12 N60
TESTPAD TP95 CFG13 RSVD
TESTPAD TP98 T61
T60 CFG14 W23
TESTPAD TP99 CFG15 RSVD Y22
AA62 RSVD AY15 PROC_OPI_COMP R133 2 1 49.9_0402_1%
TESTPAD TP109 CFG16 PROC_OPI_COMP
U63
TESTPAD TP110 CFG18
TESTPAD TP111 AA61 AV62
U62 CFG17 RSVD D58
TESTPAD TP112 CFG19 RSVD
R134 2 1 49.9_0402_1% CFG_RCOMP V63 P22
CFG_RCOMP VSS N21
A5 VSS
RSVD P20
E1 RSVD R20
D1 RSVD RSVD
J20 RSVD
H18 RSVD
R135 2 1 8.2K_0402_1% TD_IREF B12 RSVD
TD_IREF
19 OF 19 Rev0p7

A A

LENOVO.CRDN
Title
Haswell MCP (OTHER)
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 11 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

D D

+3V

2
@ @ @
C128 R154 U6
0.1u_0201_10V6K 10K_0402_5%
1 14
VCC
1

@ R148 1 2 0_0402_5% PCH_JTAG_TDO

XDP_TDO 2 3 3 XDP_TDI_CPU
1A 1B XDP_TDO_CPU 3
XDP_TCK_JTAGX R138 1 @ 2 0_0402_5% XDP_TCK
1 5 XDP_TCK_JTAGX
1OE
C XDP_TDI_SWITCH 5 6 PCH_JTAG_TDO R139 1 @ 2 0_0402_5% XDP_TDO C
2A 2B XDP_TDI 5 5 PCH_JTAG_TDO
R149 1 @ 2 0_0402_5%
6,8 1.05V_PWRGD_R
4 @ R142 2 1 0_0402_5% XDP_TCK
2OE 5 PCH_JTAG_TCK XDP_TCK 3
9 8
5 XDP_TMS 3A 3B XDP_TMS_CPU 3 XDP_TDO @ R143 1 2 0_0402_5% XDP_TCK_JTAGX

10
3OE XDP_TDI_SWITCH @ R144 1 2 0_0402_5% PCH_JTAG_TDO
12 11
4A 4B
@ +1.05VAUX
13 7 XDP_TDO R153 2 1 51_0402_5%
4OE GND
15
GND PAD

74CBTLV3126BQ_DHVQFN14_2P5X3

1K_0402_1% 1 2 R163
CFG4 11
1K_0402_1% 1 2 @ R166
CFG9 11

B B

A A

LENOVO.CRDN
Title
XDP CONN
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 12 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

4,13,15 M_A_A[15:0]
4 M_A_DQ[15:0] 4,13,15 M_A_A[15:0]
4 M_A_DQ[31:16]
U14
M_A_A0 N3 E3 M_A_DQ9 U15
M_A_A1 P7 A0 DQL0 F7 M_A_DQ8 M_A_A0 N3 E3 M_A_DQ29
M_A_A2 P3 A1 DQL1 F2 M_A_DQ12 M_A_A1 P7 A0 DQL0 F7 M_A_DQ24
M_A_A3 N2 A2 DQL2 F8 M_A_DQ13 M_A_A2 P3 A1 DQL1 F2 M_A_DQ28
M_A_A4 P8 A3 DQL3 H3 M_A_DQ11 M_A_A3 N2 A2 DQL2 F8 M_A_DQ25
M_A_A5 P2 A4 DQL4 H8 M_A_DQ15 M_A_A4 P8 A3 DQL3 H3 M_A_DQ27
M_A_A6 R8 A5 DQL5 G2 M_A_DQ10 M_A_A5 P2 A4 DQL4 H8 M_A_DQ31
M_A_A7 R2 A6 DQL6 H7 M_A_DQ14 M_A_A6 R8 A5 DQL5 G2 M_A_DQ30

D D
M_A_A8 T8 A7 DQL7 D7 M_A_DQ1 M_A_A7 R2 A6 DQL6 H7 M_A_DQ26
M_A_A9 R3 A8 DQU0 C3 M_A_DQ2 M_A_A8 T8 A7 DQL7 D7 M_A_DQ16
M_A_A10 L7 A9 DQU1 C8 M_A_DQ5 M_A_A9 R3 A8 DQU0 C3 M_A_DQ18
M_A_A11 R7 A10/AP DQU2 C2 M_A_DQ7 M_A_A10 L7 A9 DQU1 C8 M_A_DQ17
M_A_A12 N7 A11 DQU3 A7 M_A_DQ0 M_A_A11 R7 A10/AP DQU2 C2 M_A_DQ19
M_A_A13 T3 A12/BC# DQU4 A2 M_A_DQ3 M_A_A12 N7 A11 DQU3 A7 M_A_DQ23
A13 DQU5 B8 M_A_DQ4 M_A_A13 T3 A12/BC# DQU4 A2 M_A_DQ21
M_A_A14 T7 DQU6 A3 M_A_DQ6 A13 DQU5 B8 M_A_DQ22
M_A_A15 M7 A14/NC6 DQU7 M_A_A14 T7 DQU6 A3 M_A_DQ20
A15/NC5 +1.35VSUS M_A_A15 M7 A14/NC6 DQU7
A15/NC5 +1.35VSUS
B2
M2 VDD1 D9 B2
4,13,15 M_A_BS0 N8 BA0 VDD2 G7 M2 VDD1 D9
4,13,15 M_A_BS1 BA1 VDD3 4,13,15 M_A_BS0 BA0 VDD2
M3 K2 N8 G7
4,13,15 M_A_BS2 BA2 VDD4 K8 4,13,15 M_A_BS1 M3 BA1 VDD3 K2
VDD5 4,13,15 M_A_BS2 BA2 VDD4
N1 K8
VDD6 N9 VDD5 N1
J7 VDD7 R1 VDD6 N9
4,13,15 M_A_CLK_DDR0 CK VDD8 VDD7
K7 R9 J7 R1
4,13,15 M_A_CLK_DDR_N0 CK# VDD9 4,13,15 M_A_CLK_DDR0 K7 CK VDD8 R9
4,13,15 M_A_CLK_DDR_N0 CK# VDD9
K9 A1
4,13,15 M_A_CKE0 J9 CKE0 VDDQ1 A8 K9 A1
4,13,15 M_A_CKE1 CKE1/NC2 VDDQ2 4,13,15 M_A_CKE0 CKE0 VDDQ1
C1 J9 A8
VDDQ3 C9 4,13,15 M_A_CKE1 CKE1/NC2 VDDQ2 C1
J3 VDDQ4 D2 VDDQ3 C9
4,13,15 M_A_RAS_N K3 RAS# VDDQ5 E9 J3 VDDQ4 D2
4,13,15 M_A_CAS_N L3 CAS# VDDQ6 F1 4,13,15 M_A_RAS_N K3 RAS# VDDQ5 E9
4,13,15 M_A_WE_N WE# VDDQ7 4,13,15 M_A_CAS_N CAS# VDDQ6
H2 L3 F1
VDDQ8 H9 4,13,15 M_A_WE_N WE# VDDQ7 H2
F3 VDDQ9 VDDQ8 H9
4 M_A_DQS_DP1 G3 DQSL F3 VDDQ9
4 M_A_DQS_DN1 DQSL# 4 M_A_DQS_DP3 G3 DQSL
4 M_A_DQS_DN3 DQSL#
M8
VREFCA V_VREF_CA_DIMM1_R 13,14,15
C7 H1 M8
4 M_A_DQS_DP0 B7 DQSU VREFDQ V_VREF_DQ_DIMM0_R 13,15 C7 VREFCA H1 V_VREF_CA_DIMM1_R 13,14,15
4 M_A_DQS_DN0 DQSU# 4 M_A_DQS_DP2 B7 DQSU VREFDQ V_VREF_DQ_DIMM0_R 13,15
4 M_A_DQS_DN2 DQSU#
1 1
C303 C304 1 1
E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K C305 C306
D3 DML VSSQ1 B9 E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K
DMU VSSQ2 D1 2 2 D3 DML VSSQ1 B9
VSSQ3 D8 DMU VSSQ2 D1 2 2
VSSQ4 E2 VSSQ3 D8
L2 VSSQ5 E8 VSSQ4 E2
4,13,15 M_A_DIM0_CS0_N L1 CS0# VSSQ6 F9 L2 VSSQ5 E8
4,13,15 M_A_DIM0_CS1_N CS1#/NC3 VSSQ7 G1 4,13,15 M_A_DIM0_CS0_N L1 CS0# VSSQ6 F9
VSSQ8 4,13,15 M_A_DIM0_CS1_N CS1#/NC3 VSSQ7
G9 G1

C
VSSQ9 VSSQ8

C
G9
K1 VSSQ9
J1 ODT0 A9 K1
13,15 M_A_ODT ODT1/NC1 VSS1 B3 J1 ODT0 A9
VSS2 13,15 M_A_ODT ODT1/NC1 VSS1
E1 B3
VSS3 G8 VSS2 E1
R197 1 2 240_0402_1% L8 VSS4 J2 VSS3 G8
R586 1 2 240_0402_1% L9 ZQ0 VSS5 J8 R199 1 2 240_0402_1% L8 VSS4 J2
ZQ1/NC4 VSS6 M1 R587 1 2 240_0402_1% L9 ZQ0 VSS5 J8
VSS7 M9 ZQ1/NC4 VSS6 M1
VSS8 P1 VSS7 M9
T2 VSS9 P9 VSS8 P1
3,13,14 DDR3_DRAMRST_N RESET# VSS10 T1 T2 VSS9 P9
VSS11 T9 3,13,14 DDR3_DRAMRST_N RESET# VSS10 T1
VSS12 VSS11 T9
VSS12
K4B4G1646B-HYK0_FBGA96
K4B4G1646B-HYK0_FBGA96

4,13,15 M_A_A[15:0]
4 M_A_DQ[63:48]
4,13,15 M_A_A[15:0]
4 M_A_DQ[47:32] U16
M_A_A0 N3 E3 M_A_DQ61
U12 M_A_A1 P7 A0 DQL0 F7 M_A_DQ57
M_A_A0 N3 E3 M_A_DQ39 M_A_A2 P3 A1 DQL1 F2 M_A_DQ60
M_A_A1 P7 A0 DQL0 F7 M_A_DQ35 M_A_A3 N2 A2 DQL2 F8 M_A_DQ56
M_A_A2 P3 A1 DQL1 F2 M_A_DQ34 M_A_A4 P8 A3 DQL3 H3 M_A_DQ63
M_A_A3 N2 A2 DQL2 F8 M_A_DQ38 M_A_A5 P2 A4 DQL4 H8 M_A_DQ59
M_A_A4 P8 A3 DQL3 H3 M_A_DQ33 M_A_A6 R8 A5 DQL5 G2 M_A_DQ58
M_A_A5 P2 A4 DQL4 H8 M_A_DQ36 M_A_A7 R2 A6 DQL6 H7 M_A_DQ62
M_A_A6 R8 A5 DQL5 G2 M_A_DQ32 M_A_A8 T8 A7 DQL7 D7 M_A_DQ54
M_A_A7 R2 A6 DQL6 H7 M_A_DQ37 M_A_A9 R3 A8 DQU0 C3 M_A_DQ50
M_A_A8 T8 A7 DQL7 D7 M_A_DQ40 M_A_A10 L7 A9 DQU1 C8 M_A_DQ48
M_A_A9 R3 A8 DQU0 C3 M_A_DQ43 M_A_A11 R7 A10/AP DQU2 C2 M_A_DQ52
M_A_A10 L7 A9 DQU1 C8 M_A_DQ45 M_A_A12 N7 A11 DQU3 A7 M_A_DQ55
M_A_A11 R7 A10/AP DQU2 C2 M_A_DQ47 M_A_A13 T3 A12/BC# DQU4 A2 M_A_DQ51
M_A_A12 N7 A11 DQU3 A7 M_A_DQ44 A13 DQU5 B8 M_A_DQ49
M_A_A13 T3 A12/BC# DQU4 A2 M_A_DQ46 M_A_A14 T7 DQU6 A3 M_A_DQ53
A13 DQU5 B8 M_A_DQ41 M_A_A15 M7 A14/NC6 DQU7
M_A_A14 T7 DQU6 A3 M_A_DQ42 A15/NC5 +1.35VSUS
M_A_A15 M7 A14/NC6 DQU7

B B
A15/NC5 +1.35VSUS B2
M2 VDD1 D9
B2 4,13,15 M_A_BS0 N8 BA0 VDD2 G7
VDD1 4,13,15 M_A_BS1 BA1 VDD3
M2 D9 M3 K2
4,13,15 M_A_BS0 N8 BA0 VDD2 G7 4,13,15 M_A_BS2 BA2 VDD4 K8
4,13,15 M_A_BS1 BA1 VDD3 VDD5
M3 K2 N1
4,13,15 M_A_BS2 BA2 VDD4 K8 VDD6 N9
VDD5 N1 J7 VDD7 R1
VDD6 4,13,15 M_A_CLK_DDR0 CK VDD8
N9 K7 R9
J7 VDD7 R1 4,13,15 M_A_CLK_DDR_N0 CK# VDD9
4,13,15 M_A_CLK_DDR0 CK VDD8
K7 R9
4,13,15 M_A_CLK_DDR_N0 CK# VDD9 K9 A1
4,13,15 M_A_CKE0 J9 CKE0 VDDQ1 A8
4,13,15 M_A_CKE1 CKE1/NC2 VDDQ2
K9 A1 C1
4,13,15 M_A_CKE0 J9 CKE0 VDDQ1 A8 VDDQ3 C9
4,13,15 M_A_CKE1 CKE1/NC2 VDDQ2 VDDQ4
C1 J3 D2
VDDQ3 C9 4,13,15 M_A_RAS_N K3 RAS# VDDQ5 E9
J3 VDDQ4 D2 4,13,15 M_A_CAS_N L3 CAS# VDDQ6 F1
4,13,15 M_A_RAS_N RAS# VDDQ5 4,13,15 M_A_WE_N WE# VDDQ7
K3 E9 H2
4,13,15 M_A_CAS_N L3 CAS# VDDQ6 F1 VDDQ8 H9
4,13,15 M_A_WE_N WE# VDDQ7 VDDQ9
H2 F3
VDDQ8 H9 4 M_A_DQS_DP7 G3 DQSL
F3 VDDQ9 4 M_A_DQS_DN7 DQSL#
4 M_A_DQS_DP4 DQSL
G3
4 M_A_DQS_DN4 DQSL# M8
VREFCA V_VREF_CA_DIMM1_R 13,14,15
C7 H1
M8 4 M_A_DQS_DP6 B7 DQSU VREFDQ V_VREF_DQ_DIMM0_R 13,15
C7 VREFCA H1 V_VREF_CA_DIMM1_R 13,14,15 4 M_A_DQS_DN6 DQSU#
4 M_A_DQS_DP5 DQSU VREFDQ V_VREF_DQ_DIMM0_R 13,15
B7 1 1
4 M_A_DQS_DN5 DQSU# C307 C308
1 1 E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K
C309 C310 D3 DML VSSQ1 B9
E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K DMU VSSQ2 D1 2 2
D3 DML VSSQ1 B9 VSSQ3 D8
DMU VSSQ2 D1 2 2 VSSQ4 E2
VSSQ3 D8 L2 VSSQ5 E8
VSSQ4 E2 4,13,15 M_A_DIM0_CS0_N L1 CS0# VSSQ6 F9
L2 VSSQ5 E8 4,13,15 M_A_DIM0_CS1_N CS1#/NC3 VSSQ7 G1
4,13,15 M_A_DIM0_CS0_N CS0# VSSQ6 VSSQ8
L1 F9 G9
4,13,15 M_A_DIM0_CS1_N CS1#/NC3 VSSQ7 G1 VSSQ9
VSSQ8 G9 K1
VSSQ9 J1 ODT0 A9
K1 13,15 M_A_ODT ODT1/NC1 VSS1 B3
J1 ODT0 A9 VSS2 E1
13,15 M_A_ODT ODT1/NC1 VSS1 B3 VSS3 G8
VSS2 E1 R209 1 2 240_0402_1% L8 VSS4 J2
VSS3 G8 R591 1 2 240_0402_1% L9 ZQ0 VSS5 J8
R212 1 2 240_0402_1% L8 VSS4 J2 ZQ1/NC4 VSS6 M1
R589 1 2 240_0402_1% L9 ZQ0 VSS5 J8 VSS7 M9
ZQ1/NC4 VSS6 M1 VSS8 P1
VSS7 VSS9

A A
M9 T2 P9
VSS8 P1 3,13,14 DDR3_DRAMRST_N RESET# VSS10 T1
T2 VSS9 P9 VSS11 T9
3,13,14 DDR3_DRAMRST_N RESET# VSS10 VSS12
T1
VSS11 T9
VSS12 K4B4G1646B-HYK0_FBGA96

K4B4G1646B-HYK0_FBGA96

LENOVO.CRDN
Title
LPDDR3-ONBD
Size Document Number
D Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 13 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

4,14,15 M_B_A[15:0]
4 M_B_DQ[15:0] 4,14,15 M_B_A[15:0]
4 M_B_DQ[31:16]
U8
M_B_A0 N3 E3 M_B_DQ3 U9
M_B_A1 P7 A0 DQL0 F7 M_B_DQ6 M_B_A0 N3 E3 M_B_DQ20
M_B_A2 P3 A1 DQL1 F2 M_B_DQ2 M_B_A1 P7 A0 DQL0 F7 M_B_DQ23
M_B_A3 N2 A2 DQL2 F8 M_B_DQ7 M_B_A2 P3 A1 DQL1 F2 M_B_DQ21
M_B_A4 P8 A3 DQL3 H3 M_B_DQ1 M_B_A3 N2 A2 DQL2 F8 M_B_DQ22
M_B_A5 P2 A4 DQL4 H8 M_B_DQ4 M_B_A4 P8 A3 DQL3 H3 M_B_DQ19
M_B_A6 R8 A5 DQL5 G2 M_B_DQ0 M_B_A5 P2 A4 DQL4 H8 M_B_DQ18
M_B_A7 R2 A6 DQL6 H7 M_B_DQ5 M_B_A6 R8 A5 DQL5 G2 M_B_DQ16
M_B_A8 T8 A7 DQL7 D7 M_B_DQ8 M_B_A7 R2 A6 DQL6 H7 M_B_DQ17
D M_B_A9 R3 A8 DQU0 C3 M_B_DQ10 M_B_A8 T8 A7 DQL7 D7 M_B_DQ27 D
M_B_A10 L7 A9 DQU1 C8 M_B_DQ13 M_B_A9 R3 A8 DQU0 C3 M_B_DQ25
M_B_A11 R7 A10/AP DQU2 C2 M_B_DQ14 M_B_A10 L7 A9 DQU1 C8 M_B_DQ30
M_B_A12 N7 A11 DQU3 A7 M_B_DQ9 M_B_A11 R7 A10/AP DQU2 C2 M_B_DQ24
M_B_A13 T3 A12/BC# DQU4 A2 M_B_DQ11 M_B_A12 N7 A11 DQU3 A7 M_B_DQ26
A13 DQU5 B8 M_B_DQ12 M_B_A13 T3 A12/BC# DQU4 A2 M_B_DQ28
M_B_A14 T7 DQU6 A3 M_B_DQ15 A13 DQU5 B8 M_B_DQ31
M_B_A15 M7 A14/NC6 DQU7 M_B_A14 T7 DQU6 A3 M_B_DQ29
A15/NC5 +1.35VSUS M_B_A15 M7 A14/NC6 DQU7
A15/NC5 +1.35VSUS
B2
M2 VDD1 D9 B2
4,14,15 M_B_BS0 BA0 VDD2 VDD1
N8 G7 M2 D9
4,14,15 M_B_BS1 M3 BA1 VDD3 K2 4,14,15 M_B_BS0 N8 BA0 VDD2 G7
4,14,15 M_B_BS2 BA2 VDD4 K8 4,14,15 M_B_BS1 M3 BA1 VDD3 K2
VDD5 4,14,15 M_B_BS2 BA2 VDD4
N1 K8
VDD6 N9 VDD5 N1
J7 VDD7 R1 VDD6 N9
4,14,15 M_B_CLK_DDR0 K7 CK VDD8 R9 J7 VDD7 R1
4,14,15 M_B_CLK_DDR_N0 CK# VDD9 4,14,15 M_B_CLK_DDR0 K7 CK VDD8 R9
4,14,15 M_B_CLK_DDR_N0 CK# VDD9
K9 A1
4,14,15 M_B_CKE0 CKE0 VDDQ1
J9 A8 K9 A1
4,14,15 M_B_CKE1 CKE1/NC2 VDDQ2 C1 4,14,15 M_B_CKE0 J9 CKE0 VDDQ1 A8
VDDQ3 C9 4,14,15 M_B_CKE1 CKE1/NC2 VDDQ2 C1
J3 VDDQ4 D2 VDDQ3 C9
4,14,15 M_B_RAS_N K3 RAS# VDDQ5 E9 J3 VDDQ4 D2
4,14,15 M_B_CAS_N CAS# VDDQ6 4,14,15 M_B_RAS_N RAS# VDDQ5
L3 F1 K3 E9
4,14,15 M_B_WE_N WE# VDDQ7 H2 4,14,15 M_B_CAS_N L3 CAS# VDDQ6 F1
VDDQ8 H9 4,14,15 M_B_WE_N WE# VDDQ7 H2
F3 VDDQ9 VDDQ8 H9
4 M_B_DQS_DP0 G3 DQSL F3 VDDQ9
4 M_B_DQS_DN0 DQSL# 4 M_B_DQS_DP2 DQSL
G3
4 M_B_DQS_DN2 DQSL#
M8
VREFCA V_VREF_CA_DIMM1_R 13,14,15
C7 H1 M8
4 M_B_DQS_DP1 B7 DQSU VREFDQ V_VREF_DQ_DIMM1_R 14,15 C7 VREFCA H1 V_VREF_CA_DIMM1_R 13,14,15
4 M_B_DQS_DN1 DQSU# 4 M_B_DQS_DP3 DQSU VREFDQ V_VREF_DQ_DIMM1_R 14,15
B7
4 M_B_DQS_DN3 DQSU#
1 1
C311 C312 1 1
E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K C313 C314
D3 DML VSSQ1 B9 E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K
DMU VSSQ2 D1 2 2 D3 DML VSSQ1 B9
VSSQ3 D8 DMU VSSQ2 D1 2 2
VSSQ4 E2 VSSQ3 D8
L2 VSSQ5 E8 VSSQ4 E2
4,14,15 M_B_DIM0_CS0_N L1 CS0# VSSQ6 F9 L2 VSSQ5 E8
4,14,15 M_B_DIM0_CS1_N CS1#/NC3 VSSQ7 4,14,15 M_B_DIM0_CS0_N CS0# VSSQ6
G1 L1 F9
VSSQ8 G9 4,14,15 M_B_DIM0_CS1_N CS1#/NC3 VSSQ7 G1
VSSQ9 VSSQ8 G9
C K1 VSSQ9 C
J1 ODT0 A9 K1
14,15 M_B_ODT ODT1/NC1 VSS1 ODT0
B3 J1 A9
VSS2 E1 14,15 M_B_ODT ODT1/NC1 VSS1 B3
VSS3 G8 VSS2 E1
R177 1 2 240_0402_1% L8 VSS4 J2 VSS3 G8
R574 1 2 240_0402_1% L9 ZQ0 VSS5 J8 R205 1 2 240_0402_1% L8 VSS4 J2
ZQ1/NC4 VSS6 M1 R575 1 2 240_0402_1% L9 ZQ0 VSS5 J8
VSS7 M9 ZQ1/NC4 VSS6 M1
VSS8 P1 VSS7 M9
T2 VSS9 P9 VSS8 P1
3,13,14 DDR3_DRAMRST_N RESET# VSS10 T1 T2 VSS9 P9
VSS11 3,13,14 DDR3_DRAMRST_N RESET# VSS10
T9 T1
VSS12 VSS11 T9
VSS12
K4B4G1646B-HYK0_FBGA96
K4B4G1646B-HYK0_FBGA96

4,14,15 M_B_A[15:0]
4 M_B_DQ[63:48]
4,14,15 M_B_A[15:0]
4 M_B_DQ[47:32] U10
M_B_A0 N3 E3 M_B_DQ48
U11 M_B_A1 P7 A0 DQL0 F7 M_B_DQ50
M_B_A0 N3 E3 M_B_DQ39 M_B_A2 P3 A1 DQL1 F2 M_B_DQ52
M_B_A1 P7 A0 DQL0 F7 M_B_DQ35 M_B_A3 N2 A2 DQL2 F8 M_B_DQ54
M_B_A2 P3 A1 DQL1 F2 M_B_DQ38 M_B_A4 P8 A3 DQL3 H3 M_B_DQ55
M_B_A3 N2 A2 DQL2 F8 M_B_DQ34 M_B_A5 P2 A4 DQL4 H8 M_B_DQ53
M_B_A4 P8 A3 DQL3 H3 M_B_DQ33 M_B_A6 R8 A5 DQL5 G2 M_B_DQ49
M_B_A5 P2 A4 DQL4 H8 M_B_DQ32 M_B_A7 R2 A6 DQL6 H7 M_B_DQ51
M_B_A6 R8 A5 DQL5 G2 M_B_DQ36 M_B_A8 T8 A7 DQL7 D7 M_B_DQ59
M_B_A7 R2 A6 DQL6 H7 M_B_DQ37 M_B_A9 R3 A8 DQU0 C3 M_B_DQ56
M_B_A8 T8 A7 DQL7 D7 M_B_DQ41 M_B_A10 L7 A9 DQU1 C8 M_B_DQ60
M_B_A9 R3 A8 DQU0 C3 M_B_DQ43 M_B_A11 R7 A10/AP DQU2 C2 M_B_DQ57
M_B_A10 L7 A9 DQU1 C8 M_B_DQ40 M_B_A12 N7 A11 DQU3 A7 M_B_DQ61
M_B_A11 R7 A10/AP DQU2 C2 M_B_DQ46 M_B_A13 T3 A12/BC# DQU4 A2 M_B_DQ62
M_B_A12 N7 A11 DQU3 A7 M_B_DQ42 A13 DQU5 B8 M_B_DQ58
M_B_A13 T3 A12/BC# DQU4 A2 M_B_DQ45 M_B_A14 T7 DQU6 A3 M_B_DQ63
A13 DQU5 B8 M_B_DQ44 M_B_A15 M7 A14/NC6 DQU7
M_B_A14 T7 DQU6 A3 M_B_DQ47 A15/NC5 +1.35VSUS
M_B_A15 M7 A14/NC6 DQU7
B A15/NC5 +1.35VSUS B2 B
M2 VDD1 D9
4,14,15 M_B_BS0 BA0 VDD2
B2 N8 G7
M2 VDD1 D9 4,14,15 M_B_BS1 M3 BA1 VDD3 K2
4,14,15 M_B_BS0 N8 BA0 VDD2 G7 4,14,15 M_B_BS2 BA2 VDD4 K8
4,14,15 M_B_BS1 BA1 VDD3 VDD5
M3 K2 N1
4,14,15 M_B_BS2 BA2 VDD4 K8 VDD6 N9
VDD5 N1 J7 VDD7 R1
VDD6 N9 4,14,15 M_B_CLK_DDR0 K7 CK VDD8 R9
J7 VDD7 R1 4,14,15 M_B_CLK_DDR_N0 CK# VDD9
4,14,15 M_B_CLK_DDR0 CK VDD8
K7 R9
4,14,15 M_B_CLK_DDR_N0 CK# VDD9 K9 A1
4,14,15 M_B_CKE0 CKE0 VDDQ1
J9 A8
K9 A1 4,14,15 M_B_CKE1 CKE1/NC2 VDDQ2 C1
4,14,15 M_B_CKE0 J9 CKE0 VDDQ1 A8 VDDQ3 C9
4,14,15 M_B_CKE1 CKE1/NC2 VDDQ2 VDDQ4
C1 J3 D2
VDDQ3 C9 4,14,15 M_B_RAS_N K3 RAS# VDDQ5 E9
VDDQ4 4,14,15 M_B_CAS_N CAS# VDDQ6
J3 D2 L3 F1
4,14,15 M_B_RAS_N K3 RAS# VDDQ5 E9 4,14,15 M_B_WE_N WE# VDDQ7 H2
4,14,15 M_B_CAS_N L3 CAS# VDDQ6 F1 VDDQ8 H9
4,14,15 M_B_WE_N WE# VDDQ7 VDDQ9
H2 F3
VDDQ8 H9 4 M_B_DQS_DP6 G3 DQSL
VDDQ9 4 M_B_DQS_DN6 DQSL#
F3
4 M_B_DQS_DP4 G3 DQSL
4 M_B_DQS_DN4 DQSL# M8
VREFCA V_VREF_CA_DIMM1_R 13,14,15
C7 H1
M8 4 M_B_DQS_DP7 B7 DQSU VREFDQ V_VREF_DQ_DIMM1_R 14,15
VREFCA V_VREF_CA_DIMM1_R 13,14,15 4 M_B_DQS_DN7 DQSU#
C7 H1
4 M_B_DQS_DP5 B7 DQSU VREFDQ V_VREF_DQ_DIMM1_R 14,15
4 M_B_DQS_DN5 DQSU# 1 1
C315 C316
1 1 E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K
C317 C318 D3 DML VSSQ1 B9
E7 B1 0.047U_0402_25V7K 0.047U_0402_25V7K DMU VSSQ2 D1 2 2
D3 DML VSSQ1 B9 VSSQ3 D8
DMU VSSQ2 D1 2 2 VSSQ4 E2
VSSQ3 D8 L2 VSSQ5 E8
VSSQ4 E2 4,14,15 M_B_DIM0_CS0_N L1 CS0# VSSQ6 F9
VSSQ5 4,14,15 M_B_DIM0_CS1_N CS1#/NC3 VSSQ7
L2 E8 G1
4,14,15 M_B_DIM0_CS0_N L1 CS0# VSSQ6 F9 VSSQ8 G9
4,14,15 M_B_DIM0_CS1_N CS1#/NC3 VSSQ7 G1 VSSQ9
VSSQ8 G9 K1
VSSQ9 J1 ODT0 A9
14,15 M_B_ODT ODT1/NC1 VSS1
K1 B3
J1 ODT0 A9 VSS2 E1
14,15 M_B_ODT ODT1/NC1 VSS1 B3 VSS3 G8
VSS2 E1 R228 1 2 240_0402_1% L8 VSS4 J2
VSS3 G8 R578 1 2 240_0402_1% L9 ZQ0 VSS5 J8
R227 1 2 240_0402_1% L8 VSS4 J2 ZQ1/NC4 VSS6 M1
R577 1 2 240_0402_1% L9 ZQ0 VSS5 J8 VSS7 M9
ZQ1/NC4 VSS6 M1 VSS8 P1
A VSS7 M9 T2 VSS9 P9 A
VSS8 P1 3,13,14 DDR3_DRAMRST_N RESET# VSS10 T1
T2 VSS9 P9 VSS11 T9
3,13,14 DDR3_DRAMRST_N RESET# VSS10 T1 VSS12
VSS11 T9
VSS12 K4B4G1646B-HYK0_FBGA96

K4B4G1646B-HYK0_FBGA96

LENOVO.CRDN
Title
LPDDR3-ONBD
Size Document Number
D Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 14 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

4 +V_DDR_WR_VREF01_DIMM

+1.35VSUS

+0.68V +0.68V
4,14 M_B_A[15:0]

2
R178
R180 1 2 26.1_0402_1% 1.82K_0402_1%
2 1 4,14 M_B_CLK_DDR0
M_B_A0 R179 34.8_0402_1% R182 1 2 26.1_0402_1%
2 1 4,14 M_B_CLK_DDR_N0
M_B_A1 R181 34.8_0402_1%

1
M_B_A2 R184 2 1 34.8_0402_1%
M_B_A3 R186 2 1 34.8_0402_1% +0.68V +0.68V
4,13 M_A_A[15:0]
M_B_A4 R188 2 1 34.8_0402_1% R215 2 1 5.11_0402_1%
2 1 V_VREF_DQ_DIMM1_R 14
M_B_A5 R191 34.8_0402_1% +1.35VSUS
M_B_A6 R194 2 1 34.8_0402_1% 2
D M_B_A7 R196 2 1 34.8_0402_1% R274 1 2 26.1_0402_1% D
2 1 4,13 M_A_CLK_DDR0
M_B_A8 R198 34.8_0402_1% R185 1 2 30_0402_1% M_A_A0 R270 2 1 34.8_0402_1% R265 1 2 26.1_0402_1% C136
14 M_B_ODT 4,13 M_A_CLK_DDR_N0

2
M_B_A9 R200 2 1 34.8_0402_1% M_A_A1 R236 2 1 34.8_0402_1% 0.022U_0402_25V7K
M_B_A10 R201 2 1 34.8_0402_1% M_A_A2 R237 2 1 34.8_0402_1% 1 R187
M_B_A11 R202 2 1 34.8_0402_1% M_A_A3 R239 2 1 34.8_0402_1% 1.82K_0402_1%

2
M_B_A12 R203 2 1 34.8_0402_1% M_A_A4 R240 2 1 34.8_0402_1%
M_B_A13 R204 2 1 34.8_0402_1% M_A_A5 R241 2 1 34.8_0402_1% +1.35VSUS R193

1
M_A_A6 R242 2 1 34.8_0402_1% 24.9_0402_1%
M_B_A14 R206 2 1 34.8_0402_1% M_A_A7 R243 2 1 34.8_0402_1%
M_B_A15 R207 2 1 34.8_0402_1% M_A_A8 R244 2 1 34.8_0402_1% R267 1 2 30_0402_1%
13 M_A_ODT

1
M_A_A9 R245 2 1 34.8_0402_1%
M_A_A10 R246 2 1 34.8_0402_1%
M_A_A11 R247 2 1 34.8_0402_1%
R208 2 1 34.8_0402_1% M_A_A12 R248 2 1 34.8_0402_1%
4,14 M_B_BS0
R210 2 1 34.8_0402_1% M_A_A13 R250 2 1 34.8_0402_1%
4,14 M_B_BS1
R211 2 1 34.8_0402_1%
4,14 M_B_BS2
M_A_A14 R251 2 1 34.8_0402_1%
R214 2 1 34.8_0402_1% M_A_A15 R252 2 1 34.8_0402_1%
4,14 M_B_CKE0
R229 2 1 34.8_0402_1%
4,14 M_B_CKE1 4 +V_DDR_CA_VREF01_DIMM
R230 2 1 34.8_0402_1%
4,14 M_B_RAS_N
R231 2 1 34.8_0402_1% R253 2 1 34.8_0402_1%
4,14 M_B_CAS_N 4,13 M_A_BS0
R232 2 1 34.8_0402_1% R254 2 1 34.8_0402_1% +1.35VSUS
4,14 M_B_WE_N 4,13 M_A_BS1
R255 2 1 34.8_0402_1%
4,13 M_A_BS2
R233 2 1 34.8_0402_1%
4,14 M_B_DIM0_CS0_N
R234 2 1 34.8_0402_1% R256 2 1 34.8_0402_1%
4,14 M_B_DIM0_CS1_N 4,13 M_A_CKE0

2
R257 2 1 34.8_0402_1%
4,13 M_A_CKE1
R189
R258 2 1 34.8_0402_1% 1.82K_0402_1%
4,13 M_A_RAS_N
R259 2 1 34.8_0402_1%
4,13 M_A_CAS_N
R260 2 1 34.8_0402_1%
4,13 M_A_WE_N

1
R261 2 1 34.8_0402_1%
4,13 M_A_DIM0_CS0_N
R262 2 1 34.8_0402_1% R213 2 1 2.7_0402_1%
4,13 M_A_DIM0_CS1_N V_VREF_CA_DIMM1_R 13,14
2
+0.68V C143
0.022U_0402_25V7K
1

2
R190

2
1 1 1 1 1 1 1.82K_0402_1%
C615 C614 C371 C370 C73 C72 R216
24.9_0402_1%

1
1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

22U_0603_4V6M

22U_0603_4V6M

2 2 2 2 2 2

1
C C

4 +V_DDR_WR_VREF00_DIMM

+1.35VSUS
+1.35VSUS
+1.35VSUS

2
OF 8 PLACE 4 ON EACH SIDE OF CONNECTOR R183
1.82K_0402_1%
2 2 2 2
1 1 1 1 1 1 1 1 1 1 1 1 C155 C156 C157 C158

1
C144 C145 C146 C147 C148 C149 C150 C151 C152 C153 C154 C159
0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
1 1 1 1 R235 2 1 5.11_0402_1%
1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

2 2 2 2 2 2 2 2 2 2 2 2 V_VREF_DQ_DIMM0_R 13

2
C137

2
0.022U_0402_25V7K
1 R192
1.82K_0402_1%

2
R195

1
24.9_0402_1%

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1
C171 C172 C173 C174 C175 C176 C177 C178 C179 C180 C181 C182 C195 C196 C197 C198 C199 C200 C201 C202
1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

1U_0402_10V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

+1.35VSUS

B B
18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J
1

@ @ @ @ @ @ @ @ @ @
C183

C184

C185

C186

C187

C188

C189

C190

C191

C192
2

2
18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J
1

@ @ @ @ @ @ @ @ @ @
C193

C194

C203

C204

C205

C206

C207

C208

C209

C210
2

2
18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J

18P_0402_50V8J
1

@ @ @ @ @ @ @ @ @ @
C211

C212

C213

C223

C224

C225

C226

C230

C231

C232
2

2
18P_0402_50V8J

18P_0402_50V8J
1

@ @
C233

C234
2

A A

LENOVO.CRDN
Title
LPDDR3-TERMINATION
Size Document Number
D Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 15 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

+3V +3VAUX
+3V +3VAUX

2
@

2
R48 R22 @
0_0402_5% 0_0402_5% R55 R44
0_0402_5% 0_0402_5%

1
ISCT_BL_EN_R R56 1 @ 2 0_0402_5% LCD_BL_EN_R

1
6
U89 U29

6
Vcc
PCH_LCD_BL_EN_R 2

Vcc
+3VALW 5 A 4 ISCT_BL_EN_R 2
R14 1 2 0_0402_5% 1 NC Y A 4 LCD_BL_EN_R
20 EC_LCD_BL_EN B Y

Gnd
1

GND
D B D

1
5 74AUP1G32GF_SOT891-6_1X1
NC

1
R217 74AUP1G08GF_SOT891-6_1X1

3
100K_0402_5% @

3
R279
100K_0402_5%
20 PSR_BL_EN

2
D6
R218 1 2 1K_0402_5% 1 2 SDM10U45LP-7_DFN1006-2-2 PCH_LCD_BL_EN_R
16,20 MXLID_N
2 2 JP14
6 @ R80 1 2 0_0402_5% 1
20 DCR 1
C216 C217 2
C1 1 2 0.1u_0201_10V6K 3 2
0.1u_0201_10V6K 0.1u_0201_10V6K 2 EDP_TX3_DN 3
1 Q5A 1 C2 1 2 0.1u_0201_10V6K 4
2 EDP_TX3_DP 4
2 AO5804EL_SC89-6 5
7 FPBACK 5
C3 1 2 0.1u_0201_10V6K 6
2 EDP_TX2_DN 6
C4 1 2 0.1u_0201_10V6K 7
17 LID_30_N 2 EDP_TX2_DP 8 7
1 C5 1 2 0.1u_0201_10V6K 9 8
2 EDP_TX1_DN 9
C6 1 2 0.1u_0201_10V6K 10
2 EDP_TX1_DP 10
2,16,20 LCD_BL_EN R219 1 2 10K_0402_5% PCH_LCD_BL_EN_R 11
C7 1 2 0.1u_0201_10V6K 12 11
2 EDP_TX0_DN 12
C8 1 2 0.1u_0201_10V6K 13
2 EDP_TX0_DP 13
1

2 14
C9 1 2 0.1u_0201_10V6K 15 14
2 EDP_AUX_DP 15
R220 C218 C10 1 2 0.1u_0201_10V6K 16
2 EDP_AUX_DN 16
100K_0402_5% 0.1u_0201_10V6K 6 @ 17
1 Q6A R226 1 2 0_0402_5% 18 17
18
2

AO5804EL_SC89-6 19
20 19
+3VDX_EDP 20
2 +5V 21
TP36 TESTPAD 22 21
23 22
1 2 23
5 C319 24
1 C220 25 24
+3V 10U_0402_6.3V6M 26 25
0.1u_0201_10V6K 26
C 2 1 EDP_HPD_OUT 27 C
4 3 EDP_HPD_OUT 28 27
2 EDP_HPD 28
29
29
2

@ 30
@ @ Q6B 31 30
R5 R6 AO5804EL_SC89-6 LCD_BL_EN_R 32 31
32

1
1K_0402_5% 1K_0402_5% LCD_PWM_BKLT 33
EC_PSR 34 33
34
1

R573 TP42 TESTPAD 35

100K_0402_5% 36 35
LCD_BL_EN 37 36 41
2,16,20 LCD_BL_EN 37 GND

2
V_BL_LED L40 1 2 BLM15PX121SN1D_2P 38 42
@ R312 1 2 0_0402_5% LCD_PWM_BKLT 39 38 GND 43
20 EC_PWM_BKLT LCD_PWM_BKLT 2 39 GND
TP41 TESTPAD 40 44
R8 1 2 0_0402_5% 40 GND
2

10U_0603_10V
2 LCD_BL_PWM_PCH

C320
C221 JAE_FI-J40S-VF15N-R3000
0.1u_0201_10V6K

2
V_BL_LED 1 +3VDX_TOUCHPANEL
VIN
Q15 R7 2 1 100K_0402_5% TOUCH_PANEL_INTR_N
SSM6J402TU_UF6
6 JP30
TPF125 TESTPAD_16
5
4 2 R726 1 @ 20_0402_5% 30 34
16,20 MXLID_N 30 G4
1 29 33 touch panel con
L35 1 2 BLM15BD221SN1D_2P 28 29 G3 32
28 G2
1

C344 +3VDX_EDP 27 31
2 7 USB_PN6 27 G1
3
1

R700 26
7 USB_PP6 25 26
0.1U_0402_25V6

C650 7 TOUCH_PANEL_INTR_N
0.1u_0201_10V6K 200K_0402_1% 24 25
2 TOUCH_RST_N_GYRO_INT1 24
2

1 23
+3VAUX 23
2

1
EC_SMB_CLK_DEV2 22
R335 EC_SMB_DAT_DEV2 21 22
21
1

10K_0402_5% 20
20 WIN8_BUTTON_INT_N 19 20
B @ 19 B
R701 18
2 +3V_AUDIO 18
100K_0402_5% 17
19 DMIC_CLK 17
EC_PSR 16
20 EC_PSR 19 DMIC_DATA 16
2

15
L36 1 2 BLM15BD221SN1D_2P 14 15
EDP_BL_DISCHARGE 25 +3VDX_CAMERA_FPS 14
1

TOUCH_RST_N_GYRO_INT1 2 13
7 USB_PN7 12 13
3 R340
7 USB_PP7 12
WIN8_BUTTON_INT_N 10K_0402_5% C222 11
Q5B 0.1u_0201_10V6K L37 1 2 BLM15BD221SN1D_2P 10 11
@ 1 +3VDX_SENSORHUB 10
AO5804EL_SC89-6 9
18 MCU_I2C_RE_SCL 9
2
1

EDP_VDD_EN_R 5 8
18 MCU_I2C_RE_SDA 8
1

@ @ R75 1 2 10K_0402_5% 7
+3VDX_SENSORHUB 7
C596 R9 R698 1 @ 2 0_0402_5% 6
6
1

100K_0402_5% 18,20 EC_SMB_CLK_SEN R702 1 @ 2 0_0402_5% 5

5
2

4 R694 1 2 4
470P_0402_50V8J

TI@ 0_0402_5% 18,20 EC_SMB_DAT_SEN

21 ALS_INT_TI_N 4
2

R140 3
100K_0402_5% 2 3
R689 1 ITE@ 2 0_0402_5% 1 2
18 ALS_INT_TI_N_ITE 1
2

R695 1 ITE@ 2 0_0402_5% JAE_FI-J30S-VF15N-R3000

18 INT_ACCEL1 R696 1 @ 2 0_0402_5%
20 INT_ACCEL1_EC
R690 1 TI@ 2 0_0402_5%
21 INT_COMPASS R693 1 ITE@ 2 0_0402_5%
18 INT_COMPASS_ITE
R691 1 TI@ 2 0_0402_5%
+3V 21 INT_MPU6050_GYRO R146 1 ITE@ 2 0_0402_5%
+3V +3VAUX_EC 18 INT_GYRO_ITE

U36
1 8 +3V
U90 VCCA VCCB
RP21
6

EC_SMB_CLK 2 7 EC_SMB_CLK_DEV2 1 4
17,20,29 EC_SMB_CLK A0 B0 2 3
Vcc

2 EC_SMB_DAT 3 6 EC_SMB_DAT_DEV2
20 EC_EDP_VDD_EN A 17,20,29 EC_SMB_DAT A1 B1
A 4 EDP_VDD_EN_R 20,22,25,30 10K_0404_4P2R_5% A
1 Y 4 5
+3VAUX_EC
GND

2 EDP_VDD_EN B GND OE
5 74AUP1G32GF_SOT891-6_1X1
NC
LENOVO.CRDN
1

FXMA2102UMX_U-MLP8_1P2X1P4
3

R347 R345 Title

100K_0402_5% 100K_0402_5% EDP/Camera
Size Document Number
2

C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 16 of 34
"PROPERTY NOTE: this document contains information confidential and
EDP_VDD_EN R692 1 @ 2 0_0402_5% EDP_VDD_EN_R property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

+3VAUX TPF32 TESTPAD_16

TPF33 TESTPAD_16

2
TPF34 TESTPAD_16
JP26 R305
100K_0402_5%
1 2
1 2 +5VDx_WALKPORT

1
3 4
5 3 4 6
5 6 SUYIN_125017GA007G101ZL
7 8 20 MBAT_PRES_N R306 1 2 100_0402_5%
+3VAUX 7 8
9 10 7 8
11 9 10 12 R308 1 2 100_0402_5% 6 7 G1 9
11 12 16,20,29 EC_SMB_DAT 6 G2
+3VALW 13 14 +5VAUX 5
D
15 13 14 16 R309 1 2 100_0402_5% 4 5 D
+3V 15 16 RTC_VCC 16,20,29 EC_SMB_CLK 4
17 18 3
19 17 18 20 BAT BAT_R 2 3
7 USB_PP0 19 20 2
7 USB_PN0 21 22 F1 1
23 21 22 24 1 2 1
25 23 24 26 C342
7 USB_PP3 25 26 2 JP12

1
7 USB_PN3 27 28 15A_24V_TR-3216FF15-R
29 27 28 30

0.1U_0402_25V6
C343 2 TPF6 TESTPAD_16
31 29 30 32
7 PCIE1_WLAN_RX_DP 31 32 47P_0201_25V8

2
33 34 1 C341
7 PCIE1_WLAN_RX_DN 33 34 TPF92 TESTPAD_16
35 36 1000P_0201_25V7K
35 36 1 TPF93 TESTPAD_16
37 38
7 PCIE1_WLAN_TX_DP 37 38
39 40
7 PCIE1_WLAN_TX_DN 41 39 40 42
43 41 42 44
6 CK_WLAN_DP 43 44
45 46
6 CK_WLAN_DN 47 45 46 48
49 47 48 50
6,20 PCIE_WAKE_N 51 49 50 52
2,6 CK_REQ_WLAN_N 53 51 52 54
6,17,20 PLT_RST_N 55 53 54 56
16 LID_30_N 57 55 56 58 MPCIE_RST_N 2
20 ROTATION_LOCK_N 57 58 SUS_CK 6
59 60
20 VOLUME_UP_N 61 59 60 62 NGFF_SLTA_WIFI_WAKE_N 2,7
RF_KILL_N_WIFI_NGFF_RIO
20 VOLUME_DOWN_N 61 62
63 64 RF_KILL_N_BT_NGFF_RIO
20 USB_ILIM_SET 63 64
65 66
7 USB_CHR_EN 67 65 66 68 USB_OC_N2 5,7
20 CLT3 67 68 NGFF_WIFI_PWR_EN 7,20
69 70
20 CLT1 71 69 70 72 NGFF_SLTA_WIFI_RST_N 7
AUDGND 71 72 AUDGND
73 74
19 HP_L 73 74 MIC2-VREFO 19
75 76
19 HP_R 75 76 SENSE_A 19 TPF18 TESTPAD_16
77 78
19 SLEEVE 77 78 RING2 19 TPF19 TESTPAD_16
AUDGND 79 80 AUDGND
79 80
JP9
20 CAP_LED_N 1
ELCO_20-5602-080-000-829 R3131 150_0402_5%
2 +3VS_CAPSLK 2 1
+3V 2
C 20 MY15 3 C
4 3
20 MY10 4
20 MY11 5
6 5
20 MY14 6
20 MY13 7
8 7
20 MY12 8
20 MY3 9
RF_KILL_N_BT_NGFF_RIO R631 1 @ 2 0_0402_5% 10 9
BT_OFF_N 20 20 MY6 10
20 MY8 11
R629 1 @ 2 0_0402_5% 12 11
RF_KILL_N_BT_NGFF 7 20 MY7 12
RF_KILL_N_WIFI_NGFF_RIO R632 1 @ 2 0_0402_5% 20 MY4 13
WLAN_OFF_N 20 14 13
20 MY2 14
20 MX0 15
R630 1 @ 2 0_0402_5% 16 15
RF_KILL_N_WIFI_NGFF 2 20 MY1 16
20 MY5 17
18 17
20 MX3 18
20 MX2 19
20 19
20 MY0 20
20 MX5 21
22 21
20 MX4 22
20 MY9 23
24 23 27
JP20 20 MX6 24 G1
20 MX7 25 28
26 25 G2
20 MX1 26
1 2
3 1 2 4 ACES_50506-02601-001
VIN 3 4
5 6
+5V 5 6 +5VDx_WALKPORT
7 8
9 7 8 10
+3V 9 10
11 12
+3VAUX 11 12
2 HDMI_PWR_EN 13 14 +1.35VSUS
15 13 14 16
7 SATA1_DEVSLP 15 16 +1.5V
20,25,26,28,30 MAINON 17 18 CD_N 7
19 17 18 20
20 LID_PAD_N 19 20 SATA_PWR_EN 7
21 22 HDMI_HPD 2
7 USB_OC_N0 21 22
7 USB30_PWREN 23 24 HDMI_DDC_DATA 2
25 23 24 26
5 USB_CR_PWREN 25 26 HDMI_DDC_CLK 2
6,7,20 PM_SLP_S0_N 27 28
B
29 27 28 30 B
29 30 USB_PP2 7
31 32 USB_PN2 7 JP4
33 31 32 34 1
33 34 +3V 1
35 36 HDMI_DATA2 2 2
37 35 36 38 3 2
37 38 HDMI_DATA2_N 2 5,20 LPC_AD0 3
39 40 4
41 39 40 42 5,20 LPC_AD1 5 4
41 42 HDMI_DATA1 2 5,20 LPC_AD2 5
43 44 HDMI_DATA1_N 2 6
45 43 44 46 5,20 LPC_AD3 7 6 17
45 46 5,20 LPC_FRAME_N 7 GND
47 48 HDMI_DATA0 2 8
47 48 6,20 PM_CLKRUN_N 8
49 50 HDMI_DATA0_N 2 9
51 49 50 52 6,20 SUS_STAT_N 10 9 18
53 51 52 54 11 10 GND
7 USB_PP1 53 54 HDMI_CLK 2 6,17,20 PLT_RST_N 11
7 USB_PN1 55 56 HDMI_CLK_N 2 12
55 56 6 CLK_PCI_LPC_DEBUG 12
57 58 13
57 58 6,7,20 INT_SERIRQ 13
17 SATA_RXP1_C 59 60 14
61 59 60 62 USB3_TX2_P 7 15 14
17 SATA_RXN1_C 61 62 USB3_TX2_N 7 15
63 64 16
65 63 64 66 16
17 SATA_TXN1_C 65 66 USB3_RX2_P 7
17 SATA_TXP1_C 67 68 USB3_RX2_N 7 BELLW_80107-1621
69 67 68 70
69 70

ELCO_20-5602-070-000-829 CLK_REF14_SIO CLK_PCI_SIO PCH_DRQ#0

A A

5 SATA_RXP1
C276 2 1 0.01U_0201_10V6K
SATA_RXP1_C 17
LENOVO.CRDN
C277 2 1 0.01U_0201_10V6K
5 SATA_RXN1 SATA_RXN1_C 17 Title
Connector (BTB,Bat,LPC,KB)
Size Document Number
C Rev V1.0
Kona
C272 2 1 0.01U_0201_10V6K Date: Tuesday, August 06, 2013 Sheet 17 of 34
5 SATA_TXN1 SATA_TXN1_C 17 "PROPERTY NOTE: this document contains information confidential and
C273 2 1 0.01U_0201_10V6K
5 SATA_TXP1 SATA_TXP1_C 17 property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

+3VDX_SENSORHUB
+3V_MCU_ITE +3V_MCU_A_ITE
ITE@
L59 1 2 R599 1 ITE@ 2 0_0402_5%
BLM15BD221SN1D_2P
2 ITE@ 2 ITE@ 2 ITE@ 2 ITE@ 2 ITE@ 2 2 ITE@
Note 1 : Since all GPIO belong to VSTBY power domain
C640 C639 C637 C630 C363 ITE@
C364
C638
Note 2 :
(1) Each input pin should be driven or pulled.

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
1000P_0201_25V7K
1 1 1 1 1 1 1
R601 1 ITE@ 2 0_0402_5% (2) Each output-drain output pin should be pulled.
D D
AGND_MCU_ITE
+3V_MCU_ITE

ITE@
+3VDX_SENSORHUB +3V_MCU_ITE L61 +3V_MCU_A_ITE

2
BLM15BD221SN1D_2P
+3VDX_SENSORHUB +3VDX_SENSORHUB

C627 2 1 0.1u_0201_10V6K
2

R605 R606

1
2.2K_0402_5% 2.2K_0402_5% R588 R603
U32
2
1

1 8 2.2K_0402_5% 2.2K_0402_5% ITE@

VCCA VCCB C641

1
MCU_I2C_SCL_OUT 2 7 0.1u_0201_10V6K
A0 B0 MCU_I2C_RE_SCL 16 1
U31 ITE@
MCU_I2C_SDA_OUT 3 6 IT8350E_LQFP-48
A1 B1 MCU_I2C_RE_SDA 16

16
23
36

33
4

7
4 5
GND OE

AVCC
VSTBY(PLL)
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
1
FXMA2102UMX_U-MLP8_1P2X1P4 +3V_MCU_ITE
R336
100K_0402_5% SMbus channel 4 for connecting the Sensor
47 TP53 TESTPAD
SMCLK0/GPB3

2
48
SMDAT0/GPB4 TP47 TESTPAD

1
ITE@ 2

SM BUS
R714 SMCLK2/GPF6 3
SMDAT2/GPF7 13 R717 1 ITE@ 20_0402_5%
100K_0402_5% SMCLK4/GPE0 MCU_I2C_SCL_OUT 21
@ R683 1 2 0_0402_5% 12 R718 1 ITE@ 20_0402_5% MCU_I2C_SDA_OUT 21
SMDAT4/GPE7

2
@ R684 1 2 0_0402_5%
ITE_WRST_N 11
WRST#
C C
1 ITE@
C365

1U_0402_10V6K
2 40 15
41 FSCE#/GPG3 PWM0/GPA0 14 +3V_MCU_ITE
42 FMOSI/GPG4 PWM1/GPA1 17
FMISO/GPG5 FSPI PWM4/SMCLK5/GPA4
44 PWM 19
FSCK/GPG7 PWM5/SMDAT5/GPA5 18
+3V_MCU_ITE PWM6/SSCK/GPA6

IT8350E INT_GYRO_ITE
100K_0402_5%
2
100K_0402_5%
ITE@

ITE@
R719
1
R724

LQFP-48

1
INT_COMPASS_ITE 2 1
ITE@ R707 100K_0402_5% ITE@ R725
45 INT_ACCEL1 2 1
1.5K_0402_5% RXD/SIN0/GPB0 46 100K_0402_5% ITE@ R727
UART TXD/SOUT0/GPB1 INT_ACCEL2 2 1

2
ITE@
0_0404_4P2R_5%
3 2 37
7,21 USB_PN5 GPH5/ID5/DM
4 1 38 USB
7,21 USB_PP5 GPH6/ID6/DP 27
RP12 ADC0/GPI0 ALS_INT_TI_N_ITE 16
28
ADC1/SMINT0/GPI1 29 INT_GYRO_ITE 16
ADC2/SMINT1/GPI2 INT_COMPASS_ITE 16
A/D 30
ADC3/SMINT2/GPI3 INT_ACCEL1 16
31 INT_ACCEL2
ADC4/SMINT3/GPI4 32
+3VDX_SENSORHUB ADC5/GPI5
GPG2 Pull High Enable mirror function.
+3VDX_SENSORHUB 10P_0402_50V8J
GPG2 Pull Low Disable mirror function. 2 1
39
ITE@ SSCE0#/GPG2 25 C18 ITE@
U28 KSO17/SMISO/GPC5

2
0_0402_5% 2 @ 1 R706 6 SSPI 22
PWRSW/GPE4 KSO16/SMOSI/GPC3

2
16,20 EC_SMB_DAT_SEN 1 12 0_0402_5% 2 ITE@ 1 R704 MCU_I2C_SCL_OUT 21 R728 ITE@ R66
B
MCU_I2C_SDA_OUT 0_0402_5% 2 ITE@ 1 R703 2 SDO SCL 11 20 KSI0 10M_0402_5% ITE@
B
SDA PS KSI6 100K_0402_5%
3 10 0_0402_5% 2 @ 1 R708 26 GPIO Y3
VDDIO CSB EC_SMB_CLK_SEN 16,20 KSI7 ITE@
4 9 32.768KHZ_9PF_CM8V-T1A
NC GND

1
0_0402_5% 2 ITE@ 1 R729 5 8 43
20 INT_ACCEL2 INT1 GNDIO GPG6
6 7 9 10P_0402_50V8J
INT2 VDD CK32KE/GPJ7 8 2 1
2 CK32K/GPJ6
2 BMA255_LGA12_2X2 C636 CLOCK
C635 ITE@ C19 ITE@
R6021 2
0.1u_0201_10V6K

ITE@ @ 0_0402_5%

VCORE
1
0.1u_0201_10V6K

AVSS
VSS
VSS
VSS
1
32.768kHz clock lines:
a. If possible, please avoid using any through-hole.

5
24
35

10

34
b. Please make the trace length short, and the trace
width wide enough.
2
ITE@
c. The spacing to the closest neighbor should be wide
C642 enough.
0.1u_0201_10V6K
1

AGND_MCU_ITE

A A

LENOVO.CRDN
Title
SENSOR(ITE)
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 18 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

DVDD_IO
+5V_AUDIO +5V_AUDIO_A

C300,C301 close
to pin 9
2 1 2 2 1 1 2 1
C300 C301 C288 C291 C292 C289 C280 C281

10U_0402_6.3V6M

0.1u_0201_10V6K

0.1u_0201_10V6K

10U_0402_6.3V6M

10U_0402_6.3V6M

0.1u_0201_10V6K

10U_0402_6.3V6M
0.1u_0201_10V6K
1 2 1 1 2 2 1 2

D D

AUDGND +1.5V_AUDIO

1
+3V_AUDIO C298 If AVDD2 is design to 1.5V,there will
be better power consumption

10U_0402_6.3V6M
GND GND
2
C298 close to pin40
2 1
C294 C296 AUDGND

41

46

26

40
1

9
U18

0.1u_0201_10V6K

10U_0402_6.3V6M

PVDD1

PVDD2

AVDD1

AVDD2
DVDD

DVDD-IO
1 2

22
@ 21 LINE1-L(PORT-C-L) 43 SPK_L-
C43 1 2 GND LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPK_L+
GND SPK-OUT-L+
10U_0603_6.3V6M @ 24 Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R
SPDIF-OUT R49 1 2 20K_0402_1% 23 LINE2-L(PORT-E-L) 45 SPK_R+ Speaker 4 ohm : 40mil
LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPK_R- Speaker 8 ohm : 20mil
@ 17 SPK-OUT-R-
C44 1 2 17 RING2 18 MIC2-L(PORT-F-L) /RING2
GND 17 SLEEVE MIC2-R(PORT-F-R) /SLEEVE
10U_0603_6.3V6M @ 32 R549 2 1 75_0402_1% DVDD_IO +1.5V_AUDIO
HPOUT-L(PORT-I-L) HP_L 17 C327
SPDIF-OUT R50 1 2 20K_0402_1% 31 33 R551 2 1 75_0402_1% @
30 LINE1-VREFO-L HPOUT-R(PORT-I-R) HP_R 17 10P_0201_50V8F 1 2
LINE1-VREFO-R 10
SYNC HDA_SYNC_CODEC 5
R273 1 2 0_0402_5% 2 6 R283 1 2 0_0402_5%
16 DMIC_DATA GPIO0/DMIC-DATA BCLK HDA_BCLK_24M 5
R277 1 2 33_0402_5% 3 22P_0201_25V8 2 1 C299
GND
16 DMIC_CLK GPIO1/DMIC-CLK C329
20 VOL_MUTE_N 1 @ 2SDM10U45LP-7_DFN1006-2-2 @ @
D24 10P_0201_50V8F 1 2
when PD# is high, 1 2SDM10U45LP-7_DFN1006-2-2 47 5
turn on AMP
20 CODEC_PD_N
5
D23
HDA_RST_N
11 PDB
RESETB
ALC283-CG SDATA-OUT
SDATA-IN
8 R271 1 2 10_0402_5%
HDA_SDOUT
HDA_SDIN0
5
5
+3V_AUD +3V_AUDIO
when PD# is low, L53
C turn off AMP 48 SPDIF-OUT 1 2 C
R266 1 2 10K_0402_5% C290 2 1 0.1u_0201_10V6K 12 SPDIF-OUT/GPIO2
7 PCH_BEEP PCBEEP 16 BLM15PX121SN1D_2P
MONO-OUT
1

2 R276 1 2 13
@ @ 17 SENSE_A 39.2K_0402_1% 14 SENSE A
R268 C302 SENSE B 29 MIC2-VREFO 17 +5V_AUD +5V_AUDIO
1K_0402_5% 100P_0201_25V8J 37 MIC2-VREFO C293 1 2 10U_0402_6.3V6M L54
1 CBP GND
1 2 35 7 1 2
CBN LDO3-CAP
2

+3V_AUDIO C54 1U_0402_10V6K 39 C287 1 2 10U_0402_6.3V6M

LDO2-CAP AUDGND
C54 close to pin 35 27 C286 1 2 10U_0402_6.3V6M BLM15PX121SN1D_2P
36 LDO1-CAP +5V_AUDIO_A
GND CPVDD L55
1 C284 close to pin 36 28 C283 1 2 2.2U_0402_6.3V6M AUDGND 1 2
20 VREF
C284 CPVREF 15 R264 1 2 20K_0402_1% BLM15PX121SN1D_2P
JDREF
10U_0402_6.3V6M
2
C295 1 2 10U_0402_6.3V6M 19
MIC-CAP CPVEE
34 R264 Close codec-pin15
+1.5V_AUD +1.5V_AUDIO
AUDGND 4 1 2
DVSS GND
GND 49 25 C49 L41 1 2
Thermal PAD AVSS1 38 1U_0402_10V6K
AVSS2 BLM15BD221SN1D_2P
C49 close to pin 34
ALC283-CG_MQFN48_6X6

J1
1 2
GND AUDGND
JUMPER

J2
1 2

JUMPER

R263 1 2 0_0402_5%
B B

AUDGND GND
TPF39 TESTPAD_16
TPF40 TESTPAD_16 Tied at one point only under the
TPF41 TESTPAD_16 Codec or near the Codec
TPF42 TESTPAD_16

20mils
JP7
SPK_R+ 1 5
2 1 GND
SPK_R-
SPK_L+ 3 2 Internal
SPK_L- 4 3
4 GND
6 Speaker
2 2 2 2 ACES_50208-00401-001
C334 C335 C336 C337
1000P_0201_25V7K

1000P_0201_25V7K

1000P_0201_25V7K

1000P_0201_25V7K

1 1 1 1

A
Near to device side U18 A

LENOVO.CRDN
Title
AUDIO CODEC
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 19 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

SHBM=1: Enable shared memory with host BIOS

I/O Address
+3VAUX BADDR1-0 Index Data
@ VCCRTC VCCRTC_EC +3VDX_THERM_SENSOR 0 0 2E 2F
L43 1 2 @ +3VAUX_EC 0 1 4E 4F
L45 1 2 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
BLM15BD221SN1D_2P +3V 1 1 Reserved
EC_SMB_CLK_DEV 22
+3VAUX_EC +3VAUX_EC BLM15BD221SN1D_2P
+3VALW 1 2 C356 U27
1 8 +3VDX_THERM_SENSOR
VCCA VCCB

2
L44 1 2 TPF109 TESTPAD_16 @ 0.1u_0201_10V6K RP14
2 1 2 2 2 2 2 2 R321 EC_SMB_CLK 2 7 1 4
BLM15BD221SN1D_2P C349 R319 1 2 A0 B0 2 3
0_0402_5%
C348 C350 C351 C352 C353 C354 C355 0_0402_5% EC_SMB_DAT 3 6
+3VAUX_EC A1 B1 10K_0404_4P2R_5%

10U_0402_6.3V6M
0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

1
1 2 1 1 1 1 1 1 4 5
GND OE +3VAUX_EC
D D

2 EC_SMB_DAT_DEV 22

1
C362 FXMA2102UMX_U-MLP8_1P2X1P4
R332
0.1u_0201_10V6K 100K_0402_5%
1

D10
K10

2
* Recommended net "+3VAUX" U26 +3VAUX_EC

D4
D5
K5

K4
E4

E9
J4

J5
+3VAUX_EC
and "RTCVCC" minimum trace

VBAT

VSTBY(PLL)
VCC

AVCC
VCORE

VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
Should have a 0.1uF capacitor close to every width 12mils. R731 1 2 0_0402_5%
GND-VCC pair + one larger cap on the NGFF_WIFI_PWR_EN 7,17
RP15

1
supply. R697 1 @ 2 0_0402_5% EC_SMB_CLK 1 4
INT_ACCEL2 18
R331 EC_SMB_DAT 2 3
10K_0402_5%
2 1 H4 M5 VOL_MUTE PWR_LED# --> If system enters S3 state, 4.7K_0404_4P2R_5%
6,7 H_RCIN_N SDM10U45LP-7_DFN1006-2-2 D21 G2 KBRST#/GPB6 PWM0/GPA0 N5 please use external 32K clock source.
6,7,17 INT_SERIRQ SERIRQ/GPM6 PWM1/GPA1 PWR_LED_N 24

2
H1 M6 WIN8_BUTTON_INT_N R330 1 2 10K_0402_5%
5,17 LPC_FRAME_N LFRAME#/GPM5 PWM2/GPA2 KBLED_PWR_EN_EC 23
WRST# MIN 10us H2 N6 PM_BATLOW_N LID_PAD_N R329 2 1 100K_0402_5%
5,17 LPC_AD3 LAD3/GPM3 PWM3/GPA3
J1 PWM K6 EC_PWM_BKLT 16 test1 R576 1 2 10K_0402_5%
5,17 LPC_AD2 LAD2/GPM2 PWM4/GPA4
1 J2 J6
5,17 LPC_AD1 LAD1/GPM1 PWM5/GPA5 EC_LCD_BL_EN 16
C357 K1 M7
5,17 LPC_AD0 LAD0/GPM0 PWM6/SSCK/GPA6 CODEC_PD_N 19
K2 LPC K7 H_PROCHOT
1U_0402_10V6K 6 CLK_PCI_LPC L1 LPCCLK/GPM4 PWM7/RIG1#/GPA7 C2 R558 1 2 0_0402_5%
WRST_N
2 WRST# TMRI0/GPC4 PCIE_WAKE_N 6,17
2 1 L2 E1 R685 1 @ 2 0_0402_5%
5 KBSMI_N SDM10U45LP-7_DFN1006-2-2 ECSMI#/GPD4 TMRI1/GPC6 MBAT_PRES_N 17 I2C0_SDA 7
2 1D19 M2 R686 1 @ 2 0_0402_5% +3VALW
6 PCH_PWRBTN_N PWUREQ#/BBO/SMCLK2ALT/GPC7 I2C0_SCL 7
SDM10U45LP-7_DFN1006-2-2 D22 M1 G10
LPCPD#/GPE6 ADC0/GPI0 SUS_PWR_ACK_R 5,6
R328 1 2
0_0402_5% M4 G13
6,17 PLT_RST_N LPCRST#/GPD2 ADC1/GPI1 AC_IOT 29
2 1 N4 G12 R557 1 2 0_0402_5%
7 SCI_N SDM10U45LP-7_DFN1006-2-2 ECSCI#/GPD3 ADC2/GPI2 CPU_IMON 32
D20 F1 ADC F9 NOVO_BTN_N R334 1 2 10K_0402_5%
GA20/GPB5 ADC3/GPI3 TEMP_ALERT_N 22
F13 R136 1 2
6,17 SUS_STAT_N
R333 1 2 0_0402_5%
7 WALKPORT_EN_D IT8586VG/AX ADC4/GPI4
ADC5/DCD1#/GPI5
F10
F12
R90 1 2 0_0402_5%
SUSC_N 6
0_0402_5% 2
ADAPTER_ID 29
NBSWON_N R326 1 2 10K_0402_5%

TESTPAD_16 TPF31
17 MX0
J12
KSI0/STB#
VFBGA128 ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7
E13 SLP_SUS_N
SUSB_N 6
6

1
C26
0.01U_0201_10V6K
AUXON R238 2 1 100K_0402_5%

J13 D12
17 MX1 KSI1/AFD# DAC2/TACH0B/GPJ2 VOLUME_UP_N 17
J9 C13 EC_SMC_WAKE_SCI_N 1 2
17 MX2 KSI2/INIT# DAC3/TACH1B/GPJ3 VOLUME_DOWN_N 17 SMC_WAKE_SCI_N 7
H12 DAC B13 @ D5
17 MX3 H9 KSI3/SLIN# DAC4/DCD0#/GPJ4 C12 AC_PRESENT MBATLED_ORANGE_N 24 SDM10U45LP-7_DFN1006-2-2
17 MX4 H10 KSI4 DAC5/RIG0#/GPJ5
17 MX5 H13 KSI5 A11 PS2_CLK0 AC_PRESENT 1 2
17 MX6 KSI6 PS2CLK0/TMB0/CEC/GPF0 PS2_CLK0 23 AC_PRESENT_R 6
G9 B11 PS2_DAT0 D3
C 17 MX7 M8 KSI7 PS2DAT0/TMB1/GPF1 A10 PS2_DAT0 23 SDM10U45LP-7_DFN1006-2-2 C
17 MY0 J7 KSO0/PD0 GPF2 B10 EC_SMB_CLK 16,17,29 PM_BATLOW_N 1 2
17 MY1 KSO1/PD1 Int. K/B PS2 GPF3 PM_BATLOW_N_R 6
N9 D9 EC_SMB_DAT 16,17,29 @ D4
17 MY2 M9 KSO2/PD2 Matrix PS2CLK2/GPF4 B9 R102 1 2 0_0402_5%
THERM_SENSOR_PWR_EN 22
SDM10U45LP-7_DFN1006-2-2
17 MY3 KSO3/PD3 PS2DAT2/GPF5 ADAPTER_ID_ON_N 29
K8
17 MY4 J8 KSO4/PD4 A9
17 MY5 KSO5/PD5 EXTERNAL SERIAL FLASH GPH3/ID3 CLT1 17
N10 B8
17 MY6 KSO6/PD6 GPH4/ID4 FAN_PWR_EN 22
M10 A8
17 MY7 KSO7/PD7 GPH5/ID5 PM_SLP_S0_N 6,7,17
N11 B7
17 MY8 KSO8/ACK# GPH6/ID6 CLT3 17
K9
17 MY9 N12 KSO9/BUSY A7 R152 1 2 0_0402_5%
17 MY10 KSO10/PE NC PCH_SCE0_N 5
N13 B6 R155 1 2 0_0402_5% PS2_DAT0 R597 1 @ 2 10K_0402_5%
17 MY11 KSO11/ERR# NC PCH_SI 5
M13 SPI Flash ROM A6 R156 1 2 0_0402_5% test1 R604 1 @ 2 10K_0402_5%
17 MY12 KSO12/SLCT NC PCH_SO 5
1 2 0_0402_5% L12 B5 R157 1 2 0_0402_5%
16,22,25,30 EDP_VDD_EN_R 17 MY13 KSO13 NC PCH_SCK 5
R362 L13
1 2 0_0402_5% 17 MY14 K12 KSO14
16 EC_EDP_VDD_EN 17 MY15 KSO15
R359 K13 A4 AC_IN_N R348 1 @ 2 AC_IN
16 INT_ACCEL1_EC KSO16/SMOSI/GPC3 AC_IN#
J10 UART A3 0_0402_5%
17 BT_OFF_N KSO17/SMISO/GPC5 LID_SW# MXLID_N 16
TPF26 TESTPAD_16
(For PLL Power)
24 NBSWON_N 1 @ 2 0_0402_5% B4 A13 0_0402_5%1 2 R87 +3V
PWRSW# EGAD/GPE1 PM_RSMRST_N 6
25,27 AUXON R357 A2 SM Bus A12 0_0402_5%1 2 R316 AUXON
B3 XLP_OUT EGCS#/GPE2 B12 0_0402_5%1 2 R315
5 EC_SMB_CLK1 SMCLK1/GPC1 EGCLK/GPE3 MAINON 17,25,26,28,30
TESTPAD_16 TPF30 B2 0_0402_5%1 @ 2 R583 ROTATION_LOCK_N R344 1 2 100K_0402_5%
5 EC_SMB_DAT1 SMDAT1/GPC2 EC_SENSOR_INT_N 7
R11 1 2 43_0402_5% B1 GPIO D13 0_0402_5%1 2 R579 TPF28 TESTPAD_16
3 PECI_EC SMCLK2/PECI/GPF6 GPJ1 PCH_SLP_WLAN_N 6
C1 E7 test1
6 PCH_SUSACK_N R356 1 2 0_0402_5% E8 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 E6
7,23,25,28 SUSON CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE1#/GPG0 USB_ILIM_SET 17
D7 D6 EC_SMC_WAKE_SCI_N
8,26 ALL_SYS_PWRGD CTX1/SOUT1/SMDAT3/GPH2/ID2 DSR0#/GPG6 A5 0_0402_5%1 2 R107
+3VALW DTR1#/SBUSY/GPG1/ID7 D1 SYS_PWROK 6
CRX0/GPC0 D2 MBATLED_WHITE_N 24
A1 CTX0/TMA0/GPB2 N1 PM_PCH_PWROK 6 NOVO_BTN_N 24 +3V
E2 VSTBY0 RI1#/GPD0 N3
17 CAP_LED_N GPE4 RI2#/GPD1 LID_PAD_N 17
2 1 WAKE UP E12 0_0402_5%1 2 R363
TACH2/GPJ0 SYS_SHDN_N 22
C17 C347 1 2 0_0402_5% M12
16 PSR_BL_EN TACH1A/TMA1/GPD7 EC_PSR 16
R360 M11 VOLUME_UP_N R338 1 2 10K_0402_5%
TACH0A/GPD6
0.1u_0201_10V6K

N7 M3
2.2U_0402_6.3V6M

1 2 17 WLAN_OFF_N GINT/CTS0#/GPD5 L80LLAT/GPE7

N8 GPIO N2 VOLUME_DOWN_N R339 1 2 10K_0402_5%
17 ROTATION_LOCK_N RTS1#/GPE5 L80HLAT/BAO/GPE0
D8 0_0402_5%1 2 R341
6,17 PM_CLKRUN_N CLKRUN#/GPH0/ID0 1.35VSUS_PWRGD 26,28
WIN8_BUTTON_INT_N 16
For factory EC flash G1
DCR 16
B F2 CK32KE/GPJ7 B
CK32K/GPJ6 Clock
EC_SMB_CLK1 TP58 TESTPAD 32.768KHZ_9PF_CM8V-T1A 0_0402_5%1 @ 2 R350 LCD_BL_EN 2,16
EC_SMB_DAT1 TP60 TESTPAD Y4
1

WRST_N TP64 TESTPAD @

MX6 TP65 TESTPAD 1 2
MX7 TP66 TESTPAD 1 1 10K_0402_5%
@ @ R343

AVSS
TP67 TESTPAD
VSS

VSS
VSS
VSS
VSS
VSS
TP71 TESTPAD C361 C360
C358
2

TP72 TESTPAD 10P_0402_50V8J 10P_0402_50V8J

2 2 ALL_SYS_PWRGD 2 1 0.1u_0201_10V6K
E5

H5
F4
F5
G4
G5

E10
CLK_PCI_LPC R358 2 1 1 2
33_0402_5%
C359 10P_0201_25V8G

J4
1 2
EC_AGND +3VDX_SENSORHUB
JUMPER +3VAUX_EC
+3V EC_AGND
EC_SMB_CLK_SEN 16,18
@
U33
1
U81
NC1 Vcc
6 Note 1 : Since all GPIO belong to VSTBY power domain, and 1
VCCA VCCB
8 @ +3VDX_SENSORHUB

H_PROCHOT 2
A Y
4
H_PROCHOT_N 3,29,32
there are some special considerations below: EC_SMB_CLK 2
A0 B0
7 1
2
RP16
4
3
(1) If it is output to external VCC derived power domain
1

5 3 2 EC_SMB_DAT 3 6
NC2 GND A1 B1 10K_0404_4P2R_5%
R367
100K_0402_5%
74AUP1G06GF_SOT891-6_1X1 C367 circuit, this signal should be isolated by a diode such as 4
GND OE
5 +3VAUX_EC
47P_0201_25V8
1 KBRST# and GA20. EC_SMB_DAT_SEN 16,18
2

1
+3VALW @
(2) If it is input from external VCC derived power domain FXMA2102UMX_U-MLP8_1P2X1P4
R346
100K_0402_5%

U83
circuit, this external circuit must consider not to float
the GPIO input.

2
1 6
A 2 NC1 Vcc 5 A
+3V_AUDIO 29 AC_IN A NC2 4
3 AC_IN_N
GND Y
74AUP1G04GF_SOT891-6_1X1 Note 2 :
1
@ U82
NC1 Vcc 5
6 (1) Each input pin should be driven or pulled. LENOVO.CRDN
VOL_MUTE 2 Title
3 A NC2 4
GND Y VOL_MUTE_N 19 (2) Each output-drain output pin should be pulled. EC/BIOS
74AUP1G04GF_SOT891-6_1X1 Size Document Number
Custom Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 20 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

TI@
R105 2 1 1M_0402_5%

+3VDX_SENSORHUB

4
Y8 TI@ +3V_MCU_TI +3V_MCU_A_TI
TI_XTAL24_IN 1 3 TI_XTAL24_OUT TI@
L50 1 2 R596 1 TI@ 2 0_0402_5%
24MHZ_6PF_XRCGB24M000F3M00R0 BLM15BD221SN1D_2P

2
1 2 TI@ 2 TI@ 2 TI@ 1 2 TI@

1
TI@ C31 C32 TI@ TI@ C632 C625 C346 TI@ C629
6P_0402_50V8D 6P_0402_50V8D C626 C623

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
2

2
2 1 1 1 2 1

10U_0402_6.3V6M

10U_0402_6.3V6M
D D
R600 1 TI@ 2 0_0402_5%

Close to MCU
AGND_MCU

U77 TI@

C1 E8
+3V_MCU_A_TI D2 P6.4/CB4/A4 P4.0/PM_UCB1STE/PM_UCA1CLK E7
D1 P6.5/CB5/A5 P4.1/PM_UCB1SIMO/PM_UCB1SDA D9
D3 P6.6/CB6/A6 P4.2/PM_UCB1SOMI/PM_UCB1SCL D8
P6.7/CB7/A7 P4.3/PM_UCB1CLK/PM_UCA1STE D7
E1 P4.4/PM_UCA1TXD/PM_UCA1SIMO C9
E2 P5.0/A8/VREF+/VeREF+ P4.5/PM_UCA1RXD/PM_UCA1SOMI C8
P5.1/A9/VREF-/VeREF- P4.6/PM_NONE C7
F2 P4.7/PM_NONE +3V_MCU_TI
G2 AVCC1 F9
AGND_MCU AVSS1 DVSS2 E9
F1 DVCC2 B8
+3V_MCU_TI G1 P5.4/XIN VSSU1 B9
P5.5/XOUT VSSU2 RP13
H1 A9 4 1
J1 DVCC1 PU.0/DP A8 3 2 USB_PP5 7,18
DVSS1 PU.1/DM USB_PN5 7,18
J2
VCORE B7 PUR_MCU 0_0404_4P2R_5%
2 PUR
H2 A7 TI@
TI@
C649
16 ALS_INT_TI_N
H3 P1.0/TA0CLK/ACLK VBUS A6
VBUS_MCU
VUSB_MCU
+3V_MCU_TI
GSENSOR
J3 P1.1/TA0.0 VUSB SLAVE I2C ADDRESS:0001111
0.47U_0402_6.3V6K P1.2/TA0.1
1 G4 B6 V18_MCU
H4 P1.3/TA0.2 V18
PANEL_ACC_INT1 R622 2 TI@ 1 0_0402_5% J4 P1.4/TA0.3 A5
G5 P1.5/TA0.4 AVSS2
C C
R2251 TI@ 210K_0402_5% H5 P1.6/TA1CLK/CBOUT B5 TI_XTAL24_IN U25 TI@
+3V_MCU_TI P1.7/TA1.0 P5.2/XT2IN B4 TI_XTAL24_OUT
J5 P5.3/XT2OUT 1 10 MCU_I2C_SDA_OUT
16 INT_MPU6050_GYRO G6 P2.0/TA1.1 A4 2 VDD_IO SDA 9
TEST_5528_TI 2 2 MCU_I2C_SCL_OUT
16 INT_COMPASS P2.1/TA1.2 TEST/SBWTCK DNC1 SCL
J6 TI@ C631 TI@ C633 3 8
H6 P2.2/TA2CLK/SMCLK C5 TDO 4 DNC2 DNC4 7 PANEL_ACC_INT1
J7 P2.3/TA2.0 PJ.0/TDO C4 5 GND INT 6

0.1u_0201_10V6K

0.1u_0201_10V6K
TDI
J8 P2.4/TA2.1 PJ.1/TDI/TCLK A3 TMS 1 1 VDD DNC3
J9 P2.5/TA2.2 PJ.2/TMS B3 TCK KXTI9-1001_LGA10_3X3
P2.6/RTCCLK/DMAE0 PJ.3/TCK
H7 A2 0_0402_5% 1 @ 2 R620 RST_SENSOR_HUB_N 7
MCU_I2C_SDA_OUT R715 1 TI@ 20_0402_5% H8 P2.7/UCB0STE/UCA0CLK RST#/NMI/SBWTDIO
18 MCU_I2C_SDA_OUT P3.0/UCB0SIMO/UCB0SDA
18 MCU_I2C_SCL_OUT MCU_I2C_SCL_OUT R716 1 TI@ 20_0402_5% H9 A1
G8 P3.1/UCB0SOMI/UCB0SCL P6.0/CB0/A0 B2 47K_0402_5% 2 TI@ 1 R349
P3.2/UCB0CLK/UCA0STE P6.1/CB1/A1 +3V_MCU_TI
TESTPAD TP73 G9 B1 2
Top Side G7 P3.3/UCA0TXD/UCA0SIMO P6.2/CB2/A2 C2
TESTPAD TP74 P3.4/UCA0RXD/UCA0SOMI P6.3/CB3/A3 TI@ C651
2200P_0402_50V7K
C6 E6 1
D4 Reserved1 Reserved8 F3
D5 Reserved2 Reserved9 F4
D6 Reserved3 Reserved10 F5
E3 Reserved4 Reserved11 F6
E4 Reserved5 Reserved12 F7
E5 Reserved6 Reserved13 F8
Reserved7 Reserved14 G3
Reserved15

MSP430F5528IZQE_BGA80
+3V_MCU_TI +5V
2

TI@
B B
R711 R712 USB_PP5
R713
@ 0_0402_5% 0_0402_5%
2 @ 1 PUR_MCU R621 1 TI@ 2
7 PUR_PCH_TRIG 1.4K_0402_1%
1

1
V18_MCU VUSB_MCU VBUS_MCU
0_0402_5% R151 TI@
2
0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K
1

0.1u_0201_10V6K

TI@
C227

C228

C229

C634

1M_0402_5%
TI@ TI@ TI@
2

2
1

MCU JTAG
+3V_MCU_TI Top Side

TP55 TESTPAD TCK TP50 TESTPAD

TP37 TESTPAD TMS TP45 TESTPAD
TEST_5528_TI TP38 TESTPAD TDI TP44 TESTPAD
RST_SENSOR_HUB_N TP56 TESTPAD TDO TP43 TESTPAD

A A

LENOVO.CRDN
Title
SENSOR (TI)
Size Document Number
C Rev V1.0
Kona
Date: Friday, August 09, 2013 Sheet 21 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

D D

TP61 TESTPAD

TESTPAD TP20

TESTPAD TP14 TP57 TESTPAD

TESTPAD TP3

TESTPAD TP4

+3VDX_THERM_SENSOR
+3VAUX_EC +3VDX_THERM_SENSOR +3VDX_THERM_SENSOR +3VDX_THERM_SENSOR

+3VDX_THERM_SENSOR
U30 TPF36 TESTPAD_16 +5VDX_FAN
1

21 L56
1 Thermal 20
2 DN1/VIN1 DP2/VREF_T2
1
1

1
R381 R382 C381 1 2 BLM15PX121SN1D_2P

4
3

2
100K_0402_1% 100K_0402_1% 2 19 R375 2 1
R379 @ @ R378 0.1u_0201_10V6K DP1/VREF_T1 DN2/VIN2 RP18 R176 C382 C383
C C
2

100K_0402_1% 100K_0402_1% 1 3 18 100K_0402_1%

10K_0404_4P2R_5%
GND DP3/DN4/VREF_T3 10K_0402_5%
0.1u_0201_10V6K 4.7U_0402_6.3V6M
2
2

2
4 17 1 2
VDD DN3/DP4/VIN3

1
2

1
5 16
20 TEMP_ALERT_N ALERT# SHDN_SEL
TESTPAD TP46 6 15
CLK_IN/GPIO1 TRIP_SET/VIN4
7 14
20 SYS_SHDN_N SYS_SHDN# NC JP31
8 13 PWM1_TML 1 5
20 EC_SMB_DAT_DEV SMDATA PWM1 1 GND
PWM1_TML_FAN 2
9 12 TACH1_TML 3 2
20 EC_SMB_CLK_DEV SMCLK TACH1 4 3 6
+5V_FAN1
PWM2_TML 10 11 TACH2_TML 4 GND
PWM2/GPIO3 TACH2/GPIO2

2
@ TPF37 TESTPAD_16 ACES_50208-00401-001
R376 TPF38 TESTPAD_16
48.7_0402_1%
EMC2104-BP_QFN20_4X4
JP21

1
1 5
PWM2_TML 2 1 GND
TACH2_TML 3 2
+5V_FAN2 4 3 6
4 GND

TPF8 TESTPAD_16 ACES_50208-00401-001

TPF9 TESTPAD_16

TPF7 TESTPAD_16
+3V
+3VDX_THERM_SENSOR +5VDX_FAN
U65 +3VDX_THERM_SENSOR L57

A2 A1 R493 1 2 0_0402_5% 1 2 BLM15PX121SN1D_2P

VIN VOUT
2 2 1
C540 C386 C388
B B

2
0.1u_0201_10V6K R173 0.1u_0201_10V6K 4.7U_0402_6.3V6M
R492 1 2 0_0402_5% B2 B1 1 1 2
20 THERM_SENSOR_PWR_EN ON GND 10K_0402_5%
U84

1
1 6
TPS22908YZTR PWM1_TML 2 NC1 Vcc 5
3 A NC2 4 PWM1_TML_FAN
GND Y
74AUP1G04GF_SOT891-6_1X1

+5V

+5VDX_FAN
U66

A2 A1
VIN VOUT
2
C542

0.1u_0201_10V6K
R495 1 20_0402_5% B2 B1 1
20 FAN_PWR_EN ON GND

R496 1 @ 20_0402_5%
16,20,25,30 EDP_VDD_EN_R
TPS22913CYZVR
A A

LENOVO.CRDN
Title
Thermal Sensor
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 22 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

+3VDX_TCH_PAD
TESTPAD_16 TPF43
TESTPAD_16 TPF44
TESTPAD_16 TPF45

2
L47
BLM15BD221SN1D_2P

JP8

1
6 8
D
5 6 G2 7 D
1 2 20 PS2_CLK0 5 G1
C384 C385 4
20 PS2_DAT0 4
3
2 3

4.7U_0402_6.3V6M
0.1u_0201_10V6K
2 1 5 PCH_SMB_CLK 2
1
5 PCH_SMB_DATA 1

ACES_50505-00641-001

+3V
+3VDX_TCH_PAD

@
R478 1 2 0_0402_5%

+3V
+3VDX_TCH_PAD
U57

A2 A1 R476 1 2
VIN VOUT 0_0402_5% 2
C535

0.1u_0201_10V6K
R477 1 2 0_0402_5% B2 B1 1
7 TOUCHPAD_EN ON GND

R479 1 @ 2 0_0402_5%
7,20,25,28 SUSON
TPS22908YZTR
C C

+5V +5VDX_LED

L60 @
1 2

BLM15PX121SN1D_2P

+5V
+5VDX_LED
B U85 B

L58
A2 A1 1 2
VIN VOUT
BLM15PX121SN1D_2P
+5VDX_LED

R482 1 @ 2 0_0402_5% B2 B1 TPF17 TESTPAD_16

7 KBLED_PWR_EN ON GND

R483 1 2 0_0402_5% JP24

20,23 KBLED_PWR_EN_EC 1 5
TPS22913CYZVR KB_BL_GND 2 1 G1
3 2
4 3 6
KB_BL_GND 4 G2
ACES_50506-00401-001
R485 1 2 0_0402_5%

@ 6 @ 3
PQ43A PQ43B

R484 1 @ 2 2 5
20,23 KBLED_PWR_EN_EC
0_0402_5%
AO5804EL_SC89-6 AO5804EL_SC89-6
1 4

A A

LENOVO.CRDN
Title
TP/SWITCH/Thermal
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 23 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

TPF10 TESTPAD_16
D D
TPF12 TESTPAD_16
TPF13 TESTPAD_16
TPF14 TESTPAD_16
TPF15 TESTPAD_16

JP22
NBSWON_N 1
20 NBSWON_N 1
2
+3VAUX 2
MBATLED_ORANGE_N 3
20 MBATLED_ORANGE_N MBATLED_WHITE_N 4 3
20 MBATLED_WHITE_N NOVO_BTN_N 5 4
20 NOVO_BTN_N 6 5
7 6 9
+3VAUX 7 GND1
PWR_LED_N 8 10
20 PWR_LED_N 8 GND2

ACES_50505-00801-001

C C

B B

A A

LENOVO.CRDN
Title
PWR/LED
Size Document Number
C Rev V1.0
Kona
Date: Tuesday, August 06, 2013 Sheet 24 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
 5 4 3 2 1

VIN

+5VAUX

D D

PU12

0.1u_0201_10V6K

0.1u_0201_10V6K

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
1

1
PC5

PC13
PC292

PC305

PC306

PC351

PC365

PC366

PC367

PC368
PC192
1U_0402_10V6K D1 D3
VDD VDC

2
1
TESTPAD_16 TPF115
PR9074
200K_0402_5%

C2 D2
8,26 1.05VAUX_PWRGD PGD BST
1.05V_BST
+1.05 out put set V=1.06V

1
PR9098
PC188
PL8 PJ29 5A
0.22U_0402_10V6K

2
1 2 B2 B3 1.05V_LX 1 2
20,25,27 AUXON ONS LX1 +1.05VAUX
C3

0.1u_0201_10V6K
LX2 C4 PJ_43x79_6

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
0_0402_5% LX3

1
C1 B4 0.68UH_SPS-05BZ-R68M-M2_10A_20%

PC250
VREF LX4 TPF104 TESTPAD_16

PC203

PC204

PC205

PC206

PC207
1
@

2
PR9126 2 1 0_0402_5% PR9064 PR9099
17,20,26,28,30 MAINON 442K_0402_1% B1 A2 1 2

0.1u_0201_10V6K
VSET VFB

0.1u_0201_10V6K
1
0_0402_5%

PC277

2
1

PC251
J5 A1 A3
GNDA GND1

2
1 2 A4
GND2

2
@ D4
GND3

1
JUMPER
1.05V_GND PR9174
OZ8029_CSP16P-NH
200K_0402_1%

2
1.05V_GND

C C

1.05V_GND

+5VAUX +1.5V +5VAUX +0.68V

2

1
@ @
PR23 PR9217 PR25 PR9228
100K_0402_5% 22_0402_5% 100K_0402_5% 22_0402_5%
PR9150
1

2
MAINON 1 2
3
6 3 @ @ 6 PQ37B @
PQ34A PQ34B 0_0402_5% PQ37A

PR9125 @ 5
MAINON 2 5 1 2 2
3,28 DDR_VTT_PG_CTRL
0_0402_5% AO5804EL_SC89-6
AO5804EL_SC89-6 AO5804EL_SC89-6 AO5804EL_SC89-6 4
1 4 1

B B

+3VALW +5VAUX
+5VAUX +1.35VSUS
2

1
2

PR26 PR9223
PR24 PR9222 100K_0402_5% 22_0402_5%
100K_0402_5% 22_0402_5%
1

2
1

6 3
6 3 PQ39A PQ39B
PQ35A PQ35B

2 5
20,25,27 AUXON
2 5
7,20,23,28 SUSON
AO5804EL_SC89-6 AO5804EL_SC89-6
AO5804EL_SC89-6 AO5804EL_SC89-6 1 4
1 4

+3VAUX

V_BL_LED
2

+3VAUX
R159
U86 @ 10K_0402_5%
1

1 6 @
@ NC1 Vcc PR28
1

1 PR9101 2 2 4 @ 2.2K_0402_5%
16,20,22,30 EDP_VDD_EN_R A Y
A A
1

0_0402_5% 5 3 C345
NC2 GND
2

@ 0.1U_0402_25V6 6
74AUP1G06GF_SOT891-6_1X1 PQ41A
2

3 @
PQ41B
@ 2
@
1 PR9100 2 5
16 EDP_BL_DISCHARGE
AO5804EL_SC89-6
0_0402_5% 1
AO5804EL_SC89-6
4 Title
1D05V

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 25 of 34

5 4 3 2 1
 5 4 3 2 1

D D

+3V

PR9124
1D5VPWRGD 1 2
C C

6
0_0402_5% PU29

Vcc
2
+3V 5 A 4
1 NC Y ALL_SYS_PWRGD 8,20
B

Gnd

1
3
6
PR9118 PU25 74AUP1G08GF_SOT891-6_1X1 PR17
1 2 1M_0402_5%

Vcc
8,25 1.05VAUX_PWRGD 2
0_0402_5% 5 A 4
NC Y

2
1
B

Gnd
PR9123
VIN 1 2
VIN 20,28 1.35VSUS_PWRGD 74AUP1G08GF_SOT891-6_1X1

3
0_0402_5%
PU4

10 11

0.1u_0201_10V6K
AVIN PVIN1 12

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
PVIN2

1
+3V

PC254

PC309

PC348

PC371

PC372
1

+1.5V out put 1.496V/1A

2
1

PC194
PR9245 1U_0402_10V6K
2

+1.5V
200K_0402_5% 1
SW1 PL11 PJ33
2
SW2
2

1D5VPWRGD 4 3 1 2
PG SW3 TPF107 TESTPAD_16
2.2UH_SPS-04AEN2R2M-M1_3A_20% PJ_43x79_6

0.1u_0201_10V6K
1
PR9104

22U_0603_4V6M
1

1
1 2 13 14 1D5_FB

PC255
17,20,25,28,30 MAINON EN VOS PR9236

PC210
0.1u_0201_10V6K

0_0402_5% 261K_0402_1%

2
B B

2
1

5
PC279

FB
9
SS/TR
2

1
@
7 PR9218
FSW
1

PC340 8 15 300K_0402_1%
3300P_0201_16V7K DEF PGND1 16
PGND2
2
AGND
2

EP

PR9177
0_0402_5%
6
17
1D5_FB 1

TPS62130RGTR_QFN16_3X3

A A

Title
1D8VSUS/1D5V

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 26 of 34

5 4 3 2 1
 5 4 3 2 1

VIN

VIN
PU5

10 11

0.1u_0201_10V6K

0.1u_0201_10V6K
+3VAUX AVIN PVIN1 12

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
PVIN2

1
5VAUX out put 5.03V/3A

PC294

PC256

PC310

PC311

PC312

PC313

PC373

PC374

PC375

PC376
D D

2
1
PC195 +5VAUX
1U_0402_10V6K

2
PR9246 @
200K_0402_5% 1
SW1 2 PL2
PJ35
SW2

2
5VAUX_PGD 4 3 1 2 TPF96 TESTPAD_16
PG SW3
TPF94 TESTPAD_16

0.1u_0201_10V6K
PJ_43x79_6 TPF95 TESTPAD_16

953K_0402_1%

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
PR9107 2.2UH_PCMB051H-2R2MS_5A_20%

1
PC314

PC315

PC316

PC317

PC257
1 2 13 14 5VAUX_FB

PR9212
20,25 AUXON EN VOS

0.1u_0201_10V6K

2
VIN 0_0402_5%

2
1
5

PC280
PR9152 FB
1 2 9
SS/TR

1
@ @
0_0402_5% 7 PR9237
8 FSW 15 182K_0402_1%
DEF PGND1

1
PC341 16
PGND2

2
2

AGND
3300P_0201_16V7K
PR9178

EP
2
0_0402_5%

5VAUX_FB

6
17
1
TPS62130RGTR_QFN16_3X3

C C

VIN

VIN
PU6

10 11

0.1u_0201_10V6K

0.1u_0201_10V6K
+3VALW AVIN PVIN1 12

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
PVIN2

1
+3VALW out put 3.36V/3A

PC259

PC258

PC318

PC319

PC320

PC349

PC377

PC378
1

+3VALW

2
1

PC196
PR9093 1U_0402_10V6K
2

@
200K_0402_5% 1
SW1 2 PL3 PJ37
SW2
2

VIN 3VAUX_PWRGD 4 3 1 2
PG SW3 TPF87 TESTPAD_16
TPF86 TESTPAD_16

0.1u_0201_10V6K
PJ_43x79_6 TPF88 TESTPAD_16

953K_0402_1%

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
PR8 2.2UH_PCMB051H-2R2MS_5A_20%

1
PC321

PC322

PC323

PC324

PC260
1 2 13 14 3VAUX_FB

PR9213
EN VOS
0.1u_0201_10V6K

2
100K_0402_5%

2
B B
1

5
PC261

FB
9
SS/TR
2

1
7
FSW
1

PC342 8 15 PR9220
3300P_0201_16V7K DEF PGND1 16 300K_0402_1%
PGND2
2

AGND
2

2
PR9179
EP

0_0402_5%
3VAUX_FB

6
17
1

TPS62130RGTR_QFN16_3X3

+3VALW

PU28 +3VAUX
PJ41
PR9140
1 4 TPF91 TESTPAD_16
0.1u_0201_10V6K

AUXON 1 2 2 VDD S
ON PC232 TPF89 TESTPAD_16
1

PJ_43x79_6
PC296

TPF90 TESTPAD_16
A 5 2 1 A
0_0402_5% 3 CAP
+3VALW D
2

6 1000P_0201_25V7K
GND

SLG59M301VTR_FC-TDFN8-6_1P5X2

Title
5VAUX/3VAUX/3VALW

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 27 of 34

5 4 3 2 1
 5 4 3 2 1

VIN

+5VAUX
one more 0.1uF for EMC request

PU13

0.1u_0201_10V6K

0.1u_0201_10V6K

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
1

1
PC263

PC262

PC325

PC326

PC327

PC350

PC380

PC379
D D
PC197
1U_0402_10V6K D1 D3
TESTPAD_16 TPF116 VDD VDC

2
1
PR9247

200K_0402_5%
C2 D2
20,26 1.35VSUS_PWRGD PGD BST
1.2V_BST
+1.35VSUS out put set V=1.37V

1
PC189
PL9 5A PJ39
PR9112 0.22U_0402_10V6K

2
SUSON 1 2 B2 B3 1D2V_LX 1 2
ONS LX1 +1.35VSUS
C3
0_0402_5% LX2 C4 1@ 1 PJ_43x79_6 TPF106 TESTPAD_16

22U_0603_4V6M
0.1u_0201_10V6K

0.1u_0201_10V6K
LX3

1
C1 B4 0.68UH_SPS-05BZ-R68M-M2_10A_20%

PC264
330U_B2_2VM_R15M

330U_B2_2VM_R15M
VREF LX4
1
+ +

PC18

PC17
PC281

PC211
1

2
PR18 PR9113
2

383K_0402_1% B1 A2 1 2 1D2_FB 2 2
@ VSET VFB

0.1u_0201_10V6K
0_0402_5%

2
1
1.2V_GND

PC265
J10 A1 A3
1 2 GNDA GND1 A4
2 GND2 D4
GND3

1
JUMPER
PR9238
249K_0402_1% OZ8029_CSP16P-NH

1.2V_GND 2

1.2V_GND

C C

+1.35VSUS

+5VAUX 1
PU11 PC170

1 2

10U_0402_6.3V6M
VDDQSNS 2
10 VLDOIN
VIN
0.1u_0201_10V6K

+0.68V
PR9149 PJ40 1A
1

3 1A
PC266

1 2 VTT 5
17,20,25,26,30 MAINON VTTSNS
SDM10U45LP-7_DFN1006-2-2 1
2

@ @ PJ_43x79_6
0_0402_5% PD13
TESTPAD_16 TPF119 PC169
1 2
4 2

10U_0402_6.3V6M
PR9114 0_0402_5%
1 2 1 PR9115 2 7 PGND
3,25 DDR_VTT_PG_CTRL S3 +0.68VSUS
0_0402_5%
POWERPAD

1 PR9116 2 9 6
7,20,23,25 SUSON S5 VTTREF

1
8
0_0402_5% GND PC14
B B
1U_0402_10V6K
0.1u_0201_10V6K

2
11
2

PC187
PC282

0.1U_0402_25V6
1

@
@ G2986K21U_TDFN10_2X2

A A

Title
DDR1D2V/0D6V

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 28 of 34

5 4 3 2 1
 5 4 3 2 1

V_PATH_R
two more 0.1uF for EMC request
V_CHG

D
TESTPAD_16 TPF126
Top Side Top Side Bottom Side D
PR9234
TESTPAD_16 TPF35 ADAPTER_ID Bottom Side
1 2

10U_0805_25V6K

10U_0805_25V6K
AC adapter 20V 1

10U_1210_25V
0.02_1508_LE_1%

1
V_PATH
PC171 PC245 +

PC4

PC268

PC275
33U_D2_25VM_R60M

2
TPF98 TESTPAD_16 0.1U_0402_25V6
2
TPF97 TESTPAD_16

1
TPF16 TESTPAD_16 ADIN_1 PQ33
PQ4
ADIN FDMC6675BZ_MLP8-5 FDMC6675BZ_MLP8-5
PR9202 PR9204
VIN
PC161 and PC162 can place far from PL7
1 1 10_0402_5% 10_0402_5%
PF2 PL5 2 2
TPF101TESTPAD_16

2
2 1 1 2 3 5 5 3 1 1
PR9219 PC180 TPF100TESTPAD_16

5
PC233 PC235 TPF99 TESTPAD_16
JP23

2
1 2 1 2 + PC161 +

1000P_0201_25V7K
PQ1 PC162 PC181 PC182 PC183 PC184

1000P_0201_25V7K
7A_32V_TR-3216FF7-R

2
1 BCMS201209A8005ARDC01_2P FDMC7696_MLP8-5

2.2_0805_5%
1 PC167

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6
4

4
1

1
2 PR9195 2_0402_5%
2 0.1U_0402_25V6 PQ5

1
2 2
2

2
ADAPTER_ID 3 PC186 PC172 100K_0402_5% 1 2 @

PR9235
4 3 7 @ 47U_B2 47U_B2 FDMC6679AZ_MLP8-5
PC185
4 G2

2
5 6 0.1U_0402_25V6 V_PATH_R 0.047U_0402_25V7K
5 G1
1

1
0.1U_0402_25V6 0.1U_0402_25V6 1
PL7 PR9083

4
3
2
1
ACES_50278-00501-001 PC173 CHG_DH
6A 2

10U_0805_25V6K

2
PC174 CHG_PAHSE 1 2 1 2 BAT_IN 3 5
BAT

0.22U_0603_25V7K
1
PR9196 0.1U_0402_25V6

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
5
0.1U_0402_25V6 2.2UH_PCMB103F-2R2MK_16A_20% 0.01_1206_LE_0.5%

PC11
100K_0402_5%

1
PQ2 PC175
2

4
1
PR9117

PC3

PC246

PC247

PC248

PC249
1
2.2_0402_5%

2
FDMC0310AS_MLP8-5 0.1U_0402_25V6

CHG_PAHSE
2
2

1
1

1
PR9168

SCGATE
PR9232 PR113 10K_0402_5% PR9 PR9201
PR9146

4
3
2
1
10K_0402_5% 2.2_0402_5% 0_0402_5%
402K_0402_1% BGATE 2 1

1
2

2
0_0402_5%

1
ACDET SCGATE @

28

27

26

25

24

23

22
PC2

CHG_DL
1

1
ADIN_1 @ @ 1000P_0201_25V7K

BOOT
CSIN

PGND
CSIP

SGATE

UGATE

PHASE

2
PR9175 PC176 PC177

1
0.1U_0402_25V6 0.1U_0402_25V6

2
1
100K_0402_1% AGATE 1 21 PC199
PR10 AGATE LGATE +3V
PD1 PR9205 PC198 1U_0402_10V6K
2

2
2 1 1 2 CHG_VCC 2 20 4.7_0603_5% 1U_0402_10V6K CHRG_GND CHRG_GND
DCIN VDDP

2
2
1
SDM10U45LP-7_DFN1006-2-2 +3VALW ACDET 3 19 VDD_CHG PC179
10_0603_5% PC178 PR9173 ADET PU10 VDD
C 1 2 4 18 CHRG_GND CHRG_GND CHG_SENSE_P 1 2 C
VFSW CSOP

2
0.1U_0402_25V6 10K_0402_5% ISL9520-T_TQFN28_4X4
CHRG_GND PR9181 2 110K_0402_1% 5 17 CHG_SENSE_N 1U_0402_10V6K
ICOMP CSON
6 16 BGATE
CELL BGATE

2
+3V

1
PC343 CHG_COMP 7 15 BAT_IOUT PR9229
3300P_0201_16V7K VCOMP BMON
430K_0402_1%
@

AMON
2

VSMB

ACOK

8
29 PU9

RST#
SDA

SCL
AGND

VFB

VCC
U24

6
8

10

11

12

13

14
CHRG_GND 2
-

Vcc
IN-1 1 2
CHRG_GND BAT_IOUT 3 OUT1 A 4 2 1 H_PROCHOT_N
J11 IN+1 + 1 Y
3

GND
B

1
1 2 5 PQ36B PR9172
PC9 PR9252 PC10 PR9095 6 NC 0_0402_5%
JUMPER 1 2 1 2 CHG_FB 1 2 1 2 IN-2 - 7 PR9250
OUT2

3
AC_IOT 5 5
1 IN+2 +

1
1000P_0201_25V7K 100K_0402_1% 330P_0402_50V7K 74AUP1G32GF_SOT891-6_1X1 200K_0402_1%
3.01K_0402_1%

2
PC20

VEE
0.022U_0402_25V7K PR9249 AO5804EL_SC89-6

EP
CHRG_GND 20 AC_IOT 2 4
1

1
200K_0402_1% @

9
PC267 PC19
0.022U_0402_25V7K 1000P_0201_25V7K

2
2 +3VALW
PR9078
CHRG_GND
1 2 6
+3V
NCS2220AMUT1G_UDFN8_1P6X1P6 PQ36A
16,17,20 EC_SMB_DAT
169K_0402_1%

2
16,17,20 EC_SMB_CLK

1
PR9197 2
100K_0402_5%
PD14 PR9241
2 1 PR9169 2 1 0_0402_5% AO5804EL_SC89-6
+3VALW

1
200K_0402_1% 1
AC_IN 20

2
SDM10U45LP-7_DFN1006-2-2
+3VALW PR9170
ADIN_1
PD15 2 1 CHG_RST_N
+3VALW
VDD_CHG 2 1
10K_0402_5%
1

SDM10U45LP-7_DFN1006-2-2
PR9061 PR9062
0.1u_0201_10V6K

750_0603_1% 1M_0402_5% if AC input current>4.25A , pull low H_PROCHOT#

1

PC347

add pd14 , pd15,pc374 +3V

2

BAT VIN
B
if BAT input current>16.5A , pull low H_PROCHOT# B
2

+3V +3V
6

CHRG_GND

1
PR9243 PR9244

1
NTZD5110NT1G_SOT563-6 2 PR9240 PR9239

430K_0402_1%

430K_0402_1%
PQ3A 590K_0402_1% 590K_0402_1%

PR9225

PR9227
200K_0402_1% 200K_0402_1% PR9171 2 1 0_0402_5%
H_PROCHOT_N 3,20,32

2
3

8
PU8

2
@ @ 3

VCC
1

PQ28B
ADAPTER_ID 20 PR9097
1

5 2
ADAPTER_ID_ON_N 20 IN-1 - 1 5
1M_0402_5%

PD20
1

3 OUT1
UCLAMP3311T.TCT_SLP1006P2T2 IN+1 + 6
2

NTZD5110NT1G_SOT563-6 PQ28A
PQ3B AO5804EL_SC89-6
6 4
IN-2 -
4

7 2
OUT2
2

5
IN+2 +
2

255K_0402_1%

330K_0402_1%

VEE
0.1u_0201_10V6K
1

EP
430K_0402_1%

430K_0402_1%
1

PC295

PR9210

PR9211

PR9226

PR9224
AO5804EL_SC89-6

9
2

2
NCS2220AMUT1G_UDFN8_1P6X1P6

if BAT >7.4V cannot latch h-prochot#

if VIN<6.24V&BAT<7.4V latch h-prochot# low qucikly

A A

Title
NVDC charger

Size Document Number Rev

D Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 29 of 34

5 4 3 2 1
 5 4 3 2 1

+1.05VDX_MODPHY
@
PL56
1 2
+1.05VAUX
+5VAUX BLM15PX121SN1D_2P
+1.05VDX_MODPHY
PU17
TESTPAD_16 TPF121 PL55
PR9119
1 4 1 2
VDD S1 TPF129 TESTPAD_16
2 1 7 5 BLM15PX121SN1D_2P
7 MPHY_PWREN ON S2

1
1.8A
0_0402_5% PC270
2 0.1u_0201_10V6K
D1

2
3 6
+1.05VAUX D2 GND
2
C134 SLG59M1470VTR_FC-TDFN9_1P5X2
D D
100U_1206_6.3V6M
1

+5VAUX 2A
PU15 +5V
PL54
+5VAUX
PR9129
1 4 1 2

0.1u_0201_10V6K
PU16 +1.05V MAINON 2 1 2 VDD S BLM15PX121SN1D_2P
PJ42 ON PC236

PC299
PR9121
1 4 TPF103 TESTPAD_16 5 2 1 TPF110 TESTPAD_16
2 1 2 VDD S 0_0402_5% 3 CAP
17,20,25,26,28,30 MAINON ON PC234 +5VAUX D

2
PJ_43x79_6 4A GND
6 1000P_0201_25V7K
5 2 1

0.1u_0201_10V6K
0_0402_5% 3 CAP
+1.05VAUX D

1
6 1000P_0201_25V7K

PC271
GND
SLG59M301VTR_FC-TDFN8-6_1P5X2

2
SLG59M301VTR_FC-TDFN8-6_1P5X2

+3V +3VDX_SENSORHUB
+3V +3VDX_EDP PR9088 @
PR9081 @
1 2 0_0603_5%
+5V 1 2 0_0603_5%
+3VDX_SENSORHUB
TESTPAD_16 TPF120 +3VDx_EDP
PU20 PU26 PR9071
PR9073
PR9131 1 4 1 2 A2 A1 1 2 0_0603_5%
VDD S TPF21 TESTPAD_16 +3V VIN VOUT TPF22 TESTPAD_16
2 1 2 PC356 1 2 3300P_0201_16V7K
16,20,22,25 EDP_VDD_EN_R

0.1u_0201_10V6K

0.1u_0201_10V6K
ON
0_0402_5% 0_0603_5% TESTPAD_16 TPF123 0.5A

1
5 2 1PC238 PR9133

PC345

PC283
3 CAP 1000P_0201_25V7K 0_0402_5%
C +3V C
D 6 2 1 B2 B1
GND 7 SENSHUB_PWR_EN ON GND

2
SLG59M301VTR_FC-TDFN8-6_1P5X2
TPS22908YZTR
+3V +3VDX_CAMERA_FPS
PR9082 @
3A +3V
1 2 0_0603_5% +5VAUX
+3V
+3VDX_CAMERA_FPS PU27
PU21 PL53
PR9075
PR9142 1 4 1 2
VDD S TPF102 TESTPAD_16
A2 A1 1 2 0_0603_5% 1 2 2 BLM15PX121SN1D_2P
17,20,25,26,28,30 MAINON PC242

0.1u_0201_10V6K
VIN VOUT ON

0.1u_0201_10V6K

1
0.8A 5 2 1

PC289
0_0402_5% CAP

1
3

PC276
PR9132 +3VAUX D 6 1000P_0201_25V7K
GND

2
2 1 B2 B1
7 CAM_PWR_EN ON GND

2
0_0402_5%

SLG59M301VTR_FC-TDFN8-6_1P5X2
TPS22908YZTR

+5V +5V_AUD
+3V +3VDX_TOUCHPANEL PR9087 @
PR9084 @
1 2 0_0603_5%
1 2 0_0603_5% +3VDX_TOUCHPANEL +5V +5V_AUD
PU23 PR9076 PU1

+3V A2 A1 1 2 0_0603_5% TPF23 TESTPAD_16 A2 A1 TPF111 TESTPAD_16

0.1u_0201_10V6K
VIN VOUT VIN VOUT
0.1u_0201_10V6K

1
0.8A

PC273
B TESTPAD_16 TPF124 B
1

1.5A
PC298

PR9145 PR9128

2
2 1 B2 B1 2 1 B2 B1
7 TOUCHPANEL_EN ON GND 7 PCH_AUDIO_PWR ON GND
2

0_0402_5% 0_0402_5% GND

TPS22908YZTR TPS22913CYZVR GND

+3V +3V_AUD
@
PR9086
+1.5V +1.5V_AUD 2 1
@ 0_0402_5% +3V_AUD
PR9085
2 1
0_0402_5% PU14

PU19 +1.5V_AUD A2 A1
+3V VIN VOUT

+1.5V
A2 A1
TPF108 TESTPAD_16 0.2A
0.1u_0201_10V6K

0.1u_0201_10V6K
VIN VOUT
TESTPAD_16 TPF122 PR9127
1

1
0.5A
PC272

PC274
PCH_AUDIO_PWR 2 1 B2 B1
PR9130 ON GND
2

2
PCH_AUDIO_PWR 2 1 B2 B1
ON GND 0_0402_5%

0_0402_5% TPS22908YZTR GND

GND GND
TPS22908YZTR
GND

A A

Title
SWITCH POWER

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 30 of 34

5 4 3 2 1
 5 4 3 2 1

VIN

VIN
PU7

10 11

0.1u_0201_10V6K
AVIN PVIN1 12

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
PVIN2

1
V5Dx_WALKPORT out put 5.08V/3A

PC284

PC328

PC329

PC330

PC331

PC381

PC382
D D

2
PC200 +5VDx_WALKPORT
1U_0402_10V6K

2
1
PR9200 SW1 2 PL4 PJ43
1 2 5VWAP_PWRGD 4 SW2 3 1 2
PG SW3 TPF130 TESTPAD_16

0.1u_0201_10V6K
PJ_43x79_6

953K_0402_1%

10U_0603_10V

10U_0603_10V

10U_0603_10V

10U_0603_10V
PR9135 100K_0402_5% 2.2UH_PCMB051H-2R2MS_5A_20%

1
PC332

PC333

PC334

PC335

PC285
2 1 @ 13 14 5VWKP_FB

PR9215
7 WALKPORT_EN

0.1u_0201_10V6K
EN VOS

2
0_0402_5%

2
1
5

PC300
FB
9
SS/TR

1
@ PR9221
7
FSW

1
PC344 8 15 178K_0402_1%
3300P_0201_16V7K DEF PGND1 16
PGND2

2
AGND
2

EP
PR9180
0_0402_5%

6
17
5VWKP_FB
2
TPS62130RGTR_QFN16_3X3

C C

B B

A A

Title
V5Dx_WALKPORT/V3.3Dx_SSD

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 31 of 34

5 4 3 2 1
 5 4 3 2 1

20 CPU_IMON

3,20,29 H_PROCHOT_N

8 VR_SVID_ALERT_N

2
PR12
8 VR_SVID_DATA
PC230
93.1K_0402_1% 1000P_0201_25V7K VIN
8 VR_SVID_CLK

1
2
1

1
PR9096 +5V
D
75_0402_1% PR13 PR14
place PC159 at H=4mm area D

1
@
+1.05V_VCCST 130_0402_1% PR9137 VR12.6_GND

2
54.9_0402_1%

2
PD16 10_0603_5%

2
@
2 1
1 1 1

0.1u_0201_10V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.1u_0201_10V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
220U_D_10VM_R25M
1

1
SDM10U45LP-7_DFN1006-2-2

1
PC201 PC202 + + PC158+ PC160

PC286

PC287
1U_0402_10V6K 1U_0402_10V6K

PC336

PC337

PC159

PC338

PC339

PC352

PC353

PC354

PC355
2

2
2 2 2
47U_B2 47U_B2
VR12.6_GND VR12.6_GND

18

25

27

26

20

10

13
PR9139

3
PU2
1 2
colse to VIN1 colse to VIN2

ALERT#

VRHOT#

VIN1

VIN2
VDD

IMON
VDDP

SCLK

SDA
8 H_VR_ENABLE
PR9209 PC113
0_0402_5% PR2
1 2 2 1
29 17 1 2
VRON BOOT2 2_0402_5%
470P_0201_25V7K

1
22 4.7_0402_5% @ CPU_CORE
8 IMVP_VR_CPU_OK PGOOD TPF112 TESTPAD_16
12 PC190 @
PHASE2_1 14 0.22U_0402_10V6K
PHASE2_2

2
PHASE2_3
16
PL6
0.2UH_PDLE051ER20ME4R005-56_15A_20%
total MLCC is 20 pcs
37 1 2
PAD3_PHASE2
PR570

0.1u_0201_10V6K
1
ISEN2 1 2

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
1

1
PR9203

PC288
1
PR9192 1_0402_5%

PC216

PC217

PC218

PC219

PC220
10K_0402_1%
1

PR15
PR3

2
97.6K_0402_1% PC302

0.22U_0402_10V6K

ISUMN 2
@ 470P_0201_25V7K 32 6 1 2 3.65K_0402_1%
COMP BOOT1
1 2

C @ C

2
1
4.7_0402_5%
18P_0402_50V8J

PC303 7

ISUMP
PHASE1_1
1

470P_0201_25V7K

PC191
2

2
1

@ 9 0.2UH_PDLE051ER20ME4R005-56_15A_20%
PC6

PHASE1_2 PL12
PC304 ISL95817HRZ-T_TQFN48-37_5X6 11
PHASE1_3
2

VR12.6_GND VR12.6_GND 1200P_0201_25V7K 36 1 2

PAD2_PHASE1
12

PR9253 PR574
PR9193

1
1 2 ISEN1 1 2

0.1u_0201_10V6K
1
16.9K_0402_1% PR9254

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
1

1
1_0402_5%
Change to 820pF 1.37K_0402_1% PR9214

PC290
PC231 10K_0402_1%
2

PR21 2_0402_5%

PC221

PC222

PC223

PC224

PC225
2 1 1 2 31
8 VCC_SENSE FB @

ISUMN 2

2
PR9206 3.65K_0402_1%

2
820P_0201_25V7K
1K_0402_1%

2
30 15
10 VSS_SENSE RTN PGND2

1
ISUMP
PC114

PAD1_GND1
1

470P_0201_25V7K

2
PR9194
PROG3

PROG2

ISUMN

ISUMP
ISEN1

ISEN2
8

GND1
GND2
GND3
PGND1
NTC

2 97.6K_0402_1%
@
2

PC346
24

23

21

33

34

35
4
19
28
0.01U_0201_10V6K place PR22 close to PL12
1
1

PC112
PR22 PR9208
470P_0201_25V7K
2

VR12.6_GND @ 1 2
1

VR12.6_GND PR20 2.61K_0402_1%

1

reserved a 0402 cap here , NS MITSB_TH03-3H103FD

PR9063 3.83K_0402_1% VR12.6_GND
PR9207 49.9K_0402_1% 1 PR16 2
2

64.9K_0402_1%
ISEN1

ISEN2

1 11K_0402_1%
2

2 PC7
B B
2

@ 0.047U_0402_25V7K
PR9233 @ PC8
PR9190 0.068U_0201_10V6K 2
PC301 PR19 1
J14 VR12.6_GND 27.4K_0402_1%

1
1 2 1 2 1 2
1

470K_0402NEW_3%_TH05-4K474HR PR9216
JUMPER 330P_0402_50V7K
649_0402_1% 22_0402_1%
PR5
VR12.6_GND @

2
1 2
VR12.6_GND
VR12.6_GND
PC16 1.02K_0402_1%

1 2

0.1u_0201_10V6K
1
0.22U_0603_25V7K

PC291
RROG2 PC12
49.9K for Vboot 1.7V
2

1 2
34K for Vboot 0 V
0.22U_0603_25V7K
RROG3 VR12.6_GND

64.9K for slew rate 53mV/us ,frquency 350/700KHz

A A

Title
VR12.6

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 32 of 34

5 4 3 2 1
 5 4 3 2 1

IT8586
EC

+3V/+5V
+3VAUX +1.35VSUS +1.5V/+1.05V
VCCRTC VIN +3VALW +5VAUX +0.68VSUS +V1.05_VCCST
+1.05VAUX DDR3_VTT
AC adapter VIN 3VALW/3A CPU_CORE
D D
ISL9519
SLG59M301V 3VAUX/3A
NVDC Charger TPS62130 Switch
S0 V V V V V V
PWM

V3.3Dx_SSD/3A S3 V V V V V X

SSD
TPS62130 S4/S5(AC) V V V V X X

PWM
S4/S5(DC)
V V V X X X
5VAUX/3A
G3
TPS62130 V X X X X X

PWM

2S2P
5V_WALKPORT/3A
BATTERY USB
TPS62130

PWM

+1.8VSUS/2A
TPS62130 SUSC# SUSB# +VALW +VAUX +VSUS +V
(SLP_S4) (SLP_S3)
PWM
C C

+1.5V/1A S0 V V V V V V

TPS62150

PWM S3 V X V V V X

+1.05VAUX/5A S4/S5(AC) X X V V X X

OZ8029 S4/S5(DC)
X X V X X X
PWM

G3
+1.2VSUS/5A X X X X X X

OZ8029

PWM

G2986 +0.6V/1A
LDO

CPU_CORE/32A
ISL95817

PWM
B B

A A

Title
Power Block Diagram

Size Document Number Rev

C Kona V1.0

Date: Tuesday, August 06, 2013 Sheet 33 of 34

5 4 3 2 1
 5 4 3 2 1

TESTPAD_16 TPF47 TESTPAD_16 TPF57 TESTPAD_16 TPF67 TESTPAD_16 TPF77

TESTPAD_16 TPF46 TESTPAD_16 TPF56 TESTPAD_16 TPF66 TESTPAD_16 TPF76
TESTPAD_16 TPF48 TESTPAD_16 TPF58 TESTPAD_16 TPF68 TESTPAD_16 TPF78
TESTPAD_16 TPF50 TESTPAD_16 TPF60 TESTPAD_16 TPF70 TESTPAD_16 TPF80
TESTPAD_16 TPF49 TESTPAD_16 TPF59 TESTPAD_16 TPF69 TESTPAD_16 TPF79
TESTPAD_16 TPF51 TESTPAD_16 TPF61 TESTPAD_16 TPF71 TESTPAD_16 TPF81
D TESTPAD_16 TPF53 TESTPAD_16 TPF63 TESTPAD_16 TPF73 TESTPAD_16 TPF83 D
TESTPAD_16 TPF52 TESTPAD_16 TPF62 TESTPAD_16 TPF72 TESTPAD_16 TPF82
TESTPAD_16 TPF54 TESTPAD_16 TPF64 TESTPAD_16 TPF74 TESTPAD_16 TPF84
TESTPAD_16 TPF55 TESTPAD_16 TPF65 TESTPAD_16 TPF75 TESTPAD_16 TPF85

Put these 20 test point to TOP Put these 20 test point to Bottom
H1 H2 H3 H4
HOLEA HOLEA HOLEA HOLEA

OVAL_Hole_22_55_SMD Hole_22_55_SMD_Half Hole_38_6_SMD Hole_22_55_SMD

1

1
C C

H5 H6 H7 H8
HOLEA HOLEA HOLEA HOLEA

Hole_38_55_70_SMD Hole_38_55_70_SMD Hole_38_55_70_SMD Hole_38_55_70_SMD

1

1
H9 H12 FD1 FD2 FD3 FD4 FD5 FD6
HOLEA HOLEA
B B

1
Hole_14_20_SMD Hole_22_SMD
1

H11
HOLEA LENOVO.CRDN
Title
OVAL_Hole_14_18_SMD Mounting Hole/EMI
1

Size Document Number

A Rev V1.0
Kona
A A
Date: Tuesday, August 06, 2013 Sheet 34 of 34
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1