Beruflich Dokumente
Kultur Dokumente
TECHNOLOGY
“POWER MANAGEMENT
THROUGH HEAD COUNT”
ASHLEY JOSE
SNADDE
N BRAGANZA
SUSHANT
CHAVAN
KELVIN
D’SOUZA
JASON
FERNANDES
PROJECT GUIDE-
MRS.MADHAVI PEDNEKAR
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DEPARTMENT OF ELECTRONICS AND
TELECOMMUNICATIONS
UNIVERSITY OF MUMBAI 2010-11
CERTIFICATE
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Department of Electronics and Telecommunication
Engineering
University of Mumbai
2010-2011
ACKNOWLEDGEMENT
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INDEX
SR. PG.
NO.
NO TOPIC
.
1 INTRODUCTION 5
2 PROGRAM FLOW CHART 6
3 BLOCK DIAGRAM 7
4 EXPLANATION OF BLOCK DIAGRAM 8
5 CIRCUIT DIAGRAM 9
6 COMPONENT LIST 10
7 SOFTWARE USED:PROTEAS 12
8 SNAP SHOTS OF SOLDERING AND
TESTING 14
9 TROUBLESHOOTING 18
10 APPLICATIONS 19
11 CONCLUSON 20
12 APPENDIX 21
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INTRODUCTION
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Microcontroller over discrete IC’s
In our project the reason we have chose to use a
microcontroller over the discrete is not only to help us in the
understanding of the device i.e. the microcontroller but also
it greatly simplifies the circuit in terms of the amount of
hardware used the great thing about microcontrollers is they
require a very little hardware for their own operation where
as the amount of connection that would go into the same
circuit if it were to be made of discrete devices would be
greatly larger hence by using the AT89C51 we have not only
reduced the work of connections but also this has been a
learning opportunity for us and has given us a chance to use
the classroom knowledge about the microcontroller into a
real world application.
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PROGRAM FLOW CHART
BLOCK DIAGRAM
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8
8
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EXPLANATION OF THE BLOCK DIAGAM
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CIRCUIT DIAGRAM
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COMPONENT LIST
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Lamp "L1" 240V
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SOFTWARE USED IN DESIGN: PROTEUS
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· Direct support for analogue component models in SPICE
format.
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SNAP SHOTS OF SOLDERING AND
TESTING OF THE PROJECT
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WHEN NO CARD IS PRESENT IN
BETWEEN THE PHOTO TRANSISTER
LED REMAINS OFF
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WHEN CARD IS PRESENT IN BETWEEN
THE PHOTO TRANSISTER
LED TURNS ON
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TROUBLE SHOOTING
• Then we connected the photo transistor in reverse bias and the light
began to glow.
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APPLICATIONS
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CONCLUSION
We have thus successfully developed a project which
manages power through head count. This project has
tremendous scope in the energy sector. With further
research and funding in this field it can be practically
implemented in our day to day lives thus saving electricity- a
valuable resource. With the smart use of new age power
devices coupled with the versatility of a microcontroller
based digital system the interface between the high power
and low power devices has been seamlessly achieved thus
through sheer innovation and brilliant design we hope we
can bring some respite to the never ending problem of
power shortage
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APPENDIX
AT89C51
Features
Description
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a highly-flexible and cost-effective solution to many embedded control
applications.
PDIP
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DM74LS47
General Description
Features
n Open-collector outputs
n Drive indicator segments directly
n Cascadable zero-suppression capability
n Lamp test input
Logic Symbol
VCC = Pin 16
GND = Pin 8
Connection Diagram
Pin Descriptions
Note 1: OC—Open Collector
Order Number Package Number Package Description
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DM74LS47M M16A 16-Lead Small Outline Integrated Circuit (SOIC),
JEDEC MS-012, 0.150 Narrow
DM74LS47N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC
MS-001, 0.300 Wide
Pin Names Description
A0–A3 BCD Inputs
RBI Ripple Blanking Input (Active LOW)
LT Lamp Test Input (Active LOW)
BI/RBO Blanking Input (Active LOW) or
Ripple Blanking Output (Active LOW)
a –g Segment Outputs (Active LOW) (Note 1)
www.fairchildsemi.com 2
Truth Table
Note 2: BI/RBO is wire-AND logic serving as blanking input (BI) and/or
ripple-blanking output (RBO). The blanking out (BI) must be open or
held at a HIGH
level when output functions 0 through 15 are desired, and ripple-
blanking input (RBI) must be open or at a HIGH level if blanking or a
decimal 0 is not
desired. X = input may be HIGH or LOW.
Note 3: When a LOW level is applied to the blanking input (forced
condition) all segment outputs go to a HIGH level regardless of the
state of any other input
condition.
Note 4: When ripple-blanking input (RBI) and inputs A0, A1, A2 and A3
are LOW level, with the lamp test input at HIGH level, all segment
outputs go to a
HIGH level and the ripple-blanking output (RBO) goes to a LOW level
(response condition).
Note 5: When the blanking input/ripple-blanking output (BI/RBO) is
OPEN or held at a HIGH level, and a LOW level is applied to lamp test
input, all segment
outputs go to a LOW level.
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Functional Description
The DM74LS47 decodes the input data in the pattern indicated
in the Truth Table and the segment identification
illustration. If the input data is decimal zero, a LOW signal
applied to the RBI blanks the display and causes a multidigit
display. For example, by grounding the RBI of the
highest order decoder and connecting its BI/RBO to RBI of
the next lowest order decoder, etc., leading zeros will be
suppressed. Similarly, by grounding RBI of the lowest order
decoder and connecting its BI/RBO to RBI of the next highest
order decoder, etc., trailing zeros will be suppressed.
Leading and trailing zeros can be suppressed simultaneously
by using external gates, i.e.: by driving RBI of a
intermediate decoder from an OR gate whose inputs are
BI/RBO of the next highest and lowest order decoders. BI/
RBO also serves as an unconditional blanking input. The
internal NAND gate that generates the RBO signal has a
resistive pull-up, as opposed to a totem pole, and thus BI/
RBO can be forced LOW by external means, using wiredcollector
logic. A LOW signal thus applied to BI/RBO turns
off all segment outputs. This blanking feature can be used
to control display intensity by varying the duty cycle of the
blanking signal. A LOW signal applied to LT turns on all
segment outputs, provided that BI/RBO is not forced LOW.
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Decimal
Inputs Outputs
or Note
Function LT RBI A3 A2 A1 A0 BI/RBO a b c d e f g
0 H H L L L L H L L L L L L H (Note 2)
1 H X L L L H H H L L H H H H (Note 2)
2HXLLHLHLLHLLHL
3HXLLHHHLLLLHHL
4HXLHLLHHLLHHLL
5HXLHLHHLHLLHLL
6HXLHHLHHHLLLLL
7HXLHHHHLLLHHHH
8HXHLLLHLLLLLLL
9HXHLLHHLLLHHLL
10 H X H L H L H H H H L L H L
11 H X H L H H H H H L L H H L
12 H X H H L L H H L H H H L L
13 H X H H L H H L H H L H L L
14 H X H H H L H H H H L L L L
15 H X H H H H H H H H H H H H
BI X X X X X X L H H H H H H H (Note 3)
RBI H L L L L L L H H H H H H H (Note 4)
LT L X X X X X H L L L L L L L
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