Beruflich Dokumente
Kultur Dokumente
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ÎÎÎÎ
ÎÎÎ
SET 2
H H L X No Change
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ÎÎÎÎ
ÎÎÎ
H H H X No Change
Design Criteria Value Units
H H X No Change
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
Internal Gate Count*
ÎÎÎÎ
ÎÎÎ
34 ea. *Both outputs will remain high as long as Set and
Reset are low, but the output states are unpredict-
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Internal Gate Propagation Delay 1.5 ns able if Set and Reset go high simultaneously.
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Internal Gate Power Dissipation 5.0 µW
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ORDERING INFORMATION
Speed Power Product .0075 pJ
Device Package Shipping
*Equivalent to a two–input NAND gate.
MC74HCT74AN PDIP–14 2000 / Box
MC74HCT74AD SOIC–14 55 / Rail
MC74HCT74ADR2 SOIC–14 2500 / Reel
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MAXIMUM RATINGS*
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Symbol
ÎÎÎÎÎ
ÎÎÎ
Parameter Value Unit This device contains protection
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
VCC DC Supply Voltage (Referenced to GND) – 0.5 to + 7.0 V circuitry to guard against damage
due to high static voltages or electric
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
Vin DC Input Voltage (Referenced to GND) – 0.5 to VCC + 0.5 V fields. However, precautions must
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
be taken to avoid applications of any
Vout DC Output Voltage (Referenced to GND) – 0.5 to VCC + 0.5 V
voltage higher than maximum rated
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
Iin DC Input Current, per Pin ± 20 mA voltages to this high–impedance cir-
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
cuit. For proper operation, Vin and
Iout DC Output Current, per Pin ± 25 mA
Vout should be constrained to the
v v
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ICC DC Supply Current, VCC and GND Pins ± 50 mA range GND (Vin or Vout) VCC.
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
Unused inputs must always be
PD Power Dissipation in Still Air Plastic DIP† 750 mW tied to an appropriate logic voltage
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
SOIC Package† 500 level (e.g., either GND or VCC).
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
Tstg Storage Temperature – 65 to + 150 _C Unused outputs must be left open.
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
TL Lead Temperature, 1 mm from Case for 10 Seconds _C
(Plastic DIP or SOIC Package) 260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: –10mW/_C from 65_ to 125_C
SOIC Package: –7mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).
ÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎ
ÎÎÎ
RECOMMENDED OPERATING CONDITIONS
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
ÎÎÎ
Symbol Parameter Min Max Unit
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
ÎÎÎ
VCC DC Supply Voltage (Referenced to GND) 4.5 5.5 V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
Vin, Vout DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
TA Operating Temperature, All Package Types – 55 + 125 _C
tr, tf Input Rise and Fall Time (Figure 1) 0 500 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
v ÎÎÎÎ
v ÎÎÎ
ÎÎÎÎÎÎÎÎÎ
Guaranteed Limit
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
VCC – 55 to
Symbol Parameter Test Conditions V 25_C 85_C 125_C Unit
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
VIH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
v ÎÎÎÎ
ÎÎÎÎ
Voltage ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
Minimum High–Level Input
ÎÎÎ
Vout = 0.1 V or VCC – 0.1 V
|Iout| 20 µA
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
V
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
VIL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
v
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
Voltage ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
Maximum Low–Level Input
ÎÎÎ
Vout = 0.1 V or VCC – 0.1 V
|Iout| 20 µA
4.5
5.5
0.8
0.8
0.8
0.8
0.8
0.8
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
VOH Minimum High–Level Output Vin = VIH or VIL 4.5 4.4 4.4 4.4 V
v 20 µA
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
Voltage |Iout| 5.5 5.4 5.4 5.4
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = VIH or VIL
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
VOL
v
ÎÎÎÎÎÎÎÎÎ
v
ÎÎÎÎÎÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎ
Maximum Low–Level Output
|Iout| 4.0 mA
Vin = VIH or VIL
4.5
4.5
3.98
0.1
3.84
0.1
3.7
0.1 V
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
Voltage |Iout| 20 µA 5.5 0.1 0.1 0.1
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ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
Vin = VIH or VIL
v
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
|Iout| 4.0 mA 4.5 0.26 0.33 0.4
± 0.1 ± 1.0 ± 1.0 µA
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
Iin Maximum Input Leakage Vin = VCC or GND 5.5
Current
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ICC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ
Maximum Quiescent Supply
ÎÎÎ
Current (per Package)
Vin = VCC or GND
Iout = 0 µA
5.5 2.0 20 80 µA
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
∆ICC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
Current ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎ
Additional Quiescent Supply Vin = 2.4 V, Any One Input
Vin = VCC or GND,
GND Other InInputs
uts
≥ – 55_C 25_C to 125_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
lout = 0 µA 5.5 2.9 2.4 mA
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book
(DL129/D).
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2
MC74HCT74A
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
fmax Maximum Clock Frequency (50% Duty Cycle) 30 24 20 MHz
(Figures 1 and 4)
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
tPLH,
tPHL ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Maximum Propagation Delay, Clock to Q or Q
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
(Figures 1 and 4)
24 30 36 ns
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
tPLH,
tPHL ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Maximum Propagation Delay, Set or Reset to Q or Q
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
(Figures 2 and 4)
24 30 36 ns
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
tTLH, Maximum Output Transition Time, Any Output 15 19 22 ns
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
tTHL (Figures 1 and 4)
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Cin Maximum Input Capacitance 10 10 10 pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High–Speed CMOS Data Book (DL129/D).
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TIMING REQUIREMENTS (VCC = 5.0 V ± 10%, CL = 50 pF, Input tr = tf = 6.0 ns)
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
Guaranteed Limit
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎÎ ÎÎÎ ÎÎÎ
ÎÎÎÎÎ ÎÎ
– 55 to
v v 25_C 85_C 125_C
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Symbol
ÎÎÎÎ ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
tsu
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ
ÎÎÎ
Parameter
ÎÎ
Minimum Setup Time, Data to Clock
Fig.
3
Min
15
Max Min
19
Max Min
22
Max Units
ns
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
th
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
trec
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ
Minimum Hold Time, Clock to Data
ÎÎÎ
ÎÎ
Minimum Recovery Time, Set or Reset Inactive to Clock
3
2
3
6
3
8
3
9
ns
ns
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
tw
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
tw
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ
Minimum Pulse Width, Clock
ÎÎÎ
ÎÎ
Minimum Pulse Width, Set or Reset
1
2
15
15
19
19
22
22
ns
ns
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
tr, tf
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ
Maximum Input Rise and Fall Times 1 500 500 500 ns
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3
MC74HCT74A
SWITCHING WAVEFORMS
tw
tr tf 3V
SET OR 1.3 V
2.7 V 3V GND
CLOCK RESET
1.3 V tPHL
0.3 V GND
tw Q OR Q 1.3 V
1/fmax tPLH
Figure 1. Figure 2.
VALID
3V TEST POINT
DATA 1.3 V
OUTPUT
GND
DEVICE
tsu th UNDER
TEST CL*
3V
1.3 V GND
CLOCK
Figure 3. Figure 4.
2, 12 5, 9
DATA Q
3, 11
CLOCK
6, 8
Q
1, 13
RESET
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4
MC74HCT74A
PACKAGE DIMENSIONS
PDIP–14
N SUFFIX
CASE 646–06
ISSUE L NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
14 8 MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
B FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
1 7 FLASH.
4. ROUNDED CORNERS OPTIONAL.
INCHES MILLIMETERS
A DIM MIN MAX MIN MAX
A 0.715 0.770 18.16 19.56
F L B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
C G 0.100 BSC 2.54 BSC
H 0.052 0.095 1.32 2.41
J J 0.008 0.015 0.20 0.38
N K 0.115 0.135 2.92 3.43
L 0.300 BSC 7.62 BSC
SEATING
PLANE K M 0_ 10_ 0_ 10_
H G D M N 0.015 0.039 0.39 1.01
SOIC–14
D SUFFIX
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
–A– Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
14 8 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
–B– P 7 PL 5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
1 7
0.25 (0.010) M B M PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS INCHES
G R X 45 _ F DIM MIN MAX MIN MAX
C A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
–T– F 0.40 1.25 0.016 0.049
K M J G 1.27 BSC 0.050 BSC
SEATING D 14 PL
PLANE J 0.19 0.25 0.008 0.009
0.25 (0.010) M T B S A S K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019
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MC74HCT74A
Notes
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6
MC74HCT74A
Notes
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7
MC74HCT74A
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8
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