300 Load 940

301 Add 941

302 Store 942
940 0003
941 0002
942 0000

COA aakamthane@sggs.ac.in 1
Address Instruction Binary-Contents of Hex Contents
Memory Address of memory

100 Load 940

101 Add 941
102 Store 942
103 Halt
104 0023
105 FFE9
106 0000
Solution:
Step RTN PC IR MAR MBR AC
300 --------- --------- --------- ---------
Fetch MAR PC 300 --------- 300 --------- ---------
IR M[MAR] 300 1940 300 --------- --------

PC PC + 1 301 1940 300 -------- ---------

Decode MAR IR[11-0] 301 1940 940 -------- --------
Decode IR [ 15-12] 301 1940 940 -------- --------
Get MBR 301 1940 940 3 --------
Operan M[MAR]
d
Execute AC AC + MBR 301 1940 940 3 3

COA aakamthane@sggs.ac.in 3
Step RTN PC IR MAR MBR AC
301 1940 940 3 3
Fetch MAR PC 301 1940 301 3 3
IR M[MAR] 301 5941 301 3 3

PC PC + 1 302 5941 301 3 3

Decod MAR IR[11-0] 302 5941 941 3 3
e
Decode IR [ 15-12] 302 5941 941 3 3
Get MBR M[MAR] 302 5941 941 2 3
Opera
nd
Execut AC AC + MBR 302 5941 941 2 5
e

COA aakamthane@sggs.ac.in 4
300 Load 940
301 Add 941
302 Store 942
303 Halt
940 0003
941 0002
942 0000

COA aakamthane@sggs.ac.in 5
Solution:
Step RTN PC IR MAR MBR AC
300 --------- --------- --------- ---------
Fetch MAR PC 300 --------- 300 --------- ---------
IR M[MAR] 300 1940 300 --------- --------

PC PC + 1 301 1940 300 -------- ---------

Decode MAR IR[11-0] 301 1940 940 -------- --------
Decode IR [ 15-12] 301 1940 940 -------- --------
Get MBR 301 1940 940 3 --------
Operan M[MAR]
d
Execute AC AC + MBR 301 1940 940 3 3

COA aakamthane@sggs.ac.in 6
Step RTN PC IR MAR MBR AC
301 1940 940 3 3
Fetch MAR PC 301 1940 301 3 3
IR M[MAR] 301 5941 301 3 3

PC PC + 1 302 5941 301 3 3

Decod MAR IR[11-0] 302 5941 941 3 3
e
Decode IR [ 15-12] 302 5941 941 3 3
Get MBR M[MAR] 302 5941 941 2 3
Opera
nd
Execut AC AC + MBR 302 5941 941 2 5
e

COA aakamthane@sggs.ac.in 7
• What is a Bus?

• A bus is a common pathway to connect various

subsystem/components in a computer system.

• Bus consist of connection media such as wires, and

connectors.

• In computer language, it is a channel over which information

flows between units and devices.
 The Basics Of BUS in COA
• In computer architecture, A control bus is (part of) a
computer bus, used by CPU for communicating with
other devices within the computer.

• The “address bus” carries the information on which

device the CPU is communicating.

• The Data bus carries the actual data being processed.

• Note: control bus carries commands from the CPU and

returns Status signals from the devices.
 The Basics Of BUS in COA
• In computer architecture, A control bus is (part of) a
computer bus, used by CPU for communicating with
other devices within the computer.

• The “address bus” carries the information on which

device the CPU is communicating.

• The Data bus carries the actual data being processed.

• Note: control bus carries commands from the CPU and

returns Status signals from the devices.
 The Basic Lines in Control Bus
• Read - A single line that when active (logic zero) indicates
the device is being read by the CPU.

• Write - A single line that when active (logic zero) indicates

the device is being written by the CPU.

• Byte enable - A group of lines that indicate the size of the

data (8, 16, 32, 64 bytes).
• Synchronous bus: All bus operation are
synchronized with reference to a
clock Signal.
Read Operation on Synchronous Bus
Explanation: Read Operation on
Synchronous Bus
• During the first clock cycle, the CPU places, the address,
of the location it want to read, on the address line of the
bus.

• During the same clock cycle once, the address lines have
activated, the read request is asserted by the CPU.

• Therefore, few clock cycles are needed, for the

memory, to perform accessing of the requested location.
 Interrupt
• An interrupt is a signal to the kernel (i.e., the core of
the operating system) that an event has occurred.

• Hardware interrupt, is a signal to the system from an

event that has originated in hardware, such as the
pressing of a key on the keyboard, a movement of
the mouse or a progression in the system clock.
#include <stdio.h>
#include <signal.h>

void sigintHandler(int sig_num)

{
signal(SIGINT, sigintHandler);
printf("\nTerminated using Ctrl+C \n");
fflush(stdout);
}

int main ()
{
int i,a[15];
printf(" Enter the number");
for(i=0;i<15;i++)
{
scanf(" %d",&a[i]);
signal(SIGINT,sigintHandler);
}
return 0;
}
Multiple Interrupts - Sequential
Multiple Interrupts – Nested
Time Sequence of Multiple Interrupts