FDS6930B Dual N-Channel Logic Level PowerTrench® MOSFET

June 2005

FDS6930B
Dual N-Channel Logic Level PowerTrench® MOSFET
Features General Description
■ 5.5 A, 30 V. RDS(ON) = 38 mΩ @ VGS = 10 V These N-Channel Logic Level MOSFETs are produced using
RDS(ON) = 50 mΩ @ VGS = 4.5 V Fairchild Semiconductor’s advanced PowerTrench process that
■ Fast switching speed has been especially tailored to minimize the on-state resistance
and yet maintain superior switching performance.
■ Low gate charge
■ High performance trench technology for extremely These devices are well suited for low voltage and battery pow-
low RDS(ON) ered applications where low in-line power loss and fast switch-
■ High power and current handling capability ing are required.

D2
D2 5 4
D1
D1 6 3

7 2
G2
S2
SO-8 G1 8 1
Pin 1 S1

Absolute Maximum Ratings TA = 25°C unless otherwise noted

Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 30 V
VGSS Gate-Source Voltage ± 20 V
ID Drain Current – Continuous (Note 1a) 5.5 A
– Pulsed 20
PD Power Dissipation for Dual Operation (Note 1) 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ, TSTG Operating and Storage Junction Temperature Range –55 to 150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity
FDS6930B FDS6930B 13" 12mm 2500 units

©2005 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FDS6930B Rev. A
 FDS6930B Dual N-Channel Logic Level PowerTrench® MOSFET
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 V
∆BVDSS Breakdown Voltage Temperature ID = 250 µA, Referenced to 25°C 26 mV/°C
∆ TJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 µA
VDS = 24 V, VGS = 0 V, TJ = 55°C 10
IGSS Gate–Source Leakage VGS = ±20 V, VDS = 0 V ±100 nA
On Characteristics (Note 2)

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 1.9 3 V

∆VGS(th) Gate Threshold Voltage ID = 250 µA, Referenced to 25°C –4.6 mV/°C
∆ TJ Temperature Coefficient
RDS(on) Static Drain–Source VGS = 10 V, ID = 5.5 A 31 38 mΩ
On–Resistance VGS = 4.5 V, ID = 4.8 A 40 50
VGS = 10 V, ID = 5.5 A, TJ = 125°C 45 62
ID(on) On–State Drain Current VGS = 10 V, VDS = 5 V 20 A
gFS Forward Transconductance VDS = 5 V, ID = 5.5 A 19 S
Dynamic Characteristics
Ciss Input Capacitance VDS = 15 V, V GS = 0 V, 310 412 pF
f = 1.0 MHz
Coss Output Capacitance 90 120 pF
Crss Reverse Transfer Capacitance 40 60 pF
RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 1.9 Ω
Switching Characteristics (Note 2)

td(on) Turn–On Delay Time VDD = 15 V, ID = 1 A, 6 12 ns

VGS = 10 V, RGEN = 6 Ω
tr Turn–On Rise Time 6 12 ns
td(off) Turn–Off Delay Time 16 28 ns
tf Turn–Off Fall Time 2 4 ns
Qg Total Gate Charge VDS = 5 V, ID = 5.5 A, 2.7 3.8 nC
Qgs Gate–Source Charge VGS = 5 V 1.0 nC
Qgd Gate–Drain Charge 0.7 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current 1.3 A
VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A (Note 2) 0.8 1.2 V
trr Diode Reverse Recovery Time (note3) IF = 5.5 A, diF/dt = 100 A/µs 16 32 nS
Qrr Diode Reverse Recovery Charge 6 nC

Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθCA is determined by the user's board design.

a) 78°C/W when mounted b) 125°C/W when c) 135°C/W when

on a 0.5 in2 pad of 2 oz mounted on a 0.02 in2 mounted on a
copper pad of 2 oz copper minimum pad.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. Trr parameter will not be subjected to 100% production testing.

2 www.fairchildsemi.com
FDS6930B Rev. A
 FDS6930B Dual N-Channel Logic Level PowerTrench® MOSFET
Typical Characteristics
20 2
VGS = 10V 4.0V

DRAIN-SOURCE ON-RESISTANCE
1.8
16
VGS = 3.5V
ID, DRAIN CURRENT (A)

6.0V 4.5V

RDS(ON), NORMALIZED
3.5V
1.6
12

1.4 4.0V
8 4.5V
1.2 5.0V
3.0V 6.0V
4 10.0V
1

0 0.8
0 0.5 1 1.5 2 0 4 8 12 16 20
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.6 0.12
ID = 5.5A
ID = 2.75A
DRAIN-SOURCE ON-RESISTANCE

VGS = 10.0V

RDS(ON), ON-RESISTANCE (OHM)

1.4 0.1
RDS(ON), NORMALIZED

1.2 0.08

TA = 125°C
1 0.06

0.8 0.04
TA = 25°C

0.6 0.02
-50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V)

Figure 3. On-Resistance Variation with Figure 4. On-Resistance Variation with

Temperature. Gate-to-Source Voltage.

20 100
VDS = 5V VGS = 0V
IS, REVERSE DRAIN CURRENT (A)

10
16
I D, DRAIN CURRENT (A)

TA = 125°C
1
12
25°C
0.1

8 -55°C
TA = 125° C -55°C
0.01

4
0.001
25°C

0 0.0001
1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

3 www.fairchildsemi.com
FDS6930B Rev. A
 FDS6930B Dual N-Channel Logic Level PowerTrench® MOSFET
Typical Characteristics
10 500
f = 1 MHz
ID = 5.5A
VGS = 0 V
VGS, GATE-SOURCE VOLTAGE (V)

8 400
VDS = 5V

CAPACITANCE (pF)
15V

6 300
Ciss
10V
4 200
Coss

2 100

Crss
0 0
0 1 2 3 4 5 6 0 5 10 15 20
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

100 50

SINGLE PULSE

P(pk), PEAK TRANSIENT POWER (W)

100µs RθJA = 135°C/W
40 TA = 25°C
RDS(ON) LIMIT
ID, DRAIN CURRENT (A)

10 1ms
10ms
100ms 30
1s
1 10s
DC 20

VGS = 10.0V
0.1 SINGLE PULSE
10
RθJA = 135°C/W
TA = 25°C

0.01 0
0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100
VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.

1
r(t), NORMALIZED EFFECTIVE TRANSIENT

D = 0.5
RθJA(t) = r(t) * RθJA
0.2
THERMAL RESISTANCE

RθJA = 135°C/W
0.1 0.1

0.05 P(pk)
0.02 t1
0.01 t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE

0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.

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FDS6930B Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™ FAST® ISOPLANAR™ PowerSaver™ SuperSOT™-8
ActiveArray™ FASTr™ LittleFET™ PowerTrench® SyncFET™
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Across the board. Around the world.™
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failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. I16