Bahauddin Zakariya University - Lahore Campus

Weekly Course Plan

Bachelor of Science in Information Technology

Digital Logic Design (3nd Semester)
Teacher Engr. Asim Naveed Contact asimnaveed764@yahoo.com

1- F.Sc. Physics (volume II)

Credit Hrs 3(3+0) Pre-requisite 2- University Physics
3- Discrete Mathematics

Course This course deals with basic principles and techniques of Digital Design. The course also
Description covers fundamentals of adders, registers, coders, encoders and many more things.

Upon completion of this course, students will:

 Become familiar with the fundamental features and basic Digital Design.
Expected
 Be able to understand characteristics of digital systems.
outcomes
 Be able to understand the characteristics of memory devices.

Recommended: Digital Logic & Computer Design 4th Edition

(Text Book) by
M. Morris Mano
Textbooks
Digital Fundamentals
(10th Edition) (Reference Book)
Thomas L. Floyd

 Theory Sessional = 20marks (Assignments + Quizzes+ presentation/viva)

Grading  Theory Mid =30marks
Policy  Theory Final = 50 marks

Lectures Plan

Weeks Topics Readings(book)

Introduction
Introduction to Digital systems
1* Binary Systems Chapter 1
Number Base Conversions
Octal and Hexadecimal Number Systems
Complements
Signed Binary Numbers
Chapter 1
2* Binary codes
Binary storage and Registers
Binary Logics
Boolean Algebra
Chapter 2
3* Basic Theorems and Properties
Boolean Algebra properties
4* Boolean Functions Chapter 2
 Canonical and Standard Forms
Logic Operations
Digital Logic Gates Integrated Circuits
Gate Level Minimization
The K-Map Method Chapter 3
5*
Four-Variable Map

POS and SOP Simplification

Chapter 3
Don't-Care Conditions
6*
NAND and NOR Implementation
Exclusive OR Function
Combinational Circuits
Analysis Procedure
Chapter 4
7* Design Procedure
Binary Adder-Subtractor
Decimal Adder
Binary Multiplier
Magnitude Comparator
Chapter 4
8* Decoders
Encoders
Multiplexer
9th Week (Mid Term Exam)
Sequential Circuits
* Chapter 5
10 Storage Elements Latches
Types of Latches
Storage Elements Flip Flops Chapter 5
11*
Types of Flip Flops
Analysis of Clocked Sequential Circuits Chapter 5
12*
Mealy and Moore Models of FSM
Registers Chapter 6
13*
Shift Registers
Counters
Chapter 6
14* Ripple Counters
Synchronous Counters
Memory
Chapter 7
15* Random Access Memory
Memory Decoding
Error Detection and Correction Chapter 7
16*
Read only Memory
Programmable Logic Array
17* Programmable Array Logic Chapter 7
Sequential Programmable Devices
18th Week (Final Term Examination)
*Tentative