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Skapa FPGA-baserade testsystem med LabVIEW

Johan Olsson
National Instruments

johan.olsson@ni.com
0709-27 95 02
Field Programmable Gate Arrays
Inside the FPGA
FPGA Technology

Programmable
Interconnects

Logic
Blocks

I/O Blocks
Simplified FPGA Example
Implementing Logic on FPGA: F = {(A+B)CD} E
F E
LabVIEW FPGA Code

A
B
C
D
True parallelism
E
F

A
B
C
D
Z

W X Y
LabVIEW Programming
LabVIEW FPGA Programming

 Run LabVIEW Diagrams on an FPGA


 HDL knowledge not required
 Hardware speed, reliability and determinism
 Visualize and implement dataflow and parallelism
 Tight analog and digital I/O integration
 Intuitive programming for both embedded engineers and domain experts
LabVIEW FPGA Code Abstraction
Counter Analog I/O I/O with DMA

LabVIEW FPGA
LabVIEW FPGA Code Abstraction
Counter Analog I/O I/O with DMA

LabVIEW FPGA
LabVIEW FPGA Code Abstraction
Counter Analog I/O I/O with DMA

LabVIEW FPGA VHDL 66 Pages ~4000 lines


Importance of FPGA in Systems

• High Reliability – Designs become a custom circuit


• High Determinism – Runs algorithms at deterministic rates
down to 25 ns (faster in many cases)
• True Parallelism – Enables parallel tasks
• Reconfigurable – Create new and alter existing task-specific
personalities
Common FPGA Applications for test

• High-speed control
• Sensor simulation
• Rapid prototyping
• Hardware-in-the-loop (HIL) test
• Intelligent DAQ
• Digital communication protocols
• Onboard processing and data reduction
• Other applications that require precise timing and control
High-Speed Control

About 200 kHz Loop Rate


Intelligent DAQ (Data Acquisition)

• Increased flexibility
– Custom triggering
– Create own counters (using digital lines)
– Multi-rate applications
– Implement custom filtering
– Perform ‘oversampling’ and data reduction on HW
Intelligent DAQ
Custom Control PWM

Clocks
Custom Counters
Onboard Processing and Data Reduction

Typical data acquisition + signal processing application

Device to be Data Acquisition Computer


controlled AI Board DMA Process Data
FFT, Filter, Averaging

AO DMA
Onboard Processing and Data Reduction

Alternative solution using FPGA

Device to be FPGA process data: Computer


controlled AI FFT, Filter, Averaging, DMA Present Data
Reduction,
Encoding / Decoding,
AO Filtering, Averaging DMA
Modulation/Demodulation
Decimation
Stream processing
LabVIEW FPGA Targets
CompactRIO

Compact
Vision System

PCI R Series
DAQ

PXI R Series
DAQ
Analog in, independent sampling rates up to 750 kHz
PXI Timing & Anolog out, independent update rates up to 1 MHz
Synchronization DIO as inputs, outputs, counters, or custom logic at rates up to 40 MHz
NI Platform for test and simulation
LabVIEW Development Environment

Control Design and Simulation Interface


Simulation Module System ID Toolkit
Toolkit

PID and Fuzzy Logic Toolkit Database Connectivity Toolkit Report generation toolkit

LabVIEW Real-Time LabVIEW FPGA LV Microprocessor SDK

Targets

PXI cRIO, cFP RIO/DAQ Devices 32-Bit p


Additional resources :

www.ni.com/labview
www.ni.com/fpga
www.ni.com/ipnet