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8 7 6 5 4 3 2 1

Project Code : 91.4V701.001

LV1/LV2 Block Diagram


PCB Layer Stackup
PCB Number : 07207 L1: Signal 1
PCB Version : -1 L2: VCC
L3: Inner Signal 2
D LV1 BOM:55.4V701.M03G L4: Inner Signal 3 D
LV2 BOM:55.4V701.M04G L5: GND
CLK GEN
Mobile CPU L6: Signal 4
ICS 9LPRS502H Merom 479 G792
18
3
2G/2.33G Battery Charger
71.09502.C0W 4, 5 MAX8725ETI 35
INPUT OUTPUT
HOST BUS 667/800MHz@1.05V AD+ DCBATOUT
BAT+
DDR2 533/667MHz
LVDS WXGA

533/667 MHz Crestline


AGTL+ CPU I/F
15"LCD 14 CPU V_CORE
ISL6262 CRZ-T 30,31
11, 12 DDR Memory I/F
RGB CRT
CRT INPUT OUTPUT
13
C INTEGRATED GRAHPICS C
DDR2 533/667MHz LVDS, CRT I/F S-Video
DCBATOUT VCC_CORE_S0

S-Video
533/667 MHz 71.CREST.00U 6,7,8,9,10 13
SYSTEM DC/DC
11, 12 X4 DMI 32
C-Link0 TPS51120
400MHz INPUTS OUTPUTS

PCI-E
LAN DCBATOUT
5V_S5 ,
3D3V_S5,
10/100/G TXFM RJ4524
ICH8M RTL8101E 23
24 SYSTEM DC/DC
SC411 * 2 33
6 PCIe ports INPUT OUTPUT
PCI/PCI BRIDGE
DCBATOUT 1D8V_S3,
ACPI 1.1 1D05V_S0
3 SATA PCI-E /USB 2.0 Mini Card
MIC In Codec AZALIA 1 PATA 66/100 802.11/a/b/g/n 22 SYSTEM DC/DC
TPS51100 34
B ALC268 10 USB 2.0/1.1 ports B
INPUTS OUTPUTS
26 ETHERNET (10/100/1000MbE)
High Definition Audio 5V_S5 0D9V_S0 (1.2A)
DDR_VREF_S3 (10mA)
LPC I/F
Serial Peripheral I/F SYSTEM DC/DC
INT.SPKR OP AMP APL5913 34
G1432 27 Matrix Storage Technology(DO)
INPUT OUTPUT
Active Managemnet Technology(DO)
1D8V_S3 1D5V_S0
LPC BUS (2.66A)
OP AMP 71.0ICH8.A0U
Headphone Out SYSTEM DC/DC
G1412 APL5915 34
27 15, 16, 17
LPC KBC SPI I/F
INPUT OUTPUT

DEBUG Winbond BIOS19 1D8V_S3 1D25V_S0


USB x 4 USB 2.0 CONN. 25 WPC8763L (1.7A)
19
21
A <Variant Name> A
HDD SATA Touch Wistron Incorporated
20 Pad 25 21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CD-ROM PATA BLOCK DIAGRAM
20 Size Document Number Rev
A3
LV1 -1
Date: Monday, August 20, 2007 Sheet 1 of 38

8 7 6 5 4 3 2 1
ICH8M Functional Strap Definitions
ICH8-M EDS 20271 1.5V1 page 16
ICH8M Integrated Pull-up Crestline Strapping Signals and
Signal Usage/When Sampled Comment and Pull-down Resistors Configuration Crestline EDS 19857
page 7
0.7a
ICH8-M EDS 20271 1.5V1
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: SIGNAL Resistor Type/Value CFG[2:0] FSB Frequency Select
HDA_BIT_CLK PULL-DOWN 20K 010 = FSB800
offset 224h) 011 = FSB667
HDA_RST# NONE others = Reserved
HDA_SYNC PCIE config1 bit0, This signal has a weak internal pull-down.
Rising Edge of PWROK. Sets bit0 of RPC.PC(Config Registers:Offset 224h) HDA_SDIN[3:0] PULL-DOWN 20K CFG[4:3] Reserved
GNT2# PCIE config2 bit0, This signal has a weak internal pull-up. HDA_SDOUT PULL-DOWN 20K CFG5 DMI x2 Select 0 = DMI x2
Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) 1 = DMI x4 (Default)
HDA_SYNC PULL-DOWN 20K CFG[7:6] Reserved
GPIO20 Reserved This signal should not be pulled high.
GNT[3:0] PULL-UP 20K
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only.
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop GPIO[20] PULL-DOWN 20K
and mobile. 0 = Normal mode
LDA[3:0]#/FHW[3:0]# PULL-UP 20K CFG8 Low Power PCI Express 1 = Low Power mode (Default)
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for LAN_RXD[2:0] PULL-UP 10K 0 = Reverse Lanes,15->0,14->1 ect..
GNT3# Swap Override. all cycles targeting FWH BIOS space). CFG9 PCI Express Graphics 1= Normal operation(Default):Lane
Rising Edge of PWROK. Note: Software will not be able to clear the LDRQ[0] PULL-UP 20K Lane Reversal Numbered in order
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
LDRQ[1]/GPIO23 PULL-UP 20K
CFG[11:10] Reserved
PME# PULL-UP 20K
GNT0#/ Boot BIOS Destination Controllable via Boot BIOS Destination bit XOR/ALL Z test 00 = Reserved
SPI_CS1# Selection. (Config Registers:Offset 3410h:bit 11:10). PWRBTN# PULL-UP 20K CFG[13:12] straps 01 = XOR mode enabled
Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. 10 = All Z mode enabled
SATALED# PULL-UP 15K 11 = Normal Operation (Default)
Integrated VccSus1_05, Enables integrated VccSus1_05, VccSus1_5 and
INTVRMEN VccSus1_5 and VccCL1_5 VccCL1_5 VRM's when sampled high SPI_CS1# PULL-UP 20K
VRM Enable/Disable. CFG[15:14] Reserved Reserved
Always sampled. SPI_CLK PULL-UP 20K
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
SPI_MOSI PULL-UP 20K 1 = Dynamic ODT Enabled (Default)
Integrated VccLAN1_05 Enables integrated VccLAN1_05 and VccCL1_05 VRM's
LAN100_SLP and VccCL1_05 VRM when sampled high SPI_MISO PULL-UP 20K
Enable/Disable. CFG[18:17] Reserved
Always sampled. TACH_[3:0] PULL-UP 20K
SPKR PULL-DOWN 20K
PCI Express Lane Signal has weak internal pull-up. Sets bit 27
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) TP[3] PULL-UP 20K CFG19 DMI Lane Reversal 0 = Normal operation (Default):lane
of PWROK. Numbered in order
USB[9:0][P,N] PULL-DOWN 15K 1 =Reverse Lane,4->0,3->1 ect...
SPKR No Reboot. If sampled high, the system is strapped to the
Rising Edge of PWROK. "No Reboot" mode(ICH8 will disable the TCO Timer CL_RST# PULL-UP TBD 0 = Only SDVO or PCIE x1 is
system reboot feature). The status is readable CFG20 SDVO/PCIE operational (Default)
Concurrent 1 =SDVO and PCIE x1 are operating
via the NO REBOOT bit.
simultaneously via the PEG port
TP3 XOR Chain Entrance. This signal should not be pull low unless using SDVOCRTL SDVO Present 0 = No SDVO Card present (Default)
Rising Edge of PWROK. XOR Chain testing. _DATA
1= SDVO Card present
GPIO33/ Flash Descriptor This signal has a weak internal pull-up. NOTE: All strap signals are sampled with respect to the leading
HDA_DOCK Security Override Strap Sampled low:the Flash Descriptor Security will be edge of the Calistoga GMCH PWORK in signal.
_EN# Rising Edge of PWROK overridden. If high,the security measures will be
in effect.This should only be used in manufacturing
environments.
Release BOM need modify Difference between LV1 and LV2
Page Location Schematic BOM Page Location LV1 LV2
ICH8M IDE Integrated Series P3 U39(CLK GEN) 71.09365.00W 71.09502.C0W(ICS) 1'st
Termination Resistors P6 U31 71.GL960.A0U 71.GM965A0U
71.00875.C0W(RTL) 2'nd
DD[15:0], DIOW#, DIOR#, DREQ,
P19 R334 V X
approximately 33 ohm
U31(GM965) 71.CREST.00U 71.GM965.A0U
DDACK#, IORDY, DA[2:0], DCS1#,
P6 U31(GL960) 71.GL960.A0U R333 X V
DCS3#, IDEIRQ
P11 U29(DDR CNN) 62.10017.A71 62.10017.B51 P3 U39 71.09502.C0W 71.00875.C0W
page 17
USB Table P15 U49(ICH8M) 71.0ICH8.A0U 71.ICH8M.A0U
PCI Routing USB
IDSEL INT REQ GNT Pair Device P19 U50 71.08763.00G 71.08763.B0G
0 USB1(ON BOARD)
U34,U35 ZZ.COMBO.001 84.01426.037
1 USB2(ON BOARD) P31
2 USB3(ON BOARD) U33,U37 ZZ.COMBO.001 84.01412.037
3 USB4(ON BOARD)
<Variant Name>
4 MINICARD
PCIE Routing 5 X Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
LANE1 LAN 6 X Release Layout need modify Hsichih, Taipei
LANE2 X 7 X Title
U29(DDR CNN)
LANE3 MiniCard WLAN 8 X Reference
Size Document Number Rev
LANE4 X 9 X Custom
LV1 -1
Date: Friday, August 10, 2007 Sheet 2 of 38
R143 3D3V_S0 3D3V_S0
3D3V_S0 2 13D3V_48MPWR_S0 G73 G74
3D3V_CLKPLL_S0 1 2 3D3V_CLKGEN_S0 1 2

1
4D99R3F-1-GP

1
C243 C244 C408 C426 C424 C409 C407 C422 C413 C425 C423 C411 C412 C410 C414

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC1U6D3V2KX-GP

2
SC22U6D3V5MX-2GP

2
3D3V_S0

U39
1

1
R252 R256 R255 R261 3D3V_CLKGEN_S0 2 55
VDDPCI SDATA SMBDAT_ICH 11,15
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 3D3V_48MPWR_S0 9 56
VDD48 SCLK SMBCLK_ICH 11,15
10KR2J-3-GP DY DY DY 16 VDD
53
2

2
PCLKCLK2 VDDREF DREFCLK_1 RN29
DOTT_96/SRCCLKT0 13 2 3 DREFCLK_96M 7
PCLKCLK3 31 14 DREFCLK#_1 SRN0J-6-GP 1 4
VDDSRC DOTC_96/SRCCLKC0 DREFCLK_96M# 7
PCLKCLK4 47
PCLKCLK5 VDDCPU DREFSSCLK_1 RN28
SRCCLKT1/SE1 17 2 3 DREFSSCLK_100M 7
3D3V_CLKPLL_S0 12 18 DREFSSCLK#_1 SRN0J-6-GP 1 4
VDD96I/O SRCCLKC1/SE2 DREFSSCLK_100M# 7
1

1
20 VDDPLL3I/O
R251 R257 R254 R260 26 21 CLK_PCIE_SATA_1 RN30 2 3
VDDSRCI/O SRCCLKT2/SATACLKT CLK_PCIE_SATA 15
10KR2J-3-GP 37 22 CLK_PCIE_SATA_1# SRN0J-6-GP 1 4
VDDSRCI/O SRCCLKC2/SATACLKC CLK_PCIE_SATA# 15
DY 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 41 VDDCPUI/O CLK_MCH_3GPLL_1 RN25
24 2 3 CLK_MCH_3GPLL 7
2

2
SRCCLKT3/CR#_C CLK_MCH_3GPLL_1# SRN0J-6-GP
1 PCICLK0/CR#_A SRCCLKC3/CR#_D 25 1 4 CLK_MCH_3GPLL# 7
3 27 CLK_PCIE_MINI_11 RN31 2 3
PCICLK1/CR#_B SRCCLKT4 CLK_PCIE_MINI 22,38
28 CLK_PCIE_MINI_11# SRN0J-6-GP 1 4
SRCCLKC4 CLK_PCIE_MINI# 22,38
TP111 1PCLK_CARD 3 2 RN26 PCLKCLK2 4 PCICLK2/LTE
PCLK_FWH 4 1 30 PM_STPPCI# 16
25 PCLK_FWH PCI_STOP#/SRCCLKT5
SRN33J-5-GP-U PCLKCLK3 5 29 PM_STPCPU# 16
PCICLK3 CPU_STOP#/SRCCLKC5
1 2 PCLK_CARD 19 PCLK_KBC
PCLK_KBC 3 2 RN27 PCLKCLK4 6 PCICLK4/SRC5_EN SRCCLKT6 33 CLK_PCIE_ICH_1 RN22 1 4 CLK_PCIE_ICH 16
C434 SC10P50V2JN-4GP PCLK_ICH 4 1 32 CLK_PCIE_ICH_1# SRN0J-6-GP 2 3
16 CLK_PCI_ICH SRCCLKC6 CLK_PCIE_ICH# 16
DY SRN33J-5-GP-U PCLKCLK5 7 PCI_F5/ITP_EN
1 2 PCLK_FWH SRCCLKT7/CR#_F 36
C435 SC10P50V2JN-4GP GEN_XTAL_OUT 51 35 SC
GEN_XTAL_IN X2 SRCCLKC7/CR#_E
DY 52 X1
1 2 PCLK_KBC CPUCLKT2_ITP/SRCCLKT8 39 CLK_PCIE_LAN_R RN21 1 4 CLK_PCIE_LAN 23
C436 SC10P50V2JN-4GP CLK48_ICH 1 2 CLK48 10 38 CLK_PCIE_LAN#_R SRN0J-6-GP 2 3
16 CLK48_ICH USB_48MHZ/FSLA CPUCLKC2_ITP/SRCCLKC8 CLK_PCIE_LAN# 23
DY R249 33R2J-2-GP
1 2 PCLK_ICH 4,7 CPU_SEL1 CPU_SEL1 49 FSLB/TEST_MODE CPUCLKT1 43 CLK_MCH_BCLK_1 RN23 1 4 CLK_MCH_BCLK 6
C437 SC10P50V2JN-4GP 42 CLK_MCH_BCLK_1# SRN0J-6-GP 2 3
CPUCLKC1 CLK_MCH_BCLK# 6
DY CLK_ICH14 1 2 CLK14 54
16 CLK_ICH14 FSLC/TEST_SEL/REF0
1 2 CLK48_ICH R233 33R2J-2-GP
CPUCLKT0 46 CLK_CPU_BCLK_1 RN20 1 4 CLK_CPU_BCLK 4
C428 SC10P50V2JN-4GP 8 45 CLK_CPU_BCLK_1# SRN0J-6-GP 2 3
GNDPCI CPUCLKC0 CLK_CPU_BCLK# 4
DY 4,7 CPU_SEL2 1 2 11 GND48
1 2 CLK_ICH14 R232 2K2R2J-2-GP 15 GND
C404 SC10P50V2JN-4GP 19 48 CLK_PWRGD CLK_PWRGD 16
GND CK_PWRGD/PD#
DY 4,7 CPU_SEL0 1
R250
2
2K2R2J-2-GP
23 GNDSRC
34 GNDSRC NC#40 40
44 GNDCPU
50 GNDREF
CL=20pF±0.2pF
R238 DY ICS9LPRS502HGLFT-GP
GEN_XTAL_IN 1 2 GEN_XTAL_OUT
71.09502.C0W
10MR2J-L-GP

X3
1 2
SEL2 SEL1 SEL0 X-14D31818M-35GP
CPU FSB
FSC FSB FSA
1

C415 82.30005.891 C418


SC27P50V2JN-2-GP SC27P50V2JN-2-GP
1 0 1 100M X
2

0 0 1 133M 533M
0 1 1 166M 667M
0 1 0 200M 800M
BOM use 56pin ICS P/N:71.09502.C0W(1'st)
PIN NAME DESCRIPTION RTL P/N:71.00875.C0W(2'nd)
Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
PCI0/CR#_A Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
PCI1/CR#_B Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed <Variant Name>


PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed
Wistron Incorporated
0 = Pin37 as CPU_STOP# , pin 38 as PCI_STOP#. 21F, 88, Hsin Tai Wu Rd
PCI3/RC-5_EN 1 = Pins37,38 as SRC-5 differential pair.
Hsichih, Taipei
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# Title
PCI4/27M_SEL 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#
Clock Generator
0 =SRC8/SRC8# Size Document Number Rev
PCI_F5/ITP_EN 1 = ITP/ITP# Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 3 of 38
H_A#[3..35] 6

H_REQ#[0..4] 6

H_D#[0..63] 6
TP50 H_RS#[0..2] 6
U36A 1 OF 4 U36B 2 OF 4

1
H_A#3 J4 H1 H_ADS# 6 H_D#0 E22 Y22 H_D#32
H_A#4 A3# ADS# H_D#1 D0# D32# H_D#33
L5 A4# BNR# E2 H_BNR# 6 F24 D1# D33# AB24
H_A#5 L4 G5 H_BPRI# 6 H_D#2 E26 V24 H_D#34
A5# BPRI# D2# D34#

ADDR GROUP 0
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A6# H_D#4 D3# D35# H_D#36
M3 A7# DEFER# H5 H_DEFER# 6 F23 D4# D36# V23

DATA GRP0
H_A#8 H_D#5 H_D#37

DATA GRP2
N2 F21 G25 T22

CONTROL
A8# DRDY# H_DRDY# 6 D5# D37#
H_A#9 J1 E1 H_DBSY# 6 H_D#6 E25 U25 H_D#38
H_A#10 A9# DBSY# H_D#7 D6# D38# H_D#39
N3 A10# E23 D7# D39# U23
H_A#11 P5 F1 H_BREQ#0 6 H_D#8 K24 Y25 H_D#40
H_A#12 A11# BR0# H_D#9 D8# D40# H_D#41
P2 A12# G24 D9# D41# W22
H_A#13 L2 D20 H_IERR# H_D#10 J24 Y23 H_D#42
H_A#14 A13# IERR# H_D#11 D10# D42# H_D#43
P4 A14# INIT# B3 H_INIT# 15,25 J23 D11# D43# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A15# H_D#13 D12# D44# H_D#45
R1 A16# LOCK# H4 H_LOCK# 6 F26 D13# D45# AA23
M1 H_D#14 K22 AA24 H_D#46
6 H_ADSTB#0 ADSTB0# D14# D46#
C1 H_CPURST# 6 H_D#15 H23 AB25 H_D#47
H_REQ#0 K3 RESET# H_RS#0 D15# D47#
REQ0# RS0# F3 6 H_DSTBN#0 J26 DSTBN0# DSTBN2# Y26 H_DSTBN#2 6
H_REQ#1 H2 F4 H_RS#1 H26 AA26 H_DSTBP#2 6
REQ1# RS1# 6 H_DSTBP#0 DSTBP0# DSTBP2#
H_REQ#2 K2 G3 H_RS#2 H25 U22 H_DINV#2 6
REQ2# RS2# 6 H_DINV#0 DINV0# DINV2#
H_REQ#3 J3 G2 H_TRDY# 6
H_REQ#4 L1 REQ3# TRDY#
REQ4# H_D#16 N22 H_D#48
HIT# G6 H_HIT# 6 D16# D48# AE24
H_A#17 Y2 E4 H_HITM# 6 H_D#17 K25 AD24 H_D#49
H_A#18 A17# HITM# H_D#18 P26 D17# D49# H_D#50
U5 A18# D18# D50# AA21
H_A#19 R3 AD4 XDP_BPM#0 1 TP44 H_D#19 R23 AB22 H_D#51
H_A#20 A19# BPM0# XDP_BPM#1 TP45 H_D#20 L23 D19# D51# H_D#52
W6 AD3 1 AB21
XDP/ITP SIGNALS

A20# BPM1# D20# D52#


ADDR GROUP 1

H_A#21 U4 AD1 XDP_BPM#2 1 TP49 H_D#21 M24 AC26 H_D#53


A21# BPM2# D21# D53#

DATA GRP1
DATA GRP3
H_A#22 Y5 AC4 XDP_BPM#3 1 TP38 H_D#22 L22 AD20 H_D#54
H_A#23 A22# BPM3# XDP_BPM4_PRDY# TP51 H_D#23 M23 D22# D54# H_D#55
U1 A23# PRDY# AC2 1 D23# D55# AE22
H_A#24 R4 AC1 XDP_BPM#5 1 TP54 H_D#24 P25 AF23 H_D#56
H_A#25 A24# PREQ# XDP_TCK TP39 H_D#25 P23 D24# D56# H_D#57
T5 A25# TCK AC5 1 D25# D57# AC25
H_A#26 T3 AA6 XDP_TDI 1 TP56 Layout Note: H_D#26 P22 AE21 H_D#58
H_A#27 A26# TDI XDP_TDO TP57 1D05V_S0 H_D#27 T24 D26# D58# H_D#59
W2 AB3 1 AD21
H_A#28 W5
A27# TDO
AB5 XDP_TMS 1 TP55 "CPU_GTLREF0" H_D#28 R24 D27# D59#
AC22 H_D#60
H_A#29 A28# TMS XDP_TRST# TP36 H_D#29 L25 D28# D60# H_D#61
Y4 A29# TRST# AB6 1 0.5" max length. D29# D61# AD23

2
H_A#30 U2 C20 XDP_DBRESET# 1 TP34 H_D#30 T25 AF22 H_D#62
H_A#31 A30# DBR# R222 H_D#31 N25 D30# D62# H_D#63
V4 A31# D31# D63# AC23
H_A#32 W3 1KR2F-3-GP 6 H_DSTBN#1 L26 AE25 H_DSTBN#3 6
H_A#33 A32# DSTBN1# DSTBN3#
AA4 A33# THERMAL 6 H_DSTBP#1 M26 DSTBP1# DSTBP3# AF24 H_DSTBP#3 6
H_A#34 AB2 6 H_DINV#1 N24 AC20 H_DINV#3 6

1
H_A#35 A34# DINV1# DINV3#
AA3 A35# PROCHOT# D21 CPU_PROCHOT# CPU_PROCHOT# 30
6 H_ADSTB#1 V1 ADSTB1# THRMDA A24 H_THERMDA H_THERMDA 18
CPU_GTLREF0 AD26 GTLREF COMP0 R26 COMP0 R119 1 2 27D4R2F-L1-GP
THRMDC B25 H_THERMDC H_THERMDC 18
TP30 1TEST1 C23 TEST1 MISC COMP1 U26 COMP1 R118 1 2 54D9R2F-L1-GP

1
15 H_A20M# A6 A20M#
C385 TP27 1TEST2 D25 TEST2 COMP2 AA1 COMP2 R136 1 2 27D4R2F-L1-GP

1
15 H_FERR# A5 C7 H_THERMTRIP# R221 TP29 1RSVD_CPU_12 C24 Y1 COMP3 R137 1 2 54D9R2F-L1-GP
FERR# THERMTRIP# H_THERMTRIP# 7,15 TEST3 COMP3
ICH

SC1KP50V2KX-1GP
15 H_IGNNE# C4 C183 DY TEST4 AF26

2
IGNNE# SC100P50V2JN-3GP TEST4
2KR2F-3-GP TP52 1RSVD_CPU_13 AF1 E5 H_DPRSTP# 7,15,30

2
TEST5 DPRSTP#
15 H_STPCLK# D5 DY TP25 1RSVD_CPU_14 A26 B5 H_DPSLP# 15

2
STPCLK# TEST6 DPSLP#
15 H_INTR C6 LINT0 HCLK BCLK0 A22 CLK_CPU_BCLK 3 DPWR# D24 H_DPWR# 6
15 H_NMI B4 LINT1 BCLK1 A21 CLK_CPU_BCLK# 3 Place close to CPU socket 3,7 CPU_SEL0 B22 BSEL0 PWRGOOD D6 H_PWRGD 15
15 H_SMI# A3 SMI# 3,7 CPU_SEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
3,7 CPU_SEL2 C21 BSEL2 PSI# AE6 PSI# 30
TP40 1 RSVD_CPU_1 M4
TP37 RSVD_CPU_2 RSVD#M4
1 N5 RSVD#N5
TP48 1 RSVD_CPU_3 T2
RESERVED

TP46 RSVD_CPU_4 RSVD#T2 BGA479-SKT6-GPU3


1 V3 RSVD#V3
TP43 1 RSVD_CPU_5 B2
TP41 RSVD_CPU_6 RSVD#B2 1D05V_S0 Layout Note:
1 C3 RSVD#C3
TP47 1 RSVD_CPU_7 D2 Comp0, 2 connect with Zo=27.4 ohm, make
TP32 RSVD_CPU_8 RSVD#D2 trace length shorter than 0.5" .
1 D22 RSVD#D22 C188
TP42 1 RSVD_CPU_9 D3 CPU_PROCHOT# 1 2 68R2-GP Net "TEST4" as short as possible, Comp1, 3 connect with Zo=55 ohm, make
TP35 RSVD_CPU_10 RSVD#D3 R127 TEST4 1 trace length shorter than 0.5" .
1 F6 2
RSVD#F6 H_IERR# R128 1 2 56R2F-1-GP make sure "TEST4" routing is
TP53 1 RSVD_CPU_11 B1 reference to GND and away other
KEY_NC XDP_TMS R140 1 SCD1U10V2KX-5GP
2 54D9R2F-L1-GP
BGA479-SKT6-GPU3 noisy signals
62.10079.001 XDP_TDI R142 1 2 54D9R2F-L1-GP

XDP_BPM#5 R139 1 2 54D9R2F-L1-GP

XDP_TDO R141 1 DY 2 54D9R2F-L1-GP


1st source : 62.10079.001 H_CPURST# R138 1 DY 2 54D9R2F-L1-GP
2nd source : 62.10053.401 3D3V_S0

XDP_DBRESET# 1 DY 2 150R2F-1-GP
R125

XDP_TCK R135 1 2 54D9R2F-L1-GP

XDP_TRST# R133 1 2 649R2F-GP


CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0

All place within 2" to CPU 166 0 1 1


Wistron Incorporated
200 0 1 0 21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CPU (1 of 2) AGTL
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 4 of 38
U36D 4 OF 4

VCC_CORE_S0 1 2 C226 VCC_CORE_S0 1 2 A4 VSS VSS P6


SC10U6D3V6KX-4GP C229 SCD1U10V2KX-5GP A8 P21
VSS VSS
A11 VSS VSS P24
1 2 C225 1 2 A14 VSS VSS R2
SC10U6D3V6KX-4GP C205 SCD1U10V2KX-5GP A16 R5
VCC_CORE_S0 U36C 3 OF 4 VCC_CORE_S0 VSS VSS
A19 VSS VSS R22
1 2 C214 1 2 A23 VSS VSS R25
A7 AB20 SC10U6D3V6KX-4GP C223 SCD1U10V2KX-5GP AF2 T1
VCC VCC VSS VSS
A9 VCC VCC AB7 B6 VSS VSS T4
A10 VCC VCC AC7 1 2 C212 1 2 DY B8 VSS VSS T23
A12 AC9 SC10U6D3V6KX-4GP C211 SCD1U10V2KX-5GP B11 T26
VCC VCC VSS VSS
A13 VCC VCC AC12 B13 VSS VSS U3
A15 VCC VCC AC13 1 2 C232 B16 VSS VSS U6
A17 AC15 SC10U6D3V6KX-4GP B19 U21
VCC VCC VSS VSS
A18 VCC VCC AC17 B21 VSS VSS U24
A20 VCC VCC AC18 1 2 C215 B24 VSS VSS V2
B7 AD7 SC10U6D3V6KX-4GP C5 V5
VCC VCC VSS VSS
B9 VCC VCC AD9 1D05V_S0 1 2 C8 VSS VSS V22
B10 VCC VCC AD10 1 2 C213 C236 SCD1U10V2KX-5GP C11 VSS VSS V25
B12 AD12 SC10U6D3V6KX-4GP C14 W1
VCC VCC VSS VSS
B14 VCC VCC AD14 1 2 C16 VSS VSS W4
B15 VCC VCC AD15 1 2 C227 C237 SCD1U10V2KX-5GP C19 VSS VSS W23
B17 AD17 SC10U6D3V6KX-4GP C2 W26
VCC VCC VSS VSS
B18 VCC VCC AD18 1 2 C22 VSS VSS Y3
B20 VCC VCC AE9 1 2 C208 C240 SCD1U10V2KX-5GP C25 VSS VSS Y6
C9 AE10 SC10U6D3V6KX-4GP D1 Y21
VCC VCC VSS VSS
C10 VCC VCC AE12 1 2 DY D4 VSS VSS Y24
C12 VCC VCC AE13 1 2 C224 C198 SCD1U10V2KX-5GP D8 VSS VSS AA2
C13 AE15 SC10U6D3V6KX-4GP D11 AA5
VCC VCC VSS VSS
C15 VCC VCC AE17 1 2 DY D13 VSS VSS AA8
C17 VCC VCC AE18 1 2 C222 C199 SCD1U10V2KX-5GP D16 VSS VSS AA11
C18 AE20 SC10U6D3V6KX-4GP D19 AA14
VCC VCC VSS VSS
D9 VCC VCC AF9 1 2 D23 VSS VSS AA16
D10 VCC VCC AF10 1 2 C233 C242 SCD1U10V2KX-5GP D26 VSS VSS AA19
D12 AF12 SC10U6D3V6KX-4GP E3 AA22
VCC VCC VSS VSS
D14
D15
VCC VCC AF14
AF15
Ivccp boot= 4.5A 1 2 C209
1
C239
2
SC4D7U6D3V3KX-GP
E6
E8
VSS VSS AA25
AB1
VCC VCC SC10U6D3V6KX-4GP VSS VSS
D17
D18
VCC VCC AF17
AF18
Ivccp stable= 2.5A 1 2
E11
E14
VSS VSS AB4
AB8
VCC VCC VSS VSS
E7 VCC VCC AF20 1 2 C216 C201 SC4D7U6D3V3KX-GP E16 VSS VSS AB11
E9 SC10U6D3V6KX-4GP E19 AB13
VCC VSS VSS
E10 VCC VCCP G21 1D05V_S0 E21 VSS VSS AB16
E12 VCC VCCP V6 E24 VSS VSS AB19
E13 VCC VCCP J6 F5 VSS VSS AB23
E15 VCC VCCP K6 F8 VSS VSS AB26
1

E17 M6 C204 C202 F11 AC3


VCC VCCP VSS VSS
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

E18 J21 TC6 F13 AC6


VCC VCCP SE330U2VDM-L-GP VSS VSS
E20 K21 F16 AC8
2

VCC VCCP VSS VSS


F7 VCC VCCP M21 VCC_CORE_S0 1 2 C228 F19 VSS VSS AC11
F9 N21 SC10U6D3V6KX-4GP F2 AC14
VCC VCCP VSS VSS
F10 VCC VCCP N6 Place close to CPU socket F22 VSS VSS AC16
F12 VCC VCCP R21 1 2 C234 F25 VSS VSS AC19
F14 R6 SC10U6D3V6KX-4GP G4 AC21
VCC VCCP VSS VSS
F15 VCC VCCP T21 G1 VSS VSS AC24
F17 VCC VCCP T6 1 2 C218 G23 VSS VSS AD2
F18 V21 SC10U6D3V6KX-4GP G26 AD5
VCC VCCP 1D5V_VCCA_S0 VSS VSS
F20 VCC VCCP W21 H3 VSS VSS AD8
AA7 L1 1 2 C203 H6 AD11
VCC SC10U6D3V6KX-4GP VSS VSS
AA9
AA10
VCC VCCA B26
C26
1 2
HCB1608KF121T30-GP
1D5V_S0 IVCCA = 130mA H21
H24
VSS VSS AD13
AD16
VCC VCCA VSS VSS
1

AA12 C187 C178 68.00230.041 J2 AD19


VCC VSS VSS
SCD01U16V2KX-3GP

SC4D7U6D3V3KX-GP

AA13 AD6 H_VID0 J5 AD22


VCC VID0 H_VID1 VSS VSS
AA15 AF5 J22 AD25
2

VCC VID1 H_VID2 VSS VSS


AA17 VCC VID2 AE5 layout note: "1D5V_VCCA_S0" J25 VSS VSS AE1
AA18 AF4 H_VID3 K1 AE4
AA20
VCC VID3
AE3 H_VID4 as short as possible K4
VSS VSS
AE8
VCC VID4 H_VID5 VSS VSS
AB9 VCC VID5 AF3 K23 VSS VSS AE11
AC10 AE2 H_VID6 K26 AE14
VCC VID6 VSS VSS
AB10 VCC L3 VSS VSS AE16
AB12 VCC L6 VSS VSS AE19
AB14 AF7 VCC_SENSE VCC_SENSE 30 L21 AE23
VCC VCCSENSE VSS VSS
AB15 VCC L24 VSS VSS AE26
AB17 VCC H_VID[0..6] 30 M2 VSS VSS A2
AB18 AE7 VSS_SENSE VSS_SENSE 30 M5 AF6
VCC VSSSENSE VSS VSS
M22 VSS VSS AF8
M25 VSS VSS AF11
N1 VSS VSS AF13
BGA479-SKT6-GPU3 N4 AF16
VCC_CORE_S0 VSS VSS
N23 VSS VSS AF19
N26 VSS VSS AF21
R131 P3 A25
VCC_SENSE VSS VSS
Layout Note: 2 1 VSS AF25
VCCSENSE and VSSSENSE lines should be of equal length. 100R2F-L1-GP-U
BGA479-SKT6-GPU3
R130
Layout Note: VSS_SENSE 1 2
Provide a test point (with no stub) to connect a differential probe
between VCCSENSE and VSSSENSE at the location where the 100R2F-L1-GP-U
two 54.9ohm resistors terminate the 55 ohm transmission line.

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CPU (2 of 2) POWER
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 5 of 38
U31A 1 OF 10

H_SWING routing Trace width and H_D#0 E2 J13 H_A#3 H_RS#[0..2] 4


H_D#1 H_D#0 H_A#3 H_A#4
G2 B11
Spacing use 10 / 20 mil H_D#2 G7
H_D#1 H_A#4
C11 H_A#5
H_D#2 H_A#5 H_REQ#[0..4] 4
H_D#3 M6 M11 H_A#6
H_D#4 H_D#3 H_A#6 H_A#7
H_SWING Resistors and H7 H_D#4 H_A#7 C15 H_D#[0..63] 4
H_D#5 H3 F16 H_A#8
Capacitors close MCH H_D#6 G4
H_D#5 H_A#8
L13 H_A#9
H_D#6 H_A#9 H_A#[3..35] 4
500 mil ( MAX ) H_D#7 F3 G17 H_A#10
H_D#8 H_D#7 H_A#10 H_A#11
N8 H_D#8 H_A#11 C14
1D05V_S0 H_D#9 H2 K16 H_A#12
H_D#10 H_D#9 H_A#12 H_A#13
M10 H_D#10 H_A#13 B13
H_D#11 N12 L16 H_A#14
H_D#12 H_D#11 H_A#14 H_A#15
N9 H_D#12 H_A#15 J17
H_D#13 H5 B14 H_A#16
H_D#13 H_A#16
1

H_D#14 P13 K19 H_A#17


R208 H_D#15 H_D#14 H_A#17 H_A#18
K9 H_D#15 H_A#18 P15
H_D#16 M2 R17 H_A#19
221R2F-2-GP H_D#17 H_D#16 H_A#19 H_A#20
W10 H_D#17 H_A#20 B16
H_D#18 Y8 H20 H_A#21
2

H_D#19 H_D#18 H_A#21 H_A#22


V4 H_D#19 H_A#22 L19
H_SWING H_D#20 M3 D17 H_A#23
H_D#21 H_D#20 H_A#23 H_A#24
J1 H_D#21 H_A#24 M17
1

H_D#22 N5 N16 H_A#25


H_D#22 H_A#25
1

R209 C352 H_D#23 N3 J19 H_A#26


SCD1U10V2KX-5GP H_D#24 H_D#23 H_A#26 H_A#27
W6 H_D#24 H_A#27 B18
100R2F-L1-GP-U H_D#25 W9 E19 H_A#28
2

H_D#26 H_D#25 H_A#28 H_A#29


N2 B17
2

H_D#27 H_D#26 H_A#29 H_A#30


Y7 H_D#27 H_A#30 B15
H_D#28 Y9 E17 H_A#31
H_D#29 H_D#28 H_A#31 H_A#32
P4 H_D#29 H_A#32 C18
H_D#30 W3 A19 H_A#33
H_D#31 H_D#30 H_A#33 H_A#34
N1 H_D#31 H_A#34 B19
H_SCOMP and H_SCOMP# Resistors and H_D#32 AD12 N19 H_A#35
H_D#33 H_D#32 H_A#35
AE3
Capacitors close MCH 500 mil ( MAX ) H_D#34 AD9
H_D#33
G12

HOST
H_D#34 H_ADS# H_ADS# 4
H_D#35 AC9 H17 H_ADSTB#0 4
H_D#36 H_D#35 H_ADSTB#0
AC7 H_D#36 H_ADSTB#1 G20 H_ADSTB#1 4
1D05V_S0 H_D#37 AC14 C8 H_BNR# 4
H_D#38 H_D#37 H_BNR#
AD11 H_D#38 H_BPRI# E8 H_BPRI# 4
H_D#39 AC11 F12 H_BREQ#0 4
H_D#39 H_BREQ#
1 2 H_SCOMP H_D#40 AB2 H_D#40 H_DEFER# D6 H_DEFER# 4
R206 54D9R2F-L1-GP H_D#41 AD7 C10
H_D#41 H_DBSY# H_DBSY# 4
H_D#42 AB1 AM5 CLK_MCH_BCLK 3
H_D#43 H_D#42 HPLL_CLK
Y3 H_D#43 HPLL_CLK# AM7 CLK_MCH_BCLK# 3
1 2 H_SCOMP# H_D#44 AC6 H_D#44 H_DPWR# H8 H_DPWR# 4
R205 54D9R2F-L1-GP H_D#45 AE2 K7
H_D#45 H_DRDY# H_DRDY# 4
H_D#46 AC5 E4 H_HIT# 4
H_D#47 H_D#46 H_HIT#
AG3 H_D#47 H_HITM# C6 H_HITM# 4
H_D#48 AJ9 G10 H_LOCK# 4
H_D#49 H_D#48 H_LOCK#
H_RCOMP routing Trace width and AH8 H_D#49 H_TRDY# B7 H_TRDY# 4
H_D#50 AJ14
Spacing use 10 / 20 mil H_D#51 AE9
H_D#50
H_D#52 H_D#51
AE11 H_D#52
H_D#53 AH12
H_D#54 H_D#53 H_DINV#0
AJ5 H_D#54 H_DINV#0 K5 H_DINV#0 4
H_D#55 AH5 L2 H_DINV#1 H_DINV#1 4
H_D#55 H_DINV#1
1 2 H_RCOMP H_D#56 AJ6 H_D#56 H_DINV#2 AD13 H_DINV#2 H_DINV#2 4
R207 24D9R2F-L-GP H_D#57 AE7 AE13 H_DINV#3
H_D#57 H_DINV#3 H_DINV#3 4
H_D#58 AJ7
H_D#59 H_D#58 H_DSTBN#0
AJ2 H_D#59 H_DSTBN#0 M7 H_DSTBN#0 4
H_D#60 AE5 K3 H_DSTBN#1 H_DSTBN#1 4
H_D#61 H_D#60 H_DSTBN#1 H_DSTBN#2
AJ3 H_D#61 H_DSTBN#2 AD2 H_DSTBN#2 4
H_D#62 AH2 AH11 H_DSTBN#3 H_DSTBN#3 4
H_D#63 H_D#62 H_DSTBN#3
AH13 H_D#63 H_DSTBP#0
Place them near to the chip ( < 0.5") H_DSTBP#0 L7
K2 H_DSTBP#1
H_DSTBP#0 4
H_DSTBP#1 H_DSTBP#1 4
H_SWING B3 AC2 H_DSTBP#2 H_DSTBP#2 4
1D05V_S0 H_RCOMP H_SWING H_DSTBP#2 H_DSTBP#3
C2 H_RCOMP H_DSTBP#3 AJ10 H_DSTBP#3 4
H_SCOMP W1 M14 H_REQ#0
H_SCOMP H_REQ#0
1

H_SCOMP# W2 E13 H_REQ#1


H_SCOMP# H_REQ#1 H_REQ#2
1KR2F-3-GP H_REQ#2 A11
4 H_CPURST# B6 H13 H_REQ#3
R213 H_CPURST# H_REQ#3 H_REQ#4
4 H_CPUSLP# E5 H_CPUSLP# H_REQ#4 B12
2

E12 H_RS#0
H_AVREF H_RS#0 H_RS#1
B9 H_AVREF H_RS#1 D7
A9 D8 H_RS#2
H_DVREF H_RS#2
1

R211
1

C356
2KR2F-3-GP SCD1U16V2ZY-2GP CRESTLINE-GP-U-NF
2

71.CREST.00U

H_REF Decoupling Crestline


close Crestline 100 mil
GM965 ( 71.GM965.00U )
GL960 ( 71.GL960.A0U )
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title

GMCH (1 of 5) AGTL
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 6 of 38
5 4 3 2 1

U31B 2 OF 10 U31C 3 OF 10
R117
P36 AV29 M_CLK_DDR0 TP26 1 LBKLT_CR J40 N43 PEG_CMP 2 1 1D05V_S0
RSVD#P36 SM_CK0 M_CLK_DDR0 11 L_BKLT_CTRL PEG_COMPI
P37 BB23 M_CLK_DDR1 19 GMCH_BL_EN GMCH_BL_EN H39 M43
RSVD#P37 SM_CK1 M_CLK_DDR1 11 L_BKLT_EN PEG_COMPO
R35 BA25 M_CLK_DDR2 LCTLA_CLK E39 24D9R2F-L-GP
RSVD#R35 SM_CK3 M_CLK_DDR2 11 L_CTRL_CLK
N35 AV23 M_CLK_DDR3 LCTLB_DATA E40
RSVD#N35 SM_CK4 M_CLK_DDR3 11 L_CTRL_DATA
AR12 14 LDDC_CLK LDDC_CLK C37 J51
RSVD#AR12 M_CLK_DDR#0 LDDC_DATA L_DDC_CLK PEG_RX#0
AR13 RSVD#AR13 SM_CK#0 AW30 M_CLK_DDR#0 11 14 LDDC_DATA D35 L_DDC_DATA PEG_RX#1 L51
AM12 BA23 M_CLK_DDR#1 14 LCDVDD_EN GMCH_LCDVDD_ON K40 N47
RSVD#AM12 SM_CK#1 M_CLK_DDR#1 11 L_VDD_EN PEG_RX#2
AN13 AW25 M_CLK_DDR#2 T45
RSVD#AN13 SM_CK#3 M_CLK_DDR#2 11 PEG_RX#3
J12 AW23 M_CLK_DDR#3 LIBG L41 T50
RSVD#J12 SM_CK#4 M_CLK_DDR#3 11 LVDS_IBG PEG_RX#4
AR37 1 L_LVBG L43 U40
RSVD#AR37 M_CKE0 TP28 LVDS_VBG PEG_RX#5
AM36 BE29 N41 Y44

DDR MUXING
RSVD#AM36 SM_CKE0 M_CKE0 11,12 LVDS_VREFH PEG_RX#6
D AL36 AY32 M_CKE1 M_CKE1 11,12 N40 Y40 D
RSVD#AL36 SM_CKE1 M_CKE2 LVDS_VREFL PEG_RX#7
AM37 RSVD#AM37 SM_CKE3 BD39 M_CKE2 11,12 14 GMCH_TXACLK- D46 LVDSA_CLK# PEG_RX#8 AB51
D20 BG37 M_CKE3 M_CKE3 11,12 14 GMCH_TXACLK+ C45 W49
RSVD#D20 SM_CKE4 LVDSA_CLK PEG_RX#9

LVDS
D44 LVDSB_CLK# PEG_RX#10 AD44
BG20 M_CS#0 M_CS#0 11,12 E42 AD40
SM_CS#0 M_CS#1 LVDSB_CLK PEG_RX#11 3D3V_S0
SM_CS#1 BK16 M_CS#1 11,12 PEG_RX#12 AG46
BG16 M_CS#2 M_CS#2 11,12 14 GMCH_TXAOUT0- GMCH_TXAOUT0- G51 AH49
SM_CS#2 M_CS#3 GMCH_TXAOUT1- E51 LVDSA_DATA#0 PEG_RX#13
H10 RSVD#H10 SM_CS#3 BE13 M_CS#3 11,12 14 GMCH_TXAOUT1- LVDSA_DATA#1 PEG_RX#14 AG45
B51 14 GMCH_TXAOUT2- GMCH_TXAOUT2- F49 AG41 RN14
RSVD#B51 LVDSA_DATA#2 PEG_RX#15

RSVD
BJ20 BH18 M_ODT0 M_ODT0 11,12 1GMCH_TXAOUT3- C48 LCTLA_CLK 1 8
RSVD#BJ20 SM_ODT0 M_ODT1 TP33 LVDSA_DATA#3 LCTLB_DATA
BK22 RSVD#BK22 SM_ODT1 BJ15 M_ODT1 11,12 PEG_RX0 J50 2 7
BF19 BJ14 M_ODT2 M_ODT2 11,12 14 GMCH_TXAOUT0+ GMCH_TXAOUT0+ G50 L50 PM_EXTTS#0 3 6
RSVD#BF19 SM_ODT2 M_ODT3 1D8V_S3 GMCH_TXAOUT1+ LVDSA_DATA0 PEG_RX1 PM_EXTTS#1
BH20 RSVD#BH20 SM_ODT3 BE16 M_ODT3 11,12 14 GMCH_TXAOUT1+ E50 LVDSA_DATA1 PEG_RX2 M47 4 5
BK18 14 GMCH_TXAOUT2+ GMCH_TXAOUT2+ F48 U44 SRN10KJ-6-GP
RSVD#BK18 SM_RCOMP_VOH LVDSA_DATA2 PEG_RX3
BJ18 RSVD#BJ18 SM_RCOMP_VOH BK31 R212 1GMCH_TXAOUT3+ D47 LVDSA_DATA3 PEG_RX4 T49
BF23 BL31 SM_RCOMP_VOL M_RCOMPP 2 1 TP31 T41
RSVD#BF23 SM_RCOMP_VOL 20R2F-GP PEG_RX5
BG23 RSVD#BG23 G44 LVDSB_DATA#0 PEG_RX6 W45
BC23 BL15 M_RCOMPP R210 B47 W41
RSVD#BC23 SM_RCOMP M_RCOMPN M_RCOMPN LVDSB_DATA#1 PEG_RX7
BD24 BK14 2 1 B45 AB50

PCI_EXPRESS GRAPHICS
RSVD#BD24 SM_RCOMP# 20R2F-GP LVDSB_DATA#2 PEG_RX8
PEG_RX9 Y48
SM_VREF#AR49 AR49 DDR_VREF_S3 PEG_RX10 AC45
BH39 RSVD#BH39 SM_VREF#AW4 AW4 E44 LVDSB_DATA0 PEG_RX11 AC41
AW20 RSVD#AW20 A47 LVDSB_DATA1 PEG_RX12 AH47
BK20 RSVD#BK20 A45 LVDSB_DATA2 PEG_RX13 AG49
PEG_RX14 AH45
B42 DREFCLK AG42
DPLL_REF_CLK DREFCLK_96M 3 PEG_RX15
B44 C42 DREFCLK#
RSVD#B44 DPLL_REF_CLK# DREFCLK_96M# 3
C44 H48 DREFSSCLK N45
RSVD#C44 DPLL_REF_SSCLK DREFSSCLK_100M 3 PEG_TX#0
A35 H47 DREFSSCLK# TV_DACA E27 U39
RSVD#A35 DPLL_REF_SSCLK# DREFSSCLK_100M# 3 TVA_DAC PEG_TX#1
C B37 13 TV_DACB TV_DACB G27 U47 C
RSVD#B37 TVB_DAC PEG_TX#2
B36 RSVD#B36 PEG_CLK K44 CLK_MCH_3GPLL CLK_MCH_3GPLL 3 13 TV_DACC TV_DACC K27 TVC_DAC PEG_TX#3 N51
B34 K45 CLK_MCH_3GPLL# R50
CLK

RSVD#B34 PEG_CLK# CLK_MCH_3GPLL# 3 PEG_TX#4

TV
C34 RSVD#C34 F27 TVA_RTN PEG_TX#5 T42
J27 TVB_RTN PEG_TX#6 Y43
3D3V_S0 L27 W46
RN13 TVC_RTN PEG_TX#7
PEG_TX#8 W38
AN47 DMI_TXN0 2 3 TV_DCONSEL0 M35 AD39
DMI_RXN0 DMI_TXN0 16 TV_DCONSEL0 PEG_TX#9
AJ38 DMI_TXN1 1 4 TV_DCONSEL1 P33 AC46
DMI_RXN1 DMI_TXN1 16 TV_DCONSEL1 PEG_TX#10
3,4 CPU_SEL0 CPU_SEL0 P27 AN42 DMI_TXN2 AC49
CFG0 DMI_RXN2 DMI_TXN2 16 PEG_TX#11
3,4 CPU_SEL1 CPU_SEL1 N27 AN46 DMI_TXN3 SRN2K2J-1-GP AC42
CFG1 DMI_RXN3 DMI_TXN3 16 PEG_TX#12
3,4 CPU_SEL2 CPU_SEL2 N24 AH39
CFG2 PEG_TX#13
1 CFG3 C21 AM47 DMI_TXP0 AE49
DMI

CFG3 DMI_RXP0 DMI_TXP0 16 PEG_TX#14


TP8 1 CFG4 C23 CFG4 DMI_RXP1 AJ39 DMI_TXP1 DMI_TXP1 16 PEG_TX#15 AH44
TP10 1 CFG5 F23 AN41 DMI_TXP2 DMI_TXP2 16
CFG5 DMI_RXP2
TP3 1 CFG6 N23 CFG6 DMI_RXP3 AN45 DMI_TXP3 DMI_TXP3 16 PEG_TX0 M45
TP16 1 CFG7 G23 CFG7 13 GMCH_BLUE GMCH_BLUE H32 CRT_BLUE PEG_TX1 T38
CFG

TP12 1 CFG8 J20 CFG8 DMI_TXN0 AJ46 DMI_RXN0


DMI_RXN0 16 G32 CRT_BLUE# PEG_TX2 T46
TP6 1 CFG9 C20 CFG9 DMI_TXN1 AJ41 DMI_RXN1
DMI_RXN1 16 13 GMCH_GREEN GMCH_GREEN K29 CRT_GREEN PEG_TX3 N50
TP7 1 CFG10 R24 AM40 DMI_RXN2 J29 R51
CFG10 DMI_TXN2 DMI_RXN2 16 CRT_GREEN# PEG_TX4
TP15 1 CFG11 L23 CFG11 DMI_TXN3 AM44 DMI_RXN3
DMI_RXN3 16 13 GMCH_RED GMCH_RED F29 CRT_RED PEG_TX5 U43

VGA
TP14 1 CFG12 J23 CFG12 E29 CRT_RED# PEG_TX6 W42
TP4 1 CFG13 E23 CFG13 DMI_TXP0 AJ47 DMI_RXP0
DMI_RXP0 16 PEG_TX7 Y47
TP11 1 CFG14 E20 CFG14 DMI_TXP1 AJ42 DMI_RXP1
DMI_RXP1 16 PEG_TX8 Y39
TP5 1 CFG15 K23 AM39 DMI_RXP2 13 GMCH_DDCCLK GMCH_DDCCLK K33 AC38
CFG15 DMI_TXP2 DMI_RXP2 16 CRT_DDC_CLK PEG_TX9
TP13 1 CFG16 M20 CFG16 DMI_TXP3 AM43 DMI_RXP3
DMI_RXP3 16 13 GMCH_DDCDATA GMCH_DDCDATA G35
CRT_DDC_DATA PEG_TX10 AD47
TP9 1 CFG17 M24 CFG17 13 GMCH_VSYNC E33 CRT_VSYNC PEG_TX11 AC50
TP18 1 CFG18 L32 CFG18
CRT_IREF C32 CRT_TVO_IREF PEG_TX12 AD43
TP20 1 CFG19 N33 CFG19 13 GMCH_HSYNC F33 CRT_HSYNC PEG_TX13 AG39
B TP19 B
1 CFG20 L35 AE50
GRAPHICS VID

TP24 CFG20 PEG_TX14


PEG_TX15 AH43
E35 GFX_VID0 1 TP22
GFX_VID0

2
A39 GFX_VID1 1 TP107
PM_BMBUSY# G41 GFX_VID1 GFX_VID2 R97
16 PM_BMBUSY# PM_BM_BUSY# GFX_VID2 C38 1 TP106
4,15,30 H_DPRSTP# H_DPRSTP# L39 B39 GFX_VID3 1 TP108 CRESTLINE-GP-U-NF
PM_EXTTS#0 PM_DPRSTP# GFX_VID3 GFX_VR_EN 1K3R2F-1-GP
L36 PM_EXT_TS#0 GFX_VR_EN E36 1 TP23
PM

PM_EXTTS#1 J36

1
VGATE_PWRGDAW49 PM_EXT_TS#1 GMCH_BLUE
16,30 VGATE_PWRGD PWROK 1 2
PLT_RST1#_NB AV20 R87 150R2F-1-GP
H_THERMTRIP# N20 RSTIN# 1D25V_S0 GMCH_GREEN
4,15 H_THERMTRIP# THERMTRIP# 1 2
16,30 PM_DPRSLPVR PM_DPRSLPVR G36 R93 150R2F-1-GP
DPRSLPVR GMCH_RED 1 2
1

R95 150R2F-1-GP
AM49 CL_CLK0 R229 TV_DACA 1 2
3D3V_S0 CL_CLK CL_CLK0 16
BJ51 AK50 CL_DATA0 1KR2F-3-GP FOR Calero: 255 ohm R90 150R2F-1-GP
NC#BJ51 CL_DATA CL_DATA0 16
BK51 AT43 PWROK Crestline: 1.3k ohm TV_DACB 1 2 R120
ME

NC#BK51 CL_PWROK PWROK 16,18


U13 CL_RST# R91 150R2F-1-GP LIBG
-1 BK50 AN49 CL_RST# 16 1 2
2

NC#BK50 CL_RST# MCH_CLVREF TV_DACC


1 B BL50 NC#BL50 CL_VREF AM50 CRT_IREF routing Trace 1 2
1

5 BL49 R92 150R2F-1-GP 2K4R2F-GP


R123 2
VCC
BL3
NC#BL49 width use 20 mil
A NC#BL3
1

47R2J-2-GP 4 BL2
Y NC#BL2
2
NC

3 BK1 R228
GND NC#BK1 C396
BJ1 H35 392R2F-GP
2

74LVC1G08GW-1-GP NC#BJ1 SDVO_CTRL_CLK SDVO_CRT_DATA


E1 K36 1 TP21 SCD1U10V2KX-5GP
1

NC#E1 SDVO_CTRL_DATA CLK_3GPLLREQ#


DY A5 G39
2

NC#A5 CLKREQ# MCH_ICH_SYNC#


C51 NC#C51 ICH_SYNC# G40 MCH_ICH_SYNC# 16
B50
MISC

NC#B50 R218 R217


A A50 NC#A50 A
PLT_RST1# 16,19,20,22 A49 NC#A49 TEST1 A37 TEST1_GMCH 1D8V_S3 2 1 SM_RCOMP_VOH 2 1 SM_RCOMP_VOL <Variant Name>
BK2 NC#BK2 TEST2 R32 TEST2_GMCH
1

1
1KR2F-3-GP C378 C381 3K01R2F-3-GP C370 C367
-1 Wistron Incorporated
1

SCD01U16V2KX-3GP

SC2D2U6D3V3MX-1-GP

SCD01U16V2KX-3GP

SC2D2U6D3V3MX-1-GP
R216
R100 R225 21F, 88, Hsin Tai Wu Rd
2

2
3D3V_S0 CRESTLINE-GP-U-NF 0R0402-PAD 1KR2F-3-GP
R104 Hsichih, Taipei
20KR2J-L2-GP
2

CLK_3GPLLREQ# 1 2 Title
2

10KR2J-3-GP Size
GMCH (2 of 5) DMI/LVDS/PEG
Document Number Rev
A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 7 of 38
5 4 3 2 1
U31I 9 OF 10

A13 VSS VSS AW24


A15 VSS VSS AW29
A17 AW32 M_B_DM[7..0]
VSS VSS M_B_DM[7..0] 11
A24 VSS VSS AW5
AA21 AW7 M_A_DM[7..0] M_B_DQ[63..0] M_B_DQS[7..0]
VSS VSS M_A_DM[7..0] 11 11 M_B_DQ[63..0] M_B_DQS[7..0] 11
AA24 VSS VSS AY10
AA29 AY24 M_A_DQ[63..0] M_A_DQS[7..0] M_B_DQS#[7..0]
VSS VSS 11 M_A_DQ[63..0] M_A_DQS[7..0] 11 M_B_DQS#[7..0] 11
AB20 VSS VSS AY37
AB23 AY42 M_A_DQS#[7..0] M_B_A[14..0]
VSS VSS M_A_DQS#[7..0] 11 M_B_A[14..0] 11,12
AB26 VSS VSS AY43
AB28 AY45 M_A_A[14..0]
VSS VSS M_A_A[14..0] 11,12
AB31 VSS VSS AY47
AC10 VSS VSS AY50
AC13 B10 U31D 4 OF 10 U31E 5 OF 10
VSS VSS
AC3 VSS VSS B20
AC39 B24 M_A_DQ0 AR43 BB19 M_A_BS#0 M_A_BS#0 11,12 M_B_DQ0 AP49 AY17 M_B_BS#0 M_B_BS#0 11,12
VSS VSS M_A_DQ1 SA_DQ0 SA_BS0 M_A_BS#1 M_B_DQ1 SB_DQ0 SB_BS0 M_B_BS#1
AC43 VSS VSS B29 AW44 SA_DQ1 SA_BS1 BK19 M_A_BS#1 11,12 AR51 SB_DQ1 SB_BS1 BG18 M_B_BS#1 11,12
AC47 B30 M_A_DQ2 BA45 BF29 M_A_BS#2 M_A_BS#2 11,12 M_B_DQ2 AW50 BG36 M_B_BS#2 M_B_BS#2 11,12
VSS VSS M_A_DQ3 SA_DQ2 SA_BS2 M_B_DQ3 SB_DQ2 SB_BS2
AD1 VSS VSS B35 AY46 SA_DQ3 AW51 SB_DQ3
AD21 B38 M_A_DQ4 AR41 BL17 M_A_CAS# M_A_CAS# 11,12 M_B_DQ4 AN51 BE17 M_B_CAS# M_B_CAS# 11,12
VSS VSS M_A_DQ5 SA_DQ4 SA_CAS# M_B_DQ5 SB_DQ4 SB_CAS#
AD26 VSS VSS B43 AR45 SA_DQ5 AN50 SB_DQ5
AD29 B46 M_A_DQ6 AT42 AT45 M_A_DM0 M_B_DQ6 AV50 AR50 M_B_DM0
VSS VSS M_A_DQ7 SA_DQ6 SA_DM0 M_A_DM1 M_B_DQ7 SB_DQ6 SB_DM0 M_B_DM1
AD3 VSS VSS B5 AW47 SA_DQ7 SA_DM1 BD44 AV49 SB_DQ7 SB_DM1 BD49
AD41 B8 M_A_DQ8 BB45 BD42 M_A_DM2 M_B_DQ8 BA50 BK45 M_B_DM2
VSS VSS M_A_DQ9 SA_DQ8 SA_DM2 M_A_DM3 M_B_DQ9 SB_DQ8 SB_DM2 M_B_DM3
AD45 VSS VSS BA1 BF48 SA_DQ9 SA_DM3 AW38 BB50 SB_DQ9 SB_DM3 BL39
AD49 BA17 M_A_DQ10 BG47 AW13 M_A_DM4 M_B_DQ10 BA49 BH12 M_B_DM4
VSS VSS M_A_DQ11 SA_DQ10 SA_DM4 M_A_DM5 M_B_DQ11 SB_DQ10 SB_DM4 M_B_DM5
AD5 VSS VSS BA18 BJ45 SA_DQ11 SA_DM5 BG8 BE50 SB_DQ11 SB_DM5 BJ7
AD50 BA2 M_A_DQ12 BB47 AY5 M_A_DM6 M_B_DQ12 BA51 BF3 M_B_DM6
VSS VSS M_A_DQ13 SA_DQ12 SA_DM6 M_A_DM7 M_B_DQ13 SB_DQ12 SB_DM6 M_B_DM7
AD8 VSS VSS BA24 BG50 SA_DQ13 SA_DM7 AN6 AY49 SB_DQ13 SB_DM7 AW2
AE10 BB12 M_A_DQ14 BH49 M_B_DQ14 BF50
VSS VSS M_A_DQ15 SA_DQ14 M_A_DQS0 M_B_DQ15 SB_DQ14 M_B_DQS0
AE14 VSS VSS BB25 BE45 SA_DQ15 SA_DQS0 AT46 BF49 SB_DQ15 SB_DQS0 AT50
AE6 BB40 M_A_DQ16 AW43 BE48 M_A_DQS1 M_B_DQ16 BJ50 BD50 M_B_DQS1
VSS VSS M_A_DQ17 SA_DQ16 SA_DQS1 M_A_DQS2 M_B_DQ17 SB_DQ16 SB_DQS1 M_B_DQS2
AF20 VSS VSS BB44 BE44 SA_DQ17 SA_DQS2 BB43 BJ44 SB_DQ17 SB_DQS2 BK46
AF23 BB49 M_A_DQ18 BG42 BC37 M_A_DQS3 M_B_DQ18 BJ43 BK39 M_B_DQS3
VSS VSS M_A_DQ19 SA_DQ18 SA_DQS3 M_A_DQS4 M_B_DQ19 SB_DQ18 SB_DQS3 M_B_DQS4
AF24 VSS VSS BB8 BE40 SA_DQ19 SA_DQS4 BB16 BL43 SB_DQ19 SB_DQS4 BJ12
AF31 BC16 M_A_DQ20 BF44 BH6 M_A_DQS5 M_B_DQ20 BK47 BL7 M_B_DQS5
VSS VSS M_A_DQ21 SA_DQ20 SA_DQS5 M_A_DQS6 M_B_DQ21 SB_DQ20 SB_DQS5 M_B_DQS6
AG2 VSS VSS BC24 BH45 SA_DQ21 SA_DQS6 BB2 BK49 SB_DQ21 SB_DQS6 BE2
AG38 BC25 M_A_DQ22 BG40 AP3 M_A_DQS7 M_B_DQ22 BK43 AV2 M_B_DQS7
VSS VSS M_A_DQ23 SA_DQ22 SA_DQS7 M_A_DQS#0 M_B_DQ23 SB_DQ22 SB_DQS7 M_B_DQS#0
AG43 BC36 BF40 AT47 BK42 AU50

DDR SYSTEM MEMORRY A


VSS VSS M_A_DQ24 SA_DQ23 SA_DQS#0 M_A_DQS#1 M_B_DQ24 SB_DQ23 SB_DQS#0 M_B_DQS#1

DDR SYSTEM MEMORY B


AG47 VSS VSS BC40 AR40 SA_DQ24 SA_DQS#1 BD47 BJ41 SB_DQ24 SB_DQS#1 BC50
AG50 BC51 M_A_DQ25 AW40 BC41 M_A_DQS#2 M_B_DQ25 BL41 BL45 M_B_DQS#2
VSS VSS M_A_DQ26 SA_DQ25 SA_DQS#2 M_A_DQS#3 M_B_DQ26 SB_DQ25 SB_DQS#2 M_B_DQS#3
AH3 VSS VSS BD13 AT39 SA_DQ26 SA_DQS#3 BA37 BJ37 SB_DQ26 SB_DQS#3 BK38
AH40 BD2 M_A_DQ27 AW36 BA16 M_A_DQS#4 M_B_DQ27 BJ36 BK12 M_B_DQS#4
AH41
AH7
VSS
VSS VSS VSS
VSS BD28
BD45
M_A_DQ28
M_A_DQ29
AW41
AY41
SA_DQ27
SA_DQ28
SA_DQS#4
SA_DQS#5 BH7
BC1
M_A_DQS#5
M_A_DQS#6
M_B_DQ28
M_B_DQ29
BK41
BJ40
SB_DQ27
SB_DQ28
SB_DQS#4
SB_DQS#5 BK7
BF2
M_B_DQS#5
M_B_DQS#6
VSS VSS M_A_DQ30 SA_DQ29 SA_DQS#6 M_A_DQS#7 M_B_DQ30 SB_DQ29 SB_DQS#6 M_B_DQS#7
AH9 VSS VSS BD48 AV38 SA_DQ30 SA_DQS#7 AP2 BL35 SB_DQ30 SB_DQS#7 AV3
AJ11 BD5 M_A_DQ31 AT38 M_B_DQ31 BK37
VSS VSS M_A_DQ32 SA_DQ31 M_A_A0 M_B_DQ32 SB_DQ31 M_B_A0
AJ13 VSS VSS BE1 AV13 SA_DQ32 SA_MA0 BJ19 BK13 SB_DQ32 SB_MA0 BC18
AJ21 BE19 M_A_DQ33 AT13 BD20 M_A_A1 M_B_DQ33 BE11 BG28 M_B_A1
VSS VSS M_A_DQ34 SA_DQ33 SA_MA1 M_A_A2 M_B_DQ34 SB_DQ33 SB_MA1 M_B_A2
AJ24 VSS VSS BE23 AW11 SA_DQ34 SA_MA2 BK27 BK11 SB_DQ34 SB_MA2 BG25
AJ29 BE30 M_A_DQ35 AV11 BH28 M_A_A3 M_B_DQ35 BC11 AW17 M_B_A3
VSS VSS M_A_DQ36 SA_DQ35 SA_MA3 M_A_A4 M_B_DQ36 SB_DQ35 SB_MA3 M_B_A4
AJ32 VSS VSS BE42 AU15 SA_DQ36 SA_MA4 BL24 BC13 SB_DQ36 SB_MA4 BF25
AJ43 BE51 M_A_DQ37 AT11 BK28 M_A_A5 M_B_DQ37 BE12 BE25 M_B_A5
VSS VSS M_A_DQ38 SA_DQ37 SA_MA5 M_A_A6 M_B_DQ38 SB_DQ37 SB_MA5 M_B_A6
AJ45 VSS VSS BE8 BA13 SA_DQ38 SA_MA6 BJ27 BC12 SB_DQ38 SB_MA6 BA29
AJ49 BF12 M_A_DQ39 BA11 BJ25 M_A_A7 M_B_DQ39 BG12 BC28 M_B_A7
VSS VSS M_A_DQ40 SA_DQ39 SA_MA7 M_A_A8 M_B_DQ40 SB_DQ39 SB_MA7 M_B_A8
AK20 VSS VSS BF16 BE10 SA_DQ40 SA_MA8 BL28 BJ10 SB_DQ40 SB_MA8 AY28
AK21 BF36 M_A_DQ41 BD10 BA28 M_A_A9 M_B_DQ41 BL9 BD37 M_B_A9
VSS VSS M_A_DQ42 SA_DQ41 SA_MA9 M_A_A10 M_B_DQ42 SB_DQ41 SB_MA9 M_B_A10
AK26 VSS VSS BG19 BD8 SA_DQ42 SA_MA10 BC19 BK5 SB_DQ42 SB_MA10 BG17
AK28 BG2 M_A_DQ43 AY9 BE28 M_A_A11 M_B_DQ43 BL5 BE37 M_B_A11
VSS VSS M_A_DQ44 SA_DQ43 SA_MA11 M_A_A12 M_B_DQ44 SB_DQ43 SB_MA11 M_B_A12
AK31 VSS VSS BG24 BG10 SA_DQ44 SA_MA12 BG30 BK9 SB_DQ44 SB_MA12 BA39
AK51 BG29 M_A_DQ45 AW9 BJ16 M_A_A13 M_B_DQ45 BK10 BG13 M_B_A13
VSS VSS M_A_DQ46 SA_DQ45 SA_MA13 M_A_A14 M_B_DQ46 SB_DQ45 SB_MA13 M_B_A14
AL1 VSS VSS BG39 BD7 SA_DQ46 SA_MA14 BJ29 BJ8 SB_DQ46 SB_MA14 BE24
AM11 BG48 M_A_DQ47 BB9 M_B_DQ47 BJ6
VSS VSS M_A_DQ48 SA_DQ47 M_A_RAS# M_B_DQ48 SB_DQ47 M_B_RAS#
AM13 VSS VSS BG5 BB5 SA_DQ48 SA_RAS# BE18 M_A_RAS# 11,12 BF4 SB_DQ48 SB_RAS# AV16 M_B_RAS# 11,12
AM3 BG51 M_A_DQ49 AY7 AY20 SA_RCVEN# 1 TP17 M_B_DQ49 BH5 AY18 SB_RCVEN# 1
VSS VSS SA_DQ49 SA_RCVEN# SB_DQ49 SB_RCVEN# TP2
AM4 BH17 M_A_DQ50 AT5 M_B_DQ50 BG1
VSS VSS M_A_DQ51 SA_DQ50 M_A_WE# M_B_DQ51 SB_DQ50 M_B_WE#
AM41 VSS VSS BH30 AT7 SA_DQ51 SA_WE# BA19 M_A_WE# 11,12 BC2 SB_DQ51 SB_WE# BC17 M_B_WE# 11,12
AM45 BH44 M_A_DQ52 AY6 M_B_DQ52 BK3
VSS VSS M_A_DQ53 SA_DQ52 M_B_DQ53 SB_DQ52
AN1 VSS VSS BH46 BB7 SA_DQ53 BE4 SB_DQ53
AN38 BH8 M_A_DQ54 AR5 Place Test PAD Near to Chip M_B_DQ54 BD3 Place Test PAD Near to Chip
VSS VSS M_A_DQ55 SA_DQ54 M_B_DQ55 SB_DQ54
AN39 VSS VSS BJ11 AR8 SA_DQ55 as could as possible BJ2 SB_DQ55 ascould as possible
AN43 BJ13 M_A_DQ56 AR9 M_B_DQ56 BA3
VSS VSS M_A_DQ57 SA_DQ56 M_B_DQ57 SB_DQ56
AN5 VSS VSS BJ38 AN3 SA_DQ57 BB3 SB_DQ57
AN7 BJ4 M_A_DQ58 AM8 M_B_DQ58 AR1
VSS VSS M_A_DQ59 SA_DQ58 M_B_DQ59 SB_DQ58
AP4 VSS VSS BJ42 AN10 SA_DQ59 AT3 SB_DQ59
AP48 BJ46 M_A_DQ60 AT9 M_B_DQ60 AY2
VSS VSS M_A_DQ61 SA_DQ60 M_B_DQ61 SB_DQ60
AP50 VSS VSS BK15 AN9 SA_DQ61 AY3 SB_DQ61
AR11 BK17 M_A_DQ62 AM9 M_B_DQ62 AU2
VSS VSS M_A_DQ63 SA_DQ62 M_B_DQ63 SB_DQ62
AR2 VSS VSS BK25 AN11 SA_DQ63 AT2 SB_DQ63
AR39 VSS VSS BK29
AR44 VSS VSS BK36
AR47 VSS VSS BK40
AR7 BK44 CRESTLINE-GP-U-NF CRESTLINE-GP-U-NF
VSS VSS
AT10 VSS VSS BK6
AT14 VSS VSS BK8
AT41 VSS VSS BL11
AT49 VSS VSS BL13
AU1 VSS VSS BL19
AU23 VSS VSS BL22
AU29 VSS VSS BL37
AU3 VSS VSS BL47
AU36 VSS VSS C12
AU49 VSS VSS C16
AU51 VSS VSS C19
AV39 VSS VSS C28
AV48 VSS VSS C29
AW1 VSS VSS C33
AW12 C36
AW16
VSS VSS
C41
Wistron Incorporated
VSS VSS
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
CRESTLINE-GP-U-NF Title

GMCH (3 of 5) MEMORY
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 8 of 38
VCC_NCTF + VCC=1573mA VCC_AXG_NCTF + VCC_AXG=7700mA
U31F 6 OF 10 1D05V_S0
1573mA FOR VCC CORE AND VCC NCTF U31G 7 OF 10 U31J10 OF 10
1D05V_S0 AT35 VCC VCC_AXG_NCTF T17
AT34 VCC VCC_AXG_NCTF T18 308 mils from the Edge 1D05V_S0 AB33 VCC_NCTF

1
AH28 T19 C107 C122 C357 Coupling CAP AB36 C46 W11
VCC VCC_AXG_NCTF VCC_NCTF VSS VSS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
AC32 VCC VCC_AXG_NCTF T21 DY AB37 VCC_NCTF C50 VSS VSS W39
AC31 T22 DY AC33 T27 C7 W43

2
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF VSS VSS
AK32 VCC VCC_AXG_NCTF T23 1D05V_S0 1 2 AC35 VCC_NCTF VSS_NCTF T37 D13 VSS VSS W47
AJ31 T25 TC1 ST220U2VDM-5-GP AC36 U24 D24 W5

VCC CORE
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF VSS VSS
AJ28 VCC VCC_AXG_NCTF U15 DY AD35 VCC_NCTF VSS_NCTF U28 D3 VSS VSS W7
AH32 VCC VCC_AXG_NCTF U16 1 2 AD36 VCC_NCTF VSS_NCTF V31 D32 VSS VSS Y13
AH31 U17 C206 SC10U6D3V5KX-1GP AF33 V35 D39 Y2
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF VSS VSS
AH29
AF32
VCC VCC_AXG_NCTF U19
U20
-1 1 2
AF36
AH33
VCC_NCTF VSS_NCTF AA19
AB17
D45
D49
VSS VSS Y41
Y45

VSS NCTF
VCC VCC_AXG_NCTF C200 SC10U6D3V5KX-1GP VCC_NCTF VSS_NCTF VSS VSS
VCC_AXG_NCTF U21 AH35 VCC_NCTF VSS_NCTF AB35 E10 VSS VSS Y49
VCC_AXG_NCTF U23 AH36 VCC_NCTF VSS_NCTF AD19 E16 VSS VSS Y5

1
VCC_AXG_NCTF U26 1 2 AH37 VCC_NCTF VSS_NCTF AD37 E24 VSS VSS Y50
V16 C169 C114 C91 SCD1U10V2KX-5GP AJ33 AF17 E28 Y11
VCC_AXG_NCTF VCC_NCTF VSS_NCTF VSS VSS

SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R30 V17 AJ35 AF35 E32 P29

2
VCC VCC_AXG_NCTF VCC_NCTF VSS_NCTF VSS VSS
VCC_AXG_NCTF V19 1 2 AK33 VCC_NCTF VSS_NCTF AK17 E47 VSS VSS T29
V20 C81 SCD1U10V2KX-5GP AK35 AM17 F19 T31
VCC_AXG_NCTF VCC_NCTF VSS_NCTF VSS VSS
VCC_AXG_NCTF V21 AK36 VCC_NCTF VSS_NCTF AM24 F36 VSS VSS T33
VCC_AXG_NCTF V23 1 2 AK37 VCC_NCTF VSS_NCTF AP26 F4 VSS VSS R28
V24 C139 SCD1U10V2KX-5GP AD33 AP28 F40

VCC NCTF
VCC_AXG_NCTF VCC_NCTF VSS_NCTF VSS
VCC_AXG_NCTF Y15 -1 DY AJ36 VCC_NCTF VSS_NCTF AR15 F50 VSS
Y16 AM35 AR19 G1
3138mA POWER VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
Y17
Y19
AL33
AL35
VCC_NCTF
VCC_NCTF
VCC_NCTF
VSS_NCTF
VSS_NCTF AR28 G13
G16
VSS
VSS
VSS VSS AA32
1D8V_S3 AU32 VCC_SM VCC_AXG_NCTF Y20 1D05V_S0 1 2 AA33 VCC_NCTF G19 VSS VSS AB32
AU33 Y21 C79 SCD1U10V2KX-5GP AA35 G24 AD32
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS VSS
AU35 VCC_SM VCC_AXG_NCTF Y23 -1 DY AA36 VCC_NCTF G28 VSS VSS AF28
AV33 VCC_SM VCC_AXG_NCTF Y24 1 2 AP35 VCC_NCTF G29 VSS VSS AF29
AW33 Y26 C175 SCD1U10V2KX-5GP AP36 G33 AT27
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS VSS
AW35 VCC_SM VCC_AXG_NCTF Y28 AR35 VCC_NCTF G42 VSS VSS AV25
AY35 VCC_SM VCC_AXG_NCTF Y29 1 2 AR36 VCC_NCTF G45 VSS VSS H50
BA32 AA16 C179 SCD1U10V2KX-5GP Y32 G48
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS
BA33 VCC_SM VCC_AXG_NCTF AA17 Y33 VCC_NCTF G8 VSS
BA35 VCC_SM VCC_AXG_NCTF AB16 1 2 Y35 VCC_NCTF H24 VSS
BB33 AB19 C145 SCD1U10V2KX-5GP Y36 H28
BC32
BC33
VCC_SM
VCC_SM
VCC_AXG_NCTF
VCC_AXG_NCTF AC16
AC17 1 2
Y37
T30
VCC_NCTF
VCC_NCTF POWER H4
H45
VSS
VSS
BC35
VCC_SM VCC_AXG_NCTF
AC19 C131 SCD1U10V2KX-5GP T34
VCC_NCTF
A3 1 TP105 J11
VSS
VSS

VSS SCB
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB TP102 VSS
BD32 AD15 T35 B2 1 J16
VCC SM

VCC GFX NCTF

VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB TP103 VSS


BD35 VCC_SM VCC_AXG_NCTF AD16 1 2 U29 VCC_NCTF VSS_SCB C1 1 J2 VSS
BE32 AD17 C113 SCD1U10V2KX-5GP U31 BL1 1 TP104 J24
VCC_SM VCC_AXG_NCTF VCC_NCTF VSS_SCB TP110 VSS
BE33 VCC_SM VCC_AXG_NCTF AF16 U32 VCC_NCTF VSS_SCB BL51 1 J28 VSS
BE35 AF19 1 2 U33 A51 1 TP109 J33
VCC_SM VCC_AXG_NCTF C172 SCD1U10V2KX-5GP VCC_NCTF VSS_SCB VSS
BF33 VCC_SM VCC_AXG_NCTF AH15 U35 VCC_NCTF J35 VSS
BF34 VCC_SM VCC_AXG_NCTF AH16 U36 VCC_NCTF J39 VSS
BG32 VCC_SM VCC_AXG_NCTF AH17 V32 VCC_NCTF K12 VSS
BG33 VCC_SM VCC_AXG_NCTF AH19 V33 VCC_NCTF K47 VSS
BG35 VCC_SM VCC_AXG_NCTF AJ16 V36 VCC_NCTF K8 VSS
BH32 VCC_SM VCC_AXG_NCTF AJ17 V37 VCC_NCTF L1 VSS
BH34 AJ19 AT33 L17

VSS AXM
VCC_SM VCC_AXG_NCTF VCC_AXM VCC_AXM_S3 VSS
BH35 VCC_SM VCC_AXG_NCTF AK16 VCC_AXM AT31 L20 VSS
BJ32
BJ33
VCC_SM VCC_AXG_NCTF AK19
AL16
VCC_AXM_NCTF + VCC_AXM=540mA VCC_AXM AK29
AK24
L24
L28
VSS
VCC_SM VCC_AXG_NCTF VCC_AXM VSS
BJ34 VCC_SM VCC_AXG_NCTF AL17 VCC_AXM AK23 L3 VSS
BK32 AL19 VCC_AXM_S3 AJ26 L33
VCC_SM VCC_AXG_NCTF VCC_AXM VSS
BK33 VCC_SM VCC_AXG_NCTF AL20 Place on the Edge VCC_AXM AJ23 L49 VSS
BK34 VCC_SM VCC_AXG_NCTF AL21 AL24 VCC_AXM_NCTF M28 VSS
BK35 AL23 G9 AL26 M42
VCC_SM VCC_AXG_NCTF VCC_AXM_NCTF VSS
BL33 VCC_SM VCC_AXG_NCTF AM15 1D05V_S0 1 2 1 2 AL28 VCC_AXM_NCTF M46 VSS
AU30 AM16 C152 SC10U6D3V5KX-1GP AM26 M49

VSS AXM NCTF


VCC_SM VCC_AXG_NCTF VCC_AXM_NCTF VSS
VCC_AXG_NCTF AM19 AM28 VCC_AXM_NCTF M5 VSS
VCC_AXG_NCTF AM20 1 2 AM29 VCC_AXM_NCTF M50 VSS
AM21 C164 SCD1U10V2KX-5GP AM31 M9
VCC_AXG_NCTF VCC_AXM_NCTF VSS
-1 1D05V_S0 R20
T14
VCC_AXG VCC_AXG_NCTF AM23
AP15 1 2
AM32
AM33
VCC_AXM_NCTF N11
N14
VSS
VCC_AXG VCC_AXG_NCTF C142 SCD1U10V2KX-5GP VCC_AXM_NCTF VSS
W13 VCC_AXG VCC_AXG_NCTF AP16 AP29 VCC_AXM_NCTF N17 VSS
DY W14 VCC_AXG VCC_AXG_NCTF AP17 AP31 VCC_AXM_NCTF N29 VSS
1

C143 C124 Y12 AP19 1 2 AP32 N32


VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF VSS
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

AA20 AP20 C159 SCD1U10V2KX-5GP AP33 N36


VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF VSS
AA23 AP21 AL29 N39
2

VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF VSS


AA26 VCC_AXG VCC_AXG_NCTF AP23 1 2 AL31 VCC_AXM_NCTF N44 VSS
AA28 AP24 C132 SCD1U10V2KX-5GP AL32 N49
VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF VSS
AB21 VCC_AXG VCC_AXG_NCTF AR20 AR31 VCC_AXM_NCTF N7 VSS
AB24 VCC_AXG VCC_AXG_NCTF AR21 1 2 AR32 VCC_AXM_NCTF P19 VSS
AB29 AR23 C129 SCD1U10V2KX-5GP AR33 P2
VCC GFX

VCC_AXG VCC_AXG_NCTF VCC_AXM_NCTF VSS


AC20 VCC_AXG VCC_AXG_NCTF AR24 -1 DY P23 VSS
AC21 VCC_AXG VCC_AXG_NCTF AR26 P3 VSS
AC23 VCC_AXG VCC_AXG_NCTF V26 P50 VSS
AC24 VCC_AXG VCC_AXG_NCTF V28 R49 VSS
AC26 V29 CRESTLINE-GP-U-NF T39
VCC_AXG VCC_AXG_NCTF VSS
AC28 VCC_AXG VCC_AXG_NCTF Y31 T43 VSS
AC29
AD20
VCC_AXG FOR VCC SM T47
U41
VSS
VCC_AXG VSS
AD23 VCC_AXG
Place CAP where LVDS and DDR2 taps U45 VSS
AD24 AW45SM_LF1_GMCH Place on the Edge U50
VCC SM LF

VCC_AXG VCC_SM_LF VSS


AD28 VCC_AXG VCC_SM_LF BC39 SM_LF2_GMCH V2 VSS
AF21 VCC_AXG VCC_SM_LF BE39 SM_LF3_GMCH DY V3 VSS
AF26 VCC_AXG VCC_SM_LF BD17 SM_LF4_GMCH 1D8V_S3 1 2
AA31 VCC_AXG VCC_SM_LF BD4 SM_LF5_GMCH TC3 ST220U2VDM-5-GP
AH20 VCC_AXG VCC_SM_LF AW8 SM_LF6_GMCH
AH21 VCC_AXG VCC_SM_LF AT6 SM_LF7_GMCH 1 2 CRESTLINE-GP-U-NF
AH23 C155 SC10U6D3V5KX-1GP
VCC_AXG
1

AH24 C82 C83 C80 C109 C182 C181 C190


VCC_AXG
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD47U10V3ZY-GP

AH26 VCC_AXG 1 2
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

AD31 C176 SC10U6D3V5KX-1GP


2

VCC_AXG
AJ20 VCC_AXG
AN14 VCC_AXG 1 2
C161 SCD1U10V2KX-5GP
Wistron Incorporated
1 2 21F, 88, Hsin Tai Wu Rd
CRESTLINE-GP-U-NF C162 SCD1U10V2KX-5GP
Hsichih, Taipei
1 2 Title
C160 SCD1U10V2KX-5GP
GMCH (4 of 5) POWER1
Size Document Number Rev
Custom
LV1 -1
Date: Friday, August 10, 2007 Sheet 9 of 38
G13 80mA R98 10mA
1D25V_S0 1 2 M_VCCA_DPLLA 3D3V_S0 1 2
0R0402-PAD

1
C196 C165
C194
SC10U6D3V5KX-1GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP

2
U31H 8 OF 10 Place on the edge
G66 80mA U13 850mA -1
VTT 1D05V_S0
M_VCCA_DPLLB 3D3V_SYNC_S0 DY
1D25V_S0 1 2 -1 J32 VCC_SYNC VTT U12

1
R223 U11 C95 C345 C344 C126 C118 C177
80mA VTT
1

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
C393 3D3V_S0 1 2 3D3V_CRTDAC_S0 A33 U9 C167
C397 0R0603-PAD VCCA_CRT_DAC VTT SC10U6D3V5KX-1GP
B33 U8

2
VCCA_CRT_DAC VTT

CRT
SC10U6D3V5KX-1GP SCD1U10V2KX-5GP C389 U7
2

2
VTT
DY VTT U5
SCD1U10V2KX-5GP M_VCCA_DAC_BG A30 U3

2
VCCA_DAC_BG VTT
U2
L15 50mA B32 VSSA_DAC_BG
VTT
VTT U1

VTT
1D25V_S0 1 2 M_VCCA_HPLL T13
BLM18AG121SN-1GP R219 VTT
T11
5mA VTT
1

1
120ohm 100MHz C346 C350 3D3V_S0 1 2 T10
0R0402-PAD M_VCCA_DPLLA VTT
B49 VCCA_DPLLA VTT T9

1
SC22U6D3V5MX-2GP SCD1U10V2KX-5GP C383 T7
2

2
M_VCCA_DPLLB VTT
H49 VCCA_DPLLB VTT T6

PLL
SCD1U10V2KX-5GP T5

2
M_VCCA_HPLL VTT
AL2 T3
150mA VCCA_HPLL VTT
VTT T2
L14 M_VCCA_MPLL AM2 R3
M_VCCA_MPLL VCCA_MPLL VTT
1D25V_S0 1 2 VTT R2
BLM18AG121SN-1GP R121 R1
110mA POWER

A LVDS
VTT
1

120ohm 100MHz C349 1D8V_S3 1 2 1D8V_TXLVDS_S3 A41 VCCA_LVDS


1

0R0603-PAD G8

1
R204 SCD1U10V2KX-5GP B41 AT23 1D25V_SUS_AXD 1 2 1D25V_S0
2

C184 VSSA_LVDS VCC_AXD


VCC_AXD AU28

1
D51R3F-2-GP SC1KP50V2KX-1GP AU24

2
3D3V_RUN_PEG_BG VCC_AXD C133 C149
K50 AT29

AXD
2

M_VCCA_MPLL_R VCCA_PEG_BG VCC_AXD SC10U6D3V5KX-1GP


AT25

2
VCC_AXD
K49 AT30

A PEG
VSSA_PEG_BG VCC_AXD
1

C341 R226 400uA VCC_AXD_NCTF AR29 SC1U6D3V2KX-GP


SC10U6D3V5KX-1GP 1 2
3D3V_S0
2

0R0402-PAD 1D25V_RUN_PEGPLL U51 VCCA_PEG_PLL

1
C394 B23 1D25V_S0
VCC_AXF

AXF
SC10U6D3V5KX-1GP B21
VCC_AXF

1
SCD1U10V2KX-5GP 1D25V_S0 AW18 A21 C363 C360

2
VCCA_SM VCC_AXF C366 SCD1U10V2KX-5GP SC10U6D3V5KX-1GP
AV19
100mA VCCA_SM

1
L19 TC2 C73 C112 C146 AU19 AJ50 SC1U6D3V2KX-GP

2
VCCA_SM VCC_DMI
1D25V_S0 1 2 1D25V_RUN_PEGPLL AU18 VCCA_SM

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
BLM18BB221SN1D-GP R214
-1 120mA AU17

2
VCCA_SM
1

220ohm 100MHz C392 L16 BK24 1D8V_SUS_SM_CK 1 2 1D8V_S3


VCC_SM_CK 0R0603-PAD
1 2 AT22 BK23

A SM

SM CK
3D3V_S0 VCCA_SM VCC_SM_CK

1
R227 SCD1U10V2KX-5GP BLM18PG181SN-3GP AT21 BJ24 C365 C361
2

1R3F-GP ST100U4VBM-L-GP VCCA_SM VCC_SM_CK R215

SC10U6D3V5KX-1GP
DY 180ohm 100MHz AT19 VCCA_SM VCC_SM_CK BJ23
1

1
C374 C369 AT18 SCD1U10V2KX-5GP
2

2
1D25V_RUN_PEGPLL_R SCD1U10V2KX-5GP SC2D2U6D3V3MX-1-GP VCCA_SM 1R3F-GP
AT17 VCCA_SM
1D25V_S0 SC1U6D3V2KX-GP AR17
2

2
VCCA_SM_NCTF
1

AR16 A43 1D8V_TXLVDS_S3 1D8V_SUS_SM_CK1


VCCA_SM_NCTF VCC_TX_LVDS

1
C395 C398 C147 C108

1
SC10U6D3V5KX-1GP SCD1U10V2KX-5GP
2

BC29 C40 3D3V_HV_S0 C358

A CK
2

2
VCCA_SM_CK VCC_HV

HV
BB29 B40 SC10U6D3V5KX-1GP

2
VCCA_SM_CK VCC_HV
SC10U6D3V5KX-1GP 3D3VTVDAC C25
B25
VCCA_TVA_DAC
VCCA_TVA_DAC VCC_PEG AD51 1200mA 1D05V_S0
R224 C27 W50
60mA VCCA_TVB_DAC VCC_PEG

1
TV

PEG
1 2 B27 VCCA_TVB_DAC VCC_PEG W51
0R0603-PAD B28 V49 C217 C207
VCCA_TVC_DAC VCC_PEG
1

C148 A28 V50 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP

2
SCD1U10V2KX-5GP VCCA_TVC_DAC VCC_PEG
2

VCCD_CRT M32 AH50


250mA -1

TV/CRT
VCCD_CRT VCC_RXR_DMI

DMI
1D5VRUN_TVDAC L29 AH51 1D05V_S0
VCCD_TVDAC VCC_RXR_DMI
DY

1
G63 1D5VRUN_QDAC N28
1 2 60mA VCCD_QDAC
A7 VTTLF1 C342 C343

VTTLF
1D5V_S0 VTTLF

SC10U6D3V5KX-1GP
1D25V_SUS_MCH_PLL2 VTTLF2

SC10U6D3V5KX-1GP
AN2 F2

2
VCCD_HPLL VTTLF
1

C384 C387
VTTLF AH1 VTTLF3
SC10U6D3V5KX-1GP SCD1U10V2KX-5GP 1D25V_RUN_PEGPLL U48 VCCD_PEG_PLL

1
C351 C347 C353
2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
1D8V_SUS_DLVDS J41

LVDS
VCCD_LVDS
H42

2
VCCD_LVDS
L17
1D5V_S0 1 2 5mA
BLM18PG181SN-3GP
180ohm 100MHz CRESTLINE-GP-U-NF
1

C379 C376
SC10U6D3V5KX-1GP SCD1U10V2KX-5GP
3D3V_S0
2

D8
R129
G10 100mA
1D05V_S0 A K 1D05V_HV_S0 1 2 1 2 3D3V_HV_S0
G61
250mA

1
1D25V_S0 1 2 SS0530-GP C180
10R3J-3-GP
1

C348 SCD1U10V2KX-5GP

2
SCD1U10V2KX-5GP
2

<Variant Name>

R122 SCD1U10V2KX-5GP Wistron Incorporated


1D8V_S3 1 2 150mA 21F, 88, Hsin Tai Wu Rd
0R0603-PAD Hsichih, Taipei
1

C192
C186 Title
SC10U6D3V5KX-1GP
GMCH (5 of 5) POWER2
2

Size Document Number Rev


A3
LV1 -1
Date: Friday, August 10, 2007 Sheet 10 of 38
A B C D E

M_A_DQ[63..0] 8 M_B_DQ[63..0] 8
DIMM0 DIMM1
M_A_A[14..0]

M_A_DM[7..0]
8,12

8
DIMM0 M_B_A[14..0]

M_B_DM[7..0]
8,12

8
DIMM1 Reverse Connector Reverse Connector
M_A_DQS#[7..0] 8 M_B_DQS#[7..0] 8 U29
U30
1 1
M_A_DQS[7..0] 8 M_B_DQS[7..0] 8
M_A_A0 M_B_A0
1 1
2 2

102 108 102 108


3 3
4 4
5 5

M_A_RAS# 8,12 M_B_RAS# 8,12


6 6

A0 /RAS A0 RAS#
7 7
8 8
9 9
10 10

M_A_A1 M_B_A1
11 11
12 12

101 109 101 109


13 14 13 14
15 15
16 16

M_A_WE# 8,12 M_B_WE# 8,12


17 17

A1 /WE A1 WE#
18 18
19 19
20 20
21 21

M_A_A2 M_B_A2
22 22

2 2
23 23

100 113 100 113


24 24
25 25
26 26

M_A_CAS# 8,12 M_B_CAS# 8,12


27 27

A2 /CAS A2 CAS#
28 28
29 29
31 30 31 30
32 32

M_A_A3 M_B_A3

CON_SODIMM200_RVS_V1

CON_SODIMM200_RVS_V1
33 33
34 34

99 99
35 35
36 36
37 37
38 38

A3 A3
39 39
40 40

M_A_A4 98 110 M_B_A4 98 110


A4 /CS0 M_CS#0 7,12 A4 CS0# M_CS#2 7,12 41 41

M_A_A5 M_B_A5
42 42
43 43

97 115 97 115
44 44
45 45
46 46

M_CS#1 7,12 M_CS#3 7,12


47 47

A5 /CS1 A5 CS1#
48 48
49 49
50 50
51 51

M_A_A6 M_B_A6
52 52
53 53

94 94
54 54
55 56 55 56
57 57
58 58

A6 A6
59 59

4 4
60 60
61 61
62 62

M_A_A7 M_B_A7
63 63
64 64

92 79 92 79
65 65
66 66
67 67

M_CKE0 7,12 M_CKE2 7,12


68 68

A7 CKE0 A7 CKE0
69 69
70 70
71 71
72 72

M_A_A8 M_B_A8
73 74 73 74
75 75

93 80 93 80
76 76
77 77
78 78

M_CKE1 7,12 M_CKE3 7,12


79 79

A8 CKE1 A8 CKE1
80 80
81 81
82 82
83 83

M_A_A9 M_B_A9
84 84
85 85

91 91
86 86
87 87
88 88
89 89

A9 A9
90 90
91 91
93 92 93 92
94 94

M_A_A10 M_CLK_DDR0 M_B_A10 M_CLK_DDR2


95 95
96 96

105 30 105 30
97 97
98 98
99 99

M_CLK_DDR0 7 M_CLK_DDR2 7
100 100

A10/AP CK0 A10/AP CK0


101 101
102 102
103 103
104 104

M_A_A11 M_CLK_DDR#0 M_B_A11 M_CLK_DDR#2


105 105
106 106

90 32 90 32
107 107
108 108
109 110 109 110

M_CLK_DDR#0 7 M_CLK_DDR#2 7
111 111

A11 /CK0 A11 CK0#


112 112
113 113
114 114
115 115

M_A_A12 M_B_A12
116 116
117 117

89 89
118 118
119 119
120 120
121 121

A12 A12
122 122
123 123
124 124
125 125

M_A_A13 M_CLK_DDR1 M_B_A13 M_CLK_DDR3


126 126
127 127

116 164 116 164


129 128 129 128
130 130
131 131

M_CLK_DDR1 7 M_CLK_DDR3 7
132 132

A13 CK1 A13 CK1


133 133
134 134
135 135
136 136

M_A_A14 M_CLK_DDR#1 M_B_A14 M_CLK_DDR#3


137 137
138 138

86 166 86 166
139 139
140 140
141 141

M_CLK_DDR#1 7 M_CLK_DDR#3 7
142 142

A14 /CK1 A14 CK1#


143 143
144 144
145 146 145 146
147 147
148 148
149 149

84 84
150 150
151 151
152 152
153 153

A15 A15
154 154
155 155
156 156
157 157

M_A_DM0 M_B_DM0
158 158
159 159

85 10 85 10
160 160
161 161

8,12 M_A_BS#2 8,12 M_B_BS#2


162 162
163 163

A16/BA2 DM0 A16/BA2 DM0


165 164 165 164
166 166
167 167
168 168

M_A_DM1 M_B_DM1 TPAD79 TPAD79


169 169

200 200
170 170

26 26
171 171
172 172
173 173
174 174

DM1 DM1
175 175
176 176
177 177
178 178

M_A_DM2 M_B_DM2
179 179

199 199
180 180

107 52 107 52 K2 K1
181 181
183 182 183 182

8,12 M_A_BS#0 8,12 M_B_BS#0


184 184
185 185

BA0 DM2 BA0 DM2


186 186
187 187
188 188
189 189

M_A_DM3 M_B_DM3
190 190
191 191

106 67 106 67
192 192
193 193

8,12 M_A_BS#1 8,12 M_B_BS#1


194 194
195 195

BA1 DM3 BA1 DM3


196 196
197 197
198 198
199 199

M_A_DM4 M_B_DM4
200 200

DM4 130 DM4 130


M_A_DQ0 5 147 M_A_DM5 147 M_B_DM5
M_A_DQ1 DQ0 DM5 M_A_DM6 M_B_DQ0 DM5 M_B_DM6
7 170 5 170

1
M_A_DQ2 DQ1 DM6 M_A_DM7 M_B_DQ1 DQ0 DM6 M_B_DM7
M_A_DQ3
17 DQ2 DM7 185
M_B_DQ2
7 DQ1 DM7 185 Height = 5.2mm Height = 9.2mm
19 DQ3 17 DQ2
M_A_DQ4 4 195 SMBDAT_ICH M_B_DQ3 19
DQ4 SDA SMBDAT_ICH 3,15 DQ3
M_A_DQ5 6 197 SMBCLK_ICH M_B_DQ4 4 195 SMBDAT_ICH
DQ5 SCL SMBCLK_ICH 3,15 DQ4 SDA
M_A_DQ6 14 M_B_DQ5 6 197 SMBCLK_ICH
M_A_DQ7 DQ6 M_B_DQ6 DQ5 SCL
16 DQ7 VDDSPD 199 3D3V_S0 14 DQ6
M_A_DQ8 23 M_B_DQ7 16 199
DQ8 DQ7 VDDSPD 3D3V_S0

1
M_A_DQ9 25 198 DIMM0_SA0 M_B_DQ8 23
DQ9 SA0 DQ8

1
M_A_DQ10 35 200 DIMM0_SA1 C56 C55 M_B_DQ9 25 198 DIMM1_SA0
M_A_DQ11 DQ10 SA1 SCD1U16V2ZY-2GP SC2D2U6D3V3KX-GP M_B_DQ10 DQ9 SA0 DIMM1_SA1 C53 C57
37 35 200

2
M_A_DQ12 DQ11 M_B_DQ11 DQ10 SA1 SCD1U16V2ZY-2GP SC2D2U6D3V3KX-GP
20 50 37

2
M_A_DQ13 DQ12 NC#50 M_B_DQ12 DQ11 TPAD79
22 DQ13 NC#69 69 20 DQ12 NC#50 50
M_A_DQ14 36 83 M_B_DQ13 22 69 K5
M_A_DQ15 DQ14 NC#83 M_B_DQ14 DQ13 NC#69
38 DQ15 NC#120 120 36 DQ14 NC#83 83
M_A_DQ16 43 163 M_B_DQ15 38 120
M_A_DQ17 DQ16 NC#163/TEST M_B_DQ16 DQ15 NC#120 3D3V_S0
45 DQ17 43 DQ16 NC#163/TEST 163
M_A_DQ18 55 M_B_DQ17 45

1
M_A_DQ19 DQ18 M_B_DQ18 DQ17
57 DQ19 VDD 81 55 DQ18

1
M_A_DQ20 44 82 M_B_DQ19 57 81
M_A_DQ21 DQ20 VDD M_B_DQ20 DQ19 VDD R41
M_A_DQ22
46
56
DQ21 VDD 87
88
Place close DIMM0 M_B_DQ21
44
46
DQ20 VDD 82
87 10KR2J-3-GP
M_A_DQ23 DQ22 VDD M_B_DQ22 DQ21 VDD
3 58 DQ23 VDD 95 56 DQ22 VDD 88 3
M_A_DQ24 61 96 M_CLK_DDR0 M_B_DQ23 58 95

2
M_A_DQ25 DQ24 VDD M_B_DQ24 DQ23 VDD DIMM1_SA1
63 DQ25 VDD 103 61 DQ24 VDD 96

1
M_A_DQ26 73 104 C219 M_B_DQ25 63 103 DIMM1_SA0
M_A_DQ27 DQ26 VDD SC10P50V2JN-4GP M_B_DQ26 DQ25 VDD
75 DQ27 VDD 111 73 DQ26 VDD 104
M_A_DQ28 DY M_B_DQ27
Reverse Type Height = 5.2mm

62 112 75 111

2
M_A_DQ29 DQ28 VDD M_CLK_DDR#0 M_B_DQ28 DQ27 VDD
64 DQ29 VDD 117 62 DQ28 VDD 112
M_A_DQ30 M_B_DQ29

Reverse Type Height = 9.2mm


74 DQ30 VDD 118 1D8V_S3 64 DQ29 VDD 117
M_A_DQ31 76 M_CLK_DDR1 M_B_DQ30 74 118
DQ31 DQ30 VDD 1D8V_S3
M_A_DQ32 123 3 M_B_DQ31 76
DQ32 VSS DQ31

1
M_A_DQ33 125 8 C77 M_B_DQ32 123 3
M_A_DQ34 DQ33 VSS SC10P50V2JN-4GP M_B_DQ33 DQ32 VSS
135 DQ34 VSS 9 125 DQ33 VSS 8
M_A_DQ35 DY M_B_DQ34
137 12 135 9 Place close DIMM1
2
M_A_DQ36 DQ35 VSS M_CLK_DDR#1 M_B_DQ35 DQ34 VSS
124 DQ36 VSS 15 137 DQ35 VSS 12
M_A_DQ37 126 18 M_B_DQ36 124 15
M_A_DQ38 DQ37 VSS M_B_DQ37 DQ36 VSS M_CLK_DDR2
134 DQ38 VSS 21 126 DQ37 VSS 18
M_A_DQ39 136 24 M_B_DQ38 134 21
DQ39 VSS DQ38 VSS

1
M_A_DQ40 141 27 M_B_DQ39 136 24 C210
M_A_DQ41 DQ40 VSS M_B_DQ40 DQ39 VSS SC10P50V2JN-4GP
143 DQ41 VSS 28 141 DQ40 VSS 27
M_A_DQ42 151 33 M_B_DQ41 143 28 DY

2
M_A_DQ43 DQ42 VSS M_B_DQ42 DQ41 VSS M_CLK_DDR#2
153 DQ43 VSS 34 151 DQ42 VSS 33
M_A_DQ44 140 39 M_B_DQ43 153 34
M_A_DQ45 DQ44 VSS M_B_DQ44 DQ43 VSS M_CLK_DDR3
142 DQ45 VSS 40 140 DQ44 VSS 39
M_A_DQ46 152 41 M_B_DQ45 142 40
DQ46 VSS DQ45 VSS

1
M_A_DQ47 154 42 M_B_DQ46 152 41 C76
M_A_DQ48 DQ47 VSS M_B_DQ47 DQ46 VSS SC10P50V2JN-4GP
157 DQ48 VSS 47 154 DQ47 VSS 42
M_A_DQ49 159 48 M_B_DQ48 157 47 DY

2
M_A_DQ50 DQ49 VSS M_B_DQ49 DQ48 VSS M_CLK_DDR#3
173 DQ50 VSS 53 159 DQ49 VSS 48
M_A_DQ51 175 54 M_B_DQ50 173 53
M_A_DQ52 DQ51 VSS M_B_DQ51 DQ50 VSS
158 DQ52 VSS 59 175 DQ51 VSS 54
M_A_DQ53 160 60 M_B_DQ52 158 59
M_A_DQ54 DQ53 VSS M_B_DQ53 DQ52 VSS
174 DQ54 VSS 65 160 DQ53 VSS 60
M_A_DQ55 176 66 M_B_DQ54 174 65
M_A_DQ56 DQ55 VSS M_B_DQ55 DQ54 VSS
179 DQ56 VSS 71 176 DQ55 VSS 66
M_A_DQ57 181 72 M_B_DQ56 179 71
M_A_DQ58 DQ57 VSS M_B_DQ57 DQ56 VSS
189 DQ58 VSS 77 181 DQ57 VSS 72
M_A_DQ59 191 78 M_B_DQ58 189 77
M_A_DQ60 DQ59 VSS M_B_DQ59 DQ58 VSS
2
180 DQ60 VSS 121 191 DQ59 VSS 78 2
M_A_DQ61 182 122 M_B_DQ60 180 121
M_A_DQ62 DQ61 VSS M_B_DQ61 DQ60 VSS
192 127 182 122

DDR_VREF
M_A_DQ63 DQ62 VSS M_B_DQ62 DQ61 VSS
194 DQ63 VSS 128 192 DQ62 VSS 127
132 M_B_DQ63 194 128
M_A_DQS#0 VSS DQ63 VSS
11 /DQS0 VSS 133 VSS 132
M_A_DQS#1 29 138 M_B_DQS#0 11 133
M_A_DQS#2 /DQS1 VSS M_B_DQS#1 DQS0# VSS
49 /DQS2 VSS 139 29 DQS1# VSS 138
M_A_DQS#3 68 144 M_B_DQS#2 49 139
M_A_DQS#4 /DQS3 VSS M_B_DQS#3 DQS2# VSS
129 /DQS4 VSS 145 68 DQS3# VSS 144
M_A_DQS#5 146 149 M_B_DQS#4 129 145 1D8V_S3
M_A_DQS#6 /DQS5 VSS M_B_DQS#5 DQS4# VSS
167 /DQS6 VSS 150 146 DQS5# VSS 149
M_A_DQS#7 186 155 M_B_DQS#6 167 150 DDR_VREF_S3
/DQS7 VSS M_B_DQS#7 DQS6# VSS
VSS 156 186 DQS7# VSS 155
M_A_DQS0 13 161 156
M_A_DQS1 DQS0 VSS M_B_DQS0 VSS TPAD79
31 DQS1 VSS 162 13 DQS0 VSS 161

1
M_A_DQS2 51 165 M_B_DQS1 31 162 K3
DQS2 VSS DQS1 VSS

1
M_A_DQS3 70 168 M_B_DQS2 51 165 R231
M_A_DQS4 DQS3 VSS M_B_DQS3 DQS2 VSS 1KR2F-3-GP C400
131 DQS4 VSS 171 70 DQS3 VSS 168
M_A_DQS5 148 172 M_B_DQS4 131 171 DY SCD1U16V2ZY-2GP

2
M_A_DQS6 DQS5 VSS M_B_DQS5 DQS4 VSS
169 177 148 172 DY

1
M_A_DQS7 DQS6 VSS M_B_DQS6 DQS5 VSS
188 DQS7 VSS 178 169 DQS6 VSS 177
183 M_B_DQS7 188 178
VSS DQS7 VSS TPAD79
7,12 M_ODT0 114 ODT0 VSS 184 VSS 183
7,12 M_ODT1 119 ODT1 VSS 187 7,12 M_ODT2 114 OTD0 VSS 184 K4

1
VSS 190 7,12 M_ODT3 119 OTD1 VSS 187
1 193 190 R230 C399
DDR_VREF_S3 VREF VSS VSS 1KR2F-3-GP SCD1U16V2ZY-2GP
2 196 DDR_VREF_S3 1 193

2
VSS VSS VREF VSS
1

2 196 DY DY

1
VSS VSS
1

C417 C416 202 201

2
SC2D2U6D3V3KX-GP SCD1U16V2ZY-2GP GND GND C241 C238 202 201
2

SC2D2U6D3V3KX-GP SCD1U16V2ZY-2GP GND GND


DDR2-200P-11-GP-U
2

MH1 MH1 MH2 MH2


62.10017.891
DDR2-200P-23-GP-U1
LAYOUT: Locate close to DIMM
1 62.10017.A71 1

BOM USE 62.10017.B51


<Variant Name>

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
DDR2_SOCKET
Size Document Number Rev
C
LV1 -1
Date: Saturday, August 11, 2007 Sheet 11 of 38
A B C D E
5 4 3 2 1
M_A_A[14..0] 8,11

M_B_A[14..0] 8,11

Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor

DDR_VREF_S0
Put decap near power(0.9V) and pull-up resistor
RN12
D 8
7
1
2
M_CKE2
M_B_BS#2
7,11
8,11
D
6 3 M_B_A12
5 4 M_B_A9
DDR_VREF_S0 DDR_VREF_S0 DDR_VREF_S0
SRN56J-5-GP
1 2 DY 1 2 1 2
R77 1 2 56R2J-4-GP M_CS#1 7,11 C173 SCD1U16V2ZY-2GP C99 SCD1U16V2ZY-2GP C123 SCD1U16V2ZY-2GP
R73 1 2 56R2J-4-GP M_ODT3 7,11
R89 1 2 56R2J-4-GP M_A_A8 1 2 DY 1 2 1 2
R83 1 2 56R2J-4-GP M_B_A10 C88 SCD1U16V2ZY-2GP C98 SCD1U16V2ZY-2GP C171 SCD1U16V2ZY-2GP
R101 1 2 56R2J-4-GP M_A_A14
R102 1 2 56R2J-4-GP M_B_A14 1 2 DY 1 2 1 2 DY
C135 SCD1U16V2ZY-2GP C136 SCD1U16V2ZY-2GP C111 SCD1U16V2ZY-2GP
-1 -1
1 2 1 2 DY 1 2
RN8 C158 SCD1U16V2ZY-2GP C110 SCD1U16V2ZY-2GP C144 SCD1U16V2ZY-2GP
8 1 M_B_A8
7 2 M_B_A5 1 2 DY 1 2 1 2 DY
M_B_A1 C137 SCD1U16V2ZY-2GP C104 SCD1U16V2ZY-2GP C130 SCD1U16V2ZY-2GP
6
5
3
4 M_B_A3
-1 -1
1 2 1 2 1 2
SRN56J-5-GP C157 SCD1U16V2ZY-2GP C163 SCD1U16V2ZY-2GP C168 SCD1U16V2ZY-2GP
RN1
8 1 M_B_A13 1 2 1 2 1 2 DY
C174 SCD1U16V2ZY-2GP C138 SCD1U16V2ZY-2GP C102 SCD1U16V2ZY-2GP
7
6
2
3
M_ODT2 7,11 -1
M_CS#2 7,11
5 4 M_B_RAS# 8,11 1 2 DY 1 2 1 2 DY
C151 SCD1U16V2ZY-2GP C121 SCD1U16V2ZY-2GP C115 SCD1U16V2ZY-2GP
-1
C SRN56J-5-GP
RN6 1 2 1 2 DY
C
8 1 M_B_BS#1 8,11 C170 SCD1U16V2ZY-2GP C101 SCD1U16V2ZY-2GP
7 2 M_B_A0
6 3 M_B_A2
5 4 M_B_A4

SRN56J-5-GP
RN11
8 1 M_B_A6
7 2 M_B_A7
6 3 M_B_A11
5 4 M_CKE3 7,11
SRN56J-5-GP
RN3
8
7
1
2
M_B_BS#0 8,11 Place these Caps near DM1 Place these Caps near DM2
M_B_WE# 8,11
6 3 M_B_CAS# 8,11
5 4 1D8V_S3 1D8V_S3
M_CS#3 7,11
SRN56J-5-GP 1 2 1 2
RN2 C140 SCD1U16V2ZY-2GP C166 SCD1U16V2ZY-2GP
8 1 M_A_A13
7 2 M_ODT0 7,11 1 2 1 2
6 3 M_CS#0 7,11 C362 SCD1U16V2ZY-2GP C125 SCD1U16V2ZY-2GP
5 4 M_A_RAS# 8,11
1 2 1 2
SRN56J-5-GP C96 SCD1U16V2ZY-2GP C156 SCD1U16V2ZY-2GP
RN5
B 8 1 M_A_BS#1 8,11 1 2 1 2 B
7 2 M_A_A0 C368 SCD1U16V2ZY-2GP C380 SCD1U16V2ZY-2GP
6 3 M_A_A2
5 4 M_A_A4 1 2 1 2
C354 SC2D2U6D3V3MX-1-GP C127 SC2D2U6D3V3MX-1-GP
SRN56J-5-GP
RN4 1 2 1 2
8 1 M_A_BS#0 8,11 C185 SC2D2U6D3V3MX-1-GP C355 SC2D2U6D3V3MX-1-GP
7 2 M_A_WE# 8,11
6 3 M_A_CAS# 8,11 1 2 1 2 DY
C388 SC2D2U6D3V3MX-1-GP C193 SC2D2U6D3V3MX-1-GP
5 4 M_ODT1 7,11 -1
SRN56J-5-GP 1 2 1 2
RN10 C364 SC2D2U6D3V3MX-1-GP C382 SC2D2U6D3V3MX-1-GP
8 1 M_CKE0 7,11
7 2 M_A_BS#2 8,11 1 2 DY 1 2 DY
6 3 M_A_A12 -1 C373 SC2D2U6D3V3MX-1-GP
-1 C359 SC2D2U6D3V3MX-1-GP
5 4 M_A_A9

SRN56J-5-GP
RN9
8 1 M_A_A6
7 2 M_A_A7
6 3 M_A_A11
5 4 M_CKE1 7,11
SRN56J-5-GP
RN7
8 1 M_A_A5
A 7 2 M_A_A3 A
6 3 M_A_A1
5 4 M_A_A10 Wistron Incorporated
SRN56J-5-GP 21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
DRAM_TERMINATION
Size Document Number Rev
A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 12 of 38

5 4 3 2 1
Layout Note:
CRT CONNECTOR
Place these resistors close to the CRT-out connector CRT1
17
-1 6
L11
11 1 CRT_R
7 GMCH_RED 1 2 CRT_R
7 5V_CRT_S0
BLM18BB470SN1-GP DAT_DDC1_5 12 2 CRT_G
8
JVGA_HS 13 3 CRT_B
L10
9
7 GMCH_GREEN 1 2 CRT_G JVGA_VS 14 4
10
BLM18BB470SN1-GP CLK_DDC1_5 15 5

L9 16

1
7 GMCH_BLUE 1 2 CRT_B EC18 EC21 EC19 EC20

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
DY DY DY DY VIDEO-15-42-GP-U
BLM18BB470SN1-GP 20.20378.015

2
1

1
R183 R182 R181 C302

1
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP
C313 C312 C311 C308 C307 C306 SCD01U50V2ZY-1GP

2
SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
2

2
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
5V_S0

5V_CRT_S0

1
C310
D13
F3
-1
K A 1 2 5V_S0 SCD1U16V2ZY-2GP

2
3D3V_S0 RB751V-40-2-GP FUSE-1D1A6V-4GP-U
Hsync & Vsync level shift

14

1
2
1

5V @ ext. CRT side RN44 7 GMCH_HSYNC 1 R184 2 HSYNC_4 2 3 HSYNC_5 1 R180 2 JVGA_HS
SRN2K2J-1-GP -1 0R0402-PAD U19A 0R0402-PAD
TSAHCT125PW-GP

14

7
4
3
4
2
1

3D3V_S0 1 R179 2 VSYNC_4 5 6 VSYNC_5 1 R177 2 JVGA_VS


7 GMCH_VSYNC
RN45
SRN10KJ-5-GP 0R0402-PAD 0R0402-PAD
-1 D14 U19B

7
2N7002DW-1-GP TSAHCT125PW-GP
84.27002.D3F
-1 -1
3
4

4 3 DAT_DDC1_5
7 GMCH_DDCDATA
5 2

6 1

CLK_DDC1_5
7 GMCH_DDCCLK

5V_S0

D11 -1
S-VIDEO CONNECTOR 1

1
LUMA_1 3 EC32
TVOUT1 SCD1U16V2ZY-2GP

2
2
5 GND
L7 1 DY BAV99-5-GP
LUMA_R LUMA_1 GND 83.00099.T11
7 TV_DACB 1 2 3 LUMA
BLM18BB470SN1-GP
1

4 D12
CRMA
1

R178 C304 C303 2 1


GND

1
150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP 6 GND CRMA_1 EC11
3
2

SCD1U16V2ZY-2GP
2

2
MINDIN4-29-GP 2
22.10021.E91
L8 DY BAV99-5-GP
CUMA_R 1 2 CRMA_1 83.00099.T11
7 TV_DACC
BLM18BB470SN1-GP
Wistron Incorporated
1

21F, 88, Hsin Tai Wu Rd


1

R176 C309 C305 Hsichih, Taipei


150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP
Title
2

CRT CONN
2

Size Document Number Rev


Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 13 of 38
5 4 3 2 1

LCD CONNECTOR
D D

DCBATOUT
TOP VIEW

1
C31 C26
LCD1
SC10U25V6KX-1GP SCD1U25V3KX-GP 32

2
15 16 15 16
14 17 BRIGHTNESS 19
13 18 LDDC_CLK 7
12 19 LDDC_DATA 7

1
11 20
3D3V_S0 10 21 TXACLK- GMCH_TXACLK- 7 EC25
9 22 TXACLK+ SCD1U16V2ZY-2GP
GMCH_TXACLK+ 7

2
1

1
EC46 8 23 DY
EC10 SC1000P50V2JN-GP 7 24 TXAOUT0- GMCH_TXAOUT0- 7
SCD1U16V2ZY-2GP 6 25 TXAOUT0+ GMCH_TXAOUT0+ 7

2
SC 5 26 TXAOUT1- GMCH_TXAOUT1- 7
4 27 TXAOUT1+ GMCH_TXAOUT1+ 7
3 28 TXAOUT2-
LCDVDD_S0
40 MIL 2 29 TXAOUT2+
GMCH_TXAOUT2-
GMCH_TXAOUT2+
7
7 1 30
1 30
1

C59 C63 31
C C

SC10U10V5KX-2GP SCD1U16V2ZY-2GP
2

ACES-CONN30C-GP
20.F1047.030
19 EC_BLON
1

R35

10KR2F-2-GP
2

LCDVDD_S0

B B

1
C62
SC1U6D3V2KX-GP

2
U4

3D3V_S0 5 IN#5
6 IN#6 GND 4
1

C35 7 3
IN#7 EN LCDVDD_EN 7
8 IN#8 OUT 2
SCD1U16V2ZY-2GP 9 1
2

GND IN#1

1
G5281RC1U-GP R39
74.05281.093 100KR2J-1-GP
2

<Variant Name>
A A
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
LCD_CONN
Size Document Number Rev
B
LV1 -1
Date: Saturday, August 11, 2007 Sheet 14 of 38
5 4 3 2 1
RCT_X1

R154
1 2 RCT_X2

10MR2J-L-GP RTC_AUX
X2
X-32D768KHZ-38GPU
integrated VccSus1_05,VccSus1_5,VccCL1_5
4 1 R155
1 2 INTVRMEN INTVRMEN High=Enable Low=Disable
100KR2J-1-GP
1

1
integrated VccLan1_05VccCL1_05
C255 3 2 C254 R159
SC12P50V2JN-3GP SC12P50V2JN-3GP 1 2 LAN100_SLP LAN100_SLP High=Enable Low=Disable
2

2
100KR2J-1-GP

82.30001.691

RTC_AUX

D28
3D3V_AUX_S5 A K U49A1 OF 6

RTC_BAT RB751V-40-2-GP RCT_X1 AG25 E5 LPC_LAD0


RTCX1 FWH0/LAD0 LPC_LAD0 19,25
RTC1 RCT_X2 AF24 F5 LPC_LAD1
RTCX2 FWH1/LAD1 LPC_LAD1 19,25
R341 D29 R300 20KR2J-L2-GP G8 LPC_LAD2
FWH2/LAD2 LPC_LAD2 19,25
PWR 1 1 2RTC_BAT_R A K 1 2 RTC_RST# AF23 RTCRST# FWH3/LAD3 F6 LPC_LAD3
LPC_LAD3 19,25
2

RTC
GND 1KR2J-1-GP RB751V-40-2-GP INTRUDER# AD22 LPC_LFRAME# 3D3V_S0
MH1 MH1 1 2 INTRUDER# FWH4/LFRAME# C4 LPC_LFRAME# 19,25

LPC
MH2 RN17
MH2 R157 1MR2J-1-GP INTVRMEN AF25 LDRQ0# KA20GATE
INTVRMEN LDRQ0# G9 1 TP95 1 4

1
LAN100_SLP AD21 E6 LDRQ1# 1 TP99 KBRCIN# 2 3
C480 C485 LAN100_SLP LDRQ1#/GPIO23
BAT-CON2-U3-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP B24 AF13 KA20GATE SRN10KJ-5-GP
KA20GATE 19

2
22.70031.001 GLAN_CLK A20GATE H_A20M#
A20M# AG26 H_A20M# 4
TP66 1LAN_RSTYNC D22 LAN_RSTSYNC H_DPRSTP# 1D05V_S0
RTC circuitry DPRSTP# AF26
H_DPSLP#
H_DPRSTP# 4,7,30

LAN/GLAN
C21 LAN_RXD0 DPSLP# AE26 H_DPSLP# 4
B21 H_DPSLP# 2 1
LAN_RXD1 H_FERR# R278 56R2J-4-GP
C22 LAN_RXD2 FERR# AD24 H_FERR# 4
H_PWRGD
DY
D21 LAN_TXD0 CPUPWRGD/GPIO49 AG29 H_PWRGD 4
GLAN_COMP place within 500 mil of ICH8M E20 H_PWRGD 1 2
LAN_TXD1 H_IGNNE# R279 200R2F-L-GP
C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# 4
GLAN_DOCK# H_INIT#
DY
3D3V_S5 1 2 AH21 GLAN_DOCK#/GPIO13 INIT# AE24 H_INIT# 4,25
R304 10KR2J-3-GP AC20 H_INTR H_INTR 4 H_FERR# 2 1
INTR
1D5V_S0 1 2 GLAN_COMP D25 GLAN_COMPI RCIN# AH14 KBRCIN# KBRCIN# 19 R156 56R2J-4-GP
R153 24D9R2F-L-GP C25

CPU
GLAN_COMPO H_NMI
NMI AD23 H_NMI 4
R307 1 2 33R2J-2-GP ACZ_BIT_CLK ACZ_BIT_CLK AJ16 AG28 H_SMI# H_SMI# 4 H_THERMTRIP# 1 2
26 ACZ_BITCLK HDA_BIT_CLK SMI#
26 ACZ_SYNC ACZ_SYNC AJ15 R151 56R2J-4-GP
HDA_SYNC H_STPCLK#
STPCLK# AA24 H_STPCLK# 4
26 ACZ_RST# ACZ_RST# AE14 R152
HDA_RST#
1

C490 AE27 H_THERMTRIP_R 1 2 H_THERMTRIP# 4,7


SC10P50V3JN-GP ACZ_SDATAIN0 THRMTRIP#
SC 26 ACZ_SDATAIN0
ACZ_SDATAIN1
AJ17 HDA_SDIN0 ICH_TP8 24D9R2F-L-GP
DY 1 AH17 AA23 1

IHDA
TP133 TP63
2

ACZ_SDIN2 HDA_SDIN1 TP8


TP131 1 AH15 HDA_SDIN2
TP85 1 ACZ_SDIN3 AD13 V1 IDE_PDD0
HDA_SDIN3 DD0 IDE_PDD1
DD1 U2
26 ACZ_SDATAOUT 1 2ACZ_SDATAOUT_R AE13 HDA_SDOUT DD2 V3 IDE_PDD2 Layout Note:
R166 33R2J-2-GP T1 IDE_PDD3
TP92 1 HDA_DOCK_EN# AE10
DD3
V4 IDE_PDD4 R554 needs to placed within 2" of
HDA_DOCK_RST# HDA_DOCK_EN#/GPIO33 DD4 IDE_PDD5
TP86 1 AG14 HDA_DOCK_RST#/GPIO34 DD5 T5 ICH8, R554 must be placed within 2"
AB2 IDE_PDD6
20 SATA_LED# SATA_LED# AF10
DD6
T6 IDE_PDD7 of R552 w/o stub.
SATALED# DD7 IDE_PDD8
DD8 T3
20,38 SATA_RXN0_C SATA_RXN0_C AF6 R2 IDE_PDD9
SATA_RXP0_C SATA0RXN DD9 IDE_PDD10
20,38 SATA_RXP0_C AF5 SATA0RXP DD10 T4
3D3V_S5 3D3V_S0 20,38 SATA_TXN0 C518 1 2 SC3900P50V2KX-2GP SATA_TXN0_C AH5 V6 IDE_PDD11
C519 1 SATA_TXP0_C SATA0TXN DD11 IDE_PDD12
20,38 SATA_TXP0 2 SC3900P50V2KX-2GP AH6 SATA0TXP DD12 V5
U1 IDE_PDD13
DD13 IDE_PDD14

IDE
AG3 SATA1RXN DD14 V2 IDE_PDD[0..15] 20
IDE_PDD15
Close to SB AG4
AJ4
SATA1RXP DD15 U6

SATA
SATA1TXN
8
7
6
5

AJ3 SATA1TXP DA0 AA4 IDE_PDA0 20


RN32 AA1 IDE_PDA1 20
DA1
AF2 SATA2RXN DA2 AB3 IDE_PDA2 20
SRN4K7J-10-GP AF1 SATA2RXP
AE4 SATA2TXN DCS1# Y6 IDE_PDCS1# 20
AE3 Y5 IDE_PDCS3# 20
1
2
3
4

SATA2TXP DCS3#

3 CLK_PCIE_SATA# CLK_PCIE_SATA# AB7 W4 IDE_PDIOR# 20


CLK_PCIE_SATA SATA_CLKN DIOR#
3 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_PDIOW# 20
DDACK# Y2 IDE_PDDACK# 20
5V_S0 R337 SATARBIAS AG1 Y3 INT_IRQ14 20
SATARBIAS# IDEIRQ
1 2 AG2 SATARBIAS IORDY Y1 IDE_PDIORDY 20
-1 DDREQ W5 IDE_PDDREQ 20
1

24D9R2F-L-GP
R276
0R0402-PAD ICH8-M-1-GP-U-NF
Place within 500 mils of
71.0ICH8.A0U
2

ICH8 ball
D21
Change to 24.9 1% ohm
16,22,23,38 SMBCLK_SB 3 4 SMBCLK_ICH 3,11
when use SATA HD
2 5
ICH8M ( 71.ICH8M.A0U )
<Variant Name>
1 6
Wistron Incorporated
2N7002DW-1-GP 21F, 88, Hsin Tai Wu Rd
84.27002.D3F
16,22,23,38 SMBDAT_SB Hsichih, Taipei
SMBDAT_ICH 3,11
Title

D55 connect SMLINK and SMBUS in S) for SMBus 2.0 compliance ICH8 (1 of 3) SATA/IDE/RTC
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 15 of 38
RP5 U49D 4 OF 6
3D3V_S0
U49C3 OF 6 PCI_IRDY# 1 10
INT_PIRQD# 2 9 PCI_PERR# 3D3V_S0 SMBCLK_SB AJ26 AJ12 SATA0GP 3D3V_S0
15,22,23,38 SMBCLK_SB SMBCLK SATA0GP/GPIO21

GPIO
D20 A4 PCI_REQ#0 INT_PIRQH# 3 8 PCI_LOCK# SMBDAT_SB AD19 AJ10 SATA1GP RN36
PCI

SATA
AD0 REQ0# 15,22,23,38 SMBDAT_SB SMBDATA SATA1GP/GPIO19

SMB
E19 D7 PCI_GNT#0 1 TP100 PCI_REQ#0 4 7 INT_PIRQC# SMB_LINK_ALERT# AG21 AF11 SATA2GP SDATAOUT0 1 8
AD1 GNT0# PCI_REQ#1 INT_PIRQB# SMLINK0 LINKALERT# SATA2GP/GPIO36 ICH_GPIO37 ICH_GPIO37
D19 AD2 REQ1#/GPIO50 E18 3D3V_S0 5 6 AC17 SMLINK0 GPIO37 AG11 2 7
A20 C18 PCI_GNT#1 1 TP76 SMLINK1 AE19 SATA2GP 3 6
AD3 GNT1#/GPIO51 PCI_REQ#2 SMLINK1 CLK_ICH14 SATA1GP
D17 B19 SRN10KJ-L3-GP AG9 CLK_ICH14 3 4 5
AD4 REQ2#/GPIO52 PCI_GNT#2 PM_RI# CLK14 CLK48_ICH

CLOCKS
A21 AD5 GNT2#/GPIO53 F18 1 TP72 AF17 RI# CLK48 G5 CLK48_ICH 3

4
3
A19 C10 PCI_GNT#3 1 TP132 RP4
AD6 GNT3#/GPIO55 3D3V_S0
C19 A11 PCI_REQ#3 PCI_TRDY# 1 10 19 PM_SUS_STAT# F4 D3 PM_SUS_CLK PM_SUS_CLK 18 SRN10KJ-6-GP
AD7 REQ3#/GPIO54 PCI_REQ#3 PCI_REQ#1 DBRESET# SUS_STAT#/LPCPD# SUSCLK
A18 AD8 2 9 AD15 SYS_RESET#
B16 C17 PCI_C/BE#0 1 TP80 INT_PIRQG# 3 8 PCI_REQ#2 RN16 AG23 PM_SLP_S3# PM_SLP_S3# 18,19,28,33,34
AD9 C/BE0# PCI_C/BE#1 PCI_STOP# PCI_FRAME# SLP_S3# PM_SLP_S4#
A12 AD10 C/BE1# E15 1 TP84 4 7 7 PM_BMBUSY# AG12 BMBUSY#/GPIO0 SLP_S4# AF21 PM_SLP_S4# 19,33,34
E16 F16 PCI_C/BE#2 1 TP81 5 6 PCI_DEVSEL# AD18 SLPS5# 1 TP82
3D3V_S0

1
2
AD11 C/BE2# PCI_C/BE#3 SRN2K2J-1-GP SMB_ALERT# SLP_S5#
A14 AD12 C/BE3# E17 1 TP77 AG22 SMBALERT#/GPIO11
G16 SRN10KJ-L3-GP AH27 S4_STATE# 1 TP120
AD13 PCI_IRDY# S4_STATE#/GPIO26
A15 AD14 IRDY# C8 3 PM_STPPCI# AE20 STP_PCI#
B6 D9 PCI_PAR 1 TP93 3 PM_STPCPU# AG18 AE23 PWROK PWROK 7,18
AD15 PAR PCI_RST# STP_CPU# PWROK R311
C11 AD16 PCIRST# G6 PCI_RST# 23,25

SYSGPIO
A9 D16 PCI_DEVSEL# 3D3V_S0 PM_CLKRUN# AH11 AJ14 PM_DPRSLPVR_R 1 2 0R2J-2-GP
AD17 DEVSEL# 19 PM_CLKRUN# CLKRUN# DPRSLPVR/GPIO16 PM_DPRSLPVR 7,30
D11 A7 PCI_PERR# 1 2
AD18 PERR# R167
B12 A17 PCI_FRAME# PCIE_WAKE# AE17 AE21 PM_BATLOW#_R R314 DY 100KR2J-1-GP

POWER MGT
AD19 FRAME# 23 PCIE_WAKE# WAKE# BATLOW#
C12 B7 PCI_LOCK# 1 2 THRM# INT_SERIRQ AF12 R336
AD20 PLOCK# 19 INT_SERIRQ SERIRQ
D10 F10 PCI_SERR# 18 THRM# THRM# AC13 C2 PWRBTN#_ICH 1 2 PM_PWRBTN# 19
AD21 SERR# PCI_STOP# R305 THRM# PWRBTN# 0R0402-PAD
C7 AD22 STOP# C16 10KR2J-3-GP
F13 C9 PCI_TRDY# 7,30 VGATE_PWRGD 1 2 VGATE_PWRGD_R AJ20 AH20 PLT_RST1#
AD23 TRDY# 0R2J-2-GP VRMPWRGD LAN_RST#
E11 AD24 DY
E13 AD25 PLTRST# AG24 PLT_RST1# 7,19,20,22 1 2 ICH_TP7 AJ22 TP7 RSMRST# AG27 RSMRST#_SB
E12 B10 CLK_PCI_ICH 3 R301 0R2J-2-GP
AD26 PCICLK
D8 AD27 PME# G7 ICH_PME# 1 TP98 DY AJ8 TACH1/GPIO1 CK_PWRGD E1 CLK_PWRGD CLK_PWRGD 3
A6 AD28 AJ9 TACH2/GPIO6
E8 19 SB_ECSCI# SB_ECSCI# AH9 E3 PWROK
AD29 3D3V_S0 SB_ECSMI# TACH3/GPIO7 CLPWROK 3D3V_S0
D6 AE16

GPIO
AD30 19 SB_ECSMI# GPIO8
A3 19 ECSWI# ECSWI# AC19 AJ25 PM_SLP_M# 1 TP125
AD31 GPIO12 SLP_M#
AG8 TACH0/GPIO17

1
Interrupt I/F AH12 F23 CL_CLK0
GPIO18 CL_CLK0 CL_CLK0 7

1
INT_PIRQA# F9 F8 INT_PIRQE# 1ICH8_GPIO20 AE11 AE18 CL_CLK1 1 TP83 R298
PIRQA# PIRQE#/GPIO2 TP91 GPIO20 CL_CLK1 3K24R2F-GP
INT_PIRQB# B5 G11 INT_PIRQF# R303 SCLOCK AG10
INT_PIRQC# PIRQB# PIRQF#/GPIO3 INT_PIRQG# 330R2J-3-GP SCLOCK/GPIO22 CL_DATA0
C5 PIRQC# PIRQG#/GPIO4 F12 AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 7

Controller Link
INT_PIRQD# A10 B3 INT_PIRQH# AD16 AF19 CL_DATA1 1 TP74

2
PIRQD# PIRQH#/GPIO5 QRT_STATE1/GPIO28 CL_DATA1
AG13

2
SLOAD SATACLKREQ#/GPIO35 CL_VREF0_ICH
AF9 SLOAD/GPIO38 CL_VREF0 D24
ICH8-M-1-GP-U-NF VGATE_PWRGD_R SDATAOUT0 AJ11 AH23 CL_VREF1_ICH
SDATAOUT0/GPIO39 CL_VREF1

1
SDATAOUT1 AD10 3D3V_S5
SDATAOUT1/GPIO48

1
AJ23 C482 R297
CL_RST# CL_RST# 7

SCD1U10V2KX-5GP
26 ACZ_SPKR ACZ_SPKR AD9

D
SPKR

1
AJ27 CLGPIO0 1 TP121 453R2F-1-GP

2
MCH_ICH_SYNC# AJ13 CLGPIO0/GPIO24
RP6 Q15 7 MCH_ICH_SYNC# AJ24 CLGPIO1 1 TP62 R293

MISC

2
2N7002-11-GP MCH_SYNC# CLGPIO1/GPIO10
1 10 3D3V_S0 CLGPIO2/GPIO14 AF22 WOL_DET 1 TP64
PM_CLKRUN# 2 9 INT_SERIRQ 30 CLK_EN# G 1ICH_RSVD AJ21 AG19 WOL_EN 1 TP69 3K24R2F-GP
TP130 TP3 CLGPIO3/GPIO9
PCI_SERR# 3 8 INT_PIRQA#

2
INT_PIRQF# 4 7 INT_PIRQE#
S
5 6 ICH8-M-1-GP-U-NF
3D3V_S0

1
SRN10KJ-L3-GP C481
3D3V_S5 SCD1U10V2KX-5GP R299
No Reboot Strap 453R2F-1-GP

2
SPKR LOW = Defaule RP1
U49B 2 OF 6 High=No Reboot SMB_LINK_ALERT# 1 10

2
PM_BATLOW#_R 2 9 WOL_DET
23 PCIE_RXN1 P27 V27 DMI_RXN0 7 ECSWI# 3 8
PERN1 DMI0RXN 3D3V_S0 CLGPIO1
23 PCIE_RXP1 P26 PERP1 DMI0RXP V26 DMI_RXP0 7 4 7 SMB_ALERT# 3D3V_S5
23 PCIE_TXN1 C462 2 1 SCD1U10V2KX-5GP TXN1 N29 PETN1 DMI0TXN U29 DMI_TXN0 7 DY 5 6 SMLINK1
23 PCIE_TXP1 C461 2 1 SCD1U10V2KX-5GP TXP1 N28 U28 DMI_TXP0 7 ACZ_SPKR R173 1 2 1KR2J-1-GP RP2
PETP1 DMI0TXP SB_ECSMI#
LAN SRN10KJ-L3-GP 1 10
SB_ECSCI# R322 1 2 10KR2J-3-GP USB_OC#0 PM_RI#
Direct Media Interface

M27 Y27 DMI_RXN1 7 2 9


PCI-Express

PERN2 DMI1RXN 3D3V_S5 PCIE_WAKE#


M26 PERP2 DMI1RXP Y26 DMI_RXP1 7 3 8
L29 W29 DMI_TXN1 7 SCLOCK R170 1 2 10KR2J-3-GP USB_OC#5 4 7 USB_OC#7
PETN2 DMI1TXN 3D3V_S5 USB_OC#9
L28 PETP2 DMI1TXP W28 DMI_TXP1 7 5 6
SLOAD R171 1 2 10KR2J-3-GP
22,38 PCIE_RXN3 K27 AB26 DMI_RXN2 7 RP3 SRN10KJ-L3-GP
PERN3 DMI2RXN SATA0GP R316 1 USB_OC#2
22,38 PCIE_RXP3 K26 PERP3 DMI2RXP AB25 DMI_RXP2 7 2 10KR2J-3-GP 1 10
22,38 PCIE_TXN3 C458 2 1 SCD1U10V2KX-5GP TXN3 J29 PETN3 DMI2TXN AA29 DMI_TXN2 7 USB_OC#6 2 9 USB_OC#8 3D3V_S5
C457 2 1 SCD1U10V2KX-5GP TXP3 J28 AA28 SDATAOUT1 R168 1 2 10KR2J-3-GP SMLINK0 3 8 USB_OC#3 3D3V_S5
22,38 PCIE_TXP3 PETP3 DMI2TXP DMI_TXP2 7
DY USB_OC#1 DBRESET# R277
MINICARD H27 AD27
4
5
7
6 USB_OC#4 1 2
PERN4 DMI3RXN DMI_RXN3 7
H26 AD26 DMI_RXP3 7 DY 10KR2J-3-GP
PERP4 DMI3RXP
G29 AC29 DMI_TXN3 7 SRN10KJ-L3-GP
PETN4 DMI3TXN 3D3V_S5
G28 AC28 DMI_TXP3 7 U45
PETP4 DMI3TXP 3D3V_S5
19 RSMRST#_KBC 1 B
F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 3 VCC 5
F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 3 2 A
E29 Place within 500 mils of ICH 4

K
PETN5 Y
Layout Note: E28 PETP5 DMI_ZCOMP Y23
DMI_IRCOMP_R
3 GND D18
DMI_IRCOMP Y24 2 1 1D5V_S0
PCIE AC coupling caps need to be D27 24D9R2F-L-GP R158 74LVC1G08GW-1-GP RB751V-40-2-GP
PERN6/GLAN_RXN 73.01G08.L04
within 250 mils of the driver. D26 PERP6/GLAN_RXP USBP0N G3 USB_PN0 21,38 BOOT BIOS Strap DY
C29 G2 USB_PP0 21,38 USB

A
PETN6/GLAN_TXN USBP0P
C28 PETP6/GLAN_TXP USBP1N H5 USB_PN1 22,38 PCI_GNT#0 SPI_CS#1 BOOT BIOS Location D19
H4 USB_PP1 22,38 Pair Device K A RSMRST#_SB
SPI_CLK USBP1P
TP61 1 C23 SPI_CLK USBP2N H2 USB_PN2 21,38 0 1 SPI DY
TP129 1 SPI_CS0# B23 H1 USB_PP2 21,38 0 USB0(ON BOARD) 1 0 PCI
SPI_CS0# USBP2P

1
SPI_CS#1 E22 J3 USB_PN3 21,38 1 1 LPC(Default) RB751V-40-2-GP R274
SPI_CS1# USBP3N 100KR2J-1-GP
J2 1 MINICARD A16 swap override strap
SPI

USBP3P USB_PP3 21,38 R273


TP60 1 SPI_MOSI D23 K5 USB_PN4 21,38 DY
SPI_MISO SPI_MOSI USBP4N
TP67 1 F21 SPI_MISO USBP4P K4 USB_PP4 21,38 2 USB1(ON BOARD) PCI_GNT#3 low = A16 swap override enable 2 1
K2 high = default

2
USB_OC#0 USBP5N 0R2J-2-GP
21 USB_OC#0 AJ19 OC0# USBP5P K1 3 USB3(ON BOARD)
USB_OC#1 AG16 L3 DY
USB_OC#2 OC1#/GPIO40 USBP6N
AG15 OC2#/GPIO41 USBP6P L2 4 USB4(ON BOARD)
USB_OC#3 AE15 M5
21 USB_OC#3
USB_OC#4 AF15
OC3#/GPIO42
OC4#/GPIO43
USB USBP7N
USBP7P M4 5 X DY <Variant Name>
USB_OC#5 PCI_GNT#0
-1 USB_OC#6
AG17
AD12
OC5#/GPIO29 USBP8N M2
M1 6 X
1
R172
2
1KR2J-1-GP
USB_OC#7 OC6#/GPIO30 USBP8P Wistron Incorporated
AJ18 OC7#/GPIO31 USBP9N N3 DY
USB_OC#8 AD14 OC8# USBP9P N2 7 X SPI_CS#1 1 2 21F, 88, Hsin Tai Wu Rd
USB_OC#9 AH18 R161 1KR2J-1-GP
OC9# USB_RBIAS_PN R339
Hsichih, Taipei
USBRBIAS# F2 8 X DY
F3 1 2 PCI_GNT#3 1 2 Title
USBRBIAS R317 1KR2J-1-GP
9 X
22D6R2F-L1-GP ICH8 (2 of 3) DMI/PCIE/USB
ICH8-M-1-GP-U-NF Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 16 of 38
U49E 5 OF 6
RTC_AUX
6uA in G3 AD25 VCCRTC
A13
VCC1_05 1D05V_S0 1.13A

1
C257 C256 V5REF_S0 T7 B13 Layout Note: Place near ICH8M
V5REF VCC1_05
A16 V5REF VCC1_05 C13
U49F6 OF 6 SCD1U10V2KX-5GP SCD1U10V2KX-5GP C14 1D05V_S0 1 2 1D05V_S0 1 2 DY

2
V5REF_S5 VCC1_05 C275 SCD1U10V2KX-5GP C495 SC10U6D3V5KX-1GP
A23 K7 L22
G4 V5REF_SUS VCC1_05 D14
E14
-1
VSS VSS 1D5V_PCIE_S0 VCC1_05
A5 VSS VSS L1 1D5V_S0 1 2 AA25 VCC1_5_B VCC1_05 F14 1 2 DY 1 2
BLM18AG121SN-1GP C270 SCD1U10V2KX-5GP C266 SC10U6D3V5KX-1GP
AA2
AA7
VSS VSS L13
L15
AA26
AA27
VCC1_5_B VCC1_05 G14
L11
-1

CORE
VSS VSS VCC1_5_B VCC1_05
A25 L26 AB27 L12 1 2 1 2
AB1
VSS
VSS
VSS
VSS L27 657mA 1 2 AB28
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05 L14 C279 SCD1U10V2KX-5GP C263 SCD1U10V2KX-5GP
AB24 L4 C454 SC10U6D3V5KX-1GP AB29 L16
VSS VSS 3D3V_S5 5V_S5 VCC1_5_B VCC1_05
AC11 VSS VSS L5 D28 VCC1_5_B VCC1_05 L17 1 2 DY 1 2 DY
C278 SCD1U10V2KX-5GP C277 SCD1U10V2KX-5GP
AC14
AC25
VSS VSS M12
M13
1
C455
2
SC10U6D3V6KX-4GP
D29
E25
VCC1_5_B VCC1_05 L18
M11
-1 -1

A
VSS VSS VCC1_5_B VCC1_05

2
AC26 M14 D27 E26 M18 1 2 1 2
VSS VSS R338 VCC1_5_B VCC1_05 C269 SCD1U10V2KX-5GP C265 SCD1U10V2KX-5GP
AC27 VSS VSS M15 1 2 E27 VCC1_5_B VCC1_05 P11
AD17 M16 RB751V-40-2-GP C258 SCD1U10V2KX-5GP F24 P18
VSS VSS 100R2F-L1-GP-U VCC1_5_B VCC1_05
AD20 VSS VSS M17 F25 VCC1_5_B VCC1_05 T11 1 2 1 2
AD28 M23 1 2 G24 T18 C272 SCD1U10V2KX-5GP C276 SCD1U10V2KX-5GP

1
VSS VSS V5REF_S5 C259 SCD1U10V2KX-5GP VCC1_5_B VCC1_05
AD29 VSS VSS M28 H23 VCC1_5_B VCC1_05 U11
AD3 VSS VSS M29 H24 VCC1_5_B VCC1_05 U18

1
C523 2 DY

VCCA3GP
AD4 VSS VSS M3 1 J23 VCC1_5_B VCC1_05 V11
C456 SCD1U10V2KX-5GP L21
AD6
AE1
VSS VSS N1
N11 SCD1U10V2KX-5GP
-1 J24
K24
VCC1_5_B VCC1_05 V12
V14 1D5V_DMIPLL_ICH_S0 1 2 1D5V_S0 23mA

2
VSS VSS VCC1_5_B VCC1_05 IND-1D2UH-5-GP
AE12 VSS VSS N12 1 2 DY K25 VCC1_5_B VCC1_05 V16

1
AE2 N13 C453 SCD1U10V2KX-5GP L23 V17 C464
VSS VSS VCC1_5_B VCC1_05 C451
AE22 VSS VSS N14 L24 VCC1_5_B VCC1_05 V18
AD1 N15 1 2 L25 SCD1U10V2KX-5GP SC10U6D3V5KX-1GP

2
VSS VSS 3D3V_S0 5V_S0 C260 SCD1U10V2KX-5GP VCC1_5_B
AE25 VSS VSS N16 M24 VCC1_5_B VCCDMIPLL R29
AE5 N17 M25 R275
VSS VSS VCC1_5_B 1D25V_DMI_ICH_S0
AE6 N18 N23 AE28 1 2 1D25V_S0 50mA
A
VSS VSS VCC1_5_B VCC_DMI

2
AE9 N26 N24 AE29 0R0603-PAD
VSS VSS VCC1_5_B VCC_DMI

1
AF14 N27 D24 R294 N25 C465
AF16
VSS
VSS
VSS
VSS N4 P24
VCC1_5_B
VCC1_5_B V_CPU_IO AC23 1mA 1D05V_S0 C452
AF18 N5 RB751V-40-2-GP 100R2F-L1-GP-U P25 AC24 SCD1U10V2KX-5GP SC22U6D3V5MX-2GP

2
VSS VSS VCC1_5_B V_CPU_IO
AF3 N6 *Within a given well, 5VREF needs to be up R24
K

1
VSS VSS V5REF_S0 VCC1_5_B
AF4 VSS VSS P12 before the corresponding 3.3V rail R25 VCC1_5_B VCC3_3 AF29 3D3V_S0
AG5 VSS VSS P13 R26 VCC1_5_B
1

AG6 P14 C486 R27 AD2


VSS VSS VCC1_5_B VCC3_3
AH10 VSS VSS P15 T23 VCC1_5_B
AH13 P16 SCD1U10V2KX-5GP T24 AC8

VCCP CORE
2

VSS VSS VCC1_5_B VCC3_3


AH16 VSS VSS P17 T27 VCC1_5_B VCC3_3 AD8
AH19 P23 T28 AE8 R169
VSS VSS VCC1_5_B VCC3_3 3D3V_VCCPCORE_ICH_S0
AH2 VSS VSS P28 T29 VCC1_5_B VCC3_3 AF8 1 2 3D3V_S0 3D3V_S0 1 2 DY
L24 0R0603-PAD C271 SCD1U10V2KX-5GP
AF28 VSS VSS P29 U24 VCC1_5_B -1

1
AH22 R11 1D5V_S0 1 2 1D5V_APLL_S0 U25 AA3 3D3V_S0
VSS VSS VCC1_5_B VCC3_3 C284
AH24 R12 V23 U7 1 2
VSS VSS 47mA VCC1_5_B VCC3_3

1
AH26 R13 IND-1D2UH-5-GP V24 V7 SCD1U10V2KX-5GP C264 SCD1U10V2KX-5GP

2
VSS VSS C513 VCC1_5_B VCC3_3
AH3 VSS VSS R14 V25 VCC1_5_B VCC3_3 W1
AH4 R15 W25 W6 1 2 DY

IDE
2
VSS VSS SC10U6D3V5KX-1GP VCC1_5_B VCC3_3 C289 SCD1U10V2KX-5GP
AH8
AJ5
VSS VSS R16
R17
Y25 VCC1_5_B VCC3_3 W7
Y7
-1
VSS VSS VCC3_3
B11 VSS VSS R18 AJ6 VCCSATAPLL 1 2
B14 R28 G31 A8 3D3V_S0 C299 SCD1U10V2KX-5GP
VSS VSS 1D5V_SATA_S0 VCC3_3
B17 VSS VSS R4 1D5V_S0 1 2 AE7 VCC1_5_A VCC3_3 B15
B2 T12 AF7 B18 1 2 DY
B20
VSS
VSS
VSS
VSS T13 1 2 DY AG7
VCC1_5_A
VCC1_5_A
VCC3_3
VCC3_3 B4 VCC3_3=278mA -1 C282 SCD1U10V2KX-5GP
C296 SCD1U10V2KX-5GP

ARX
B22 T14 -1 AH7 B9

PCI
VSS VSS VCC1_5_A VCC3_3
B8 T15 G30 AJ7 C15 1 2
VSS VSS VCC1_5_A VCC3_3 C506 SCD1U10V2KX-5GP
C24 VSS VSS T16 1 2 1 2 VCC3_3 D13
C26 T17 C288 SCD1U10V2KX-5GP AC1 D5
VSS VSS VCC1_5_A VCC3_3
C27 VSS VSS T2 AC2 VCC1_5_A VCC3_3 E10 1 2 DY

ATX
C297 SCD1U10V2KX-5GP
C6
D12
VSS VSS U12
U13 SATA+USB=1.56A 1 2
C286 SCD1U10V2KX-5GP
AC3
AC4
VCC1_5_A VCC3_3 E7
F11
-1
VSS VSS VCC1_5_A VCC3_3
D15 U14 AC5
D18
VSS
VSS
VSS
VSS U15 1 2
VCC1_5_A
VCCHDA AC12 32mA 3D3V_S0
D2 U16 C283 SCD1U10V2KX-5GP AC10
VSS VSS VCC1_5_A 32mA

1
D4 U17 AC9 AD11 3D3V_S5 C285
VSS VSS VCC1_5_A VCCSUSHDA
E21 VSS VSS U23 1 2

1
E24 U26 C292 SCD1U10V2KX-5GP AA5 J6 VccSus1_05[1] 1 TP94 C274 SCD1U10V2KX-5GP

2
VSS VSS VCC1_5_A VCCSUS1_05
E4 VSS VSS U27 AA6 VCC1_5_A VCCSUS1_05 AF20 VccSus1_05[2] 1 TP70
E9 U3 1 2 DY SCD1U10V2KX-5GP

2
VSS VSS
F15 VSS VSS U5 -1 C298 SCD1U10V2KX-5GP G12 VCC1_5_A VCCSUS1_5 AC16 VccSus1_5[1] 1 TP75
E23 VSS VSS V13 G17 VCC1_5_A
F28 V15 1 2 DY H7 J7 VccSus1_5[2] 1 TP96
VSS VSS C267 SC10U6D3V5KX-1GP VCC1_5_A VCCSUS1_5
F29 VSS VSS V28
F7 VSS VSS V29 AC7 VCC1_5_A VCCSUS3_3 C3 3D3V_S5
G1 W2 AD7
VSS VSS USBPLL=10mA VCC1_5_A

1
E2 W26 G102 AC18 C261 C522 C253
VSS VSS 1D5V_USB_S0 VCCSUS3_3
G10 VSS VSS W27 1D5V_S0 1 2 D1 VCCUSBPLL VCCSUS3_3 AG20

VCCPSUS
G13 Y28 AC21 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP

2
VSS VSS VCCSUS3_3
1

G19 Y29 C290 C287 C524 F1 AC22


VSS VSS VCC1_5_A VCCSUS3_3
USB CORE
G23 VSS VSS Y4 L6 VCC1_5_A VCCSUS3_3 AH28
G25 AB4 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP L7
177mA
2

VSS VSS VCC1_5_A


G26 VSS VSS AB23 M6 VCC1_5_A VCCSUS3_3 P6 3D3V_S5
G27 VSS VSS AB5 M7 VCC1_5_A VCCSUS3_3 P7

1
H25 AB6 N7 C291 C293 C521
VSS VSS VCCSUS3_3
H28 VSS VSS AD5 1D5V_SATA_S0 W23 VCC1_5_A VCCSUS3_3 C1
H29 U4 P1 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP

2
VSS VSS VCCSUS3_3
H3 VSS VSS W24 18mA in S0;50mA in S3/S4/S5 TP78 1VccLan1_05[1] F17 VCCLAN1_05 VCCSUS3_3 R1
H6 VSS TP73 1VccLan1_05[2] G18 VCCLAN1_05 VCCSUS3_3 P2
VCCPUSB

J1 VSS VSS_NCTF A1 1 TP139 VCCSUS3_3 P3


J25 VSS VSS_NCTF A2 1 TP140 3D3V_S5 F19 VCCLAN3_3 VCCSUS3_3 R3
J26 A28 1 G20 P4
VSS VSS_NCTF TP115 23mA VCCLAN3_3 VCCSUS3_3
1

J27 A29 1 TP113 SCD1U10V2KX-5GP P5


VSS VSS_NCTF VCCSUS3_3
J4 VSS VSS_NCTF AJ28 1 TP117 1D5V_S0 A24 VCCGLANPLL VCCSUS3_3 R5
J5 AH1 1 TP137 C262 R6
2

VSS VSS_NCTF VCCSUS3_3


1

K23 AH29 1 TP114 C475 C472 A26


VSS VSS_NCTF VCCGLAN1_5
K28 AJ1 1 TP136 A27 G22 VccSus1_05[3] 1 TP65
GLAN POWER

VSS VSS_NCTF SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP VCCGLAN1_5 VCCCL1_05


K29 AJ2 1 TP135 B26 <Variant Name>
2

VSS VSS_NCTF VCCGLAN1_5


K3 AJ29 1 B27 A22 VccSus1_5[3] 1
K6
VSS VSS_NCTF
B1 1
TP116 80mA B28
VCCGLAN1_5 VCCCL1_5 TP128
VSS VSS_NCTF
VSS_NCTF B29 1
TP141
TP112
VCCGLAN1_5
VCCCL3_3 F20 18mA R160 Wistron Incorporated
3D3V_S0 B25 VCCGLAN3_3 VCCCL3_3 G21 3D3V_ICH_CL_S5 1 2 3D3V_S5 21F, 88, Hsin Tai Wu Rd
0R0603-PAD
ICH8-M-1-GP-U-NF
Hsichih, Taipei
1mA ICH8-M-1-GP-U-NF Title

ICH8 (3 of 3) POWER
Size Document Number Rev
Custom
LV1 -1
Date: Friday, August 10, 2007 Sheet 17 of 38
5V_S0

5V_S0 FAN1_VCC
FAN1_VCC

1
FAN1

1
C75 C74 R220 4

K
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP 1

1
C375 C377 C372 D16 10KR2J-3-GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SC2200P50V2KX-2GP
RB751V-40-2-GP 2

2
38 FAN1_FG1 FAN1_FG1 3

2
5

1
C386
ACES-CON3-GP
FAN1_VCC SC1KP50V2KX-1GP 20.F0714.003

2
R61 U10

5V_S0 1 2 5V_G792_S0 6 1
VCC FAN1 FAN1_FG1
5V_S0 20 DVCC FG1 4
200R2F-L-GP 14 G792_32K
CLK
1

16 SMBD_G792
SDA

1
C85 H_THERMDA 7 18 SMBC_G792
SC1U6D3V2KX-GP R60 G792_DXP2 DXP1 SCL
Setting T8 as 9 19
SYSTEM SENSOR
2

DXP2 NC#19
11 DXP3
100 Degree 4K99R2F-L-GP
5
2

G792_ALERT# DGND G792_DXP2


V_DEGREE HW_THRM_SHDN#
15
13
ALERT# DGND 17
CPU SENSOR

C
V_DEGREE 3 THERM#
=(((Degree-72)*0.02)+0.34)*VCC THERM_SET SGND1 8 H_THERMDC 4

1
2 10 G792_DXN2 C84 C189 B Q6
RESET# SGND2
1

12 MMBT3904-3-GP
R63 SGND3 SC2200P50V2KX-2GP SC470P50V2KX-3GP

E
1
C92 DY
49K9R2F-L-GP G792SFUF-GP G792_DXN2

2
DXP1:108 Degree SC2200P50V2KX-2GP
2

2
74.00792.A79 G62
DXP2:H/W Setting H_THERMDA H_THERMDA 4
DXP3:X

1
3D3V_S0

U11 5V_S5
1 PM_SLP_S3# U9
B
5 VCC
2 16,19,28,33,34 PM_SLP_S3# PM_SLP_S3# 1 5 R54
A PM_SUS_CLK A VCC 10R2J-2-GP
4 Y 16 PM_SUS_CLK 2 B
3 3 4 1 2 G792_32K
GND GND Y

1
74LVC1G08GW-1-GP
DY NC7SZ08P5-GP R51
100KR2J-1-GP
R57 73.7SZ08.AAH
7,16 PWROK 1 2 G792_RESET#

2
4K7R2F-GP
1

R55
10KR2J-3-GP R62
100KR2J-1-GP R53
DY 16 THRM# 1 2 G792_ALERT#
2

0R2J-2-GP
DY 3D3V_AUX_S5 3D3V_S0
SMBUS
3D3V_S0

8
7
6
5
3D3V_S0
RN33
SRN4K7J-10-GP
1

D23
R45 2N7002DW-1-GP

1
2
3
4
10KR2J-3-GP 84.27002.D3F

KBC_SCL2 3 4 SMBC_G792
19 KBC_SCL2
2
G

3D3V_AUX_S5 2 5

D S HW_THRM_SHDN# 1 6

Q4
2N7002-11-GP SMBD_G792
KBC_SDA2
19 KBC_SDA2
3

ECRST# 19
1

10KR2J-3-GP
BAT54PT-GP
R44 D7 3D3V_AUX_S5

U6
2

1 B
VCC 5 <Variant Name>
19 S5_ENABLE 2 A
1

Y 4 PWR_S5_EN 32 Wistron Incorporated


C61 3 GND 21F, 88, Hsin Tai Wu Rd
2

SCD1U16V2ZY-2GP 74LVC1G08GW-1-GP Hsichih, Taipei


Title
Due to sourcer request , change 73.01G08.L04 to main source ,
73.07S08.AAG to 2nd source THERMAL G792
Size Document Number Rev
A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 18 of 38
3D3V_AUX_S5
3D3V_AUX_S5
RN39

1
C514 C515 C487 C474 C493 C517 C516 C280 3D3V_S0 CHARGE_ON# 1 4

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
CHG_I_PRE_SEL 2 3

2
AMP_SHUTDOWN# SRN10KJ-5-GP
2 R321 1 10KR2J-3-GP
3D3V_S0 R328
PM_PWRBTN# 1 2 10KR2J-3-GP
3D3V_AUX_S5 L23
1 2 VDD R394
BLM18PG300SN-GP 3CELL_CHG 1 2 10KR2J-3-GP
L5 L25

1
DY
1 2 VBAT 1 2 3D3V_AUX_S5 C499 C488 -1
BLM18PG300SN-GP BLM18PG300SN-GP SC18P50V2JN-1-GP SC18P50V2JN-1-GP

AVCC

KBC_XO_R 2

2
1
KCOL[1..16] 25,38
C268 2 3
SC1U6D3V2KX-GP X4
SC KROW[1..8] 25,38
2

102

115
X-32D768KHZ-38GPU

80

19
46
76
88
-1

4
1 OF 2 U50A R292
R318 DY
1 4 2 1

RESERVED#80

VDD

AVCC

VCC
VCC
VCC
VCC
VCC
7,16,20,22 PLT_RST1# 1 2 SC

1
10KR2J-3-GP
22R2J-2-GP R312 82.30001.691
124 104 33KR2J-3-GP U50B 2 OF 2
PCI_RST#_R GPIO10/HGPIO00/LPCPD# VREF
7 LRESET#
PCLK_KBC 2 97 R309
3 PCLK_KBC

2
LPC_LFRAME# LCLK GPI90/AD0 MAX8725_IINP 35 KBC_XI KCOL1
15,25 LPC_LFRAME# 3 LFRAME# GPI91/AD1 98 1 2 77 32KX1/32KCLKIN KBSOUT0/JENK# 53 1 TP118
LPC_LAD0 126 99 52 KCOL2 1 TP122
15,25 LPC_LAD0 LAD0 GPI92/AD2 KBSOUT1/TCK
LPC_LAD1 127 100 10MR2J-L-GP 51 KCOL3 1 TP126
15,25 LPC_LAD1 LAD1 GPI93/AD3 KBSOUT2/TMS
LPC_LAD2 128 108 50 KCOL4 1 TP119
15,25 LPC_LAD2 LAD2 GPIO05 KBSOUT3/TDI
LPC_LAD3 1 96 KBC_XO 79 49 KCOL5
15,25 LPC_LAD3 LAD3 GPIO04 32KX2 KBSOUT4
16 INT_SERIRQ INT_SERIRQ 125 21 USB_PWR_EN# USB_PWR_EN# 30 48 KCOL6 1 TP127
PM_CLKRUN# SERIRQ GPIO55/CLKOUT KBSOUT5/TDO KCOL7
16 PM_CLKRUN# 8 GPIO11/HGPIO02/CLKRUN# KBSOUT6/RDY# 47 1 TP123
KBRCIN# 122 63 43 KCOL8
15 KBRCIN# KA20GATE KBRST# PCB_VER0 GPIO14/HGPIO04/TB1 KBSOUT7 KCOL9
15 KA20GATE 121 GA20 GPI94/DA0 101 117 GPIO20/TA2 KBSOUT8 42
ECSCI#_KBC 29 105 PCB_VER1 26 KBC_BEEP KBC_BEEP 31 41 KCOL10
ECSMI#_KBC ECSCI# GPI95/DA1 PCB_VER2 GPIO56/TA1 KBSOUT9 KCOL11
9 GPIO64/SMI# GPI96 106 32 A_PWM0 KBSOUT10 40
ECSWI# 123 107 PM_SUS_STAT# PM_SUS_STAT# 16 CHG_I_PRE_SEL 118 39 KCOL12
16 ECSWI# GPIO63/PWUREQ# GPI97 35 CHG_I_PRE_SEL BRIGHTNESS GPIO21/A_PWM1 KBSOUT11 KCOL13
14 BRIGHTNESS 62 GPIO13/B_PWM0 KBSOUT12/GPIO64 38
37 KCOL14
KBSOUT13/GPIO63 KCOL15
KBSOUT14/GPIO62 36
KBC_SDA2 PM_SLP_S3# KCOL16
THERMAL--> 18 KBC_SDA2
KBC_SCL2
68
67
GPIO62/SDA2 GPIO01 64
95 EC_PWRBTN#
PM_SLP_S3# 16,18,28,33,34
BAT_IN# 13
KBSOUT15/GPIO61/XOR_OUT 35
34
18 KBC_SCL2 GPIO61/SCL2 GPIO03 EC_PWRBTN# 21 35,36 BAT_IN# GPIO12/PSDAT3 GPIO60/KBSOUT16 3D3V_AUX_S5
BAT_SDA1 69 93 AC_IN# AC_IN# 35 35 CHARGE_ON# CHARGE_ON# 12 33
36,38 BAT_SDA1 BAT_SCL1 SDA1 GPIO06/HGPIO06 LID_CLOSE# GPIO25/PSCLK3 GPIO57/HGPIO03/KBSOUT17
BATTERY--> 36,38 BAT_SCL1 70 SCL1 GPIO07/HGPIO07 94
119 PM_PWRBTN#
LID_CLOSE# 25
1 LAN_DISABLE
11
10
GPIO27/PSDAT2
GPIO23 PM_PWRBTN# 16 TP89 GPIO26/PSCLK2

1
6 25,38 TDATA TDATA 71
GPIO24/HGPIO01 NUM_LED# TCLK PSDAT1 KROW1 L6
GPIO30 109 NUM_LED# 20 25,38 TCLK 72 PSCLK1 KBSIN0 54
16,33,34 PM_SLP_S4# PM_SLP_S4# 81 120 CAPS_LED# 55 KROW2 BLM18PG300SN-GP
GPIO66/SWD GPIO31 CAPS_LED# 20 KBSIN1
65 PWR_LED# 56 KROW3 DY
GPIO32 PWR_LED# 20 KBSIN2
66 STBY_LED# 57 KROW4
GPIO33 STBY_LED# 20 KBSIN3
16 RSMRST#_KBC KBC_SPIDI 86 58 KROW5
RSMRST#_KBC 16

1 2
GPIO40 AD_OFF KBC_SPIDO F_SDI KBSIN4 KROW6
84 GPIO77 GPIO42/TCK 17 AD_OFF 36 87 F_SDO KBSIN5 59
SHBM 83 20 SPICS# 90 60 KROW7
RF_ON/OFF# GPO76/SHBM GPIO43/TMS CHG_LED# KBC_SPICLK F_CS0# KBSIN6 KROW8 R165
22 RF_ON/OFF# 82 GPIO75 GPIO44/TDI 21 CHG_LED# 20 92 F_SCK KBSIN7 61
AMP_SHUTDOWN# 91 22 MAIL_LED# 1 TP79 10KR2J-3-GP
26,27 AMP_SHUTDOWN# GPIO81 GPIO45 WLANONLED#
GPIO46/TRST# 23
KBC_JEN0#
WLANONLED# 20 DY
24

2
GPO47/JEN0# AMP_MUTE# ECRST#
GPIO50/TDO 25 AMP_MUTE# 27 VCC_POR# 85 ECRST# 18
E51_TxD 111 26 PLATFORM_SW
22 E51_TxD GPO83/SOUT_CR/BADDR1 GPIO51
22 E51_RxD E51_RxD 113 27 EC_BLON
GPIO87/SIN_CR GPIO52/RDY# EC_BLON 14

1
112 28 BLON_IN GMCH_BL_EN 7 C273
GPO84/HGPO01/BADDR0 GPIO53 EAPD_KBC WPC8763LDG-GP SCD1U16V2ZY-2GP
GPIO70 73 EAPD_KBC 26
TP97 1 DC_BATFULL# 114 74 71.08763.00G DY

2
GPIO16/HGPIO04 GPIO71 3CELL_CHG SPIDI
14 GPIO34 GPIO72 75 3CELL_CHG 35 1 2 KBC_SPIDI
S5_ENABLE 15 110 KBC_TRIS# R319 150R2J-L1-GP-U
18 S5_ENABLE GPIO36 GPO82/HGPO00/TRIS#
SPIDO 1 2 KBC_SPIDO SC
2

R320 150R2J-L1-GP-U
R313 VCORF 44
10KR2J-3-GP
VCORF SPICLK 1
R325
2 KBC_SPICLK
150R2J-L1-GP-U SPI FLASH ROM
1

AGND

DY
GND
GND
GND
GND
GND
GND
1

8M Bits

1
C510 C508 C509
C478 3D3V_AUX_S5
2

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
WPC8763LDG-GP SC DY SC
103

5
18
45
78
89
116

2
SCD1U16V2ZY-2GP 71.08763.00G R323
SC 1 2
DY
BOM USE 71.08763.B0G(A5) SC 10KR2J-3-GP

SC U52
FOR KBC STRAPPING

1
SPICS# 1 8 C505
SPIDI CS# VCC SPI_HOLD# SCD1U16V2ZY-2GP
2 DO HOLD# 7
R315 SPI_WP# SPICLK
-1 3 6

2
3D3V_AUX_S5 3D3V_S0 WP# CLK SPIDO
3D3V_AUX_S5 1 2 EXT_FWH# 25 4 GND DIO 5
KBC_TRIS# 1 2 RN34
100KR2J-1-GP R326 DY 10KR2J-3-GP
BAT_SCL1 1 4 W25X80-VSSI-GP
KBC_JEN0# 1 2 BAT_SDA1 2 3 72.25X80.001
1

1
R306 DY 10KR2J-3-GP
D25 R330 R332 R333 RN35
A K ECSCI#_KBC SHBM 1 2 SRN10KJ-5-GP
-1 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP SPI_HOLD# 1 4
16 SB_ECSCI# 3D3V_AUX_S5
R163 10KR2J-3-GP SC SPI_WP#
RB751V-40-2-GP
-1 2 3
2

2
E51_TxD 1 2 PCB_VER0
R327 4K7R2J-2-GP PCB_VER1 SRN10KJ-5-GP
D26
ECSMI#_KBC PCB_VER2
16 SB_ECSMI# A
DY
K
BLON_IN 1 2
PlanarID (1,0) <Variant Name>
1

1
R302 10KR2J-3-GP
RB751V-40-2-GP SA: 0,0 R329 R331 R334
Wistron Incorporated
PLATFORM_SW 1
R162
2
10KR2J-3-GP
SB: 0,1 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 21F, 88, Hsin Tai Wu Rd
SC: 1,0 PCB_VER2: DY DY DY Hsichih, Taipei
2

-1: 1,1 Low:LV1 Title


FOR LV1 USE,C46 Dummy SC
High:LV2 KBC_WPC8763L
Size Document Number Rev
A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 19 of 38
SATA HDD Connector CD-ROM CONNECTOR
SATA1
45 IDE_PDD[0..15] 15
NP1
1

2
3
4 CDROM1
5
6 52
7 49 50
8 S1 47 48
9 S2 SATA_TXP0 SATA_TXP0 15,38 IDE_PDD8 45 46 RSTDRV#_5
10 S3 SATA_TXN0 SATA_TXN0 15,38 IDE_PDD9 43 44 IDE_PDD7
11 S4 IDE_PDD10 41 42 IDE_PDD6 3D3V_S0
12 S5 SATA_RXN0 C301 1 2 SCD01U16V2KX-3GP SATA_RXN0_C IDE_PDD11 39 40 IDE_PDD5
SATA_RXN0_C 15,38
13 S6 SATA_RXP0 C300 1 2 SCD01U16V2KX-3GP SATA_RXP0_C IDE_PDD12 37 38 IDE_PDD4
SATA_RXP0_C 15,38

1
14 S7 IDE_PDD13 35 36 IDE_PDD3
15 IDE_PDD14 33 34 IDE_PDD2 R236
IDE_PDD15 IDE_PDD1
16
17
Close to HDD 15 IDE_PDDREQ IDE_PDDREQ
31
29
32
30 IDE_PDD0 4K7R2J-2-GP
18 15 IDE_PDIOR# IDE_PDIOR# 27 28

2
19 25 26 IDE_PDIOW# 15
20 15 IDE_PDDACK# IDE_PDDACK# 23 24 IDE_PDIORDY 15
21 21 22 INT_IRQ14 15
22 1A 3D3V_S0 19 20 IDE_PDA1 IDE_PDA1 15
23 2A 15 IDE_PDA2 IDE_PDA2 17 18 IDE_PDA0 IDE_PDA0 15
1

1
24 3A C295 C294 15 IDE_PDCS3# IDE_PDCS3# 15 16 IDE_PDCS1# 15
25 4A 13 14 CDROM_LED#
26 5A SCD1U16V2ZY-2GP SC22U6D3V5MX-2GP 11 12
2

2
27 6A 5V_S0 9 10 5V_S0
28 7A 7 8

K
29 8A C405 C401 5 6

1
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
30 9A D17 3 4
5V_S0
31 10A SR24-GP 1 2
K

5V_S0
32 11A DY 51

2
1

33 12A C281 D10 R234

A
34 13A SR24-GP FOX-CONN50-4R-4GP CDROM_LED# 1 2
35 14A SC10U10V5ZY-1GP DY 20.80361.050
2

36 15A 4K7R2J-2-GP 3D3V_S0


A

37 R235
38 INT_IRQ14 1 2
39
40 10KR2J-3-GP
41
42
43
44
NP2
46

CON44+15P+S7-2GP
PCIRST# 3V to 5V level shift for HDD & CDROM
20.F0885.001

3D3V_S0 5V_S0

1
R237

R381 WIRELED1 10KR2J-3-GP


3D3V_S0 1 2 WLAN_LED# A K WLANONLED# 19

2
1KR2J-1-GP LED-O-16-GP Q11
R380 PWRLED1 7,16,19,22 PLT_RST1# S D RSTDRV#_5
3D3V_S0 1 2 PWR_LED#1 1 2 PWR_LED# 19 2N7002-11-GP

150R2J-L1-GP-U LED-G-62-GP
R379 STBYLED1
3D3V_S5 1 2 STBY_LED#1 A K STBY_LED# 19
1KR2J-1-GP LED-O-16-GP
R375 HDDLED1 D31
3D3V_S0 1 2 HDD_LED# 1 2 MEDIA_LED# A K CDROM_LED#

150R2J-L1-GP-U LED-G-62-GP RB751V-40-2-GP


D32
A K SATA_LED# 15
RB751V-40-2-GP
R378 CHGLED1
3D3V_S5 1 2 CHG_LED#1 A K CHG_LED# 19
1KR2J-1-GP LED-O-16-GP LED Location and Sequence ( The edge of PCB,Top view )
R377 CAPSLED1
3D3V_S0 1 2 CAPS_LED#1 1 2 CAPS_LED# 19
150R2J-L1-GP-U LED-G-62-GP PWR ON MEDIA CAP.
R376 NUMLED1
3D3V_S0 1 2 NUM_LED#1 1 2 NUM_LED# 19
Left side Right side
Wistron Incorporated
150R2J-L1-GP-U LED-G-62-GP WLAN STDBY CHARGER NUM. 21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
HDD/CDROM/LED
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 20 of 38
USB PORT
-1
-1 U61 100 mil 5V_USB1_S3 100 mil 5V_USB1_S3
U60 100 mil 5V_USB0_S3 100 mil 5V_USB0_S3
1 8 80.10715.54L
80.10715.54L GND OUT#8
1 GND OUT#8 8 5V_S5 2 IN#2 OUT#7 7

1
5V_S5 2 7 3 6 C336 C325 EC9 TC9 C334 EC27 TC17
IN#2 OUT#7 IN#3 OUT#6

1
3 6 C433 C235 EC14 TC14 C191 EC17 TC11 USB_PWR_EN# 4 5
IN#3 OUT#6 EN/EN# OC#

ST100U6D3VDM-7GP

ST100U6D3VDM-7GP
SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SC1KP50V2KX-1GP

SCD1U16V2ZY-2GP

SC1KP50V2KX-1GP
19 USB_PWR_EN# 4 5 DY

2
EN/EN# OC#

ST100U6D3VDM-7GP

ST100U6D3VDM-7GP
SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SC1KP50V2KX-1GP

SCD1U16V2ZY-2GP

SC1KP50V2KX-1GP
DY

1
C340 G545B1P8U-GP-U1
1

C438 G545B1P8U-GP-U1
SCD1U16V2ZY-2GP

2
SCD1U16V2ZY-2GP
2

16 USB_OC#0
16 USB_OC#3
-1
-1

5V_USB1_S3
-1
USB_PN2 R11 1 2 0R0402-PAD USB_2- USB5
16,38 USB_PN2
5 7
-1 5V_USB0_S3 1

USB_PN3 R132 1 2 0R0402-PAD USB_3- USB3 2


16,38 USB_PN3
5 7 3
4
1
6 8
2
3 USB_PP2 R10 1 2 0R0402-PAD USB_2+ SKT-USB-139-GP
16,38 USB_PP2
4 62.10027.551

6 8

USB_PP3 R134 1 2 0R0402-PAD USB_3+ SKT-USB-139-GP


16,38 USB_PP3
62.10027.551
-1 5V_USB1_S3

USB_PN0 R9 1 2 0R0402-PAD USB_0- USB4


16,38 USB_PN0
5 7

-1 5V_USB0_S3
1

2
USB_PN4 R124 1 2 0R0402-PAD USB_4- USB2 3
16,38 USB_PN4
5 7 4

1 6 8

2 USB_PP0 R8 1 2 0R0402-PADUSB_0+ SKT-USB-139-GP


16,38 USB_PP0
3 62.10027.551
4

6 8

USB_PP4 R126 1 2 0R0402-PAD USB_4+ SKT-USB-139-GP SC


16,38 USB_PP4
62.10027.551

PWR BOTTON
3D3V_AUX_S5
1

R1
100KR2J-1-GP
2

EC_PWRBTN#_R

SW1
5

SW-TACT-68-GP-U1 R2
2 1 1 2 EC_PWRBTN# 19
62.40009.451 470R2J-2-GP
<Variant Name>
1

C1
4 3
SCD1U16V2ZY-2GP Wistron Incorporated
2

21F, 88, Hsin Tai Wu Rd


6

Hsichih, Taipei
Title

USB PORT/PWR BOTTON


Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 21 of 38
Mini Card Connector

WLAN1
53
NP1
1 MINI_WAKE# 1 2 3D3V_S0
TP58
3 4
5 6 1D5V_S0
1 MINI_REQ# 7 8
TP59
9 10
3,38 CLK_PCIE_MINI# 11 12
3,38 CLK_PCIE_MINI 13 14
15 16

19 E51_RxD E51_RxD 17 18
E51_TxD 19 20 RF_ON/OFF# RF_ON/OFF# 19
19 E51_TxD
21 22 PCI_RST#_M R324 1 2 0R2J-2-GP PLT_RST1# 7,16,19,20
16,38 PCIE_RXN3 23 24 3D3V_S5 PCI_RST#_M 38

2
16,38 PCIE_RXP3 25 26
27 28 R164
29 30 SMBCLK_SB 15,16,23,38 10KR2J-3-GP
16,38 PCIE_TXN3 31 32 SMBDAT_SB 15,16,23,38
16,38 PCIE_TXP3 33 34

1
35 36 USB_PN1 16,38
37 38 USB_PP1 16,38
39 40
41 42 LED_WWAN# 1 TP87
43 44 LED_WLAN# 1
LED_WPAN# TP88
45 46 1 TP90
47 48
49 50
5V_AUX_S5 51 52
NP2
54
3D3V_S0 1D5V_S0 3D3V_S5 SC
SKT-MINI52P-6-GP

62.10043.261

1
C154 C507 C484 C503 C483

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

SC

<Variant Name>

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title

Mini Card
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 22 of 38
R27 10KR2J-3-GP 3D3V_LAN_S5 AVDD33
3D3V_S0 1 2 They are for U5 AVDD33
DY R22
1 2
20 mils pin-2 and 59

1
R28 0R0603-PAD C24 C573

2
16,25 PCI_RST# 1 2 LAN_PERSTB G2 G3
1 2 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
3D3V_S5 3D3V_LAN_S5

2
0R2J-2-GP DY
3D3V_S0 GAP-CLOSE-PWR GAP-CLOSE-PWR

1
U1

1 5
60 ~ 100 mils VDD33
A VCC
2 B
3 GND Y 4

1
C65 C71 C72 C64 C51
VDD33
NC7S08M5X-NL-GP SC22U6D3V5MX-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
DY Power domain chart DY DY
1

R50 R52 They are for U5 VDD33


3K6R3-GP 10KR2J-3-GP RTL8111B / RTL8111C pin-16,37,46 and 53
DY VDD33
RTL8101E
U8
2

C67

SCD1U16V2ZY-2GP
LAN_EECS 1 8 3.3V 3.3V
CS VCC AVDD33
1
LAN_EESK 2 7 EEPROM LED OPTION USE '01' VDD33
LAN_EEDI SK DC
3 6
LAN_EEDO DI ORG (DEFINED IN SPEC)
4 5 AVDD18 1.8V 1.2V
2
DO GND
=> LED0 : ACT

3
=> LED1 : LINK Only For 8111B
AT93C46-10SU-1GP EVDD18 1.8V 1.2V CTRL18 1 DY
(BOTH 10/100 AND GIGA CHIP) Q3
BCP69T1-1-GP

2
C40 DVDD15 1.5V 1.2V Only For 8111C
FB12
Closing chip pin1 They are for U5 AVDD18
2 1 AVDD18
pin-5,8,11 and 14
-1 L26
DY R387
40 mils 40 mils
1

VDD33 SC15P50V2JN-2-GP 1 2 1 2 AVDD18


X1 Q3 Q5
XTAL-25MHZ-102-GP IND-4D7UH-86-GP 0R3-0-U-GP

1
8101E REMOVE RTL8111B Need Need C20 C7 C8 C21
C36
2
1

1
8111B REMOVE 82.30020.851 1 2 C19

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
R356 2 1 8101E mount 2K R12 DY
8111C STUFF

2
1

SCD1U16V2ZY-2GP
0R2J-2-GP 8111B,8111C mount 2.49k Only For 8101E 0R3-0-U-GP C6

2
RTL8111C N/A N/A

SC22U6D3V5MX-2GP
DY SC15P50V2JN-2-GP
-1
2

2
-1
ACT_LED# 24
LINK100 24 RTL8101E N/A N/A SC
LINK1G 24
1

C27 C28 R19 They are for U5 EVDD18


-1 1 2
CTRL15/VDD33

pin-22 and 28
SCD1U10V2KX-5GP

2KR2F-3-GP
SC1U6D3V2KX-GP

DY DY
RTL_RSET_1

ACT_LED#
2

DVDD15

DVDD15

DVDD15

20 mils
AVDD33

LINK100
LAN_X2
LAN_X1

LINK1G
VDD33

EVDD18
GVDD

1 2

R13

1
0R3-0-U-GP C45 C38
-1

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

2
1
U5
8111B STUFF CAP Only For 8111C R384
GND
RSET
VCTRL15
NC#62
CKTAL2
CKTAL1
NC#59
VDD15
LED0
LED1
LED2
LED3
VDD33
NC#52
NC#51
NC#50
VDD15

8101E/8111C REMOVE CAP VDD33 0R3-0-U-GP


DY
Only For 8111B

2
CTRL18 1 48 LAN_EESK
VCTRL18 EESK

3
AVDD33 2 47 LAN_EEDI
MDIP0 AVDD33 EEDI/AUX VDD33 CTRL15
24 MDIP0 3 MDIP0 VDD33 46 1 DY
MDIN0 4 45 LAN_EEDO 3D3V_S0 Q5
24 MDIN0 AVDD18/FB12 MDIN0 EEDO LAN_EECS BCP69T1-1-GP
5 44 They are for U5 DVDD15

2
MDIP1 AVDD18 EECS DVDD15
24 MDIP1 6 MDIP1 VDD15 43 pin-15,21,32,33,38,41,43,49,52 and 58
1

MDIN1 7 42
24 MDIN1 MDIN1 NC#42 R43
AVDD18 DVDD15 R46
MDIP2
8
9
AVDD18 NC#41 41
40 1KR2J-1-GP 1 2
40 mils DVDD15
24 MDIP2 MDIN2 NC#9 NC#40
24 MDIN2 10 NC#10 NC#39 39 Only For 8101E
AVDD18 11 38 DVDD15 0R3-0-U-GP DY DY DY
2

NC#11 NC#38

1
MDIP3 VDD33 C66 C58 C572 C68 C54 C46 C34 C568 C569 C570 C571 C18
24 MDIP3 12 NC#12 VDD33 37
-1

1
MDIN3 13 36 ISOLATE# C78
24 MDIN3 NC#13 ISOLATE#

SC22U6D3V5MX-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
AVDD18 14 35 DY DY

2
NC#14 NC#35
1

SC22U6D3V5MX-2GP
DVDD15 15 34

2
VDD33 VDD15 NC#34 DVDD15/CLKREQB R47
16 33
LANWAKE#

REFCLK_N

VDD33 NC#33
REFCLK_P

15KR2F-GP
PERST#

EVDD18

EVDD18
VDD15
NC#17
NC#18

NC#32
EGND

HSON
EGND
HSOP
HSIN
HSIP

SC
G103 -1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

AGND 1 2 RTL8101E-GR-GP 8111B STUFF


8101E/8111C REMOVE
GAP-CLOSE-PWR 71.08101.B0G AVDD18/FB12 1 R382 2 0R2J-2-GP AVDD18

SC 8101E/8111B STUFF 8101E/8111B STUFF


8111C REMOVE 1 R388 2 0R2J-2-GP FB12 8111C REMOVE
PCIE_RXN2_1
PCIE_RXP2_1

R385 1 DY 2 SMBCLK_SB_R DY
15,16,22,38 SMBCLK_SB
0R2J-2-GP DVDD15/CLKREQB 1 R391 2 0R2J-2-GP DVDD15
R386 1 DY SMBDAT_SB_R CTRL15/VDD33 1 R390 2 0R2J-2-GP CTRL15
DVDD15

DVDD15
EVDD18

EVDD18

15,16,22,38 SMBDAT_SB 2
0R2J-2-GP
AGND

AGND

<Variant Name>
1 R383 PCIE_WAKE#_R
16 PCIE_WAKE# 2
0R0402-PAD LAN_PERSTB 1 R389 2 0R2J-2-GP VDD33
-1
K

PCIE_TXP1 DY Wistron Incorporated


16 PCIE_TXP1
1

16 PCIE_TXN1 PCIE_TXN1 C574 C575 D33 21F, 88, Hsin Tai Wu Rd


CLK_PCIE_LAN MMPZ5226BPT-GP
3 CLK_PCIE_LAN
CLK_PCIE_LAN# SCD1U16V2ZY-2GP
Hsichih, Taipei
3 CLK_PCIE_LAN#
2

PCIE_RXP1 C49 SCD1U10V2KX-5GP SC22U6D3V5MX-2GP 8101E/8111B REMOVE Title


16 PCIE_RXP1 2 1 SC
A

PCIE_RXN1 C52 2 1 SCD1U10V2KX-5GP DY DY DY


16 PCIE_RXN1 8111C STUFF
LAN RTL8111C/8111B/8101E
Size Document Number Rev
Layout - 1:0.1u first,2: 22u,3:D33 Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 23 of 38
5 4 3 2 1

D Lan Conn D

AVDD18 8101E : R188 ( 0 ohm )


8111B/8111C : R188 (NC)
20mil -1
DY
1

XF1
R188
0R2J-2-GP
-1 MDIP2 5 8 RJ45_4 1 2 CONN_PWR_1
23 MDIP2 TD+ TX+ 3D3V_LAN_S5
MDIN2 6 7 RJ45_5 R186 470R2J-2-GP
23 MDIN2 TD- TX-
2

1
1 MDIP3 MDIP3 23 1 2 CONN_PWR_2
RD+ MDIN3 EC47 R185 470R2J-2-GP
4 CT RD- 2 MDIN3 23
MCT3 9 SCD1U16V2ZY-2GP

2
CT

1
MCT4 10 12 RJ45_7
TCT1 CT RX+ RJ45_8 EC48 EC49
3 CT RX- 11 -1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
C C
1

C318 C317
-1 -1
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

DY DY XFORM-230-GP
2

XF2

MDIP0 5 8 RJ45_1
23 MDIP0 MDIN0 TD+ TX+ RJ45_2
23 MDIN0 6 TD- TX- 7

1 MDIP1 MDIP1 23 RJ1


RD+ MDIN1
4 CT RD- 2 MDIN1 23 9
MCT1 9 LINK100 A1
MCT2 CT RJ45_3 23 LINK100 CONN_PWR_1
10 CT RX+ 12 A2
3 11 RJ45_6 LINK1G A3
CT RX- 23 LINK1G RJ45_1 1
1

C320 C319 RJ45_2 2


SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

XFORM-230-GP RJ45_3 3
RJ45_4 4
2

RJ45_5 5
10/100/1000Mbps Lan Transformer RJ45_6 6
RJ45_7 7
RJ45_8 8
CONN_PWR_2 B1

ACT_LED# B2
23 ACT_LED#
10
RN18
B MCT4 RJ45-125-GP-U1 B
1 8
MCT3 2 7 LAN_TERMINAL 1 2
MCT2 3 6 22.10277.021
MCT1 4 5 C314 SC1KP3KV8KX-GP

SRN75J-1-GP 1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
MDIP0 MDIP1
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
MDIN0 MDIN1 6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
1

R20 R21 R16 R18


-1
49D9R2F-GP

49D9R2F-GP

49D9R2F-GP

49D9R2F-GP
2

MID0X MID1X
1

C15 C14
SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP
2

A A

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
GIGA no need it at all , 10/100 keep Title
LAN Conn
Size Document Number Rev
A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 24 of 38
5 4 3 2 1
Internal KeyBoard Connector
TouchPad Connector

KROW[1..8] 19,38 5V_S0


KCOL[1..16] 19,38 SC

1
KCOL10 KROW6 KROW8 KCOL9 KCOL14 KCOL16 5V_S0 C221
KROW2 KCOL1 KCOL2 KCOL8 KCOL13 KCOL11 SCD1U16V2ZY-2GP C220
KB1 KROW1 KROW3 KCOL6 KCOL5 KCOL4 KCOL12 SC1U6D3V2KX-GP

2
25 KROW7 KROW4 KROW5 KCOL3 KCOL7 KCOL15

3
4
1 KCOL16

1C576
1C577
1C578
C579

1C580
1C581
1C582
C583

1C584
1C585
1C586
C587

1C588
1C589
1C590
C591

1C592
1C593
1C594
C595

1C596
1C597
1C598
C599
2 KCOL11 RN15 CN2

1
3 KCOL12 SRN10KJ-5-GP 13
4 KCOL15 1
5 KCOL14

2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2

2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2

2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2

2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2

2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2

2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2
SC220P50V2JN-3GP 2

2
1
KCOL13

SC220P50V2JN-3GP

SC220P50V2JN-3GP

SC220P50V2JN-3GP

SC220P50V2JN-3GP

SC220P50V2JN-3GP

SC220P50V2JN-3GP
6 2
7 KCOL4 19,38 TDATA 3
8 KCOL7 19,38 TCLK 4
9 KCOL9 5
10 KCOL8 6
11 KCOL5 RIGHT# 7

1
12 KCOL3 EC16 EC15 8
13 KROW8 SC33P50V2JN-3GP SC 9
14 KCOL2 10

2
15 KCOL6 SC33P50V2JN-3GP 11
16 KROW5 LEFT# 12
17 KROW6 14
18 KCOL1
KROW3
19
20 KROW4 Touch Pad the same as Y40/Y41/Y45/Y46 ACES-CON12-GP
21 KCOL10 20.K0174.012
22 KROW2 1 12
23 KROW1
24 KROW7
26

ACES-CON24-1-GP
20.K0197.024

24 1

15'' TOUCHPAD BUTTON SWITCH


GOLDEN FINGER FOR DEBUG BOARD
5V_S0 5V_S0

1
5V_S0 U18 5V_S0
R175 R174
A1 B1
TOP VIEW 10KR2J-3-GP DY 10KR2J-3-GP DY
PCI_RST# A1 B1 PCI_RST#
16,23 PCI_RST# A2 A2 B2 B2
15,19 LPC_LFRAME# LPC_LFRAME# A3 B3 LPC_LFRAME#

2
A3 B3
A4 A4 B4 B4
3 PCLK_FWH PCLK_FWH A5 B5 PCLK_FWH
A5 B5
FWH_INIT#
A6 A6 B6 B6
FWH_INIT#
A15 (B1)
A7 A7 B7 B7

LPC_LAD3
A8 A8 B8 B8
LPC_LAD3
A14 (B2) SW2 SW3
15,19 LPC_LAD3 A9 A9 B9 B9

5
LPC_LAD2 A10 B10 LPC_LAD2 SW-TACT-68-GP-U1 SW-TACT-68-GP-U1
15,19 LPC_LAD2 A10 B10
....

LPC_LAD1 A11 B11 LPC_LAD1 2 1 LEFT# 2 1 RIGHT#


....

15,19 LPC_LAD1 A11 B11


15,19 LPC_LAD0 LPC_LAD0 A12 B12 LPC_LAD0
EXT_FWH# A12 B12 EXT_FWH# 62.40009.451 62.40009.451
19 EXT_FWH# A13 A13 B13 B13
A14 A14 B14 B14 A2 (B14)
3D3V_S0 A15 A15 B15 B15 3D3V_S0 4 3 4 3
A1 (B15)

6
FOX-GF30
ZZ.GF030.XXX

3D3V_S0
1D05V_S0 (BOTTOM VIEW)
3D3V_S0 COVER SWITCH
3
4

RN38
1

SRN10KJ-5-GP C512 C489 C502 3D3V_AUX_S5


SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY DY DY

1
SC10U10V5ZY-1GP
2
1

FWHINIT COVER_SW 38 R7
FWH_INIT#
COVER1 10KR2J-3-GP
3 R6
G

2
1 1 2 LID_CLOSE# 19 <Variant Name>
Q16
1
S 2N7002-11-GP
D 2 100R2F-L1-GP-U C3
4,15 H_INIT# Wistron Incorporated
4
SCD22U16V3KX-2-GP 21F, 88, Hsin Tai Wu Rd
2

ETY-CON2-5-GP-U
20.D0196.102
Hsichih, Taipei
Title
KeyBoard/TPAD/Debug
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 25 of 38
A B C D E

POWER GENERATE *Layout*


5V_S0 20 mil 5VA_S0

1
1
C547 R358
SC22P50V2JN-4GP 28K7R2F-GP
U55

2
1 5 5VA_SET
EN NC#5
2 GND
3 VIN VOUT 4
4 4

1
RT9198-4GPBG-GP R351

1
74.09198.A7F 10KR2F-2-GP

1
C534
SC1U10V3KX-3GP C548

2
SC10U10V5ZY-1GP

2
3D3V_S0 5VA_S0 2nd:74.09198.A7F
"VAUX" Pull high to enable standby mode (RT9198-4GPBG) VOUT = 1.25 (1 + R1/R2)

1
1
C529 RN40 C536 C560 C563

1
19 KBC_BEEP 1 2 KBC_BEEP_1 1 4 AUD_BEEP 1 2AUD_PC_BEEP C525 SC10U10V5ZY-1GP SCD1U10V2KX-4GP

2
SCD47U16V3ZY-3GP 2 3 C541 SC10U10V5ZY-1GP

2
C532 SC1U10V3KX-3GP

2
16 ACZ_SPKR 1 2 SPKR_SB_1 SRN47K-2-GP-U C537

1
SCD47U16V3ZY-3GP R345 1 2
C531 SCD1U10V2KX-4GP
10KR2J-3-GP SC100P50V2JN-3GP

2
ACZ_RESET# R3461 SC47P50V2JN-3GP
2 ACZ_RST# 15
0R2J-2-GP ACZ_SYNC 15

2
ACZ_BITCLK_R R3481 2 ACZ_BITCLK 15 R360 1 2 5K1R2F-2-GP HP_DETECT# 27,38
C539 0R2J-2-GP
1 2
DY
SC22P50V2JN-4GP AUDIO_SENSE R361 1 2 20KR2F-L-GP MIC_DETECT# 27,38

DY C538

25
38

12
11
10

33

44
43

34
13
1 2

1
9

6
U56
SC22P50V2JN-4GP

DVDD-IO
AVDD1
AVDD2

PCBEEP
RESET#

BCLK
NC#33

NC#44
NC#43

SENSE_B
SENSE_A
DVDD

SYNC
3 3
ACZ_SDATAOUT 15
R365

1
23 LINE1-L_PORT-C SDATA-OUT 5 1 2 EAPD_KBC 19
24 8 ACZ_SDATAIN0_R 1 2 C540
LINE1-R_PORT-C SDATA-IN ACZ_SDATAIN0 15
14 R347 39R2J-L-GP SC22P50V2JN-4GP 0R2J-2-GP

2
NC#14
15 NC#15 DY AMP_SHUTDOWN# 19,27
48 SPDIF
SPDIFO EAPD
29 LINE1-VREFO EAPD 47

1
31 EC26 DY
GPIO1 D30
1 2

ALC268 NC#45 45 BAW56-2-GP

1
27 AUD_MICIN_L C556 1 2 SC1U10V3KX-3GP MIC1-L_PORT-B 21 46 SC470P50V2KX-3GP DY
MIC1-L_PORT-B DMIC-CLK
27 AUD_MICIN_R C559 1 2 SC1U10V3KX-3GP MIC1-R_PORT-B 22 MIC1-R_PORT-B
R363
16 0R2J-2-GP 83.00056.G11

3
MIC2-L_PORT-F
17 MIC2-R_PORT-F HP-OUT-L_PORT-A 39 SOUNDL 27
41 SOUNDR 27 R350

2
HP-OUT-R_PORT-A
RN42
1 4 MIC1V_R 32 27 G1410_SHDN# 1 2 3D3V_S0
MIC1V_L MIC1-VREFO-R
2 3 28 MIC1-VREFO-L LINE-OUT-L_PORT-D 35 FRONTL 27

DMIC-12/GPIO0
DMIC-34/GPIO3
30 MIC2-VREFO LINE-OUT-R_PORT-D 36 FRONTR 27 DY 10KR2J-3-GP
SRN2K2J-1-GP

MONO-OUT
2

C567 C566

JDREF
AVSS1
AVSS2
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

DVSS
DVSS

VREF

CD-G
CD-R
CD-L
1

ALC268-GR-GP
26
42
4
7

27

40
37

2
3

18
20
19
JDREF
ALC_GPIO0

1
2 MONO-OUT 2
AUDIO_VREF R349
1

TP101 10KR2J-3-GP
1

R368 TPAD30 DY
1

C565 C564 20KR2F-L-GP

2
SC10U10V5ZY-1GP SCD47U16V3ZY-3GP
2

DY
2

1 1

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title

AUDIO CODEC ALC268


Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 26 of 38
A B C D E
A B C D E

AUDIO OP AMPLIFIER KBC_MUTE_GPIO8

SC
R369 R374
5V_S0 1 2 5V_OP_PWR G1432_SD 1 2 5V_S0
0R0603-PAD
10KR2J-3-GP

1
C561 C562

D
SC10U10V5ZY-1GP TP138
4 SCD1U16V2ZY-2GP Q17 3D3V_S0 4

2
2N7002-11-GP R340 3D3V_S0_AU
G AMP_SHUTDOWN# 19,26 1 2

AMPVOL1
0R0603-PAD

S
C543
AUD_C1- 1 2 AUD_C1+
C549
R362 R364 C553 SC4D7U10V5ZY-3GP

20

15

13
4

1
26 SOUNDL 1 2 L_LINE_IN_1 1 2 U57 C526 C527 C535

SC2D2U10V3KX-1GP

SC1U16V3ZY-GP

SC22P50V2JN-4GP
2 1 R_LINE_IN_1 1 2 U54

VOL

IN1#/IN2
LVDD
RVDD

SHUTDOWN
SOUNDR 26
SC10U6D3V6KX-4GP 10KR2J-3-GP

2
10KR2J-3-GP SC10U6D3V6KX-4GP 1410_VSS 1 6
L_LINE_IN R_LINE_IN OUT C1+ G1410_SHDN#
1 LIN1 RIN1 18 3D3V_S0_AU 2 IN SHDN# 5
R357 2 17 R359 3 4
L_LINE_IN SPKR_L+ LIN2 RIN2 SPKR_R+ R_LINE_IN C1- GND
1 2 24 LOUT+ ROUT+ 19 2 1
SPKR_L- 7 12 SPKR_R-
10KR2J-3-GP LOUT- ROUT- 10KR2J-3-GP G5930TBU-GP
3 LPASS
C546 LBYPASS C550
6 NC#6 RPASS U53

15

11
1 2 8 NC#8 RBYPBASS 16 1 2

9
SC1U6D3V2KX-GP
23 NC#23 SC1U6D3V2KX-GP
SC
DY

NC#9
NC#11
SVDD
PVDD

1
GND/HS
GND/HS
GND/HS
GND/HS
DY DY C551

MUTE
SC1U10V3KX-3GP C533

GND
GND
26 FRONTL 1 2 SOUND_L1 1 R353 2 HP_L 4 12 C1P SC2D2U10V3KX-1GP

2
C552 20KR2J-L2-GP INL C1N C1N
8 INR C1P 14
G1432Q5U-GP SC1U10V3KX-3GP
11

9
10
21
22

14
25

1
74.01432.013 C555 C554 26 FRONTR 1 2 SOUND_R1 1 2 HP_R 1 5 OUTL 2 1 HP_L
SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP R352 SHDNR# OUTL OUTR R354
16 SHDNL# OUTR 7
5V_S0 1 2 G1432_MUTE 20KR2J-L2-GP 20KR2F-L-GP

SGND
PGND
SVSS
PVSS

GND
3 R372 10KR2J-3-GP 3
19,26 AMP_SHUTDOWN# 1 R342 2 G1410_SHDN# 2 1
0R0402-PAD SC
G1412R41U-GP C544

6
10

17
2
13
SC47P50V2JN-3GP
D

2
Q18 R344 2 1 HP_R
2N7002-11-GP 26 G1410_SHDN#
100KR2J-1-GP R355

11410_VSS
G 20KR2F-L-GP
19 AMP_MUTE#

1
2 1
S
2

R373 C545
10KR2J-3-GP C542 SC47P50V2JN-3GP
SC2D2U10V3KX-1GP

2
1

2 Internal Speaker 2

DY
38 SPKR_L- SPKR_L- EC7 1 2 SC100P50V2JN-3GP
38 SPKR_L+ SPKR_L+ EC8 1 2 SC100P50V2JN-3GP
DY

DY
38 SPKR_R- SPKR_R- EC13 1 2 SC100P50V2JN-3GP
38 SPKR_R+ SPKR_R+ EC12 1 2 SC100P50V2JN-3GP
LINE OUT DY

MIC IN SB SPK2
SPK1 4
MIC1 HP1 4
NP2 NP2 SPKR_L- 2 SPKR_R- 2
38 AUD_MIC_R NP1 38 SPKR_R_A1 NP1
5 5 SPKR_L+ 1 SPKR_R+ 1
-1 26,38 MIC_DETECT#
4
26,38 HP_DETECT#
4 3
26 AUD_MICIN_R 1 R371 2 0R0402-PAD AUD_MIC_R 3 OUTR R367 1 2 33R2J-2-GP SPKR_R_A1 3 3
6 6 ETY-CON2-5-GP-U
26 AUD_MICIN_L 1 R370 2 0R0402-PAD AUD_MIC_L 2 OUTL R366 1 2 33R2J-2-GP SPKR_L_A1 2
20.D0196.102 ETY-CON2-6-GP
1 1
1
2

38 AUD_MIC_L EC30 38 SPKR_L_A1 20.F0736.002


1

2
1

RN43 EC28 EC29 SC1000P50V2JN-GP PHONE-JK241-GP PHONE-JK241-GP


1

SRN10KJ-5-GP DY 22.10263.131 C558 C557 22.10263.131


2

1
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP

SC680P50V2KX-2GP

SC680P50V2KX-2GP

DY DY DY EC31
2

1 SRN1KJ-7-GP SC1000P50V2JN-GP 1
DY
2

RN41
4
3

DY <Variant Name>
3
4

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title

AUDIO AMP AND JACK


Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 27 of 38
A B C D E
5 4 3 2 1

Run Power
D D

5V_S0 5V_S5

RUN_PWR_CTRL C477 U48

1
DCBATOUT Q14 DY 1 S D 8
TP0610T-T1-E3-GP SCD1U25V3KX-GP 2 S D 7
R288 S D
3 6

2
PWR_CTRL G D

S
1 2 2 3 4 5

D
AO4422-1-GP
15KR2F-GP

2
R285

1
R287 C469 D22 3D3V_S0 3D3V_S5

SCD1U25V3KX-GP

330KR3J-L-GP
RLZ12B-1-GP

G
R282
1KR2J-1-GP DY

2
1 2 PWR_G C442 U42

1
C RUN_S3# DY 1 S D 8 C
330KR3J-L-GP 1 SCD1U25V3KX-GP S D
2 7
R281 3 S D 6

2
4 G D 5

D
1KR2J-1-GP
Q12 AO4422-1-GP
2

2N7002-11-GP
PM_SLP_S3 G
S
D

Q13
2N7002-11-GP
16,18,19,33,34 PM_SLP_S3# PM_SLP_S3# G
S

B B

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
A A
Hsichih, Taipei
Title
RUN POWER / CTRL LOGIC
Size Document Number Rev
A
LV1 -1
Date: Saturday, August 11, 2007 Sheet 28 of 38
5 4 3 2 1
CPU_CORE Adapter
SC411MLTRT
Intersil ISL6262A 1D8V_S3 Input Signal Output Signal
AD_OFF AD_IN
(I) (O)
VID Setting Output Signal Input Signal
H_VID0 PM_SLP_S4#
VID0(I / 1.05V) VGATE_PWRGD EN/PSV
H_VID1 PGOOD(OD / 3.3V) Output Power
VID1(I / 1.05V) Input Power
H_VID2 CLK_EN# AD_JK AD+
VID2(I / 1.05V) CLK_EN#(O) VCC(I) VCC(O)
H_VID3 Input Power
VID3(I / 1.05V) Output Power 5V_AUX_S5
H_VID4 DCBATOUT_SC411_1 VCC(I)
VID4(I / 1.05V)
H_VID5 1D8V_S3(18.3A)
VID5(I / 1.05V) Output Power 5V_S5 VOUT (O)
H_VID6
VID6(I / 1.05V) VCC_CORE_S0(Imax=48A) VCCA
VCC_CORE_PWR(O)
Input Signal Charger Max8725
PSI#
PSI# (I / 3.3V)
CPUCORE_ON Input Signal Output Signal
PGD_IN (I / 3.3V)
PM_DPRSLPVR SC411MLTRT CHGON#/OFF BT+SENSE
DPRSLPVR (I / 3.3V) ICTL BATT
H_DPRSTP#
DPRSTP# (I / 3.3V)
1D05V_S0
BATA_IN AC_IN
Input Signal PKPRES ACOK
Voltage Sense PM_SLP_S3#
VCC_SENSE EN/PSV
VSEN(I / Vcore) Input Power Output Power
VSS_SENSE
RTN(I / Vcore) Input Power AD+ BT+
Output Power ACIN VOUT (O)
DCBATOUT_SC411_2
Input Power 1D05V_S0(17.8A) DCBATOUT
5V_S5 VOUT (O) VOUT (O)
DCBATOUT_6262
VCC(I) VCCA

5V_S0
VCC(I)

3D3V_S0
VCC(I) ALP5913
1D5V_S0
TPS51100
TPS51120 Input Signal Output Signal
5V_S5 0D9V_S0
5V/3D3V PM_SLP_S3# CPUCORE_ON(2.66A) VIN
EN POK
Input Signal Output Signal 1D8V_S3 0D9V_S0 (1.2A)
VLDOIN VTT
PGOOD1(OD / 5V) CPUCORE_ON
PM_SLP_S3#
Input Power Output Power S3 0D9V_S3
PGOOD2(OD / 5V) CPUCORE_ON VTTREF
PM_SLP_S4#
TPS51120_EN1_5 1D8V_S3 1D05V_S0 S5
EN1 VIN VOUT (O)
Output Power
TPS51120_EN2_3D3
EN2
5V_DC_S5 (7.1A)
5V(O)
ALP5915
3D3V(O)
3D3V_DC_S5 (6.4A) 1D25V_S0
Input Power
Input Signal Output Signal
DCBATOUT_TPS51120 PM_SLP_S3# CPUCORE_ON(1.7A)
VIN EN POK

Input Power Output Power

1D8V_S3 1D5V_S0
VIN VOUT (O)
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
Power Block Diagram
Size Document Number Rev
A3
LV1 -1
Date: Friday, August 10, 2007 Sheet 29 of 38
5 4 3 2 1

DCBATOUT DCBATOUT_6262 DCBATOUT DCBATOUT_6262

G64 G69
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
G65 G70
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
G67 G71
1 2 1 2
D
DCBATOUT_6262 D
GAP-CLOSE-PWR GAP-CLOSE-PWR 3D3V_S0
G68 G72 5V_S0

1
1 2 1 2

1
SCD1U25V3ZY-1GP
R67

1
GAP-CLOSE-PWR GAP-CLOSE-PWR 10R3J-3-GP R103
R70 1K91R3F-GP
10R3J-3-GP

2
1
C105

6262_VIN
6262_5VS0_VCC
R116 0R0402-PAD

2
R94 1 2 VGATE_PWRGD 7,16
2 6262_PMON

6262_AGND
1 6262_PWRGOOD
6262_PMON_1
4K99R3F-GP
DY

22

20

48
1

1
C150 U12
SC1U25V0KX-GP C89

VDD

VIN

3V3

PGOOD
DY SC1U10V3ZY-6GP
2

2
6262_AGND
21 GND UGATE1 35 6262_UGATE1 31
R99
49 36 6262_BOOT1 1 2 6262_BOOT1_1
GND_T BOOT1

1
6262_AGND 0R3-0-U-GP
R96 0R0402-PAD C153 SCD22U16V3ZY-GP
1 6262_PSI#
2 2 34
4 PSI# 6262_PHASE1 31

2
4 CPU_PROCHOT# 6262_PMON PSI# PHASE1
3 PMON
C
6262_AGND 2 1 6262_RBIAS 4 32 C
RBIAS LGATE1 6262_LGATE1 31 R85
R240 4K02R3F-GP R88 147KR2F-GP 5 3K65R3F-GP
6262_NTC_1 6262_NTC VR_TT# 6262_VSUM
1 2 1 2 6 NTC PGND1 33 1 2
6262_AGND C134 1 2 R241 NTC-470K-1-GP 6262_AGND 1 2 6262_SOFT 7
SCD01U16V2KX-3GP C371 SCD015U25V3KX-GP SOFT 6262_ISEN1
5 H_VID[0..6] ISEN1 24 1 2 6262_ISENP1 31
H_VID0 R105 1 2 0R0402-PAD 6262_VID0 37 5V_S0
VID0

1
H_VID1 R106 1 2 0R0402-PAD 6262_VID1 38 R81 10KR3J-L1-GP
VID1

1
H_VID2 R107 1 2 0R0402-PAD 6262_VID2 R393 C116
H_VID3 R108 1 2 0R0402-PAD 6262_VID3
39
40
VID2 PVCC 31 1
C141
2
SC4D7U10V5ZY-3GP
-1 0R3-0-U-GP SCD22U16V3KX-1-GP
H_VID4 R109 1 VID3
2 0R0402-PAD 6262_VID4 41 DY

2
H_VID5 R110 1 6262_VID5 VID4
2 0R0402-PAD 42 27 6262_UGATE2 31
R78 1R3F-GP

2
H_VID6 R111 1 6262_VID6 VID5 UGATE2
2 0R0402-PAD 43 VID6
R84 1 2 6262_ISENN1 31
CPUCORE_ON R112 1 2 0R2J-2-GP 6262_CORE_ON 44 26 6262_BOOT2 1 2 6262_BOOT2_1
32,34 CPUCORE_ON VR_ON BOOT2

1
0R3-0-U-GP
-1 R113 1 2 499R2F-2-GP 6262_DPRSLP 45 C128 6262_ISEN2 1 2
7,16 PM_DPRSLPVR DPRSLPVR SCD22U16V3ZY-GP
R114 1 2 0R0402-PAD 6262_DPRSTP# 46 R69 DY 10KR3J-L1-GP
4,7,15 H_DPRSTP#

2
R115 0R0402-PAD 6262_CLKEN# DPRSTP#
16 CLK_EN# 1 2 47 CLK_EN# PHASE2 28 6262_PHASE2 31
R76 1 2 1KR2F-3-GP 30 6262_VSUM 1 R66 2 3K65R3F-GP
LGATE2 6262_LGATE2 31
PGND2 29
1 R75 2 C100 1 2 6262_VDIFF 13 VDIFF ISEN2 23 6262_ISEN2 1 2 6262_ISENP2 31
255R2F-L-GP SC1KP50V2KX-1GP R64 10KR3J-L1-GP
6262_FB2_1

R392
-1

1
1 R80 2 6262_FB2 12 1 2 5V_S0 C103
1KR2F-3-GP FB2 SCD22U16V3KX-1-GP
NC#25 25 DY
6262_FB 11 R86 0R3-0-U-GP

2
6262_COMP_1 FB 6262_OCSET
1 R82 2 1 2 OCSET8 8 1 2 R59 1R3F-GP
97K6R2F-GP C120 SC470P50V2KX 12K7R3F-GP 1 2 6262_ISENN2 31
1 2 6262_COMP 10 19 6262_VSUM
COMP VSUM

1
1

1
B C117 C86 C97 R58 6262_ISEN1 B
1 2
SC180P50V2JN-1GP R79 6262_VW 2K61R3F-GP R56 10KR3J-L1-GP
1 2 9 VW VO 18 DY

SCD22U10V3KX-2GP

SCD033U25V3KX-GP
DROOP

6K81R2F-1-GP R65

2
VSEN

11KR2F-L-GP
RTN

DFB

1 2
C119 1

6262_VSUM_2
2

2
SC1KP50V2KX-1GP
R242
15

14

16

17

ISL6262ACRZ-T-GP-U NTC-10K-9-GP

R71 6262_VO

2
1 2 6262_RTN
5 VSS_SENSE
1

1
0R0603-PAD
1
C106 6262_DFB C87
SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

R72 SCD01U25V2KX-3GP R68 SCD22U10V2KX-1GP


2

2
1 2 6262_VSEN 1KR3F-GP
5 VCC_SENSE
0R0603-PAD
1

C93 C94
2

-1 R74 6262_AGND
2

6262_DROOP

3K24R3F-1-GP
1 2

6262_AGND 6262_AGND

1 2 6262_VO
C90 SC180P-GP

A A

G7
1 2 Wistron Incorporated
GAP-CLOSE-PWR 21F, 88, Hsin Tai Wu Rd
6262_AGND Hsichih, Taipei
Title
CPU CORE(1/2) ISL6262
Size Document Number Rev
A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 30 of 38
5 4 3 2 1
A

DCBATOUT_6262

1
C403 C231 C230
C402

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SCD1U25V3ZY-1GP

2
5
6
7
8
D
D
D
D
U35
POWERPAK-8P-GP

U35= 84.01426.037

G
S
S
S
Panasonic ETQP4LR36WFC

4
3
2
1
10*11.5*4mm VCC_CORE_S0 Iomax=44A
0.34uH / 24A
30 6262_UGATE1 L20 DCR=1.1mohm
OCP>=88A
30 6262_PHASE1 1 2

30 6262_LGATE1 L-D36UH-1-GP

1
TC12 TC13 TC7 C406
SCD1U25V3ZY-1GP

2
5
6
7
8

5
6
7
8

SE330U2VDM-L2GP

SE330U2VDM-L2GP

SE330U2VDM-L2GP
DY DY
D
D
D
D

D
D
D
D
U37 U38 G14 G15
POWERPAK-8P-GP POWERPAK-8P-GP GAP-CLOSE-PWR GAP-CLOSE-PWR

1
DY
U37 ,U38= 84.01412.037
G
S
S
S

G
S
S
S
4
3
2
1

4
3
2
1 6262_ISENN1 30 79.33719.L0L 79.33719.L0L
6262_ISENP1 30 KEMET
330uF / 3V / V size
ESR=9mohm / Iripple=3.7A

DCBATOUT_6262

1 1
1

1
C391 C197 C195
5
6
7
8

C390
D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
U34 SCD1U25V3ZY-1GP
2

2
POWERPAK-8P-GP

U34= 84.01426.037
G
S
S
S

Panasonic ETQP4LR36WFC
4
3
2
1

10*11.5*4mm
0.34uH / 24A
DCR=1.1mohm
30 6262_UGATE2 L18

30 6262_PHASE2 1 2

30 6262_LGATE2 L-D36UH-1-GP

1
TC5 TC4

2
5
6
7
8

5
6
7
8

SE330U2VDM-L2GP

SE330U2VDM-L2GP
D
D
D
D

D
D
D
D

U33 U32 G11 G12


POWERPAK-8P-GP POWERPAK-8P-GP GAP-CLOSE-PWR GAP-CLOSE-PWR
DY
1

U32, U33= 84.01412.037


G
S
S
S

G
S
S
S
4
3
2
1

4
3
2
1

When test without cpu,


R581 & R582 change to 0 ohms

30 6262_ISENP2
If VCC_SENSE and VSS_SENSE pins have pulled
30 6262_ISENN2 resistors to VCC_CORE_S0 <Variant Name>
==> Remove R581/R582
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CPU CORE(2/2) ISL6262
Size Document Number Rev
A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 31 of 38

A
A B C D E

G16
1 2 DCBATOUT_51120
GAP-CLOSE-PWR R263 DCBATOUT_51120 G87
G17 VREG5 1 2 5V_AUX_S5 1 2
1 2
0R0603-PAD GAP-CLOSE-PWR
GAP-CLOSE-PWR G88

1
G18 C430 C431 C248 1 2

5
6
7
8
1 2 R146

D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U25V3ZY-1GP
VREG3 1 2 3D3V_AUX_S5 GAP-CLOSE-PWR

2
GAP-CLOSE-PWR U17 G89
G19 0R0603-PAD 1 2
4 1 2 51120_V5FILT AO4468-GP 4
GAP-CLOSE-PWR

G
S
S
S
GAP-CLOSE-PWR G90
G20 5V Iomax=6A 1 2
R258

4
3
2
1
5V_PWR 5V_PWR 5V_S5
1 2 L4
51120_VREG5 1 2 51120_DRVH1 OCP>11A GAP-CLOSE-PWR
VREG5
GAP-CLOSE-PWR 5D1R3F-GP 51120_LL1 1 2 G91

1
G21 1 2
1 2 C429 COIL-3D3UH-6-GP
DCBATOUT

5
6
7
8

1
SC1U10V3KX-3GP TC16 C252 GAP-CLOSE-PWR

D
D
D
D
GAP-CLOSE-PWR U16 G92
-1

ST220U6D3VDM-15GP
AO4422-1-GP SCD1U50V3ZY-GP 1 2

2
C419 R243 DCBATOUT_51120 C249 R149
51120_LL2 1 51120_VBST2_11 SC33P50V2JN-3GP
DY
2 2 51120_VBST2 30KR2F-GP GAP-CLOSE-PWR

2
0R0603-PAD DY DY G93

G
S
S
S
SCD1U50V3ZY-GP 1 2

2
1

4
3
2
1
C443 R268 C247 51120_VFB1 GAP-CLOSE-PWR
51120_LL1 1 51120_VBST1_11
2 2 51120_VBST1 SCD1U50V3ZY-GP

1
0R0603-PAD NEC 220uF ,V size
SCD1U50V3ZY-GP 51120_V5FILT 51120_DRVL1 R150
51120_VREG5 7K5R3F-GP ESR=25mohm
VREG5
SC10U10V5KX-2GP

DY Iripple=2.2A
VREG3 51120_VREG3 51120_COMP2 1 R144 2

2
1

0R0402-PAD
SC10U10V5KX-2GP

C439 51120_COMP1 1 R148 2


1

0R0402-PAD
2

C427
3D3V_S0
19
21

28
13

20
22
2

7
2
3 U40 3
R239
VREG3
VREG5

VBST1
VBST2

V5FILT
VIN

COMP2
COMP1

1
18 PWR_S5_EN 1 2 TPS51120_EN G75
0R0402-PAD R246 1 2
100KR2J-1-GP
TPS51120_EN R265 1 2 0R0402-PAD 51120_EN1 29 15 51120_LL2 DCBATOUT_51120 GAP-CLOSE-PWR
R244 1 51120_EN2 EN1 LL2 51120_LL1
2 0R0402-PAD 12 26 G82

2
EN2 LL1
10 EN3 1 2
9 EN5
30 51120_PGOOD1 1 R266 2 0R0402-PAD GAP-CLOSE-PWR
PGOOD1 CPUCORE_ON 30,34

1
R253 1 20R0603-PAD 51120_VFB2 6 11 51120_PGOOD2 1 R245 2 0R0402-PAD C450 C251 C250 G83
VFB2 PGOOD2

5
6
7
8

1
51120_V5FILT R259 1 20R0603-PAD 51120_VFB1 3 1 2
VFB1 3D3V_PWR 3D3V_S5

D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U25V3ZY-1GP
25 51120_DRVL1

2
5V_PWR DRVL1 51120_DRVL2 U14 GAP-CLOSE-PWR
-1 1 16

2
3D3V_PWR VO1 DRVL2 G84
8 VO2
27 51120_DRVH1 AO4468-GP 3.3V Iomax=6A 1 2
51120_VREF2 DRVH1 51120_DRVH2
4 14
VREF2 DRVH2 OCP>11A

G
S
S
S
GAP-CLOSE-PWR
SKIPSEL
TONSEL

G85
PGND1
PGND2

4
3
2
1
1

3D3V_PWR 1 2
GND
GND

L2
CS1
CS2

C432 51120_DRVH2
SC1000P50V3JN-GP 51120_LL2 1 2 GAP-CLOSE-PWR
2

TPS51120RHBR-GPU1 74.51120.073 G86


24
17
5
33

23
18

51120_SKIPSEL 32
31

COIL-3D3UH-6-GP 1 2

5
6
7
8

1
D
D
D
D
U15 TC15 C245 GAP-CLOSE-PWR

ST220U6D3VDM-15GP
AO4422-1-GP

1
51120_TONSEL 1 R267 2 51120_VREF2 SCD1U50V3ZY-GP

2
51120_V5FILT C246 R145
2 DY
0R2J-2-GP SC33P50V2JN-3GP 30K9R3F-GP
DY 2

2
G
S
S
S
1 2 51120_CS1 DY DY
R269 15KR3F-GP

4
3
2
1

2
2

1 2 51120_CS2 R264 51120_VFB2


R247 18KR2F-GP 0R0402-PAD 51120_DRVL2 NEC 220uF ,V size

1
R147
ESR=25mohm
SC
1

13K3R2F-L1-GP Iripple=2.2A
DY

2
51120_COMP1
1

R262
GND VREF2 FLOAT V5FILT 22KR2J-GP
DY
1

C440
2

AUTOSKIP SC390P50V3JN-GP 51120_COMP1_1


SKIPSEL AUTOSKIP /FAULTS PWM PWM DY
Vout=1V*(R1+R2)/R2
2

OFF C441
SC1000P100V3KX-GP
2

CURRENT D-Cap DY
COMP N/A N/A For TPS51120,
MODE MODE
Vout=5V
380k/CH1 290k/CH1 220k/CH1 180k/CH1 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
TONSEL 590k/CH2 440k/CH2 330k/CH2 280k/CH2 51120_COMP2
1 2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm. 1
1

<Variant Name>
5V R248 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.
VFB1 N/A not use ADJ. 22KR2J-GP
Vout=3.3V Wistron Incorporated
Fixed Output DY
1

3.3V C420 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. 21F, 88, Hsin Tai Wu Rd
2

VFB2 N/A not use ADJ. Fixed Output


SC390P50V3JN-GP 51120_COMP2_1
2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm. Hsichih, Taipei
DY
2

3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm. Title
EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON C421
SC1000P100V3KX-GP
5V_UP_S5/3D3V_S5/5V_S5
2

DY Size Document Number Rev


EN3,EN5 LDO OFF not use LDO ON VREG3 on A3
LV1 -1
Date: Saturday, August 11, 2007 Sheet 32 of 38
A B C D E
G44
DCBATOUT 1 2 DCBATOUT_SC411_1
GAP-CLOSE-PWR
G42
1 2
GAP-CLOSE-PWR DCBATOUT_SC411_1
G40
1 2
5V_S5 GAP-CLOSE-PWR

1
G39 C326 C330 C17

SCD1U25V3KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2 1D8V_PWR 1 2 1D8V_S3

5
6
7
8
GAP-CLOSE-PWR G46 GAP-CLOSE-PWR

2
D
D
D
D
R40 G38 1 2
1 2 U26 G47 GAP-CLOSE-PWR
10R3J-3-GP GAP-CLOSE-PWR 84.04468.037 Imax=10A 1 2

SC411_PWR
G37 AO4468-GP G48 GAP-CLOSE-PWR
OCP>14.6A

2
1 2 1 2

G
S
S
S
3D3V_S5 5V_S5 GAP-CLOSE-PWR G49 GAP-CLOSE-PWR

1
1 2

4
3
2
1
C48 1D8V_PWR G50 GAP-CLOSE-PWR
L12

A
1

SC1U6D3V2KX-GP SC411_DH_1 1 2

2
R29 SC411_LX_1 1 2 G51 GAP-CLOSE-PWR
RB521S-30-2-GP

2
U3 1 2

1
10KR2J-3-GP D5 COIL-1UH-33-GP G52 GAP-CLOSE-PWR

VCCA

1
R36 C44 TC10 C333 1 2
2

5
6
7
8
TP1 1 1D8VPWR_PGD 4 13 SC411_BST1 1 2SC411_LX_1 26K1R2F-2-GP DY G53 GAP-CLOSE-PWR
PGD BST

D
D
D
D

SC10P50V2JN-4GP

ST220U2VDM-5-GP

SCD1U10V2KX-5GP
C25 SCD1U25V3KX-GP U23 1 2

2
16,19,34 PM_SLP_S4# 1 2 1D8V_EN 15 9 5V_S5 FDS8880-NL-GP G54 GAP-CLOSE-PWR

2
R34 EN/PSV VDDP SC411_VFB_1 1 2
1

1
1KR2J-1-GP G55 GAP-CLOSE-PWR

1
5 12 SC411_DH_1 C32 1 2
NC#5 DH SC1U6D3V2KX-GP

G
S
S
S
C37 14 R38 G56 GAP-CLOSE-PWR
2

2
SCD1U10V2KX-5GP NC#14
1 2

4
3
2
1
11 SC411_LX_1 10KR2F-2-GP G57 GAP-CLOSE-PWR
1D8V_TON LX
DCBATOUT_SC411_1 1 2 16 1 2

2
R37 TON SC411_DL_1 79.22719.2BL G58 GAP-CLOSE-PWR
1

1MR2F-GP C47 10 RILIM_1 1 2 SC411_LX_1 1 2


ILIM
SC1KP50V2KX-1GP

1D8V_PWR 1 R23 14K7R2F-L-GP G59 GAP-CLOSE-PWR


VOUT
1 2
2

G60 GAP-CLOSE-PWR
SC411_VFB_1 3
FB DL 8 SC411_DL_1 id=16A 1 2
PGND

VSSA

G97 GAP-CLOSE-PWR
GND

rdson=5.6m ohm/4.5vgs 1 2
G98 GAP-CLOSE-PWR
SC411MLTRT-GP 1 2
Vout=0.5*(1+(R1/R2))
7

17

74.00411.073 G99 GAP-CLOSE-PWR


-1 1 2
G100 GAP-CLOSE-PWR

G81
DCBATOUT 1 2 DCBATOUT_SC411_2
GAP-CLOSE-PWR DCBATOUT_SC411_2
G80
1 2
GAP-CLOSE-PWR

1
G79 C448 C447 C446

SCD1U25V3KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2

5
6
7
8
GAP-CLOSE-PWR

2
D
D
D
D
G78
5V_S5 1 2 U43
GAP-CLOSE-PWR 84.04468.037 Imax=8A G22
G77 AO4468-GP 1 2
OCP>12.4A 1D05V_PWR 1D05V_S0
1

1 2 GAP-CLOSE-PWR

G
S
S
S
R295 GAP-CLOSE-PWR G23
G76 SC 1 2

4
3
2
1
1D05V_PWR
SC411_PWR1

10R3J-3-GP 1 2 GAP-CLOSE-PWR
L3
GAP-CLOSE-PWR SC411_DH_2 G24
2

SC411_LX_2 1 2 1 2
3D3V_S5 5V_S5 GAP-CLOSE-PWR
1

1
IND-2D2UH-44-GP G25

1
C479 C473 TC8 C476 1 2
A

R291
1

5
6
7
8
SC1U6D3V2KX-GP GAP-CLOSE-PWR
DY
2

D
D
D
D

SC47P50V2JN-3GP

SE330U2D5VDM-LGP
11K3R2F-2-GP

SCD1U10V2KX-5GP
R290 U44 G26

2
RB521S-30-2-GP
2

U47 AO4712-GP 1 2

2
10KR2J-3-GP D20 SC411_VFB_2 GAP-CLOSE-PWR
VCCA

G27
2

1
TP124 1 1D05VPWR_PGD 4 13 SC411_BST2 1 2 SC411_LX_2 SC 1 2
PGD BST

G
S
S
S
C466 SCD1U25V3KX-GP R296 GAP-CLOSE-PWR
16,18,19,28,34 PM_SLP_S3# 1 2 1D05V_EN 15 9 5V_S5 SC G28

4
3
2
1
R284 EN/PSV VDDP 10KR2F-2-GP 1 2
1

1KR2J-1-GP GAP-CLOSE-PWR

2
5 12 SC411_DH_2 C463 SC411_DL_2 G29
C467 NC#5 DH SC1U6D3V2KX-GP
14 1 2
2

SCD1U10V2KX-5GP NC#14 GAP-CLOSE-PWR


11 SC411_LX_2
1D05V_TON LX
DCBATOUT_SC411_2 1 2 16 TON
R289 R280
id=16A
1

1MR2F-GP C470 10 RILIM_2 1 2SC411_LX_2


ILIM
SC1KP50V2KX-1GP

1D05V_PWR 1 VOUT 24KR2F-GP rdson=5.6m ohm/4.5vgs


2

SC411_VFB_2 3
FB DL 8 SC411_DL_2 SC Vout=0.5*(1+(R1/R2))
PGND

VSSA

GND

SC411MLTRT-GP
7

17

74.00411.073
<Variant Name>

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
SC411_1D05V/1D8V
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 33 of 38
0D9V
Iomax=1.2A
1D8V_S3 0D9V_PWR DDR_VREF_S0
5V_S5
G41
1 2

1
C335

1
GAP-CLOSE-PWR
C338 U27 74.51110.B79 SC10U10V5ZY-1GP G43

2
SC1U6D3V2KX-GP TPS51100DGQ-1-GP 1 2

2
10 1 0D9V_PWR GAP-CLOSE-PWR
PM_SLP_S4#_R VIN VDDQSNS
16,19,33 PM_SLP_S4# 1 R25 2 9 S5 VLDOIN 2 G45
0R0402-PAD 8 3 1 2
PM_SLP_S3#_R GND VTT
16,18,19,28,33 PM_SLP_S3# 1 R270 2 7 S3 PGND 4
0R0402-PAD DDR_VREF_S3_LDO 6 5 C332 C331 GAP-CLOSE-PWR
VTTREF VTTSNS

1
GND
1

SC10U10V5KX-2GP

SC10U10V5KX-2GP
C337

2
SCD1U10V2KX-5GP

11
R194
DDR_VREF_S3 1 2 DDR_VREF_S3_LDO

0R2J-2-GP

5V_S5 1D8V_S3

1D5V
1

1
C445 C444 C449
SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP Imax=2.66A
2

2
G94
1 2

GAP-CLOSE-PWR
6

U46 G95
1 2
VCNTL

30,32 CPUCORE_ON 1 R272 2 APL5913_POK 7


POK VIN 5 1D5V_LDO
0R0402-PAD 9 GAP-CLOSE-PWR 1D5V_S0
VIN G96
Vo(cal.)=1.509V
PM_SLP_S3# 1 R271 2 APL5913_EN 8 3 1 2
0R0402-PAD EN VOUT
VOUT 4
GAP-CLOSE-PWR
1

C471

1
2 5913_FB R286 C468
GND

FB
SCD022U16V2KX-3GP

56K2R2F-2-GP
2

SC22U6D3V5MX-2GP
KEMET NTD:5.615
2
APL5913-KAC-1-GP
1

SO-8-P 100uF, 4V, B2 Size


74.05913.A71 Iripple=1.1A, ESR=70mohm
1

R283
63K4R2F-1-GP
Vo=0.8*(1+(R1/R2))
2

SC

5V_S5 1D8V_S3
1D25V_S0
Iomax=1.7A
1

C39 C60 C50


SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2

G4
1 2

GAP-CLOSE-PWR
U7
6

G5
1 2
VCNTL

1 R33 2 APL5915_POK 7 5 1D25V_LDO


30,32 CPUCORE_ON POK VIN
0R0402-PAD 9 GAP-CLOSE-PWR 1D25V_S0
VIN G6
Vo(cal.)=1.2504V
PM_SLP_S3# 1 R32 2 APL5915_EN 8 3 1 2
0R0402-PAD EN VOUT
VOUT 4
GAP-CLOSE-PWR
1

C69 C70
2 5915_FB R49
GND

FB
SC82P50V2JN-3GP

SC22U6D3V5MX-2GP
2

35K7R2F-GP
APL5915-KAI-TRL-GP
1

74.05915.031
Wistron Incorporated
1

21F, 88, Hsin Tai Wu Rd


R48
63K4R2F-1-GP
Hsichih, Taipei
Title
Vo=0.8*(1+(R1/R2))
2

0D9V/1D25V/1D5V
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 34 of 38
A B C D E

DCBATOUT
AD+ Rx1
U20 R187 U24
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
D S S D BT+
7 2 2 7
6 D S 3 D01R2512F-4-GP 3 S D 6

1
5 D G 4 MAX8725_PDL 4 G D 5
R202
4 4
100KR2F-L1-GP P2003EVG-GP P2003EVG-GP

1
2
AC_IN Threshold 2.089V Max. C321

2
G32 G33 SCD1U25V3ZY-1GP

2
AC_IN > 2.089V --> AC DETECT
DY

1
AD+ > 17V
R201 GAP-CLOSE-PWR GAP-CLOSE-PWR
ACOK is H

1
13K7R2F-GP

1
C22 DCBATOUT
SCD1U25V3ZY-1GP AD+_TO_SYS

1
C30 C29 MAX8725_LDO

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

2
MAX8725_CSSN
MAX8725_CSSP
D6 Near MAX8725
AD+ 1 2 Close to Pin 2

1
C16
CH521S-30-GP-U1
MAX1909 SCD1U25V3ZY-1GP

1
pin 24 C43 C323 C324

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2 C322

4
3
2
1
MAX8725_LDO SCD1U25V3ZY-1GP

MAX8725_DHIV

2
1

SC1U10V3ZY-6GP

G
S
S
S
C41 U2

26

25

1
SCD1U25V3ZY-1GP
2

R14 U25

CSSP

CSSN
1

33R2J-2-GP SI4431BDY-E3-GP
R24 R197

D
D
D
D
0R2J-2-GP 100KR2F-L1-GP MAX8725_PDS 27 22

5
6
7
8
AD+_TO_SYS PDS DHIV
DY 24 SRC PDL 28 Near MAX8725
MAX8725_DC_IN 1 2
Rx2
2

DCIN LDO Pin 21 BT+

1
L13 R189
21 MAX8725_DLOV C10
MAX8725_VCTL DLOV SC1U10V3ZY-6GP CHG_PWR_2
3 11 1 2 CHG_PWR_3 1 2 3

2
MAX8725_ICTL VCTL
10 ICTL
1

MAX8725_MODE 7 D015R2512F-5-GP
R26 MODE MAX8725_DHI IND-10UH-103-GP
DHI 23
1

0R2J-2-GP MAX8725_ACIN 68.1001A.10A


R198 MAX8725_IINP
SC
DY 3 ACIN

5
6
7
8
49K9R2F-L-GP
2

MAX8725_LDO
DY

D
D
D
D
R200 8 IINP

1
20 MAX8725_DLO C327 C328 C329
2

DLO

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1 2 MAX8725_CLS 9 CLS

2
U22

2
10KR2J-3-GP SI4800BDY-T1 G36 G35
AC_OK 6 19 GAP-CLOSE-PWR GAP-CLOSE-PWR

G
S
S
S
ACOK PGND

4
3
2
1

1
1

PGND 29
R199
100KR2J-1-GP 18
BAT_IN# CSIP
5 PKPRES
2

MAX8725_CSIP
MAX8725_CCV 13 17 MAX8725_CSIN
MAX8725_CCI CCV CSIN
12 CCI BATT 16 BT_GAP 36
1

MAX8725_CCS 14 15
19 MAX8725_IINP CCS GND
REF

R17
Detect adaptor 10KR2J-3-GP
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

G1
input current 1 2
2

4
1

MAX8725ETI-GP-U
1

C23

C13

R30 GAP-CLOSE-PWR
1

C33 15KR2F-GP MAX8725_CCV_1


SCD1U25V3ZY-1GP
2

MAX8725_REF
2

1
1

C11 R195 3D3V_AUX_S5


49K9R2F-L-GP
V_REF :4.2235V (<500uA)
2

1
SCD1U25V3ZY-1GP
2

2 2
MAX8725_CLS R31
1

C42 100KR2J-1-GP
SC1U10V3ZY-6GP
1
2

2
R196 ISOURCE_MAX =
31K6R2F-GP BAT_IN#
(0.075/Rx1)*(VCLS/VREF) = 2.91A 19,36 BAT_IN#
So,Constant Power=20*2.91=58.2W (90%)
2

MAX8725_REF

3D3V_AUX_S5
1

1
1

R193 R203
R192 49K9R2F-L-GP 100KR2J-1-GP
100KR2J-1-GP
2

2
2

MAX8725_ICTL
D 19 AC_IN#
3

SC

D
1

Q9 ICHG = (0.075/Rx2)*(VICTL/3.6) Q10


1

2N7002PT-U R191 R190 2N7002-11-GP


3S2P(4400mAH) = 3.08A

1
19 CHARGE_ON# 1 1K8R2F-GP 24K9R2F-L-GP R15 C339
G 54K9R2F-L-GP 3S1P(2200mAH) = 1.54A SC1U10V3ZY-6GP G AC_OK
Pre-chg I = 250mA DY
2

MD2 2

S
2

S
3CELL_CHG_1 SC
D D
3

1 Q8 Q7 1
2N7002PT-U 2N7002PT-U

19 CHG_I_PRE_SEL 1 1 3CELL_CHG 19
G G
<Variant Name>
2

S S
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CHARGER MAX8725
Size Document Number Rev
C
LV1 -1
Date: Saturday, August 11, 2007 Sheet 35 of 38
A B C D E
BATTERY CONNECTOR
Adaptor in to generate DCBATOUT 3D3V_AUX_S5

D2 DY
BAV99PT-GP-U

SC
ID = -10A/70deg

2
Rds(ON) = 24mohm D3 D1
AD_JK SO-8 BAV99PT-GP-U BAV99PT-GP-U
DCIN1 DY DY
U21
1 1 S D 8 AD+

3
AD+ S D
2 2 7

K
GND
1

1
3 C315 3 S D 6 BAT1
GND

1
4 D15 R5 C316 4 G D 5 8
NC#4

200KR2J-L1-GP

SCD1U25V3KX-GP
5 SCD1U25V3KX-GP P4SSMJ24PT-GP 1
2

NC#5
P2003EVG-GP

2
2

2
DC-JACK98-GP 19,38 BAT_SCL1 3
22.10037.A51 19,38 BAT_SDA1 4
Q1 19,35 BAT_IN# 1 2 BT_TH 5
R2
E 6
AD_OFF# B C2 D4 CH521S-30-GP-U1 38 BT_TH 7
R1
C AD+_G 1 2 9
BT+

1
PDTA124EU-1-GP SCD1U25V3KX-GP TYCO-CON7-11-GP
R4 C4 C5 EC22 EC23 EC24 20.80702.007

1
C

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
100KR2J-1-GP DY DY
19 AD_OFF B Q2

2
CHT2222APT-GP
1

R3
100KR2J-1-GP
2

G34

35 BT_GAP 2 1

<Variant Name>

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
DC_IN/BAT CONN
Size Document Number Rev
Custom
LV1 -1
Date: Saturday, August 11, 2007 Sheet 36 of 38
5 4 3 2 1

H3 H9 H4 H21 H19 H12 H17 H20 H14 H13 -1


HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE SPR1 SPR2 SPR3
SPRING-51-GP SPRING-51-GP SPRING-57-GP
1

1
D D

H2 H11 H16
H8 H15 H18 H6 H7 HOLE HOLE HOLE 34.4F822.002 34.4F822.002 34.42T14.002
HOLE HOLE HOLE HOLE HOLE

1
1

H23 H22 H26 H24 H1 1 H5 H10 H28


HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
C C
1

1
DCBATOUT 1D8V_S3
SC
SC SC

DY DY DY -1 DY
1

1
EC1 EC4 EC5 EC33 EC34 EC2 EC3 EC6 EC35 EC36 EC38 EC39
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
B B
2

3D3V_S0 1D25V_S0
SC
SC

DY DY DY
1

EC41 EC42 EC43 EC44 EC45


<Variant Name>
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

Wistron Incorporated
A 21F, 88, Hsin Tai Wu Rd A

Hsichih, Taipei
Title
HOLE
Size Document Number Rev
A4
LV1 -1
Date: Friday, August 10, 2007 Sheet 37 of 38
5 4 3 2 1
5 4 3 2 1

Near KB1 Keyboard Near USB2 USB Near SATA1 Near WLAN1-- Mini Card
5V_USB0_S3 5V_S0 1D5V_S0
KCOL1 1 TPAD34 TP144 3D3V_S0
KROW[1..8] 19,25
KCOL2 1 TPAD34 TP146 1 TPAD34 TP149 1 TPAD34 TP151
KCOL3 1 TPAD34 TP153 1 TPAD34 TP150
KCOL[1..16] 19,25
KCOL4 1 TPAD34 TP152 1 TPAD34 TP156 3D3V_S0
16,21 USB_PN4
KCOL5 1 TPAD34 TP158 1 TPAD34 TP160
KCOL6 1 TPAD34 TP162 1 TPAD34 TP164
16,21 USB_PP4
KCOL7 1 TPAD34 TP165 15,20 SATA_TXP0 1 TPAD34 TP167 1 TPAD34 TP169
KROW1 1 TPAD34 TP161 KCOL8 1 TPAD34 TP172 1 TPAD34 TP166 15,20 SATA_TXN0 1 TPAD34 TP168
D 3D3V_S5 D
KROW2 1 TPAD34 TP170 KCOL9 1 TPAD34 TP174
KROW3 1 TPAD34 TP171 KCOL10 1 TPAD34 TP178 15,20 SATA_RXN0_C 1 TPAD34 TP184
KROW4 1 TPAD34 TP176 KCOL11 1 TPAD34 TP179 15,20 SATA_RXP0_C 1 TPAD34 TP183 1 TPAD34 TP185
KROW5 1 TPAD34 TP177 KCOL12 1 TPAD34 TP188
KROW6 1 TPAD34 TP186 KCOL13 1 TPAD34 TP189 1 TPAD34 TP198
KROW7 1 TPAD34 TP187 KCOL14 1 TPAD34 TP194 22 PCI_RST#_M 1 TPAD34 TP207
KROW8 1 TPAD34 TP157 KCOL15 1 TPAD34 TP195
KCOL16 1 TPAD34 TP142 Near USB3 USB 3,22 CLK_PCIE_MINI 1 TPAD34 TP209

5V_USB0_S3 3,22 CLK_PCIE_MINI# 1 TPAD34 TP212

1 TPAD34 TP204 16,22 PCIE_RXN3 1 TPAD34 TP215

Near CN2 TP 16,21 USB_PN3 1 TPAD34 TP206 16,22 PCIE_RXP3 1 TPAD34 TP219

5V_S0 1 TPAD34 TP208 1 TPAD34 TP221

Near DCIN1 DC JACK


16,21 USB_PP3 Near HP1 16,22 PCIE_TXN3
1 TPAD34 TP210 1 TPAD34 TP211 16,22 PCIE_TXP3 1 TPAD34 TP225
1 TPAD34 TP213 26,27 HP_DETECT# 1 TPAD34 TP218
19,25 TDATA 1 TPAD34 TP214 1 TPAD34 TP228
16,22 USB_PN1
19,25 TCLK 1 TPAD34 TP216 AD_JK 1 TPAD34 TP217 27 SPKR_R_A1 1 TPAD34 TP224 1 TPAD34 TP229
16,22 USB_PP1
1 TPAD34 TP220 27 SPKR_L_A1 1 TPAD34 TP227
1 TPAD34 TP222 1 TPAD34 TP232
15,16,22,23 SMBDAT_SB
1 TPAD34 TP235
15,16,22,23 SMBCLK_SB
1 TPAD34 TP237
Near USB1 USB
1 TPAD34 TP233 1 TPAD34 TP231

1 TPAD34 TP236

Near FAN1 1 TPAD34 TP238 5V_USB1_S3

1 TPAD34 TP239
FAN1_VCC
1 TPAD34 TP242

C 1 TPAD34 TP243 1 TPAD34 TP244 C


16,21 USB_PN0
1 TPAD34 TP245 1 TPAD34 TP246
18 FAN1_FG1 16,21 USB_PP0
1 TPAD34 TP247 Near BAT1 BATTERY Near MIC1
1 TPAD34 TP248 1 TPAD34 TP250
16,21 USB_PN2
1 TPAD34 TP249 1 TPAD34 TP252 26,27 MIC_DETECT# 1 TPAD34 TP253
16,21 USB_PP2
1 TPAD34 TP251 1 TPAD34 TP254 27 AUD_MIC_R 1 TPAD34 TP255

1 TPAD34 TP258 27 AUD_MIC_L 1 TPAD34 TP259


1 TPAD34 TP256
Near RTC1 19,36 BAT_SCL1
19,36 BAT_SDA1 1 TPAD34 TP257 1 TPAD34 TP262
36 BT_TH 1 TPAD34 TP260
1 TPAD34 TP264
RTC_BAT 1 TPAD34 TP261
BT+
1 TPAD34 TP266 1 TPAD34 TP263
1 TPAD34 TP269

Near SPK1 and SPK2 Near COVER1 LID


27 SPKR_L- 1 TPAD34 TP270
27 SPKR_L+ 1 TPAD34 TP273 1 TPAD34 TP271
TPAD34 TP272 25 COVER_SW
27 SPKR_R- 1
27 SPKR_R+ 1 TPAD34 TP275 1 TPAD34 TP274

B B

A A

<Variant Name>

Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
TEST PAD FOR AFTE
Size Document Number Rev
C
LV1 -1
Date: Saturday, August 11, 2007 Sheet 38 of 38
5 4 3 2 1

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