IRF610

Data Sheet January 2002

3.3A, 200V, 1.500 Ohm, N-Channel Power Features

MOSFET • 3.3A, 200V
This N-Channel enhancement mode silicon gate power field
• rDS(ON) = 1.500Ω
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of • Single Pulse Avalanche Energy Rated
energy in the breakdown avalanche mode of operation. All of • SOA is Power Dissipation Limited
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers, • Nanosecond Switching Speeds
relay drivers, and drivers for high power bipolar switching • Linear Transfer Characteristics
transistors requiring high speed and low gate drive power.
• High Input Impedance
These types can be operated directly from integrated
circuits. • Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Formerly developmental type TA17442.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND
D
IRF610 TO-220AB IRF610

NOTE: When ordering, use the entire part number.

G

Packaging
JEDEC TO-220AB

SOURCE
DRAIN
GATE

DRAIN (FLANGE)

©2002 Fairchild Semiconductor Corporation IRF610 Rev. B

 IRF610

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF610 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 200 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 3.3 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 2.1 A
Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 8 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 43 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.34 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 46 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 10) 200 - - V
Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2 - 4 V
Zero Gate Voltage Drain Current IDSS VDS = Max Rating, VGS = 0V - - 25 µA
VDS = Max Rating x 0.8, VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 3.3 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 1.6A (Figures 8, 9) - 1.0 1.5 Ω
Forward Transconductance (Note 2) gfs VDS ≥ 50V, ID = 1.6A (Figure 12) 0.8 1.3 - S
Turn-On Delay Time td(ON) VDD = 100V, ID ≈ 3.3A, RG = 24Ω, RL = 30Ω - 8 12 ns
MOSFET Switching Times are
Rise Time tr - 17 26 ns
Essentially Independent of Operating
Turn-Off Delay Time td(OFF) Temperature - 13 21 ns
Fall Time tf - 9 13 ns
Total Gate Charge Qg(TOT) VGS = 10V, ID = 3.3A, VDS = 0.8 x Rated BVDSS, - 5.3 8.2 nC
(Gate to Source + Gate to Drain) Ig(REF) = 1.5mA (Figure 14) Gate Charge is
Essentially Independent of Operating
Gate to Source Charge Qgs - 1.2 - nC
Temperature
Gate to Drain “Miller” Charge Qgd - 3.0 - nC
Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1MHz - 135 - pF
(Figure 11)
Output Capacitance COSS - 60 - pF
Reverse Transfer Capacitance CRSS - 16 - pF
Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH
Contact Screw on Tab to Symbol Showing the
Center of Die Internal Device
Inductances
Measured From the Drain D
- 4.5 - nH
Lead, 6mm (0.25in) From
Package to Center of Die LD
Internal Source Inductance LS Measured From the Source - 7.5 - nH
Lead, 6mm (0.25in) from G
Header to Source Bonding LS
Pad
S
Thermal Resistance Junction to Case RθJC - - 2.9 oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 80 oC/W

©2002 Fairchild Semiconductor Corporation IRF610 Rev. B

 IRF610

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol D - - 3.3 A
Showing the Integral
Pulse Source to Drain Current ISDM - - 8 A
Reverse P-N Junction
(Note 3)
Rectifier
G

S
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 3.3A, VGS = 0V (Figure 13) - - 2.0 V
Reverse Recovery Time trr TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/µs 75 160 310 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/µs 0.33 0.9 1.4 µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 6.4mH, RG = 25Ω, peak IAS = 3.3A.

Typical Performance Curves Unless Otherwise Specified

1.2 5.0
POWER DISSIPATION MULTIPLIER

1.0
4.0
ID, DRAIN CURRENT (A)

0.8
3.0

0.6
2.0
0.4

1.0
0.2

0 0
0 50 100 150 25 50 75 100 125 150
TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

10
THERMAL IMPEDANCE (oC/W)

0.5
ZθJC, TRANSIENT

1
0.2
0.1
0.05 PDM
0.02
0.1 0.01
t1
SINGLE PULSE t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
0.01
10-5 10-4 10-3 10-2 0.1 1 10
t1, RECTANGULAR PULSE DURATION (S)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2002 Fairchild Semiconductor Corporation IRF610 Rev. B

 IRF610

Typical Performance Curves Unless Otherwise Specified (Continued)

100 5
OPERATION IN THIS TJ = 150oC SINGLE PULSE VGS = 10V
AREA MAY BE TC = 25oC VGS = 8V
LIMITED BY rDS(ON) PULSE DURATION = 80µs
4
DUTY CYCLE = 0.5% MAX

ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

10µs
10
3 VGS = 7V
100µs

1ms 2
1 VGS = 6V

10ms 1
VGS = 5V
DC
0 VGS = 4V
0.1
1 10 100 1000 0 20 40 60 80 100
VDS , DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

5 10
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
4
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

VGS = 10V
VGS = 8V 1
3
VGS = 7V

2
VGS = 6V TJ = 150oC
0.1

1 TJ = 25oC
VGS = 4V VGS = 5V

0 10-2
0 2 4 6 8 10 0 2 4 6 8 10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

15 3.0
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
rDS(ON), ON STATE RESISTANCE (Ω)

DUTY CYCLE = 0.5% MAX

NORMALIZED DRAIN TO SOURCE

VGS = 10V, ID = 3.2A

12 2.4
ON RESISTANCE

9 1.8

6 1.2

VGS = 10V
3 VGS = 20V 0.6

0 0
0 2 4 6 8 10 -60 -40 -20 0 20 40 60 80 100 120 140 160
ID, DRAIN CURRENT (A) TJ, JUNCTION TEMPERATURE (oC)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

©2002 Fairchild Semiconductor Corporation IRF610 Rev. B

 IRF610

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 400
ID = 250µA VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE

CISS = CGS + CGD

1.15 320 CRSS = CGD
BREAKDOWN VOLTAGE

COSS = CDS + CGD

C, CAPACITANCE (pF)
1.05 240

0.95 160 CISS

COSS
0.85 80 CRSS

0.75 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 1 2 5 10 2 5 102
TJ, JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

1.5
PULSE DURATION = 80µs PULSE DURATION = 80µs
ISD, SOURCE TO DRAIN CURRENT (A)
100 DUTY CYCLE = 0.5% MAX
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
gfs, TRANSCONDUCTANCE (S)

1.2 TJ = 25oC

0.9 TJ = 150oC TJ = 150oC

TJ = 25oC
10
0.6

0.3

0 1
0 1 2 3 4 5 0 0.4 0.8 1.2 1.6 2.0
ID, DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = 3.2A
VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 100V
16

12 VDS = 40V

8 VDS = 160V

0
0 2 4 6 8 10
Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

©2002 Fairchild Semiconductor Corporation IRF610 Rev. B

 IRF610

Test Circuits and Waveforms

VDS
BVDSS

L tP
VDS

VARY tP TO OBTAIN IAS

+ VDD
REQUIRED PEAK IAS RG
VDD
VGS -
DUT

tP
0V IAS
0
0.01Ω
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD 10% 10%
RG
- 0

DUT 90%

VGS 50% 50%

PULSE WIDTH
VGS 10%
0

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
VDD

SAME TYPE Qg(TOT)

AS DUT VGS
12V
0.2µF 50kΩ Qgd
BATTERY
0.3µF
Qgs

D
VDS

G DUT
0

Ig(REF) S
0
VDS IG(REF)
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR 0

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

©2002 Fairchild Semiconductor Corporation IRF610 Rev. B

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Definition of Terms

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Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

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any time without notice in order to improve design.

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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

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