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GSM BASED HOME AUTOMATION

ADITYA SATTI
DILIP ROY
KUSHAL REDDY

Department of Electronics and Communication Engineering


MAHATMA GANDHI INSTITUTE OF TECHNOLOGY
(Affiliated to Jawaharlal Nehru Technological University, Hyderabad, A.P.)

Chaitanya Bharathi P.O., Gandipet, Hyderabad – 500 075

2009

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GSM BASED HOME AUTOMATION

PROJECT REPORT
SUBMITTED IN PARTIAL FULFILLMENT
OF THE REQUIREMENTS FOR THE DEGREE OF
BACHELOR OF TECHNOLOGY
IN
ELECTRONICS AND COMMUNICATION ENGINEERING
BY

ADITYA SATTI (06261A0402)


DILIP ROY (06261A0417)
KUSHAL REDDY (06261A0415)

Department of Electronics and Communication Engineering


MAHATMA GANDHI INSTITUTE OF TECHNOLOGY
(Affiliated to Jawaharlal Nehru Technological University, Hyderabad, A.P.)

Chaitanya Bharathi P.O., Gandipet, Hyderabad – 500 075

2009

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MAHATMA GANDHI INSTITUTE OF TECHNOLOGY
(Affiliated to Jawaharlal Nehru Technological University, Hyderabad, A.P.)

Chaitanya Bharathi P.O., Gandipet, Hyderabad-500 075

Department of Electronics and Communication Engineering

CERTIFICATE

Date:

This is to certify that the project work entitled


“GSM BASED HOME AUTOMATION”
is a bonafide work carried out by

ADITYA SATTI (06261A0402)


DILIP ROY (06261A0417)
KUSHAL REDDY (06261A0415)

in partial fulfillment of the requirements for the degree of BACHELOR OF


TECHNOLOGY in ELECTRONICS & COMMUNICATION
ENGINEERING by the Jawaharlal Nehru Technological University,
Hyderabad during the academic year 2009-10.
The results embodied in this report have not been submitted to any other University or
Institution for the award of any degree or diploma.

(Signature) (Signature)

(Signature)
-------------------------- --------------------------

--------------------------

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Mrs.D.V. Rajeshwari Devi Dr. E Nagabhooshanam
Assistant Professor Professor & HOD of ECE
Faculty Advisor/Liaison

ACKNOWLEDGEMENT

We are highly indebted to our Faculty Liaison Mrs.D.V.Rajeshwari Devi, Electronics


and Communication Engineering Department, who has given us all the necessary
technical guidance in carrying out this Project.

We wish to express our sincere thanks to Dr. E. Nagabhooshanam, Head of the


Department of Electronics and Communication Engineering, M.G.I.T., for permitting us
to pursue our Project and encouraging us throughout the Project.

Finally, we thank all the people who have directly or indirectly help us through the
course of our Project.

We express our deep sense of gratitude to our Guide Balwanth reddy., Hyderabad, for his
valuable guidance and encouragement in carrying out our Project.

ADITYA SATTI
DILIP ROY

4
KUSHAL REDDY

ABSTRACT

Now a day's every system is automated in order to face new challenges in the
present day situation. Automated systems have less manual operations, so that the
flexibility, reliabilities are high and accurate. Hence every field prefers automated control
systems. Especially in the field of electronics automated systems are doing better
performance.
Probably the most useful thing to know about the global system for mobile
communication is that it is an international standard. If you travel in parts of world, GSM
is only type of cellular service available. Instead of analog services, GSM was developed
as a digital system using TDMA technology.

The goal of the project is to develop a system, which uses Mobile technology that
keeps control of the various units of the home appliances, which executes with respect to
the signal sent by the mobile.
For utilization of appliances the new concept has been thought to manage them
remotely by using GSM, which enables the user to remotely control switching of
domestic appliances. Just by dialing keypad of remote telephone, from where we are
calling we can perform ON / OFF operation of the appliances.
The ranges of appliances that can be controlled through tele remote systems are
many in numbers. Some of them are as follows and this depends upon the usage priority
of the appliances i.e. Lights, Music System or other electrical / electronic appliances.

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LIST OF FIGURES

Fig. 2.1:Block diagram of GSM BASED HOME AUTOMATION 14


Fig. 2.2:Circuit diagram of GSM BASED HOME AUTOMATION 15
Fig. 3.1:Functional block diagram of AT89S52 22
Fig. 3.2 Pin Diagram of 89S52 23
Fig. 3.3 Crystal Connections 28
Fig. 3.4 External Clock Drive Configuration 28
Fig. 3.5 Interrupts Source 34
Fig. 3.6 Block Diagram of Power Supply 44
Fig. 3.7 Circuit Diagram of Power Supply 44
Fig. 3.8 ULN Pin Connection and Block Diagram 53
Fig. 3.9 ULN Pin Diagram 54
Fig. 3.10 Logic Diagram 55
Fig. 3.11 Schematic Diagram 55
Fig. 3.12 Pin Diagram HT9170B 57
Fig. 3.13 Block Diagram of Decoder IC 59
Fig. 3.14 Timing Diagram 61

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LIST OF TABLES

Table 3.1 Special Features of port3 26


Table 3.2 Status of External Pins During Idle and Power Down Mode 29
Table 3.3 Lock Bit Protection Modes 30
Table 3.4 Timer 2 Operating Modes 31
Table 3.5 T2MOD-Timer 2 Mode Control Register 32
Table 3.6 T2CON-Timer/Counter2 Control Register 33
Table 3.7 Interrupts Enable Register 35
Table 3.8 Positive Voltage Regulators in 7800 series 47
Table 3.9 Pin Connection HT9170B 58

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TABLE OF CONTENTS

CERTIFICATE FROM ECE DEPARTMENT 3


ACKNOWLEDGEMENTS 4
ABSTRACT 5
LIST OF FIGURES 6
LIST OF TABLES 7

CHAPTER 1. INTRODUCTION
1.1 Aim of the project 11
1.2 Methodology 11
1.3 Organization of work 12
CHAPTER 2. OVERVIEW
2.1 Overview of project 14
2.1.1 Block Diagram 14
2.1.2 Circuit Diagram 15
2.1.3 Description 16
CHAPTER3. HARDWARE DESCRIPTION
3.1 Microcontroller 19
3.1.1 A Brief History of 8051 19
3.1.2 Description of 89S52 Microcontroller 20
3.1.3 Block Diagram of Microcontroller 22
3.1.4 Pin Configurations 23
3.1.5 Timers 30

3.1.6 Interrupts 33
3.1.7 Special function registers 36
3.1.8 Memory Organization 41
3.2 Power Supply 42

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3.2.1 Description 42
3.2.2 IC Voltage Regulators 46
3.3 Relays 48
3.4 ULN2003 52
3.5 HT9170B –DTMF 56

CHAPTER 4. ALGORITHM
4.1 Description 63
CHAPTER 5. CONCLUSIONS
5.1 Conclusions and Future scope 66
BIBLOGRAPHY 68
REFERENCES 68

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CHAPTER 1
INTRODUCTION

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1.Introduction

1.1 Aim of the project:

The aim of the project is to develop a system, which uses Mobile technology that
keeps control of the various units of the automobiles, Computer system , which executes
with respect to the signal sent by the mobile

1.2 Significance and applications:

GSM BASED HOME AUTOMATION plays a very important role in domestic


applications. The ease of operation of the kit and low cost add up as an additional
advantage for its usage. Its significance can be proved by considering the following
specialties of kit designed by us
Reliability: Reliability is one such factor that every electrical system should have
in order to render its services without malfunctioning over along period of time. We have
designed our kit using AT89S52 micro controller which is itself very reliable and also
operates very efficiently under normal condition
Cost: The design is implemented at a very economical price. The total cost
incurred by us in designing this kit is very less and further we have developed the GSM
based Home Automation which are more economical rather than just interfacing those
which are readily available in the market.
For utilization of appliances the new concept has been thought to manage
them remotely by using GSM, which enables the user to remotely control switching of
domestic appliances. Just by dialing keypad of remote telephone, from where you are
calling you can perform ON / OFF operation of the appliances.
The ranges of appliances that can be controlled through tele remote systems
are many in numbers. Some of them are as follows and this depends upon the usage
priority of the appliances i.e. Lights, Music System or other electrical / electronic
appliances.

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1.3 Organization of the report:

The report totally consists of five chapters- Chapter 1 gives the introduction,
Chapter 2 gives the overview of the project, Chapter 3 gives the description of hardware
used, Chapter 4 describes the algorithm, and finally Chapter 5 gives theconclusions.

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CHAPTER 2
OVERVIEW

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2. Overview of project

2.1.1 Block diagram

POWER
SUPPLY RELAY
BULB
AT89S52 ULN

MICRO RELAY PLUG


CONTROLLER 2003
UNIT
RELAY
DTMF DC
MOTOR

MOBILE
CONNECTOR

MOBILE

(GSM)

Fig 2.1:Block diagram of GSM BASED HOME AUTOMATION

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2.1.2 Circuit Diagram

Fig 2.2:Circuit diagram of GSM BASED HOME AUTOMATION

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2.1.3 Description

In this project we are going to control general home appliances based on the
mobile communication. The idea behind this particular work is to give user the full
flexibility to control the appliances from remote distances when there is a busy schedule
concerned to his daily routine.
The main parts of this schematic diagram are:

1. POWER SUPPLY.
2. (AT89C52) MICROCONTROLLER UNIT.
3. DTMF HT9179B
4. MOBILE CONNECTOR
5. ULN 2003
6. RELAYS
7. BULB CIRCUIT
8. PLUG CIRCUIT
9. DC MOTOR CIRCUIT .

The process to operate this project is first make a mobile to mobile connection
wirelessly or with a single mobile onboard wired. But here we are using to mobiles to
make is a wireless application. Start with making a connection with the onboard mobile
from remote distance, then when connection is established lets control the project with
the data as follows:
To operate the BULB just press “1” to switch ON and also to switch OFF again
press “4”. This ON/OFF condition of BULB is through Relay where switching is very
fast and accurate.
To operate the PLUG just press “2” to switch ON and also to switch OFF again
press “5”. This ON/OFF condition of PLUG is through Relay where switching is very
fast and accurate

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To operate the DC MOTOR just press “3” to switch ON and also to switch OFF
again press “6”. This ON/OFF condition of DC MOTOR is through Relay where
switching is very fast and accurate.

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CHAPTER 3
HARDWARE DESCRIPTION

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3. HARDWARE DESCRIPTION

The block diagram of the system is as shown in the fig. The system basically consists
of a
1. Micro controller,
2. DC motor,
3. LED,
4. Power supply,
5. Printed circuit boards

3.1 MICROCONTROLLER ARCHITECHTURE

3.1.1 A Brief History of 8051

In 1981, Intel Corporation introduced an 8 bit microcontroller called 8051. This


microcontroller had 128 bytes of RAM, 4K bytes of chip ROM, two timers, one serial
port, and four ports all on a single chip. At the time it was also referred as “A SYSTEM
ON A CHIP”
The 8051 is an 8-bit processor meaning that the CPU can work only on 8 bits data
at a time. Data larger than 8 bits has to be broken into 8 bits pieces to be processed by the
CPU. The 8051 has a total of four I\O ports each 8 bit wide.
There are many versions of 8051 with different speeds and amount of on-chip
ROM and they are all compatible with the original 8051. This means that if you write a
program for one it will run on any of them.
The 8052 is an original member of the 8051 family. There are two other members
in the 8051 family of microcontrollers. They are 8052 and 8031. All the three
microcontrollers will have the same internal architecture, but they differ in the following
aspects.
1. 8031 has 128 bytes of RAM, two timers and 6 interrupts.
2. 89S51 has 4KB ROM, 128 bytes of RAM, two timers and 6 interrupts.

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3. 89S52 has 8KB ROM, 128 bytes of RAM, three timers and 8 interrupts.
Of the three microcontrollers, 89S51 is the most preferable. Microcontroller supports
both serial and parallel communication.
In the concerned project 89S52 microcontroller is used. Here microcontroller used
is AT89S52, which is manufactured by ATMEL laboratories.

3.1.2 Description of 89S52 Microcontroller

The AT89S52 provides the following standard features: 8Kbytes of Flash, 256
bytes of RAM, 32 I/O lines, three 16-bit timer/counters, six-vector two-level interrupt
architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition,
the AT89S52 is designed with static logic for operation down to zero frequency and
supports two software selectable power saving modes. The Idle Mode stops the CPU
while allowing the RAM, timer/counters, serial port, and interrupt system to continue
functioning. The Power down Mode saves the RAM contents but freezes the oscillator,
disabling all other chip functions until the next hardware reset.

By combining a versatile 8-bit CPU with Flash on a monolithic chip, the


AT89S52 is a powerful microcomputer which provides a highly flexible and cost
effective solution to many embedded control applications.

Features of Microcontroller (89S52)

1. Compatible with MCS-51 Products


2. 8 Kbytes of In-System Reprogrammable Flash Memory
3. Endurance: 1,000 Write/Erase Cycles
4. Fully Static Operation: 0 Hz to 24 MHz
5. Three-Level Program Memory Lock
6. 256 x 8-Bit Internal RAM
7. 32 Programmable I/O Lines
8. Three 16-Bit Timer/Counters

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9. Eight vector two level Interrupt Sources
10. Programmable Serial Channel
11. Low Power Idle and Power Down Modes
12. In addition, the AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes.

The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port
and interrupt system to continue functioning. The Power down Mode saves the RAM
contents but freezes the oscillator disabling all other chip functions until the next
hardware reset.

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3.1.3 Block Diagram of Microcontroller

Fig 3.1:Functional block diagram of AT89S52

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3.1.4 Pin Configurations

Figure 3.2 Pin Diagram of 89S52

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Pin Description

• VCC
Pin 40 provides Supply voltage to the chip. The voltage source is +5v

• GND.
Pin 20 is the grounded

• Port 0
Port 0 is an 8-bit open drain bidirectional I/O port from pin 32 to 39. As an output
port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can
be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed
low-order address/data bus during accesses to external program and data memory. In this
mode P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming, and outputs the
code bytes during program verification. External pull-ups are required during program
verification.

• Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups from pin 1 to 8. The
Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1
pins that are externally being pulled low will source current (IIL) because of the internal
pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external
count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as
shown in following table.
Port 1 also receives the low-order address bytes during Flash programming and
program verification.

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• Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups from pin 21 to 28.
The Port 2 output buffers can sink / source four TTL inputs. When 1s are written to Port
2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs,
Port 2 pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that uses 16-bit addresses (MOVX
@ DPTR). In this application it uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special Function Register. Port 2 also receives the high-order
address bits and some control signals during Flash programming and verification.

• Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups from pin 10 to 17.
The Port 3 output buffers can sink / source four TTL inputs. When 1s are written to
Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As
inputs, Port 3 pins that are externally being pulled low will source current (IIL)
because of the pull-ups.
Port 3 also serves the functions of various special features of the AT89C52 as
listed below:

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Table 3.1 Special Features of port3

Port 3 also receives some control signals for Flash programming and
programming verification.

• RST
Pin 9 is the Reset input. It is active high. Upon applying a high pulse to this pin,
the microcontroller will reset and terminate all activities. A high on this pin for two
machine cycles while the oscillator is running resets the device.

• ALE/PROG
Address Latch is an output pin and is active high. Address Latch Enable output
pulse for latching the low byte of the address during accesses to external memory. This
pin is also the program pulse input (PROG) during Flash programming. In normal
operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be
used for external timing or clocking purposes.
Note, however, that one ALE pulse is skipped during each access to external Data
Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH.
With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise,
the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the
microcontroller is in external execution mode.

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• PSEN
Program Store Enable is the read strobe to external program memory. When the
AT89S52 is executing code from external program memory, PSEN is activated twice
each machine cycle, except that two PSEN activations are skipped during each access to
external data memory.

• EA/VPP
External Access Enable EA must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H up to
FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on
reset. EA should be strapped to VCC for internal program executions. This pin also
receives the 12-volt programming enable voltage (VPP) during Flash programming when
12-volt programming is selected.

• XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating
circuit.

• XTAL2
Output from the inverting oscillator amplifier.

• Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting
amplifier which can be configured for use as an on chip oscillator, as shown in Figure
5.3. Either a quartz crystal or ceramic resonator may be used. To drive the device from an
external clock source, XTAL2 should be left unconnected while XTAL1 is driven .

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Fig. 3.3 Crystal Connections

Fig. 3.4 External Clock Drive Configuration

There are no requirements on the duty cycle of the external clock signal, since the
input to the internal clocking circuitry is through a divide-by two flip-flop, but minimum
and maximum voltage high and low time specifications must be observed.

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• Idle Mode
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain
active. The mode is invoked by software. The content of the on-chip RAM and all the
special functions registers remain unchanged during this mode. The idle mode can be
terminated by any enabled interrupt or by a hardware reset. It should be noted that when
idle is terminated by a hardware reset, the device normally resumes program execution,
from where it left off, up to two machine cycles before the internal reset algorithm takes
control.
On-chip hardware inhibits access to internal RAM in this event, but access to the
port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin
when Idle is terminated by reset, the instruction following the one that invokes Idle
should not be one that writes to a port pin or to external memory.

• Power down Mode


In the power down mode the oscillator is stopped, and the instruction that invokes
power down is the last instruction executed. The on-chip RAM and Special Function
Registers retain their values until the power down mode is terminated. The only exit from
power down is a hardware reset. Reset redefines the SFRs but does not change the on-
chip RAM. The reset should not be activated before VCC is restored to its normal
operating level and must be held active long enough to allow the oscillator to restart and
stabilize.

Table 3.2 Status Of External Pins During Idle and Power Down Mode

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• Program Memory Lock Bits
On the chip are three lock bits which can be left unprogrammed (U) or can be
programmed (P) to obtain the additional features listed in the table 5.4. When lock bit 1 is
programmed, the logic level at the EA pin is sampled and latched during reset. If the
device is powered up without a reset, the latch initializes to a random value, and holds
that value until reset is activated. It is necessary that the latched value of EA be in
agreement with the current logic level at that pin in order for the device to function
properly.

Table 3.3 Lock Bit Protection Modes

TIMERS

• Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer
1 in the AT89S52.
Register pairs (TH0, TL1), (TH1, TL1) are the 16-bit counter registers for timer/c;
ounters 0 and 1.

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• Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event
counter. The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has
three operating modes: capture, auto-reload (up or down counting), and baud rate
generator. The modes are selected by bits in T2CON, as shown in Table 5.2. Timer 2
consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is
incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods,
the count rate is 1/12 of the oscillator frequency.

Table 3.4 Timer 2 Operating Modes

In the Counter function, the register is incremented in response to a 1-to-0


transition at its corresponding external input pin, T2. In this function, the external input is
sampled during S5P2 of every machine cycle. When the samples show a high in one
cycle and a low in the next cycle, the count is incremented. The new count value appears
in the register during S3P1 of the cycle following the one in which the transition was
detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-
to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that
a given level is sampled at least once before it changes, the level should be held for at
least one full machine cycle.
There are no restrictions on the duty cycle of external input signal, but it should
for at least one full machine to ensure that a given level is sampled at least once before it
changes.

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• Capture Mode
In the capture mode, two options are selected by bit EXEN2 in T2CON. If
EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in
T2CON.This bit can then be used to generate an interrupt. IfEXEN2 = 1, Timer 2
performs the same operation, but a 1-to-0 transition at external input T2EX also causes
the current value in TH2 and TL2 to be captured into RCAP2H andRCAP2L,
respectively. In addition, the transition at T2EXcauses bit EXF2 in T2CON to be set. The
EXF2 bit, likeTF2, can generate an interrupt.

• Auto-reload (Up or Down Counter)


Timer 2 can be programmed to count up or down when configured in its 16-bit
auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit
located in the SFR T2MOD (see Table 4). Upon reset, the DCEN bit is set to 0 so that
timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down,
depending on the value of the T2EX pin.

Table3.5: T2MOD-Timer 2 Mode Control Register

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Table3.6: T2CON-Timer/Counter2 Control Register

3.1.5 Interrupts

The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0
and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These
interrupts are all shown in Figure 2.5

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Fig. 3.5 Interrupts Source

Each of these interrupt sources can be individually enabled or disabled by setting


or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA,
which disables all interrupts at once.

Note that Table 5.3 shows that bit position IE.6 is unimplemented. In the
AT89C51, bit position IE.5 is also unimplemented. User software should not write 1s to
these bit positions, since they may be used in future AT89 products.

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Table 3.7 Interrupts Enable Register

Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register
T2CON. Neither of these flags is cleared by hardware when the service routine is
vectored to. In fact, the service routine may have to determine whether it was TF2 or
EXF2 that generated the interrupt, and that bit will have to be cleared in software.

The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in
which the timers overflow. The values are then polled by the circuitry in the next cycle.
However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which
the timer overflows.

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3.1.6 Special function registers:

Special function registers are the areas of memory that control specific
functionality of the 89c52 microcontroller.

a) Accumulator (0E0h)
As its name suggests, it is used to accumulate the results of large no. of
instructions. It can hold 8 bit values.

b) B register (oFoh)
The B register is very similar to accumulator. It may hold 8-bit value. The B
register is only used by MUL AB and DIV AB instructions. In MUL AB the higher byte
of the products gets stored in B register. In DIV AB the quotient gets stored in B with the
remainder in A.

c) Stack pointer (081h)


The stack pointer holds 8-bit value. This is used to indicate where the next value
to be removed from the stack should be taken from. When a value is to be pushed on to
the stack, the 8052 first store the value of SP and then store the value at the resulting
memory location. When a value is to be popped from the stack, the 8052 returns the value
from the memory location indicated by SP and then decrements the value of SP.

d) Data pointer (Data pointer low/high, address 82/83h)


The SFRs DPL and DPH work together to represent a 16-bit value called the data
pointer. The data pointer is used in operations regarding external RAM and some
instructions code memory. It is a 16-bit SFR and also an addressable SFR.

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e) Program counter
The program counter is a 16 bit register, which contains the 2 byte address, which
tells the next instruction to execute to be found in memory. When the 8052 is initialized
PC starts at 0000h and is incremented each time an instruction is executes. It is not
addressable SFR.

f) PCON (power control, 87h)


The power control SFR is used to control the 8052’s power control modes.
Certain operation modes of the 8052 allow the 8052 to go into a type of “sleep mode”
which consumes low power.

SMOD ---- --- ---- GF1 GF0 PD IDL

g)TCON(Timer control, 88h)


The timer mode control SFR is used to configure and modify the way in which
the 8052’s two timers operate. This SFR controls whether each of the two timers is
running or stopped and contains a flag to indicate that each timer has overflowed.
Additionally, some non-timer related bits are located in TCON SER. These bits are used
to configure the way in which the external interrupt flags are activated, which are set
when an external interrupt occur.

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

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h)TMOD(Timer Mode,89h)
The timer mode SFR is used to configure the mode of operation of each of the
two timers. Using this SR your program may configure each timer to be a 16-bit timer, or
13 bit timer, 8-bit auto reload timer, or two separate timers. Additionally you may
configure the timers to only count when an external pin is activated or to count “events”
that are indicated on an external pin.

‌ ‌
Gate C/ T M1 M0 Gate C/ T M1 M0

TIMER1 TIMER0

i) T0 (Timer 0 low/ high, address 8A/ 8C h)


These two SFRs together represent timer 0. Their exact behavior depends on how
the timer is configured in the TMOD SFR; however, these timers always count up. What
is configurable is how and when they increment value.

j) T1 (Timer 1 low/ high, address 8B/ 8D h)


These two SFRs together represent timer 1. Their exact behavior depends on how
the timer is configured in the TMOD SFR; however, these timers always count up. What
is configurable is how and when they increment in value.

k) P0 (Port 0, address 80h, bit addressable)

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This is port 0 latch. Each bit of this SFR corresponds to one of the pins on a micro
controller. Any data to be outputted to port 0 is first written on P0 register. For e.g., bit 0
of port 0 is pin P0.0, bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a
high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

l) P1(Port 1, address 90h, bit addressable)


This is port 1 latch. Each bit of this SFR corresponds to one of the pins on a micro
controller. Any data to be outputted to port 1 is first written on P1 register. For e.g., bit 0
of port 1 is pin P1.0, bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a
high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

m) P2 (Port 2, address 0A0h, bit addressable)


This is port 2 latch. Each bit of this SFR corresponds to one of the pins on a micro
controller. Any data to be outputted to port 2 is first written on P2 register. For e.g., bit 0
of port 2 is pin P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a
high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

n) P3 (Port 3, address 0B0h, bit addressable)


This is port 3 latch. Each bit of this SFR corresponds to one of the pins on a micro
controller. Any data to be outputted to port 3 is first written on P3 register. For e.g., bit 0
of port 3 is pin P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a
high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

o) IE (Interrupt Enable, 0A8h)


The interrupt enable SFR is used to enable and disable specific interrupts. The
low 7 bits of the SFR are used to enable/disable the specific interrupts, where the MSB
bit is used to enable or disable all the interrupts. Thus, if the high bit of IE 0 all interrupts
are disabled regardless of whether an individual interrupt is enabled by setting a lower
bit.

39
___
EA ET2 ES ET1 EX1 ET0 EX0

p) IP (Interrupt Priority, 0B8h)


The interrupt priority SFR is used to specify the relative priority of each interrupt.
On 8052, an interrupt may be either low or high priority. An interrupt may interrupt
interrupts. For e.g., if we configure all interrupts as low priority other than serial
interrupt. The serial interrupt always interrupts the system; even if another interrupt is
currently executing no other interrupt will be able to interrupt the serial interrupt routine
since the serial interrupt routine has the highest priority.

___ ___
PT2 PS PT1 PX1 PT0 PX0

q)PSW (Program Status Word, 0D0h)


The Program Status Word is used to store a number of important bits that are set
and cleared by 8052 instructions. The PSW SFR contains the carry flag, the auxiliary
carry flag, the parity flag and the overflow flag. Additionally, it also contains the register
bank select flags, which are used to select, which of the “R” register banks currently in
use.

CY AC F0 RS1 RS0 OV ---- P

r) SBUF (Serial Buffer, 99h)

40
SBUF is used to hold data in serial communication. It is physically two registers.
One is writing only and is used to hold data to be transmitted out of 8052 via TXD. The
other is read only and holds received data from external sources via RXD. Both mutually
exclusive registers use address 99h.

3.1.7 Memory Organization

The total memory of 89C52 system is logically divided in Program memory and
Data memory. Program memory stores the programs to be executed, while data memory
stores the data like intermediate results, variables and constants required for the execution
of the program. Program memory is invariably implemented using EPROM, because it
stores only program code which is to be executed and thus it need not be written into.
However, the data memory may be read from or written to and thus it is implemented
using RAM.
Further, the program memory and data memory both may be categorized as on-
chip (internal) and external memory, depending upon whether the memory physically
exists on the chip or it is externally interfaced. The 89C52 can address 8Kbytes on-chip
memory whose map starts from 0000H and ends at 1FFFH. It can address 64Kbytes of
external program memory under the control of PSEN (low) signal.
The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes
occupy a parallel address space to the Special Function Registers. That means the upper
128bytes have the same addresses as the SFR space but are physically separate from SFR
space. When an instruction accesses an internal location above address 7FH, the address
mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of
RAM or the SFR space. Instructions that use direct addressing access SFR space. For
example, the following direct addressing instruction accesses the SFR at location 0A0H
(which is P2).
MOV 0A0H, #data

41
Instructions that use indirect addressing access the upper128 bytes of RAM. For
example, the following indirect addressing instruction, where R0 contains 0A0H,
accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H)
.MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of
data RAM are available as stack space.

3.2. REGULATED POWER SUPPLY

3.2.1 Description

A variable regulated power supply, also called a variable bench power supply, is
one where you can continuously adjust the output voltage to your requirements. Varying
the output of the power supply is the recommended way to test a project after having
double checked parts placement against circuit drawings and the parts placement guide.
This type of regulation is ideal for having a simple variable bench power supply. Actually
this is quite important because one of the first projects a hobbyist should undertake is the
construction of a variable regulated power supply. While a dedicated supply is quite
handy e.g. 5V or 12V, it's much handier to have a variable supply on hand, especially for
testing. Most digital logic circuits and processors need a 5 volt power supply. To use
these parts we need to build a regulated 5 volt source. Usually you start with an
unregulated power supply ranging from 9 volts to 24 volts DC (A 12 volt power supply is
included with the Beginner Kit and the Microcontroller Beginner Kit.). To make a 5 volt
power supply, we use a LM7805 voltage regulator IC .

42
The LM7805 is simple to use. You simply connect the positive lead of your
unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect
the negative lead to the Common pin and then when you turn on the power, you get a 5
volt supply from the Output pin.

Circuit Features:
• Brief description of operation: Gives out well regulated +5V output, output
current capability of 100 mA
• Circuit protection: Built-in overheating protection shuts down output when
regulator IC gets too hot
• Circuit complexity: Very simple and easy to build
• Circuit performance: Very stable +5V output voltage, reliable operation
• Availability of components: Easy to get, uses only very common basic
components
• Design testing: Based on datasheet example circuit, I have used this circuit
successfully as part of many electronics projects
• Applications: Part of electronics devices, small laboratory power supply

43
• Power supply voltage: Unregulated DC 8-18V power supply
• Power supply current: Needed output current + 5 mA
• Component costs: Few dollars for the electronics components + the input
transformer cost

Fig.3.6 Block Diagram of Power Supply

44
Fig.3.7 Circuit Diagram of Power Supply

Basic Power Supply Circuit:

Above is the circuit of a basic unregulated dc power supply. A bridge rectifier


D1 to D4 rectifies the ac from the transformer secondary, which may also be a block
rectifier such as WO4 or even four individual diodes such as 1N4004 types. (See later re
rectifier ratings).
The principal advantage of a bridge rectifier is you do not need a centre tap on the
secondary of the transformer. A further but significant advantage is that the ripple
frequency at the output is twice the line frequency (i.e. 50 Hz or 60 Hz) and makes
filtering somewhat easier.
As a design example consider we wanted a small unregulated bench supply for
our projects. Here we will go for a voltage of about 12 - 13V at a maximum output
current (IL) of 500ma (0.5A). Maximum ripple will be 2.5% and load regulation is 5%.
Now the RMS secondary voltage (primary is whatever is consistent with your
area) for our power transformer T1 must be our desired output Vo PLUS the voltage
drops across D2 and D4 (2 * 0.7V) divided by 1.414.

45
This means that Vsec = [13V + 1.4V] / 1.414 which equals about 10.2V. Depending on
the VA rating of your transformer, the secondary voltage will vary considerably in
accordance with the applied load. The secondary voltage on a transformer advertised as
say 20VA will be much greater if the secondary is only lightly loaded.
If we accept the 2.5% ripple as adequate for our purposes then at 13V this
becomes 13 * 0.025 = 0.325 Vrms. The peak to peak value is 2.828 times this value. Vrip
= 0.325V X 2.828 = 0.92 V and this value is required to calculate the value of C1. Also
required for this calculation is the time interval for charging pulses. If you are on a 60Hz
system it it 1/ (2 * 60) = 0.008333 which is 8.33 milliseconds. For a 50Hz system it is
0.01 sec or 10 milliseconds.
Remember the tolerance of the type of capacitor used here is very loose. The
important thing to be aware of is the voltage rating should be at least 13V X 1.414 or
18.33. Here you would use at least the standard 25V or higher (absolutely not 16V).With
our rectifier diodes or bridge they should have a PIV rating of 2.828 times the Vsec or at
least 29V. Don't search for this rating because it doesn't exist. Use the next highest
standard or even higher. The current rating should be at least twice the load current
maximum i.e. 2 X 0.5A or 1A. A good type to use would be 1N4004, 1N4006 or 1N4008
types.
These are rated 1 Amp at 400PIV, 600PIV and 1000PIV respectively. Always be
on the lookout for the higher voltage ones when they are on special.

3.2.2 IC Voltage Regulators:

Voltage regulators comprise a class of widely used ICs. Regulator IC units


contain the circuitry for reference source, comparator amplifier, control device, and
overload protection all in a single IC. Although the internal construction of the IC is
somewhat different from that described for discrete voltage regulator circuits, the external
operation is much the same. IC units provide regulation of either a fixed positive voltage,
a fixed negative voltage, or an adjustably set voltage.

A power supply can be built using a transformer connected to the ac supply line to
step the ac voltage to desired amplitude, then rectifying that ac voltage, filtering with a

46
capacitor and RC filter, if desired, and finally regulating the dc voltage using an IC
regulator. The regulators can be selected for operation with load currents from hundreds
of mill amperes to tens of amperes, corresponding to power ratings from mill watts to
tens of watts.
Three-Terminal Voltage Regulators:
Fixed Positive Voltage Regulators:

Vin IN OUT Vout


78XX
C1 C2
GND

Fig shows the basic connection of a three-terminal voltage regulator IC to a load.


The fixed voltage regulator has an unregulated dc input voltage, Vi, applied to one input
terminal, a regulated output dc voltage, Vo, from a second terminal, with the third
terminal connected to ground. While the input voltage may vary over some permissible
voltage range, and the output load may vary over some acceptable range, the output
voltage remains constant within specified voltage variation limits. A table of positive
voltage regulated ICs is provided in table. For a selected regulator, IC device
specifications list a voltage range over which the input voltage can vary to maintain a
regulated output voltage over a range of load current. The specifications also list the
amount of output voltage change resulting from a change in load current (load regulation)
or in input voltage (line regulation).

IC No. Output voltage(v) Maximum input voltage(v)

7805 +5
7806 +6 35V
7808 +8
7810 +10
7812

47
7815 +12
7818 +15
7824 +18
+24 40V

Table 3.8 Positive Voltage Regulators in 7800 series

3.3 RELAYS:

A relay is an electrically operated switch. Current flowing through the coil of


the relay creates a magnetic field which attracts a lever and changes the switch contacts.
The coil current can be on or off so relays have two switch positions and they are double
throw (changeover) switches.

Relays allow one circuit to switch a second circuit which can be completely
separate from the first. For example a low voltage battery circuit can use a relay to switch

48
a 230V AC mains circuit. There is no electrical connection inside the relay between the
two circuits, the link is magnetic and mechanical.

The coil of a relay passes a relatively large current, typically 30mA for a 12V
relay, but it can be as much as 100mA for relays designed to operate from lower voltages.
Most ICs (chips) cannot provide this current and a transistor is usually used to amplify
the small IC current to the larger value required for the relay coil. The maximum output
current for the popular 555 timer IC is 200mA so these devices can supply relay coils
directly without amplification.

Relays are usuallly SPDT or DPDT but they can have many more sets of switch
contacts, for example relays with 4 sets of changeover contacts are readily available. For
further information about switch contacts and the terms used to describe them please see
the page on switches.

Most relays are designed for PCB mounting but you can solder wires directly to
the pins providing you take care to avoid melting the plastic case of the relay. The
supplier's catalogue should show you the relay's connections. The coil will be obvious
and it may be connected either way round. Relay coils produce brief high voltage 'spikes'
when they are switched off and this can destroy transistors and ICs in the circuit. To
prevent damage you must connect a protection diode across the relay coil.

The animated picture shows a working relay with its coil and switch contacts.
You can see a lever on the left being attracted by magnetism when the coil is switched
on. This lever moves the switch contacts. There is one set of contacts (SPDT) in the
foreground and another behind them, making the relay DPDT.

49
The relay's switch connections are usually labelled COM, NC and NO:

• COM = Common, always connect to this, it is the moving part of the switch.
• NC = Normally Closed, COM is connected to this when the relay coil is off.
• NO = Normally Open, COM is connected to this when the relay coil is on.
• Connect to COM and NO if you want the switched circuit to be on when the
relay coil is on.
• Connect to COM and NC if you want the switched circuit to be on when the
relay coil is off.

Choosing a relay

You need to consider several features when choosing a relay:

1. Physical size and pin arrangement


If you are choosing a relay for an existing PCB you will need to ensure that its
dimensions and pin arrangement are suitable. You should find this information in
the supplier's catalogue.
2. Coil voltage
The relay's coil voltage rating and resistance must suit the circuit powering the
relay coil. Many relays have a coil rated for a 12V supply but 5V and 24V relays
are also readily available. Some relays operate perfectly well with a supply
voltage which is a little lower than their rated value.
3. Coil resistance
The circuit must be able to supply the current required by the relay coil. You can
use Ohm's law to calculate the current:

50
supply
voltage
Relay coil current =
coil resistance
4. For example: A 12V supply relay with a coil resistance of 400 passes a current
of 30mA. This is OK for a 555 timer IC (maximum output current 200mA), but it
is too much for most ICs and they will require a transistor to amplify the current.

5. Switch ratings (voltage and current)


The relay's switch contacts must be suitable for the circuit they are to control. You
will need to check the voltage and current ratings. Note that the voltage rating is
usually higher for AC, for example: "5A at 24V DC or 125V AC".
6. Switch contact arrangement (SPDT, DPDT etc)
Most relays are SPDT or DPDT which are often described as "single pole
changeover" (SPCO) or "double pole changeover" (DPCO). For further
information please see the page on switches.

Protection diodes for relays

Transistors and ICs (chips) must be protected from the brief high voltage 'spike' produced
when the relay coil is switched off. The diagram shows how a signal diode (eg 1N4148)
is connected across the relay coil to provide this protection. Note that the diode is
connected 'backwards' so that it will normally not conduct. Conduction only occurs when
the relay coil is switched off, at this moment current tries to continue flowing through the
coil and it is harmlessly diverted through the diode. Without the diode no current could
flow and the coil would produce a damaging high voltage 'spike' in its attempt to keep the
current flowing.

Reed relays

51
Reed relays consist of a coil surrounding a reed switch. Reed switches are normally
operated with a magnet, but in a reed relay current flows through the coil to create a
magnetic field and close the reed switch.

Reed relays generally have higher coil resistances than standard relays (1000 for
example) and a wide range of supply voltages (9-20V for example). They are capable of
switching much more rapidly than standard relays, up to several hundred times per
second; but they can only switch low currents (500mA maximum for example).

The reed relay shown in the photograph will plug into a standard 14-pin
DIL socket ('chip holder'). For further information about reed switches please see
thepageonswitches.

Relays and transistors compared

Like relays, transistors can be used as an electrically operated switch. For


switching small DC currents (< 1A) at low voltage they are usually a better choice than a
relay. However transistors cannot switch AC or high voltages (such as mains electricity)
and they are not usually a good choice for switching large currents (> 5A). In these cases
a relay will be needed, but note that a low power transistor may still be needed to switch
the current for the relay's coil! The main advantages and disadvantages of relays are listed
below:

Advantages of relays:

• Relays can switch AC and DC, transistors can only switch DC.
• Relays can switch high voltages, transistors cannot.
• Relays are a better choice for switching large currents (> 5A).
• Relays can switch many contacts at once.

Disadvantages of relays:

52
• Relays are bulkier than transistors for switching small currents.
• Relays cannot switch rapidly (except reed relays), transistors can switch many
times per second.
• Relays use more power due to the current flowing through their coil.
• Relays require more current than many chips can provide, so a low power
transistor may be needed to switch the current for the relay's coil.

3.4 ULN DRIVER

ULN is mainly suited for interfacing between low-level circuits and multiple
peripheral power loads,. The series ULN20XX high voltage, high current Darlington
arrays features continuous load current ratings. The driving circuitry in- turn decodes the
coding and conveys the necessary data to the stepper motor, this module aids in the
movement of the arm.

53
Fig.3.8 ULN Pin Connection and Block Diagram

Relay Driver ULN 2803:

54
The ULN2803A is a high-voltage, high-current Darlington transistor array. The
device consists of eight npn Darlington pairs that feature high-voltage outputs with
common-cathode clamp diodes for switching inductive loads. The collector-current rating
of each Darlington pair is 500 mA. The Darlington pairs may be connected in parallel for
higher current capability.

Features:
1. 500-mA Rated Collector Current (Single Output)
2. High-Voltage Outputs . . . 50 V
3. Output Clamp Diodes
4. Inputs Compatible With Various Types of Logic
5. Relay Driver Applications
6. Compatible with ULN2800A Series

Fig.3.9 ULN Pin Diagram

55
Fig.3.10 Logic Diagram

Fig.3.11 Schematic Diagram

Applications:
The applications include relay drivers, hammer drivers, lamp drivers, display
drivers (LED and gas discharge), line drivers, and logic buffers. The ULN2803A has a
2.7-kΩ series base resistor for each Darlington pair for operation directly with TTL or 5-
V CMOS devices

3.5 DTMFHT9170B

56
The HT9170B/D are Dual Tone Multi Frequency (DTMF) receivers integrated
with digital decoder and band split filter functions as well as power-down mode and
inhibit mode operations. Such devices use digital counting techniques to detect and
decode all the 16 DTMF tone pairs into a 4-bit code output.
Highly accurate switched capacitor filters are implemented to divide tone signals into low
and high group signals. A built-in dial tone rejection circuit is provided to eliminate the
need for pre-filtering.

Features:
1. Operating voltage: 2.5V~5.5V
2. Minimal external components
3. No external filter is required
4. Low standby current (on power down mode)
5. Excellent performance
6. Tristate data output for MCU interface
7. 3.58MHz crystal or ceramic resonator
8. 1633Hz can be inhibited by the INH pin

57
Fig.3.12 Pin Diagram HT9170B

58
Table 3.9 Pin Connection HT9170B

59
Fig.3.13 Block Diagram of Decoder IC

Functional Description:
The HT9170B/D tone decoders consist of three band pass filters and two digital
decode circuits to convert a tone (DTMF) signal into digital code output. An operational
amplifier is built-in to adjust the input signal. The pre-filter is a band rejection filter,
which reduces the dialing tone from 350Hz to 400Hz. The low group filter filters low
group frequency signal output whereas the high group filter filters high group Frequency
signal output. A zero-crossing detector with follows each filters output hysteretic. When
each signal amplitude at the output exceeds the specified level, it is transferred to full
swing logic signal. When input signals are recognized to be effective, DV becomes high,
and the correct tone code (DTMF) digit is transferred.

Steering control circuit:

60
The steering control circuit is used for measuring the effective signal duration and
for protecting against drop out of valid signals. It employs the analog delay by external
RC time-constant controlled by EST.
The EST pin is normally low and draws the RT/GT pin to keep low through discharge of
external RC. When a valid tone input is detected, EST goes high to charge RT/GT
through RC.
When the voltage of RT/GT changes from 0 to VTRT (2.35V for 5V supply), the
input signal is effective, and the code detector will create the correct code. After D0~D3
are completely latched, DV output becomes high. When the voltage of RT/GT falls down
from VDD to VTRT (i.e. when there is no input tone), DV output becomes Low, and
D0~D3 keeps data until a next valid tone input is produced. By selecting adequate
external RC value, the minimum acceptable input tone duration (tACC) and the minimum
acceptable inter-tone rejection (tIR) can be set. External Components (R, C) are chosen
by the formula.

tACC= tDP+tGTP;
tIR=tDA+tGTA;
where ,
tACC: Tone duration acceptable time
TDP: EST output delay time (_L__H_)
TGTP: Tone present time
TIR: Inter-digit pause rejection time
TDA: EST output delay time (_H__L_)
tGTA: Tone absent time

61
Fig.3.14 Timing Diagram

Applications of Decoder:
1. PABX
2. Central office
3. Mobile radio
4. Remote control
5. Remote data entry
6. Call limiting
7. Telephone answering system

62
CHAPTER 4
ALGORITHM

63
4.1 Alogorithm

START

ON THE POWER
SUPPLY

CONNECT THE
MOBILE TO THE GSM
PORT

PRESS KEYS

IF YES
BULB ON
1

IF
2 YES PLUG ON

IF YES
3 MOTOR ON

YES
IF
BULB OFF
4

64
IF
5 YES PLUG OFF

IF YES
6 MOTOR OFF

STOP

The process to operate this project is first make a mobile to mobile connection
wirelessly or with a single mobile onboard wired. But here we are using to mobiles to
make is a wireless application. Start with making a connection with the onboard mobile
from remote distance, then when connection is established lets control the project with
the data as follows:
To operate the BULB just press “1” to switch ON and also to switch OFF again
press “4”. This ON/OFF condition of BULB is through Relay where switching is very
fast and accurate.
To operate the PLUG just press “2” to switch ON and also to switch OFF again
press “5”. This ON/OFF condition of PLUG is through Relay where switching is very
fast and accurate
To operate the DC MOTOR just press “3” to switch ON and also to switch OFF
again press “6”. This ON/OFF condition of DC MOTOR is through Relay where
switching is very fast and accurate.

65
CHAPTER 5
CONCLUSIONS

66
5.1 Conclusion

The project “GSM BASED HOME AUTOMATION” has been successfully


designed and tested. Integrating features of all the hardware components used have
developed it. Presence of every module has been reasoned out and placed carefully thus
contributing to the best working of the unit. Secondly, using highly advanced IC’s and
with the help of growing technology the project has been successfully implemented.
Embedded systems are emerging as a technology with high potential. In the past
decades micro processor based embedded system ruled the market. The last decade
witnessed the revolution of Microcontroller based embedded systems.. With regards to
the requirements gathered the manual work and the complexity in counting can be
achieved with the help of electronic devices.

67
BIBLIOGRAPHY

NAME OF THE SITES

1. WWW.MITEL.DATABOOK.COM
2. WWW.ATMEL.DATABOOK.COM
3. WWW.FRANKLIN.COM
4. WWW.KEIL.COM

REFERENCES

1. 8051-MICROCONTROLLER AND EMBEDDED SYSTEM.


Mohd. Mazidi.

2. EMBEDDED SOFTWARE PRIMER.


David .E. Simon.

68
APPENDIX

Source Code :

#include<reg51.h>
sbit P^2.0=bulb;
sbit P^2.1=fan;
sbit P^2.2=plug;

void main()
{
while(1)
{
P3=0xff;
P2=0x00;
if(P3=0xf1)
{
bulb=1;
}
if(P3=0xf2)
{
fan=1;
}
if(P3=0xf3)
{
plug=1;
}
if(P3=0XF4)
{
bulb=0;
}
if(P3=0xf5)
{
fan=0;
}
if(P3=0xf6)
{
plug=0;

}
}}

69

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