Suez Canal University

Faculty of Engineering Department of Electrical

Ismailia Campus Engineering

BJT Amplifier Sheet

1- For the circuit shown in figure 1
a) Determine the dc values for the amplifier , , , , ,
b) Determine the ac values for the amplifier (base), , , ,
c) Assume that a 600 Ω, 12 µV rms voltage source is driving the amplifier, Determine the overall
voltage gain by taking into account the attenuation in the base circuit, and find the total output
voltage (ac and dc). What is the phase relationship of the collector signal voltage to the base signal
voltage?

Figure 1 : Problem 1

2- The amplifier in Figure 2 has a variable gain control, using a 100 Ω potentiometer for RE with the wiper
ac-grounded. As the potentiometer is adjusted, more or less of RE is bypassed to ground, thus varying
the gain. The total remains constant to dc, keeping the bias fixed.
a) Determine the maximum and minimum gains for this unloaded amplifier.
b) If a load resistance of 600 Ω is placed on the output of the amplifier, what are the maximum and
minimum gains?
c) Find the overall maximum voltage gain
for the amplifier in Figure 6–53 with a
1KΩ load if it is being driven by a 300 kΩ
source.

Figure 2 : Problem 2
3- For the amplifier in figure 3
a) Determine the exact voltage gain for the unloaded
emitter-follower in Figure 3
b) What is the total input resistance in Figure 3? What
is the dc output voltage?
c) A load resistance is capacitively coupled to the
emitter in Figure 3. In terms of signal operation, the
load appears in parallel with and reduces the
effective emitter resistance. How does this affect the
voltage gain?
d) What value of will cause the voltage gain to drop Figure 3 : Problem 3

to 0.9?

4- For the circuit in Figure 4, determine the

following:
a) Q1 and Q2 dc terminal voltages
b) Overall
c) for each transistor
d) total input resistance
e) Find the overall current gain

Figure 4 : Problem 4
5- For the circuit shown in figure 5
a) Find (emitter), , , and for the unloaded amplifier in Figure 5.
b) Match the following generalized characteristics with the appropriate amplifier configuration.
i. Unity current gain, high voltage gain, very low input resistance
ii. High current gain, high voltage gain, low input resistance
iii. High current gain, unity voltage gain, high input resistance

Figure 5 : Problem5
6- For the circuit shown in figure 6
a) For the two-stage, capacitively coupled amplifier in Figure 6, find the following values:
i. voltage gain of each stage
ii. overall voltage gain
iii. Express the gains found in (a) and (b) in dB.
b) If the multistage amplifier in Figure 6–57 is driven by a 75 Ω, 50 µV source and the second stage is
loaded with a RL = 18 kΩ determine
i. voltage gain of each stage
ii. overall voltage gain
iii. Express the gains found in (a) and (b) in dB.

Figure 6 : Problem 6

7- The dc base voltages in Figure 6–59 are zero. Using your

knowledge of transistor analysis, determine the dc differential
output voltage. Assume that Q1 has α = 0.980 and Q2 has α
= 0.975.

8- Repeat problem 2, 4, 5, 6, 7 with Multisim simulation program.

Figure 7 : Problem 7